Data Sheet
LC2MOS 4-/8-Channel
High Performance Analog Multiplexers
ADG408/ADG409
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
44 V supply maximum ratings
VSS to VDD analog signal range
Low on resistance (100 Ω maximum)
Low power (ISUPPLY < 75 μA)
Fast switching
Break-before-make switching action
Plug-in replacement for DG408/DG409
ADG408
ADG409
S1
S1A
DA
S4A
D
S1B
DB
S8
S4B
APPLICATIONS
1-OF-4
DECODER
A0 A1 A2 EN
A0
A1
EN
00027-001
1-OF-8
DECODER
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG408/ADG409 are monolithic CMOS analog multiplexers
comprising eight single channels and four differential channels,
respectively. The ADG408 switches one of eight inputs to a
common output as determined by the 3-bit binary address lines
A0, A1, and A2. The ADG409 switches one of four differential
inputs to a common differential output, as determined by the
2-bit binary address lines A0 and A1. An EN input on both devices
is used to enable or disable the device. When the device is disabled,
all channels are switched off.
1.
Extended Signal Range. The ADG408/ADG409 are
fabricated on an enhanced LC2MOS process, giving an
increased signal range that extends to the supply rails.
2.
Low Power Dissipation.
3.
Low RON.
4.
Single-Supply Operation. For applications where the
analog signal is unipolar, the ADG408/ADG409 can be
operated from a single rail power supply. The parts are
fully specified with a single 12 V power supply and remain
functional with single supplies as low as 5 V.
The ADG408/ADG409 are designed on an enhanced LC2MOS
process that provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when on and has an input signal
range that extends to the supplies. In the off condition, signal levels
up to the supplies are blocked. All channels exhibit break-beforemake switching action, preventing momentary shorting when
switching channels. Inherent in the design is low charge injection
for minimum transients when switching the digital inputs.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 analog multiplexers.
Rev. D
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ADG408/ADG409
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................6
Applications ....................................................................................... 1
ESD Caution...................................................................................6
Functional Block Diagrams ............................................................. 1
Pin Configurations and Function Descriptions ............................7
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................8
Product Highlights ........................................................................... 1
Test Circuits ..................................................................................... 11
Revision History ............................................................................... 2
Terminology .................................................................................... 13
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 14
Dual Supply ................................................................................... 3
Ordering Guide .......................................................................... 15
Single Supply ................................................................................. 4
REVISION HISTORY
3/15—Rev. C to Rev. D
Changes to Figure 12 and Figure 15 ............................................... 9
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 16
3/03—Rev. A to Rev. B
Changes to Ordering Guide .............................................................4
Updated Outline Dimensions ....................................................... 11
2/01—Revision 0: Initial Version
10/06—Rev. B to Rev. C
Updated Format .................................................................. Universal
Changes to Table 3 ............................................................................ 6
Inserted Table 4 and Table 5 ............................................................ 7
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15
Rev. D | Page 2 of 15
Data Sheet
ADG408/ADG409
SPECIFICATIONS
DUAL SUPPLY
VDD = 15 V, VSS = −15 V, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
∆RON
LEAKAGE CURRENTS
Source Off Leakage IS (Off )
Drain Off Leakage ID (Off )
ADG408
ADG409
Channel On Leakage ID, IS (On)
ADG408
ADG409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS1
tTRANSITION
B Version
−40°C to
+85°C
+25°C
T Version
−55°C to
+125°C
+25°C
VSS to VDD
40
100
15
125
±0.5
VSS to VDD
Unit
V
Ω typ
Ω max
Ω max
Test Conditions/Comments
40
100
15
125
VD = ±10 V, IS = −10 mA
±50
±0.5
±50
nA max
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
2.4
0.8
V min
V max
±10
μA max
pF typ
VIN = 0 or VDD
f = 1 MHz
120
250
10
ns typ
ns max
ns min
125
225
65
150
RL = 300 Ω, CL = 35 pF;
VS1 = ±10 V, VS8 = 10 V; see Figure 22
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 23
RL = 300 Ω CL = 35 pF;
VS = 5 V; see Figure 24
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 24
VS = 0 V, RS = 0 Ω, CL = 10 nF; see Figure 25
RL = 1 kΩ, f = 100 kHz;
VEN = 0 V; see Figure 26
RL = 1 kΩ, f = 100 kHz; see Figure 27
f = 1 MHz
f = 1 MHz
VD = +10 V, −10 V
VD = ±10 V, VS = 10 V; see Figure 19
VD = ±10 V, VS = 10 V; see Figure 20
VS = VD = ±10 V; see Figure 21
2.4
0.8
±10
8
tOPEN
10
tON (EN)
85
150
8
120
250
10
Charge Injection
OFF Isolation
20
−75
20
−75
ns typ
ns max
ns typ
ns max
pC typ
dB typ
Channel-to-Channel Crosstalk
CS (OFF)
CD (OFF)
ADG408
ADG409
CD, CS (ON)
ADG408
ADG409
85
11
85
11
dB typ
pF typ
40
20
40
20
pF typ
pF typ
54
34
54
34
pF typ
pF typ
tOFF (EN)
125
225
65
150
10
85
150
f = 1 MHz
Rev. D | Page 3 of 15
ADG408/ADG409
Parameter
POWER REQUIREMENTS
IDD
Data Sheet
B Version
−40°C to
+85°C
+25°C
1
5
1
5
ISS
IDD
1
T Version
−55°C to
+125°C
+25°C
100
200
1
5
1
5
100
200
500
500
Unit
Test Conditions/Comments
μA typ
μA max
μA typ
μA max
μA typ
μA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
Guaranteed by design, not subject to production test.
SINGLE SUPPLY
VDD = 12 V, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
RON
LEAKAGE CURRENTS
Source Off Leakage IS (Off )
Drain Off Leakage ID (Off )
ADG408
ADG409
Channel On Leakage ID, IS (On)
ADG408
ADG409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS1
tTRANSITION
B Version
−40°C to
+25°C +85°C
T Version
−55°C to
+125°C
+25°C
0 to VDD
90
0 to VDD
90
Unit
Test Conditions/Comments
V
Ω typ
VD = 3 V, 10 V, IS = –1 mA
±0.5
±50
±0.5
±50
nA max
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
±1
±1
±100
±50
±1
±1
±100
±50
nA max
nA max
2.4
0.8
V min
V max
±10
VD = 8 V/0 V, VS = 0 V/8 V; see Figure 19
VD = 8 V/0 V, VS = 0 V/8 V; see Figure 20
VS = VD = 8 V/0 V; see Figure 21
2.4
0.8
8
±10
8
μA max
pF typ
VIN = 0 or VDD
f = 1 MHz
130
130
ns typ
tOPEN
10
10
ns typ
tON (EN)
140
140
ns typ
tOFF (EN)
60
60
ns typ
Charge Injection
Off Isolation
5
–75
5
–75
pC typ
dB typ
RL = 300 Ω, CL = 35 pF;
VS1 = 8 V/0 V, VS8 = 0 V/8 V; see Figure 22
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 23
RL = 300 Ω CL = 35 pF;
VS = 5 V; see Figure 24
RL = 300 Ω, CL = 35 pF;
VS = 5 V; see Figure 24
VS = 0 V, RS = 0 Ω, CL = 10 nF; see Figure 25
RL = 1 kΩ f = 100 kHz;
VEN = 0 V; see Figure 26
Rev. D | Page 4 of 15
Data Sheet
Parameter
Channel-to-Channel Crosstalk
CS (Offf )
CD (Off )
ADG408
ADG409
CD, CS (On)
ADG408
ADG409
POWER REQUIREMENTS
IDD
IDD
1
ADG408/ADG409
B Version
−40°C to
+25°C +85°C
85
11
T Version
−55°C to
+125°C
+25°C
85
11
Unit
dB typ
pF typ
40
20
40
20
pF typ
pF typ
54
34
54
34
pF typ
pF typ
Test Conditions/Comments
RL = 1 kΩ, f = 100 kHz; see Figure 27
f = 1 MHz
f = 1 MHz
f = 1 MHz
1
5
100
200
500
1
5
100
200
500
Guaranteed by design, not subject to production test.
Rev. D | Page 5 of 15
μA typ
μA max
μA typ
μA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
ADG408/ADG409
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog, Digital Inputs
Continuous Current, S or D
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle
Maximum)
Operating Temperature Range
Industrial (B Version)
Extended (T Version)
Storage Temperature Range
Junction Temperature
CERDIP Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering
(10 sec)
PDIP Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering
(10 sec)
TSSOP Package, Power Dissipation
θJA, Thermal Impedance
θJC, Thermal Impedance
SOIC Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
44 V
−0.3 V to +32 V
+0.3 V to −32 V
VSS − 2 V to VDD + 2 V or 20 mA,
whichever occurs first
20 mA
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
40 mA
−40°C to +85°C
−55°C to +125°C
−65°C to +150°C
150°C
900 mW
76°C/W
300°C
470 mW
117°C/W
260°C
450 mW
155°C/W
50°C/W
600 mW
77°C/W
215°C
220°C
Rev. D | Page 6 of 15
Data Sheet
ADG408/ADG409
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
A0
1
16 A1
A0
1
16
A1
EN
2
15 A2
EN
2
15
GND
VSS
3
VSS
3
S1
4
S1A
4
S2
5
S2A
5
S3
6
11 S6
S3A
6
11
S3B
S4
7
10 S7
S4A
7
10
S4B
D
8
9
DA
8
9
DB
14 GND
S8
00027-002
TOP VIEW
13 VDD
(Not to Scale)
12 S5
ADG409
VDD
TOP VIEW
(Not to Scale) 13 S1B
12 S2B
14
00027-003
ADG408
Figure 3. ADG409 Pin Configuration
Figure 2. ADG408 Pin Configuration
Table 4. ADG408 Pin Function Descriptions
Table 5. ADG409 Pin Function Descriptions
Pin
No.
1
2
Mnemonic
A0
EN
Pin
No.
1
2
Mnemonic
A0
EN
3
VSS
3
VSS
4
S1
4
S1A
5
S2
5
S2A
6
S3
6
S3A
7
S4
7
S4A
8
D
8
DA
9
S8
9
DB
10
S7
10
S4B
11
S6
11
S3B
12
S5
12
S2B
13
14
15
16
VDD
GND
A2
A1
13
S1B
14
15
16
VDD
GND
A1
Description
Logic Control Input.
Active High Digital Input. When low, the
device is disabled and all switches are off.
When high, Ax logic inputs determine on
switches.
Most Negative Power Supply Potential in
Dual Supplies. In single-supply applications,
it can be connected to ground.
Source Terminal 1. Can be an input or
an output.
Source Terminal 2. Can be an input or
an output.
Source Terminal 3. Can be an input or
an output.
Source Terminal 4. Can be an input or
an output.
Drain Terminal. Can be an input or an
output.
Source Terminal 8. Can be an input or
an output.
Source Terminal 7. Can be an input or
an output.
Source Terminal 6. Can be an input or
an output.
Source Terminal 5. Can be an input or
an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input.
Logic Control Input.
Table 6. ADG408 Truth Table
A2
X
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
Description
Logic Control Input.
Active High Digital Input. When low, the
device is disabled and all switches are off.
When high, Ax logic inputs determine on
switches.
Most Negative Power Supply Potential in
Dual Supplies. In single-supply applications,
it can be connected to ground.
Source Terminal 1A. Can be an input or
an output.
Source Terminal 2A. Can be an input or
an output.
Source Terminal 3A. Can be an input or
an output.
Source Terminal 4A. Can be an input or
an output.
Drain Terminal A. Can be an input or an
output.
Drain Terminal B. Can be an input or an
output.
Source Terminal 4B. Can be an input or
an output.
Source Terminal 3B. Can be an input or
an output.
Source Terminal 2B. Can be an input or
an output.
Source Terminal 1B. Can be an input or
an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input.
Table 7. ADG409 Truth Table
On Switch
None
1
2
3
4
5
6
7
8
A1
X
0
0
1
1
Rev. D | Page 7 of 15
A0
X
0
1
0
1
EN
0
1
1
1
1
On Switch
Pair
None
1
2
3
4
ADG408/ADG409
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
120
180
TA = 25°C
TA = 25°C
160
VDD = +5V
VSS = –5V
100
VDD = 5V
VSS = 0V
140
RON (Ω)
VDD = +10V
VSS = –10V
RON (Ω)
VDD = +12V
VSS = –12V
80
60
120
VDD = 12V
VSS = 0V
VDD = 10V
VSS = 0V
100
80
VDD = +15V
VSS = –15V
–10
–5
0
VD [VS] (V)
5
10
15
40
00027-004
20
–15
130
VDD = +15V
VSS = –15V
9
12
15
VDD = 12V
VSS = 0V
120
110
70
RON (Ω)
RON (Ω)
6
Figure 7. RON as a Function of VD (VS): Single-Supply Voltage
80
125°C
60
85°C
50
100
125°C
90
85°C
80
25°C
30
–15
–10
70
–5
0
5
10
15
VD [VS] (V)
60
00027-005
40
Figure 5. RON as a Function of VD (VS) for Different Temperatures
25°C
0
2
4
6
VD [VS] (V)
8
10
12
Figure 8. RON as a Function of VD (VS) for Different Temperature
0.2
0.04
TA = 25°C
VDD = +15V
VSS = –15V
TA = 25°C
VDD = 12V
VSS = 0V
LEAKAGE CURRENT (nA)
0.02
0.1
IS (OFF)
0
ID (OFF)
ID (ON)
–0.1
ID (ON)
0
ID (OFF)
IS (OFF)
–0.02
–0.2
–15
–10
–5
0
VD [VS] (V)
5
10
15
–0.06
Figure 6. Leakage Currents as a Function of VD (VS)
0
2
4
6
VD [VS] (V)
8
10
Figure 9. Leakage Currents as a Function of VD (VS)
Rev. D | Page 8 of 15
12
00027-009
–0.04
00027-006
LEAKAGE CURRENT (nA)
3
00027-008
90
0
VD [VS] (V)
Figure 4. RON as a Function of VD (VS): Dual-Supply Voltage
100
VDD = 15V
VSS = 0V
60
00027-007
40
Data Sheet
ADG408/ADG409
140
VDD = 12V
VSS = 0V
VDD = +15V
VSS = –15V
TIME (ns)
80
tON (EN)
60
tOFF (EN)
40
20
1
3
5
7
tON (EN)
100
80
60
9
11
13
15
VIN (V)
40
00027-010
TIME (ns)
120
tOFF (EN)
1
3
Figure 10. Switching Time vs. VIN (Bipolar Supply)
5
7
VIN (V)
9
13
00027-013
tTRANSITION
100
tTRANSITION
±15
00027-014
120
11
Figure 13. Switching Time vs. VIN (Single Supply)
400
300
VIN = 5V
VIN = 5V
300
200
TIME (ns)
tON (EN)
200
tTRANSITION
tON (EN)
100
100
5
7
9
11
VSUPPLY (V)
13
15
0
00027-011
0
tOFF (EN)
tOFF (EN)
±5
±7
Figure 11. Switching Time vs. Single Supply
100,000
VDD = +15V
VSS = –15V
VDD = +15V
VSS = –15V
10,000
1,000
10,000
ISS (µA)
100
1,000
EN = 2.4V
10
1
EN = 0V
EN = 2.4V
0.1
100
0.01
0.001
EN = 0V
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
00027-012
IDD (µA)
±13
Figure 14. Switching Time vs. Bipolar Supply
100,000
10
10
±9
±11
VSUPPLY (V)
0.0001
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
Figure 15. Negative Supply Current vs. Switching Frequency
Figure 12. Positive Supply Current vs. Switching Frequency
Rev. D | Page 9 of 15
10M
00027-015
TIME (ns)
tTRANSITION
ADG408/ADG409
Data Sheet
110
110
VDD = +15V
VSS = –15V
VDD = +15V
VSS = –15V
100
CROSSTALK (dB)
90
90
80
80
70
1k
10k
100k
FREQUENCY (Hz)
1M
60
Figure 16. Off Isolation vs. Frequency
1k
10k
100k
FREQUENCY (Hz)
Figure 17. Crosstalk vs. Frequency
Rev. D | Page 10 of 15
1M
00027-017
70
00027-016
OFF ISOLATION (dB)
100
Data Sheet
ADG408/ADG409
TEST CIRCUITS
IDS
V1
S1
VDD
VSS
VDD
VSS
S2
D
D
S8
00027-018
RON = V1/IDS
GND
VS
S1
IS (OFF)
VSS
VDD
VSS
Figure 20. ID (Off)
S2
A
D
S8
VD
EN
VDD
VSS
VDD
VSS
S1
D
S8
2.4V
ID (ON)
0.8V
00027-019
VS
GND
EN
GND
VS
Figure 19. IS (Off)
A
VD
Figure 21. ID (On)
3V
ADDRESS
DRIVE (VIN)
A
VD
Figure 18. On Resistance
VDD
ID (OFF)
0.8V
00027-020
VS
EN
00027-021
S
50%
50%
tr < 20ns
tf < 20ns
VDD
VSS
VDD
VSS
A0
0V
VIN
S1
A1
50Ω
A2
tTRANSITION
VS1
S2–S7
tTRANSITION
VS8
S8
ADG4081
90%
2.4V
OUTPUT
OUTPUT
D
EN
300Ω
GND
35pF
00027-022
90%
1SIMILAR CONNECTION FOR ADG409.
Figure 22. Switching Time of Multiplexer, tTRANSlTlON
3V
ADDRESS
DRIVE (VIN)
VDD
VSS
VDD
VSS
A0
VIN
0V
S1
A1
50Ω
VS
S2–S7
A2
S8
80%
ADG4081
80%
OUTPUT
2.4V
OUTPUT
D
EN
GND
300Ω
35pF
1SIMILAR CONNECTION FOR ADG409.
Figure 23. Break-Before-Make Delay, tOPEN
Rev. D | Page 11 of 15
00027-023
tOPEN
ADG408/ADG409
Data Sheet
3V
50%
VSS
VDD
VSS
A0
50%
S1
A1
0V
A2
tON (EN)
ADG4081
tOFF (EN)
0.9VO
0.9VO
OUTPUT
VS
S2–S8
OUTPUT
D
EN
VIN
50Ω
1SIMILAR
35pF
300Ω
GND
00027-024
ENABLE
DRIVE (VIN)
VDD
CONNECTION FOR ADG409.
Figure 24. Enable Delay, tON (EN), tOFF (EN)
3V
VDD
VSS
VDD
VSS
A0
A1
VIN
A2
ADG4081
VOUT
RS
∆VOUT
S
D
VOUT
EN
VS
QINJ = CL × ∆VOUT
CL
10nF
GND
1SIMILAR
00027-025
VIN
CONNECTION FOR ADG409.
Figure 25. Charge Injection
VDD
VSS
VDD
VSS
A1
ADG408
A2
VOUT
D
S1
0V
VSS
EN
2.4V
ADG408
D
S1
VOUT
1kΩ
1kΩ
S8
EN
1kΩ
S2
S8
GND
OFF ISOLATION = 20 log VOUT/VIN
VS
00027-026
VS
VDD
GND
CROSSTALK = 20 log VOUT/VIN
Figure 27. Channel-to-Channel Crosstalk
Figure 26. Off Isolation
Rev. D | Page 12 of 15
00027-027
A2
VSS
A0
A0
A1
VDD
Data Sheet
ADG408/ADG409
TERMINOLOGY
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
RON
Ohmic resistance between D and S.
ΔRON
Difference between the RON of any two channels.
tOPEN
Off time measured between the 80% point of both switches
when switching from one address state to another.
IS (Off)
Source leakage current when the switch is off.
ID (Off)
Drain leakage current when the switch is off.
VINL
Maximum input voltage for Logic 0.
ID, IS (On)
Channel leakage current when the switch is on.
VINH
Minimum input voltage for Logic 1.
VD (VS)
Analog voltage on Terminal D and Terminal S.
IINL (IINH)
Input current of the digital input.
CS (Off)
Channel input capacitance for off condition.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
CD (Off)
Channel output capacitance for off condition.
Off Isolation
A measure of unwanted signal coupling through an off channel.
CD, CS (On)
On switch capacitance.
CIN
Digital input capacitance.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and switch on condition.
IDD
Positive supply current.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
ISS
Negative supply current.
Rev. D | Page 13 of 15
ADG408/ADG409
Data Sheet
OUTLINE DIMENSIONS
0.775
0.755
0.735
0.210
MAX
8
TOP VIEW
0.325
0.310
0.300
0.195
0.130
0.115
SIDE VIEW
0.015
MIN
0.150
0.130
0.115
0.022
0.018
0.015
0.070
0.045 0.060
0.039 0.055
0.030
0.015
GAUGE
PLANE
END VIEW
SEATING
PLANE
0.021
0.016
0.011
0.430
MAX
0.012
0.010
0.008
03-07-2014-D
1
0.100
BSC
0.280
0.250
0.240
9
16
PIN 1
INDICATOR
COMPLIANT TO JEDEC STANDARDS MS-001-BB
Figure 28. 16-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-16)
Dimensions shown in inches and (millimeters)
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
16
9
1
8
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
6.20 (0.2441)
5.80 (0.2283)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
45°
0.25 (0.0098)
8°
0.51 (0.0201) SEATING
0.25 (0.0098) 0° 1.27 (0.0500)
PLANE
0.31 (0.0122)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 29. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
Rev. D | Page 14 of 15
Data Sheet
ADG408/ADG409
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.30
0.19
0.65
BSC
COPLANARITY
0.10
0.20
0.09
SEATING
PLANE
8°
0°
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 30. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADG408BN
ADG408BNZ
ADG408BR
ADG408BR-REEL
ADG408BR-REEL7
ADG408BRU
ADG408BRU-REEL
ADG408BRU-REEL7
ADG408BRUZ
ADG408BRUZ-REEL
ADG408BRUZ-REEL7
ADG408BRZ
ADG408BRZ-REEL
ADG408BRZ-REEL7
ADG408BCHIPS
ADG409BNZ
ADG409BR
ADG409BR-REEL7
ADG409BRUZ
ADG409BRUZ-REEL7
ADG409BRZ
ADG409BRZ-REEL
ADG409BRZ-REEL7
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
DIE
16-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
Z = RoHS Compliant Part
©2001–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00027-0-3/15(D)
Rev. D | Page 15 of 15
Package Option
N-16
N-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
N-16
R-16
R-16
RU-16
RU-16
R-16
R-16
R-16
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