a
CMOS
Low Voltage 4 ⍀ Quad SPST Switches
ADG711/ADG712/ADG713
FEATURES
1.8 V to 5.5 V Single Supply
Low On Resistance (2.5 ⍀ Typ)
Low On Resistance Flatness
–3 dB Bandwidth > 200 MHz
Rail-to-Rail Operation
16-Lead TSSOP and SOIC Packages
Fast Switching Times
tON 16 ns
tOFF 10 ns
Typical Power Consumption (< 0.01 W)
TTL/CMOS Compatible
APPLICATIONS
USB 1.1 Signal Switching Circuits
Cell Phones
PDAs
Battery-Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement
GENERAL DESCRIPTION
FUNCTIONAL BLOCK DIAGRAMS
S1
IN1
IN1
D1
D1
S2
S2
IN2
IN2
D2
ADG711
ADG712
S2
D2
ADG713
S3
IN3
D3
S4
S4
IN4
D4
D2
S3
IN3
D3
IN4
D1
IN2
S3
IN3
S1
S1
IN1
D3
S4
IN4
D4
D4
SWITCHES SHOWN FOR A LOGIC "1" INPUT
The ADG711/ADG712/ADG713 are available in 16-lead TSSOP
and 16-lead SOIC packages.
The ADG711, ADG712, and ADG713 are monolithic CMOS
devices containing four independently selectable switches. These
switches are designed on an advanced submicron process that
provides low power dissipation yet gives high switching speed,
low on resistance, low leakage currents, and high bandwidth.
PRODUCT HIGHLIGHTS
They are designed to operate from a single 1.8 V to 5.5 V supply,
making them ideal for use in battery-powered instruments and
with the new generation of DACs and ADCs from Analog
Devices. Fast switching times and high bandwidth make the
parts suitable for switching USB 1.1 data signals and video
signals.
2. Very Low RON (4.5 W max at 5 V, 8 W max at 3 V). At
supply voltage of 1.8 V, RON is typically 35 W over the
temperature range.
1. 1.8 V to 5.5 V Single-Supply Operation.
The ADG711, ADG712, and ADG713 offer high performance and are fully specified and guaranteed with 3 V and
5 V supply rails.
3. Low On Resistance Flatness.
The ADG711, ADG712, and ADG713 contain four independent
single-pole/single-throw (SPST) switches. The ADG711 and
ADG712 differ only in that the digital control logic is inverted.
The ADG711 switches are turned on with a logic low on the
appropriate control input, while a logic high is required to turn
on the switches of the ADG712. The ADG713 contains two
switches whose digital control logic is similar to the ADG711,
while the logic is inverted on the other two switches.
4. –3 dB Bandwidth >200 MHz.
Each switch conducts equally well in both directions when ON.
The ADG713 exhibits break-before-make switching action.
8. 16-Lead TSSOP and 16-Lead SOIC Packages.
5. Low Power Dissipation.
CMOS construction ensures low power dissipation.
6. Fast tON/tOFF.
7. Break-Before-Make Switching.
This prevents channel shorting when the switches are configured as a multiplexer (ADG713 only).
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2004 Analog Devices, Inc. All rights reserved.
(VDD = +5 V 10%, GND = 0 V. All specifications
ADG711/ADG712/ADG713–SPECIFICATIONS1 –40C to +85C unless otherwise noted.)
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
B Version
–40C to
+25C
+85C
0 V to VDD
2.5
4
4.5
0.05
0.3
0.5
1.0
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
0.005
DYNAMIC CHARACTERISTICS2
tON
11
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IS = –10 mA;
Test Circuit 1
VS = 0 V to VDD, IS = –10 mA
VS = 0 V to VDD, IS = –10 mA
VDD = +5.5 V;
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = VD = 1 V, or 4.5 V;
Test Circuit 3
± 0.2
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.4
0.8
V min
V max
± 0.1
µA typ
µA max
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF,
VS = 3 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
VS = 3 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
VS1 = VS2 = 3 V; Test Circuit 5
VS = 2 V; RS = 0 Ω, CL = 1 nF;
Test Circuit 6
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 7
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
Test Circuit 8
RL = 50 Ω, CL = 5 pF; Test Circuit 9
± 0.2
± 0.2
tOFF
6
Break-Before-Make Time Delay, tD
(ADG713 Only)
Charge Injection
6
3
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
–58
–78
dB typ
dB typ
Channel-to-Channel Crosstalk
–90
dB typ
Bandwidth –3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
200
10
10
22
MHz typ
pF typ
pF typ
pF typ
0.001
µA typ
µA max
16
10
POWER REQUIREMENTS
IDD
Test Conditions/Comments
1
1.0
VDD = +5.5 V
Digital Inputs = 0 V or 5 V
NOTES
1
Temperature range: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. A
1
SPECIFICATIONS
ADG711/ADG712/ADG713
(VDD = +3 V 10%, GND = 0 V. All specifications –40C to +85C unless otherwise noted.)
Parameter
B Version
–40C to
+25C
+85C
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
5
On Resistance Match Between
Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
Channel ON Leakage ID, IS (ON)
0 V to VDD
5.5
8
0.1
0.3
2.5
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
0.005
DYNAMIC CHARACTERISTICS2
tON
13
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
VS = 0 V to VDD, IS = –10 mA
VDD = +3.3 V;
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = VD = 1 V, or 3 V;
Test Circuit 3
± 0.2
2.0
0.4
V min
V max
± 0.1
µA typ
µA max
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF,
VS = 2 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
VS = 2 V; Test Circuit 4
RL = 300 Ω, CL = 35 pF,
VS1 = VS2 = 2 V; Test Circuit 5
VS = 1.5 V; RS = 0 Ω, CL = 1 nF;
Test Circuit 6
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 7
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
Test Circuit 8
RL = 50 Ω, CL = 5 pF; Test Circuit 9
± 0.2
± 0.2
tOFF
7
Break-Before-Make Time Delay, tD
(ADG713 Only)
Charge Injection
7
3
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
–58
–78
dB typ
dB typ
Channel-to-Channel Crosstalk
–90
dB typ
Bandwidth –3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
200
10
10
22
MHz typ
pF typ
pF typ
pF typ
0.001
µA typ
µA max
12
1
1.0
NOTES
1
Temperature range: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. A
VS = 0 V to VDD, IS = –10 mA;
Test Circuit 1
VS = 0 V to VDD, IS = –10 mA
nA typ
nA max
nA typ
nA max
nA typ
nA max
20
POWER REQUIREMENTS
IDD
Test Conditions/Comments
–3–
VDD = +3.3 V
Digital Inputs = 0 V or 3 V
ADG711/ADG712/ADG713
ABSOLUTE MAXIMUM RATINGS 1
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 520 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 125°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 42°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
Analog, Digital Inputs2 . . . . . . . . . . . –0.3 V to VDD +0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 430 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 150°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 27°C/W
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG711/ADG712/ADG713 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model
ADG711BR
ADG711BR-REEL
ADG711BR-REEL7
ADG711BRU
ADG711BRU-REEL
ADG711BRU-REEL7
ADG712BR
ADG712BR-REEL
ADG712BR-REEL7
ADG712BRU
ADG712BRU-REEL
ADG712BRU-REEL7
ADG712BRUZ*
ADG712BRUZ-REEL*
ADG712BRUZ-REEL7*
ADG713BR
ADG713BR-REEL
ADG713BR-REEL7
ADG713BRU
ADG713BRU-REEL
ADG713BRU-REEL7
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
Package Option
Standard Small Outline (SOIC)
Standard Small Outline (SOIC)
Standard Small Outline (SOIC)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Standard Small Outline (SOIC)
Standard Small Outline (SOIC)
Standard Small Outline (SOIC)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Standard Small Outline (SOIC)
Standard Small Outline (SOIC)
Standard Small Outline (SOIC)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
Thin Shrink Small Outline (TSSOP)
R-16
R-16
R-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
RU-16
RU-16
RU-16
R-16
R-16
R-16
RU-16
RU-16
RU-16
*Z = Pb-free part.
–4–
REV. A
ADG711/ADG712/ADG713
Table I. Truth Table (ADG711/ADG712)
ADG711 In
ADG712 In
Switch Condition
0
1
1
0
ON
OFF
PIN CONFIGURATION
(TSSOP/SOIC)
Table II. Truth Table (ADG713)
Logic
Switch 1, 4
Switch 2, 3
0
1
OFF
ON
ON
OFF
IN1 1
16
IN2
D1 2
15
D2
S1 3
14
S2
NC 4
GND 5
ADG711
ADG712
ADG713
13
VDD
12
NC
TOP VIEW
S4 6 (Not to Scale) 11 S3
D4 7
10
D3
IN4 8
9
IN3
NC = NO CONNECT
TERMINOLOGY
VDD
Most positive power supply potential.
GND
S
D
IN
RON
∆RON
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
On resistance match between any two channels, i.e., RONmax–RONmin.
Flatness is defined as the difference between
the maximum and minimum value of on
resistance as measured over the specified
analog signal range.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D, S.
“OFF” switch source capacitance.
“OFF” switch drain capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on.
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
REV. A
tOFF
tD
Crosstalk
Off Isolation
Charge
Injection
Bandwidth
On Response
On Loss
–5–
Delay between applying the digital control
input and the output switching off.
“OFF” time or “ON” time measured
between the 90% points of both switches,
when switching from one address state to
another. (ADG713 only).
A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
The frequency at which the output is attenuated by 3 dB.
The frequency response of the “ON” switch.
The voltage drop across the “ON” switch,
seen on the on response vs. frequency plot as
how many dBs the signal is away from
0 dB at very low frequencies.
ADG711/ADG712/ADG713 –Typical Performance Characteristics
6.0
10m
VDD = 5V
TA = 25C
5.5
5.0
1m
VDD = 2.7V
4.5
100
3.5
VDD = 4.5V
VDD = 3V
3.0
ISUPPLY (Amps)
RON ()
4.0
2.5
2.0
VDD = 5V
4 SW
10
1 SW
1
100n
1.5
1.0
10n
0.5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
1n
100
5.0
Figure 1. On Resistance as a Function of VD (VS)
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 4. Supply Current vs. Input Switching Frequency
6.0
–30
VDD = 3V
5.5
5.0
–40
VDD = 5V, 3V
+85C
–50
4.5
OFF ISOLATION (dB)
+25C
4.0
RON ()
1k
3.5
3.0
2.5
–40C
2.0
–60
–70
–80
–90
–100
1.5
–110
1.0
–120
0.5
0
0.5
1.0
1.5
2.0
2.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
0
–130
10k
3.0
Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 3 V
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 5. Off Isolation vs. Frequency
6.0
–30
VDD = 5V
5.5
–40
VDD = 5V, 3V
5.0
–50
4.5
–60
CROSSTALK (dB)
RON ()
4.0
+85C
3.5
+25C
3.0
2.5
2.0
–70
–80
–90
–100
1.5
–40C
–110
1.0
–120
0.5
–130
10k
0
0
0.5
1.0 1.5
2.0
2.5
3.0
3.5
4.0
4.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
5.0
Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures VDD = 5 V
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 6. Crosstalk vs. Frequency
–6–
REV. A
ADG711/ADG712/ADG713
25
0
TA = 25C
20
15
–2
QINJ (pC)
ON RESPONSE (dB)
VDD = 5V
10
VDD = 3V
VDD = 5V
5
–4
0
–5
–6
10k
–10
100k
1M
10M
FREQUENCY (Hz)
0
100M
Figure 7. On Response vs. Frequency
0.5
1.0
1.5
2.0
2.5
3.0
3.5
SOURCE VOLTAGE (V)
Figure 9 illustrates a photodetector circuit with programmable
gain. An AD820 is used as the output operational amplifier.
With the resistor values shown in the circuit, and using different
combinations of the switches, gain in the range of 2 to 16 can be
achieved.
C1
R1
33k
+5V
AD820
VOUT
+2.5V
R2
510k
+5V
S1
D1
R4
240k
R5
240k
S2
D2
R6
120k
R7
120k
S3
D3
R8
120k
S4
D4
R9
120k
(LSB) IN1
IN2
IN3
R3
510k
+2.5V
R10
120k
(MSB) IN4
GND
GAIN RANGE 2 TO 16
Figure 9. Photodetector Circuit with Programmable Gain
REV. A
4.5
5.0
Figure 8. Charge Injection vs. Source Voltage
APPLICATIONS
D1
4.0
–7–
ADG711/ADG712/ADG713
Test Circuits
IDS
V1
IS (OFF)
S
D
VS
ID (OFF)
S
A
D
S
A
VS
D
ID (ON)
VS
VD
A
VD
RON = V1/IDS
Test Circuit 1. On Resistance
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VDD
0.1F
VDD
D
S
50%
50%
VIN ADG712
50%
50%
VOUT
RL
300
IN
VS
VIN ADG711
VS
CL
35pF
VOUT
90%
90%
GND
t ON
t OFF
Test Circuit 4. Switching Times
VDD
VIN
0.1F
50%
0V
VDD
S1
VS1
VS2
D1
S2
D2
RL2
300
IN1, IN2
VIN
CL2
35pF
VOUT2
RL1
300
CL1
35pF
VOUT1
VOUT1
90%
90%
0V
90%
VOUT2
ADG713
50%
90%
0V
GND
tD
tD
Test Circuit 5. Break-Before-Make Time Delay, tD
SW ON
VDD
VIN
VDD
RS
VS
D
S
VOUT
CL
1nF
IN
SW OFF
VOUT
GND
VOUT
Q INJ = CL VOUT
Test Circuit 6. Charge Injection
–8–
REV. A
ADG711/ADG712/ADG713
VDD
VDD
0.1F
0.1F
VDD
S
VIN
VS
VDD
D
S
VOUT
RL
50
IN
VS
GND
VDD
VDD
VS
NC
50
D
VIN1
VIN2
D
S
GND
RL
50
VOUT
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG | VS /VOUT |
Test Circuit 8. Channel-to-Channel Crosstalk
REV. A
IN
Test Circuit 9. Bandwidth
0.1F
–9–
VOUT
RL
50
GND
Test Circuit 7. Off Isolation
S
VIN
D
ADG711/ADG712/ADG713
OUTLINE DIMENSIONS
16-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
16
9
1
8
6.20 (0.2441)
5.80 (0.2283)
1.75 (0.0689)
1.35 (0.0531)
1.27 (0.0500)
BSC
0.50 (0.0197)
45
0.25 (0.0098)
0.25 (0.0098)
0.10 (0.0039)
8
0.51 (0.0201) SEATING
0.25 (0.0098) 0 1.27 (0.0500)
PLANE
0.31 (0.0122)
0.40 (0.0157)
0.17 (0.0067)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-012AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.65
BSC
0.30
0.19
COPLANARITY
0.10
SEATING
PLANE
8
0
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153AB
–10–
REV. A
ADG711/ADG712/ADG713
Revision History
Location
Page
3/04—Data Sheet changed from REV. 0 to REV. A.
Added APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
REV. A
–11–
–12–
C00042–0–3/04(A)
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