ADIS16060BCCZ

Wide Bandwidth Yaw Rate Gyroscope with SPI ADIS16060 Data Sheet FEATURES GENERAL DESCRIPTION Complete angular rate digital gyroscope 14-bit resolution Scalable measurement range Initial range: ±80°/sec (typical) Increase range with external resistor Z-axis (yaw rate) response SPI digital output interface High vibration rejection over wide frequency 2000 g-powered shock survivability 1 kHz bandwidth Selectable using external capacitor Externally controlled self-test Internal temperature sensor output Dual auxiliary 14-bit ADC inputs Absolute rate output for precision applications 5 V single-supply operation 8.2 mm × 8.2 mm × 5.2 mm package −40°C to +105°C operation RoHS compliant The ADIS16060 is a yaw rate gyroscope with an integrated serial peripheral interface (SPI). It features an externally selectable bandwidth response and scalable dynamic range. The SPI port provides access to the rate sensor, an internal temperature sensor, and two external analog signals (using internal ADC). The digital data available at the SPI port is proportional to the angular rate about the axis that is normal to the top surface of the package. An additional output pin provides a precision voltage reference. A digital self-test function electromechanically excites the sensor to test the operation of the sensor and the signal-conditioning circuits. The ADIS16060 is available in an 8.2 mm × 8.2 mm × 5.2 mm, 16-terminal, peripheral land grid array (LGA) package. APPLICATIONS Platform stabilization Image stabilization Guidance and control Inertial measurement units Robotics FUNCTIONAL BLOCK DIAGRAM FILT RATE VCC ADIS16060 RATE SENSOR TEMPERATURE SENSOR MUX SCLK DIN 14-BIT ADC DOUT DIGITAL CONTROL MSEL1 MSEL2 AIN1 GND 07103-001 AIN2 Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved. ADIS16060 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Basic Operation .............................................................................. 10 Applications ....................................................................................... 1 Serial Peripheral Interface (SPI) ............................................... 10 General Description ......................................................................... 1 Output Data Formatting............................................................ 10 Functional Block Diagram .............................................................. 1 ADC Conversion ........................................................................ 10 Revision History ............................................................................... 2 Applications Information .............................................................. 11 Specifications..................................................................................... 3 Supply And Common Considerations .................................... 11 Timing Specifications .................................................................. 5 Setting Bandwidth ...................................................................... 11 Absolute Maximum Ratings ............................................................ 6 Increasing Measurement Range ............................................... 11 ESD Caution .................................................................................. 6 Dynamic Digital Sensitivity Scaling ........................................ 11 Pin Configuration and Function Descriptions ............................. 7 Temperature Measurements ..................................................... 11 Typical Performance Characteristics ............................................. 8 Self-Test Function ...................................................................... 11 Theory of Operation ........................................................................ 9 Outline Dimensions ....................................................................... 12 Analog-to-Digital Converter Input ............................................ 9 Ordering Guide .......................................................................... 12 Rate Sensitive Axis ....................................................................... 9 REVISION HISTORY 4/12—Rev. 0 to Rev. A Updated Format .................................................................. Universal Changes to Applications Section .................................................... 1 Changes to Note 1 in Figure 4......................................................... 7 Changes to Supply and Common Considerations Section, Setting Bandwidth Section, and Figure 14 Caption ................... 11 1/08—Revision 0: Initial Version Rev. A | Page 2 of 12 Data Sheet ADIS16060 SPECIFICATIONS TA = 25°C, VCC = 5 V, angular rate = 0°/sec, COUT = 0.01 μF, ±1 g, unless otherwise noted. Table 1. Parameter SENSITIVITY Dynamic Range 2 Initial Change Over Temperature 3 Nonlinearity NULL Initial Change Over Temperature3 Turn-On Time Linear Acceleration Effect Voltage Sensitivity NOISE PERFORMANCE Rate Noise Density FREQUENCY RESPONSE 3 dB Bandwidth (User-Selectable) 4 Sensor Resonant Frequency SELF-TEST RESPONSE Positive Self-Test 5 Negative Self-Test5 TEMPERATURE SENSOR Reading at 298 K Scale Factor LOGIC INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN (DIN) Input Capacitance, CIN (MSEL1, MSEL2) ANALOG INPUTS Resolution Integral Nonlinearity Differential Nonlinearity Offset Error Offset Error Temperature Drift Gain Error Gain Error Temperature Drift Input Voltage Range Leakage Current DIGITAL OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL CONVERSION RATE Conversion Time Throughput Rate Test Conditions/Comments Min 1 Typ Max Unit Full-scale range over specifications range Clockwise rotation is positive output, TA = −40°C to +85°C VCC = 4.75 V to 5.25 V Best fit straight line ±50 0.0110 ±80 0.0122 0.0134 °/sec °/sec/LSB Nominal 0°/sec output is 8192 LSB VCC = 4.75 V to 5.25 V Power on to ±0.5°/sec of final value Any axis VCC = 4.75 V to 5.25 V −44 ±3 0.1 @ 25°C COUT = 0 µF ±0.11 10 ±0.1 ±0.5 +44 °/sec °/sec/°C ms °/sec/g °/sec/V 0.04 °/sec/√Hz 1 See Table 5 See Table 5 7700 Proportional to absolute temperature % °/sec 1000 14.5 Hz kHz +6226 −6226 LSB LSB 8192 0.034 8684 0.7 × VCC Typically 10 nA 0.8 +1 −1 8 5 LSB K/LSB V V µA pF pF For VIN < VCC 14 Best fit straight line No missing codes to 13 bits −6 −1 −10 +6 +6 +10 ±0.3 −40 +40 ±0.3 0 VCC 1 ISOURCE = 500 µA ISINK = 500 µA VCC − 0.3 Rev. A | Page 3 of 12 Bits LSB LSB mV ppm/°C mV ppm/°C V nA 0.4 V V 10 100 µs kSPS ADIS16060 Parameter POWER SUPPLY VCC VCC Quiescent Supply Current Power Dissipation TEMPERATURE RANGE Data Sheet Test Conditions/Comments All at TA = −40°C to +85°C VCC @ 5 V, 50 kSPS sample rate VCC @ 5 V, 50 kSPS sample rate Operation Min 1 Typ Max Unit 4.75 5 4.3 22 5.25 6.5 33 +105 V mA mW °C −40 All minimum and maximum specifications are guaranteed. Typical specifications are neither tested nor guaranteed. Dynamic range is the maximum full-scale measurement range possible, including output swing range, initial offset, sensitivity, offset drift, and sensitivity drift at 5 V supply. Defined as the output change from ambient to maximum temperature, or ambient to minimum temperature. 4 Frequency at which the response is 3 dB down from dc response. Bandwidth = 1/(2 × π × 200 kΩ × COUT). For COUT = 0.01 μF, bandwidth = 80 Hz. 5 Self-test response varies with temperature. 1 2 3 Rev. A | Page 4 of 12 Data Sheet ADIS16060 TIMING SPECIFICATIONS TA = 25°C, angular rate = 0°/sec, unless otherwise noted.1 Table 2. Read/Output Sequence Parameter Serial Clock Frequency Throughput Rate MSEL1 Falling to SCLK Low MSEL1 Falling to SCLK Rising SLCK Falling to Data Remains Valid MSEL1 Rising Edge to DOUT High Impedance SCLK Falling to Data Valid Acquisition Time DOUT Fall Time DOUT Rise Time Data Setup Time SCLK Falling Edge to MSEL2 Rising Edge Data Hold Time 1 Figure Reference Symbol See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 2 See Figure 3 See Figure 3 See Figure 3 tCYC tCSD tSUCS tHDO tDIS tEN tACQ tF tR t5 t7 t6 Min Typ 20 5 16 14 16 Max 2.9 100 0 Unit MHz kHz μs ns ns ns ns ns ns ns ns ns ns 100 50 400 11 11 5 0 5 0 4.5 25 25 Guaranteed by design. All input signals are specified with tR = tF = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V. The 5 V operating range spans from 4.75 V to 5.25 V. Timing Diagrams tCYC COMPLETE CYCLE MSEL1 tSUCS tACQ POWER DOWN 1 4 5 tEN tCSD DOUT HIGH-Z 0 tHDO D13 D12 D11 D10 D9 tDIS D8 D7 D6 D5 D4 D3 D2 (MSB) NOTE: A MINIMUM OF 20 CLOCK CYCLES ARE REQUIRED FOR 14-BIT CONVERSION. D1 D0 0 (LSB) HIGH-Z 07103-002 SCLK Figure 2. Serial Interface Timing Diagram—Read/Output Sequence (CPOL = 0, CPHA = 0) t7 MSEL2 t5 t6 SCLK DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 NOTE: THE LAST EIGHT BITS CLOCKED IN ARE LATCHED WITH THE RISING EDGE OF THE MSEL2 LINE. Figure 3. Serial Interface Timing—Input/Configuration Sequence (CPOL = 0, CPHA = 1) Rev. A | Page 5 of 12 07103-003 DIN ADIS16060 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Acceleration (Any Axis, Unpowered, 0.5 ms) Acceleration (Any Axis, Powered, 0.5 ms) VCC to GND VCC to GND Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND Operating Temperature Range Storage Temperature Range Rating 2000 g 2000 g −0.3 V to +6.0 V −0.3 V to VCC + 0.3 V −0.3 V to VCC + 0.3 V −0.3 V to +7.0 V −0.3 V to VCC + 0.3 V −40°C to +105°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Drops onto hard surfaces can cause shocks of greater than 2000 g and exceed the absolute maximum rating of the device. Care should be exercised in handling the device to avoid damage. ESD CAUTION Rev. A | Page 6 of 12 Data Sheet ADIS16060 GND 14 13 GND 2.5050 BSC 8× 11 TOP “LOOK THROUGH” VIEW (Not to Scale) GND 10 3 NC ADIS16060 GND 9 DOUT 4 SCLK 2 PIN 1 INDICATOR AIN2 0.6700 BSC 12× 7 8 FILT VCC AIN1 NOTES 1. PINS LABELED NC CAN BE ALLOWED TO FLOAT, BUT IT IS BETTER TO CONNECT THESE PINS TO GROUND. AVOID ROUTING HIGH SPEED SIGNALS THROUGH THESE PINS BACAUSE NOISE COUPLING MAY RESULT. 2. THIS IS NOT AN ACTUAL “TOP VIEW,” AS THE PINS ARE NOT VISIBLE FROM THE TOP. THIS IS A LAYOUT VIEW, WHICH REPRESENTS THE PIN CONFIGURATION, IF THE PACKAGE IS LOOKED THROUGH FROM THE TOP. THIS CONFIGURATION IS PROVIDED FOR PCB LAYOUT PURPOSES. 07103-004 6 RATE 7.373 BSC 2× 5 5.010 BSC 4× 1.000 BSC 16× Table 4. Pin Function Descriptions 1 Mnemonic DIN SCLK DOUT NC RATE FILT VCC AIN1 AIN2 GND GND GND GND VCC MSEL2 MSEL1 Type 1 I I O O I S I I S S S S S I I 0.5000 BSC 16× Figure 5. Second-Level Assembly Pad Layout Figure 4. Pin Configuration Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 3.6865 BSC 8× Description SPI Data Input. SPI Serial Clock. SPI Data Output. This pin is not connected internally (see Figure 4). Buffered Analog Output. Represents the angular rate signal. External Capacitor Connection to Control Bandwidth. Power Supply. External Analog Input Channel 1. External Analog Input Channel 2. Ground. Ground. Ground. Ground. Power Supply. SPI, Mode Select 2. User for data input functions. SPI, Mode Select 1. Used for data output functions. I = input; O = output; S = power supply. Rev. A | Page 7 of 12 07103-005 VCC 15 12 MSEL2 16 1 DIN MSEL1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADIS16060 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 6800 0.14 0.12 0.10 0.08 0.06 0.04 BIAS (°/sec) 6000 5800 5600 5400 5200 5000 –40 –20 0 20 40 60 80 100 120 Figure 9. Positive Self-Test Response vs. Temperature, VCC = 5 V 0.30 –4800 DIGITAL RATE OUTPUT RESPONSE (LSB) PERCENT OF POPULATION (%) 6200 TEMPERATURE (°C) Figure 6. Initial Bias Error Distribution, 25°C, VCC = 5 V 0.25 0.20 0.15 0.10 BIAS DRIFT OVER TEMPERATURE (°/sec/°C) Figure 7. Bias Drift Over −40°C to +85°C, VCC = 5 V –5000 –5200 –5400 –5600 –5800 –6000 –6200 –6400 –6600 –6800 –60 07103-021 –0.60 –0.55 –0.50 –0.45 –0.40 –0.35 –0.30 –0.25 –0.20 –0.15 –0.10 –0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.05 0 6400 4800 –60 07103-020 0 –44 –40 –36 –32 –28 –24 –20 –16 –12 –8 –4 0 4 8 12 16 20 24 28 32 36 40 44 0.02 6600 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 07103-010 PERCENT OF POPULATION (%) 0.16 07103-009 DIGITAL RATE OUTPUT RESPONSE (LSB) 0.18 Figure 10. Negative Self-Test Output Response vs. Temperature, VCC = 5 V 0.04 0.1 µ + 1σ 0.01 0 µ –0.01 –0.02 µ – 1σ –0.03 –0.04 –60 –40 –20 0 20 20 60 80 100 TEMPERATURE (°C) 120 Figure 8. Sensitivity Drift vs. Temperature, VCC = 5 V 0.01 0.001 1 10 100 Tau (°C) Figure 11. Allen Variance, 25°C, VCC = 5 V Rev. A | Page 8 of 12 1000 07103-011 ROOT ALLEN VARIANCE (°/sec) 0.02 07103-008 SENSITIVITY ERROR (%) 0.03 Data Sheet ADIS16060 THEORY OF OPERATION The resulting signal is fed to a series of gain and demodulation stages that produce the electrical rate signal output. The rate signal is then converted to a digital representation of the output on the SPI pins. The dual-sensor design provides linear acceleration (vibration, shock) rejection. Fabricating the sensor with the signal-conditioning electronics preserves signal integrity in noisy environments. The electrostatic resonator requires 14 V to 16 V for operation. Because only 5 V is typically available in most applications, a charge pump is included on chip. After the demodulation stage, a single-pole, low-pass filter on the chip is used to limit high frequency artifacts before final amplification. The frequency response is dominated by the second low-pass filter, which is set by adding capacitance across RATE and FILT. During the acquisition phase, the impedance model for AINx is a parallel combination of the capacitor CPIN and the network formed by the series connection of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically 600 Ω and is a lumped component made up of some serial resistors and the on resistance of the switches. CIN is typically 30 pF and mainly functions as the ADC sampling capacitor. During the conversion phase, when the switches are open, the input impedance is limited to CPIN. RIN and CIN make a 1-pole, low-pass filter that reduces undesirable aliasing effects and limits the noise. When the source impedance of the driving circuit is low, the ADC input can be driven directly. Large source impedances significantly affect the ac performance, especially THD. The dc performances are less sensitive to the input impedance. RATE SENSITIVE AXIS ANALOG-TO-DIGITAL CONVERTER INPUT The two diodes, D1 and D2, provide ESD protection for the analog inputs, AINx (AIN1 and AIN2). Care must be taken to ensure that the analog input signal does not exceed the supply rails by more than 0.3 V, because exceeding this level causes these diodes to become forward-biased and to start conducting current. However, these diodes can handle a forward-biased current of 130 mA maximum. For instance, these conditions may eventually occur when the input signals exceed either VCC or GND. VDD D1 CIN D2 07103-018 CPIN RIN GND LONGITUDINAL AXIS Figure 12. Equivalent Analog Input Circuit Rev. A | Page 9 of 12 POSITIVE MEASUREMENT DIRECTION 8 4 5 1 LATERAL AXIS Figure 12 shows an equivalent circuit of the input structure of the ADIS16060 auxiliary ADC. AINx RATE AXIS 07103-019 The ADIS16060 operates on the principle of a resonator gyroscope. Two polysilicon sensing structures each contain a dither frame that is electrostatically driven to resonance. This generates the necessary velocity element to produce a Coriolis force while rotating. At two of the outer extremes of each frame, orthogonal to the dither motion, are movable fingers that are placed between fixed pickoff fingers to form a capacitive pickoff structure that senses Coriolis motion. Figure 13. Rate Signal Increases with Clockwise Rotation ADIS16060 Data Sheet BASIC OPERATION Output Data Access The ADIS16060 is designed for simple integration into industrial system designs, requiring only a 5 V power supply, two mode select lines, and three serial communications lines. The SPI handles all digital I/O communication in the ADIS16060. Use Table 2 and Figure 2 to determine the appropriate timing considerations for reading output data. OUTPUT DATA FORMATTING SERIAL PERIPHERAL INTERFACE (SPI) All of the output data is in an offset-binary format, which in this case, means that the ideal output for a zero rate condition is 8192 codes. If the sensitivity is equal to +0.0122°/sec/LSB, a rate of +10°/sec results in a change of 820 codes, and a digital rate output of 9012 codes. If an offset error of −20°/sec is introduced, the output is reduced by 1639 codes (if typical sensitivity is assumed), resulting in a digital rate output of 6552 codes. The ADIS16060 SPI port includes five signals: Mode Select 1 (MSEL1), Mode Select 2 (MSEL2), serial clock (SCLK), data input (DIN), and data output (DOUT). The MSEL1 line is used when reading data out of the sensor (DOUT), and the MSEL2 line is used when configuring the sensor (DIN). Selecting Output Data ADC CONVERSION Refer to Table 5 to determine the appropriate DIN bit sequence based on the required data source. Table 2 and Table 3 provide the necessary timing details for the input configuration sequence. After the MSEL2 goes high, the last eight DIN bits are loaded into the internal control register, which represents DB0 to DB7 in Table 5. The internal successive approximation ADC begins the conversion process on the falling edge of MSEL1 and starts to place data MSB first on the DOUT line at the 6th falling edge of SCLK, as shown in Figure 2. The entire conversion process takes 20 SCLK cycles. After MSEL1 goes high, the acquisition process starts in preparation for the next conversion cycle. Table 5. DIN Configuration Bit Assignments Action Measure Angular Rate (Gyro) Measure Temperature Measure AIN2 Measure AIN1 Set Positive Self-Test and Output for Angular Rate Set Negative Self-Test and Output for Angular Rate DB7 0 0 1 0 0 0 DB6 0 0 0 1 0 0 Rev. A | Page 10 of 12 DB5 1 0 0 0 1 1 DB4 0 1 0 0 0 0 DB3 0 0 0 0 0 0 DB2 0 0 0 0 0 0 DB1 0 0 0 0 1 0 DB0 0 0 0 0 0 1 Data Sheet ADIS16060 APPLICATIONS INFORMATION SUPPLY AND COMMON CONSIDERATIONS SETTING BANDWIDTH External Capacitor COUT is used in combination with the on-chip ROUT resistor to create a low-pass filter to limit the bandwidth of the ADIS16060 rate response. The –3 dB frequency set by ROUT and COUT is 0.1 0.01 0.001 0.0001 10 100 1k 10k FREQUENCY (Hz) f OUT = 1 Figure 14. Spectral Noise Density, fs = 50 kHz, 80 Hz, Single-Pole Filter (2 × π × ROUT × COUT ) DYNAMIC DIGITAL SENSITIVITY SCALING and can be well controlled because ROUT has been trimmed during manufacturing to be 200 kΩ ± 5%. Setting the range with an external resistor impacts ROUT as follows: ROUT = This device supports in-system, dynamic, digital sensitivity scaling. (200 kΩ × R ) TEMPERATURE MEASUREMENTS EXT When using the temperature sensor, an acquisition time of greater than 40 μs helps to ensure proper setting and measurement accuracy. See Table 2 and Figure 2 for details on the definition of acquisition time. (200 kΩ + R EXT ) In general, additional filter poles (analog or digital) can contribute to reducing the noise associated with the demodulation spikes (~14 kHz) in Figure 14. SELF-TEST FUNCTION INCREASING MEASUREMENT RANGE Scaling the measurement range requires the addition of a single resistor, connected across the RATE and FILT pins. The following equation provides the proper relationship for selecting the appropriate resistor: REXT = 200 kΩ ∆ −1 where Δ is the increase in range. 100k 07103-118 Power supply noise and transient behaviors can influence the accuracy and stability of any sensor-based measurement system. Power supply stability and source impedance can influence performance. While the ADIS16060 provides 0.2 µF of capacitance on the VCC pin, additional capacitors will support optimum performance. NOISE DENSITY (°/sec/√Hz) 1 Exercising the self-test function is simple, as shown in this example. 1. 2. 3. 4. 5. Configure using DIN = 00100010 (positive self-test, rate selected). Read output. Configure using DIN = 00100000 (positive self-test off, rate selected). Read output. Calculate the difference between Step 2 and Step 4, and compare this with the specified self-test output changes in the Specifications section. Exercising the negative self-test requires changing the sequence in Step 1 to DIN = 00100001. Rev. A | Page 11 of 12 ADIS16060 Data Sheet OUTLINE DIMENSIONS 5.010 BSC (4×) 2.505 BSC (8×) 8.35 MAX 13 PIN 1 INDICATOR 12 8.20 TYP 0.873 BSC (16×) 16 1 7.373 BSC (2×) 0.797 BSC (12×) 9 4 8 0.200 MIN (ALL SIDES) TOP VIEW 5 BOTTOM VIEW 0.373 BSC (16×) 7.00 TYP 022107-B 5.20 MAX SIDE VIEW Figure 15. 16-Terminal Stacked Land Grid Array [LGA] (CC-16-1) Dimensions shown in millimeters ORDERING GUIDE Model1 ADIS16060BCCZ ADIS16060/PCBZ 1 Temperature Range −40°C to +105°C Package Description 16-Terminal Stacked Land Grid Array (LGA) Evaluation Board Z = RoHS Compliant Part. ©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07103-0-4/12(A) Rev. A | Page 12 of 12 Package Option CC-16-1