ADIS16210CMLZ

Precision Triaxial Inclinometer and Accelerometer with SPI ADIS16210 FEATURES Triaxial, digital inclinometer system ±180° measurement range, roll and pitch axes ±90° gravity axis ±0.1° relative accuracy Triaxial, digital accelerometer, high accuracy ±1.7 g measurement range ±0.05° axis-to-axis alignment Digital internal temperature measurements Digital internal power supply measurements Programmable user calibration options Single command, frame alignment Manual accelerometer bias correction Programmable operation and control Sample rate/filtering Alarm conditions and indicator output Input/output: data ready, alarm, general-purpose Power management functions SPI-compatible serial interface Serial number and device ID Single-supply operation: 3.0 V to 3.6 V Calibrated temperature range: −40°C to +85°C 15 mm × 24 mm × 15 mm package with flexible connector GENERAL DESCRIPTION The ADIS16210 iSensor® is a digital inclinometer system that provides precise measurements for both pitch and roll angles over a full orientation range of ±180°. It combines a MEMS triaxial acceleration sensor with signal processing, addressable user registers for data collection/programming, and a SPI-compatible serial interface. In addition, the production process includes unit specific calibration for optimal accuracy performance. It also offers digital temperature sensor and power supply measurements together with configuration controls for in-system calibration, sample rate, filtering, alarms, I/O configuration, and power management. The MEMS sensor elements are bound to an aluminum core for tight platform coupling and excellent mechanical stability. An internal clock drives the data sampling system, which eliminates the need for an external clock source. The SPI and data buffer structure provide convenient access to accurate sensor data and configuration controls. The ADIS16210 is available in a 15 mm × 24 mm × 15 mm module that provides mounting tabs with M2-sized mounting holes and a flexible, edge terminated connector interface. It has an extended operating temperature range of −40°C to +125°C. APPLICATIONS Platform control, stabilization, and alignment Tilt sensing, inclinometers, and leveling Motion/position measurement Monitor/alarm devices (security, medical, safety) Navigation FUNCTIONAL BLOCK DIAGRAM DIO1 DIO2 RST VDD ADIS16210 SELF TEST TRIAXIAL MEMS SENSOR CONTROLLER TEMPERATURE SENSOR DIGITAL FILTER SUPPLY I/O ALARMS POWER MANAGEMENT GND CONTROL REGISTERS SPI PORT CS SCLK DIN 09593-001 CORRECTION AND ALIGNMENT INCLINE CALIBRATION OUTPUT REGISTERS DOUT Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. ADIS16210 TABLE OF CONTENTS Features .............................................................................................. 1  Applications....................................................................................... 1  General Description ......................................................................... 1  Functional Block Diagram .............................................................. 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Timing Specifications .................................................................. 4  Absolute Maximum Ratings............................................................ 5  ESD Caution.................................................................................. 5  Pin Configuration and Function Descriptions............................. 6  Basic Operation................................................................................. 7  Reading Sensor Data.................................................................... 7  Device Configuration .................................................................. 7  User Register Map ............................................................................ 8  Sensor Data........................................................................................ 9  Output Data Registers.................................................................. 9  Signal Processing, Bias Correction, and Alignment .................. 12  System Tools.................................................................................... 14  Global Commands ..................................................................... 14  Input/Output Functions ............................................................ 14  Device Identification.................................................................. 15  Status/Error Flags ....................................................................... 15  Flash Memory Management ..................................................... 15  Alarms.............................................................................................. 16  System Alarm.............................................................................. 16  Static Alarms ............................................................................... 16  Dynamic Alarms ........................................................................ 16  Alarm Reporting ........................................................................ 16  Applications Information .............................................................. 17  Interface Board ........................................................................... 17  Mating Connector ...................................................................... 17  Outline Dimensions ....................................................................... 18  Ordering Guide .......................................................................... 18  REVISION HISTORY 6/11—Rev. 0 to Rev. A Changes to Table 1............................................................................ 3 Changes to Table 23........................................................................ 12 Changes to Figure 24 and Figure 25............................................. 17 4/11—Revision 0: Initial Version Rev. A | Page 2 of 20 ADIS16210 SPECIFICATIONS TA = −40°C to +85°C, VDD = 3.0 V to 3.6 V, unless otherwise noted. Table 1. Parameter INCLINOMETERS Measurement Range Relative Accuracy Test Conditions/Comments Min −180 ±30°, AVG_CNT ≥ 0x0009, μ ± 3 σ ±60°, AVG_CNT ≥ 0x0009, μ ± 1 σ ±60°, AVG_CNT ≥ 0x0009, μ ± 3 σ ±180°, AVG_CNT ≥ 0x0009, μ ± 1 σ ±180°, AVG_CNT ≥ 0x0009, μ ± 3 σ TA = 25°C, AVG_CNT = 0x0000 ±1.7 μ±1σ μ±1σ ±1 g, μ ± 1 σ Axis to axis, deviation from 90°, μ ± 1 σ TA = 25°C, AVG_CNT = 0x0000 −3 dB decrease in dc sensitivity, TA = 25°C TA = 25°C 2.0 VIH = 3.3 V VIL = 0 V ±0.2 −40 −1 10 ISOURCE = 1.6 mA ISINK = 1.6 mA 2.4 0.4 10,000 20 156 33.8 22.3 512 3 3.3 18 230 0.8 ±1 −60 ±1 ±0.0244 ±1 ±0.05 190 Typ Max +180 Unit Degrees Degrees Degrees Degrees Degrees Degrees °/√Hz g mg % mg Degrees μg/√Hz Hz kHz V V μA μA mA pF V V Cycles Years ms ms ms SPS % V mA μA Noise Density ACCELEROMETERS Measurement Range Offset Error Sensitivity Error Nonlinearity Misalignment Noise Density Bandwidth Sensor Resonant Frequency LOGIC INPUTS 1 Input High Voltage, VINH Input Low Voltage, VINL Logic 1 Input Current, IINH Logic 0 Input Current, IINL All Except RST RST Input Capacitance, CIN DIGITAL OUTPUTS1 Output High Voltage, VOH Output Low Voltage, VOL FLASH MEMORY Endurance 2 Data Retention 3 START-UP TIME 4 Initial Startup Reset Recovery 5 Sleep Mode Recovery CONVERSION RATE Clock Accuracy POWER SUPPLY Power Supply Current ±0.1 ±0.1 ±0.15 ±0.14 ±0.21 ±0.011 ±2 50 5.5 TJ = 85°C RST pulse low or Register GLOB_CMD[7] = 1 After CS assertion from high to low Register AVG_CNT = 0x0000 Operating voltage range, VDD Normal mode, TA = 25°C Sleep mode, TA = 25°C 3.0 3.6 1 2 3 The digital I/O signals are 5 V tolerant. Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22, Method A117. Retention lifetime decreases with junction temperature. See Figure 22. 4 The start-up times presented do not include the data capture time, which is dependent on the AVG_CNT register settings. 5 The RST pin must be held low for at least 15 ns. Rev. A | Page 3 of 20 ADIS16210 TIMING SPECIFICATIONS TA = 25°C, VDD = 3.3 V, unless otherwise noted. Table 2. Parameter fSCLK tSTALL tCS tDAV tDSU tDHD tSR tSF tDF, tDR tSFS 1 Description SCLK frequency Stall period between data, between 16th and 17th SCLK Chip select to SCLK edge DOUT valid after SCLK edge DIN setup time before SCLK rising edge DIN hold time after SCLK rising edge SCLK rise time SCLK fall time DOUT rise/fall times, not shown in Timing Diagrams section. CS high after SCLK edge Min 1 10 40 48.8 24.4 48.8 Typ Max 830 100 5 5 12.5 12.5 12.5 Unit kHz μs ns ns ns ns ns ns ns ns Guaranteed by design, not tested. Timing Diagrams CS tSR tSF tCS 1 2 3 4 5 6 15 16 tSFS SCLK tDAV DOUT MSB DB14 DB13 DB12 DB11 DB10 DB2 DB1 LSB tDSU DIN R/W A6 A5 tDHD A4 A3 A2 D2 D1 LSB 09593-002 09593-003 Figure 2. SPI Timing and Sequence tSTALL CS SCLK Figure 3. DIN Bit Sequence Rev. A | Page 4 of 20 ADIS16210 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Acceleration Any Axis, Unpowered Any Axis, Powered VDD to GND Digital Input Voltage to GND Digital Output Voltage to GND Analog Inputs to GND Operating Temperature Range Storage Temperature Range Rating 3500 g 3500 g −0.3 V to +6.0 V −0.3 V to +5.3 V −0.3 V to VDD + 0.3 V −0.3 V to +3.6 V −40°C to +125°C −65°C to +150°C Table 4. Package Characteristics Package Type 15-Lead Module θJA 31°C/W θJC 11°C/W Device Weight 7.2 grams ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 5 of 20 ADIS16210 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 PIN 15 PIN 15 PIN 1 TOP VIEW BOTTOM VIEW Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1, 2 3, 4, 5, 8 6, 9 7 10 11 12 13 14 15 1 Mnemonic VDD GND DNC DIO2 RST DIN DOUT SCLK CS DIO1 Type 1 S S I I/O I I O I I I/O Description Power Supply, 3.3 V. Ground. Do Not Connect. Do not connect to these pins. Digital Input/Output Line 2. Reset, Active Low. SPI, Data Input. SPI, Data Output. DOUT is an output when CS is low. When CS is high, DOUT is in a three-state, high impedance mode. SPI, Serial Clock. SPI, Chip Select. Digital Input/Output Line 1. S is supply, O is output, I is input, and I/O is input/output. Rev. A | Page 6 of 20 09593-004 NOTES 1. LEADS ARE EXPOSED COPPER PADS LOCATED ON THE BOTTOM SIDE OF THE FLEXIBLE INTERFACE CABLE. 2. PACKAGE IS NOT SUITABLE FOR SOLDER REFLOW ASSEMBLY PROCESSES. 3. EXAMPLE MATING CONNECTOR: AVX CORPORATION FLAT FLEXIBLE CONNECTOR (FFC) P/N: 04-6288-015-000-846. ADIS16210 BASIC OPERATION The ADIS16210 is an autonomous system that requires no user initialization. Upon receiving a valid power supply, it initializes itself and starts sampling, processing, and loading data into the output registers. When using the factory default configuration, DIO1 provides a data ready signal. The SPI interface enables simple integration with many embedded processor platforms, as shown in Figure 5 (electrical connection) and Table 6 (processor pin descriptions). VDD I/O LINES ARE COMPATIBLE WITH 3.3V 3.3V OR 5V LOGIC LEVELS 1 2 READING SENSOR DATA A single register read requires two 16-bit SPI cycles. The first cycle requests the contents of a register using the bit assignments in Figure 9. The register contents then follow on DOUT, during the second sequence. Figure 6 includes three single register reads in succession. In this example, the process starts with DIN = 0x0400 to request the contents of the XACCL_OUT register, followed by 0x0600 to request the contents of the YACCL_OUT register, and then 0x0800 to request the contents of the ZACCL_OUT register. Full duplex operation enables processors to use the same 16-bit SPI cycle to read data from DOUT while requesting the next set of data on DIN. DIN DOUT 0x0400 0x0600 XACCL_OUT SYSTEM PROCESSOR SPI MASTER SS SCLK MOSI MISO IRQ 14 13 11 12 15 CS SCLK DIN DOUT DIO1 ADIS16210 0x0800 YACCL_OUT ZACCL_OUT 09593-007 09593-009 09593-006 3 4 5 8 Figure 6. SPI Read Example Remove Figure 5. Electrical Connection Diagram Figure 7 provides an example of four SPI signals when reading PROD_ID in a repeating pattern. CS SCLK DIN DOUT DOUT = 0011 1111 0101 1100 = 0x3F52 = 16210 DIN = 0101 0110 0000 0000 = 0x5600 09593-008 Table 6. Generic Master Processor Pin Names and Functions Pin Name SS IRQ MOSI MISO SCLK Function Slave select Interrupt request, optional Master output, slave input Master input, slave output Serial clock Figure 7. SPI Read Example, Second 16-Bit Sequence The ADIS16210 SPI interface supports full duplex serial communication (simultaneous transmit and receive) and uses the bit sequence shown in Figure 9. Table 7 provides a list of the most common settings that initialize the serial port of a processor for the ADIS16210 SPI interface. Table 7. Generic Master Processor SPI Settings Processor Setting Master SCLK Rate ≤ 830 kHz SPI Mode 3 MSB-First Mode 16-Bit Mode Description ADIS16210 operates as a slave Maximum serial clock rate CPOL = 1 (polarity), CPHA = 1 (phase) Bit sequence Shift register/data length DEVICE CONFIGURATION The user register map (Table 8) provides a variety of control registers, which enable optimization for specific applications. The SPI provides access to these registers, one byte at a time, using the bit assignments shown in Figure 9. Each register has 16 bits, where Bits[7:0] represent the lower address and Bits[15:8] represent the upper address. Figure 8 displays the SPI signal pattern for writing 0x07 to Address 0x38, which sets the number of averages to 128 and the sample rate to 4 SPS. CS SCLK DIN DIN = 1011 1000 0000 0111 = 0xB807, SET AVG_CNT[7:0] = 0x07 Figure 8. Example SPI Write Pattern CS SCLK DIN DOUT R/W D15 A6 D14 A5 D13 A4 D12 A3 D11 A2 D10 A1 D9 A0 D8 DC7 D7 DC6 D6 DC5 D5 DC4 D4 DC3 D3 DC2 D2 DC1 D1 DC0 D0 R/W D15 A6 D14 A5 D13 Figure 9. SPI Communication Bit Sequence Rev. A | Page 7 of 20 09593-113 NOTES 1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0. 2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE FOR OTHER DEVICES. ADIS16210 USER REGISTER MAP Figure 10 provides a diagram of the dual memory structure used to manage operation and store user settings. Writing configuration data to a control register updates its SRAM contents, which are volatile. Most of the user registers have mirror locations in flash memory (see Table 8, for “yes” in the Flash Backup column). Use the manual flash backup command in GLOB_CMD[6] (DIN = 0xBE40) to save these settings into the nonvolatile flash memory. The flash backup process requires a valid power supply level and zero SPI communication for the entire 28 ms process time. Table 8. User Register Memory Map 1 Name FLASH_CNT SUPPLY_OUT XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT XINCL_OUT YINCL_OUT ZINCL_OUT XACCL_NULL YACCL_NULL ZACCL_NULL ALM_MAG_X ALM_MAG_Y ALM_MAG_Z ALM_MAG_S ALM_SMPL_X ALM_SMPL_Y ALM_SMPL_Z ALM_CTRL GPIO_CTRL MSC_CTRL DIO_CTRL AVG_CNT SLP_CNT DIAG_STAT GLOB_CMD LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM 1 MANUAL FLASH BACKUP NONVOLATILE FLASH MEMORY (NO SPI ACCESS) START-UP RESET VOLATILE SRAM SPI ACCESS 09593-116 Figure 10. SRAM and Flash Memory Diagram R/W R R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R W R R R R Flash Backup Yes No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No N/A N/A N/A N/A Address 0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 to 0x1F 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x32 0x34 0x36 0x38 0x3A 0x3C 0x3E 0x40 to 0x51 0x52 0x54 0x56 0x58 Size (Bytes) 2 2 2 2 2 2 2 2 2 2 2 2 8 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 16 2 2 2 2 Function Diagnostics, flash write counter (16-bit binary) Output, power supply Output, x-axis acceleration Output, y-axis acceleration Output, z-axis acceleration Output, internal temperature Output, ±180° x-axis inclination Output, ±180° y-axis inclination Output, ±180° z-axis inclination Calibration, x-axis acceleration offset null Calibration, y-axis acceleration offset null Calibration, z-axis acceleration offset null Reserved, do not write to these locations Alarm, x-axis amplitude threshold Alarm, y-axis amplitude threshold Alarm, z-axis amplitude threshold Alarm, system alarm threshold Alarm, x-axis sample period Alarm, y-axis sample period Alarm, z-axis sample period Operation, alarm control Reserved Operation, general I/O configuration and data Operation, orientation mode Operation, digital I/O configuration and data Operation, decimation filter configuration Operation, sleep count Diagnostics, system status register Operation, system command register Reserved Lot identification, Code 1 Lot identification, Code 2 Production identification number Serial number Reference Table 37 Table 20 Table 9 Table 10 Table 11 Table 18 Table 13 Table 14 Table 15 Table 24 Table 25 Table 26 Table 39 Table 40 Table 41 Table 42 Table 43 Table 44 Table 45 Table 38 Table 31 Table 27 Table 30 Table 22 Table 29 Table 36 Table 28 Table 32 Table 33 Table 34 Table 35 N/A means not applicable. Rev. A | Page 8 of 20 ADIS16210 SENSOR DATA OUTPUT DATA REGISTERS The ADIS16210 provides a set of output registers for three orthogonal axes of acceleration: incline angles, internal temperature, and power supply. Inclinometers Registers XINCL_OUT (Table 13), YINCL_OUT (Table 14), and ZINCL_OUT (Table 15) provide access to incline angle data for each axis. For example, set DIN = 0x0E00 to request y-axis data (YINCL_OUT). Use the following process to translate the contents of these registers into degrees (°): 1. 2. 3. Convert the 16-bit, twos complement number into a decimal equivalent. Multiply the decimal equivalent by 180. Divide the result of Step 2 by 32,768. Accelerometers The accelerometers respond to both static (gravity) and dynamic acceleration using the polarity shown in Figure 11. XACCL_OUT (Table 9), YACCL_OUT (Table 10), and ZACCL_OUT (Table 11) provide user access to digital calibrated accelerometer data for each axis. For example, use DIN = 0x0400 to request the x-axis data (XACCL_OUT). After reading the contents of one of these registers, convert the 16-bit, twos complement number into a decimal equivalent, and then divide that number by 16,384 to convert the measurement into units of gravity (g). Table 12 provides several examples of this data format. Table 9. XACCL_OUT (Base Address = 0x04), Read Only Bits [15:0] Description X-axis accelerometer output data, twos complement, 1 LSB = 1 g ÷ 16,384 = ~61 μg/LSB, 0 g = 0x0000 Description Y-axis accelerometer output data, twos complement, 1 LSB = 1 g ÷ 16,384 = ~61 μg/LSB, 0 g = 0x0000 Table 16 provides several examples of this data format. Table 13. XINCL_OUT (Base Address = 0x0C), Read Only Bits [15:0] Description X-axis inclinometer output data, binary, 0° = 0x0000, 1 LSB = 180°/32,768 = ~0.0055°/LSB Table 14. YINCL_OUT (Base Address = 0x0E), Read Only Bits [15:0] Description Y-axis inclinometer output data, binary, 0° = 0x0000, 1 LSB = 180°/32,768 = ~0.055°/LSB Table 10. YACCL_OUT (Base Address = 0x06), Read Only Bits [15:0] Table 15. ZINCL_OUT (Base Address = 0x10), Read Only Bits [15:0] Description Z-axis inclinometer output data, binary, 0° = 0x0000, 1 LSB = 180°/32,768 = ~0.0055°/LSB Table 11. ZACCL_OUT (Base Address = 0x08), Read Only Bits [15:0] Description Z-axis accelerometer output data, twos complement, 1 LSB = 1 g ÷ 16,384 = ~61 μg/LSB, 0 g = 0x0000 Table 16. Incline Angle Data Format Examples Orientation +179.9945° +0.011° +0.0055° 0° −0.0055° −0.011° −180° Decimal +32,767 +2 +1 0 −1 −2 −32,768 Hex 0x7FFF 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0x8000 Binary 0111 1111 1111 1111 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1000 0000 0000 0000 Table 12. Accelerometer Data Format Examples Orientation (g) +1.7 +1 +2/16,384 +1/16,384 0 −1/16,384 −2/16,384 −1 −1.7 Decimal +27,853 +16,384 +2 +1 0 −1 −2 −16,384 −27,853 Hex 0x6CCD 0x4000 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0xC000 0x9333 Binary 0110 1100 1100 1101 0100 0000 0000 0000 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1100 0000 0000 0000 1001 0011 0011 0011 Figure 11 through Figure 16 provide orientation examples and the associated output values for each accelerometer and inclinometer register. These examples assume the factory default configuration for the gravity vector (z-axis, pointed up). See the MSC_CTRL (Table 27) for additional options for gravity vector definitions. Rev. A | Page 9 of 20 ADIS16210 aX a aZ aY aY aZ X 09593-012 Figure 11. Inclinometer Output Example, 0° Tilt Figure 14. Inclinometer Output Example, +30° Y-Axis Tilt aX aZ aX aY aZ aY Figure 12. Inclinometer Output Example, −30° Y-Axis Tilt 09593-013 Figure 15. Inclinometer Output Example, +30° X-Axis Tilt aZ aY aX aX aY aZ 09593-017 09593-014 Figure 13. Inclinometer Output Exampls, −30° X-Axis Tilt 09593-016 Figure 16. Inclinometer Output Example, 180° Tilt Table 17. Orientation/Output Examples for Z-Axis Gravity Orientation 1 Register XACCL_OUT YACCL_OUT ZACCL_OUT XINCL_OUT YINCL_OUT ZINCL_OUT 1 Figure 11 0 0 +16,384 0 0 +16,384 Figure 12 0 −8192 +14,189 0 −5462 +10,922 Figure 13 −8192 0 +14,189 −5462 0 +10,922 Figure 14 0 +8192 +14,189 0 +5462 +10,922 Figure 15 +8192 0 +14,189 +5462 0 +10,922 Figure 16 0 0 −16,384 −32,768 −32,768 −16,384 Register setting for Z-axis gravity orientation is MSC_CTRL[7:0] = xxxx xx10. Rev. A | Page 10 of 20 09593-015 ADIS16210 Internal Temperature The TEMP_OUT register (Table 18) provides access to an internal temperature measurement. Set DIN = 0x0A00 to request the contents of this register. Use the following process to translate the contents of TEMP_OUT into Celsius (°C): 1. 2. 3. 4. Convert the 12-bit binary number into a decimal equivalent. Subtract 1278 from the decimal equivalent. Multiply the result of Step 2 by −0.47. Add 25 to the result of Step 3. Power Supply The SUPPLY_OUT register (Table 20) provides a digital measurement for the supply voltage on the VDD pins (see Table 5). Set DIN = 0x0200 to request the contents of this register. Use the following process to translate the contents of SUPPLY_OUT into volts (V): 1. 2. 3. Convert the 16-bit binary number into a decimal equivalent. Multiply the decimal equivalent by 5. Divide the result of Step 2 by 32,768. Table 19 provides several examples of this data format. Note that this internal temperature measurement provides an indicator of condition changes, not an absolute measurement of conditions outside of the package. Table 18. TEMP_OUT (Base Address = 0x0A), Read Only Bits [15:0] Description Internal temperature data, binary format, sensitivity = −0.47°/LSB, +25°C = 1278 LSB = 0x04FE Table 21 provides several examples of this data format. Table 20. SUPPLY_OUT (Base Address = 0x02), Read Only Bits [15:0] Description Power supply measurement data, binary format, 1 LSB = 5 ÷ 32,768 = ~152.6 μV, 0 V = 0x0000 Table 21. Power Supply Data Format Examples Supply Level (V) 3.6 3.3 + (5 ÷ 32,768) 3.3 3.3 − (5 ÷ 32,768) 3.0 LSB 23,593 21,628 21,627 21,626 19,661 Hex 0x5C29 0x547C 0x547B 0x547A 0x4CCD Binary 0101 1100 0010 1001 0101 0100 0111 1100 0101 0100 0111 1011 0101 0100 0111 1010 0100 1100 1100 1101 Table 19. Internal Temperature Data Format Examples Temperature (°C) +125 25 + 0.47 +25 25 − 0.047 0 −40 LSB 1065 1277 1278 1279 1331 1416 Hex 0x0429 0x04FD 0x04FE 0x04FF 0x0533 0x0588 Binary 0000 0100 0010 1001 0000 0100 1111 1101 0000 0100 1111 1110 0000 0100 1111 1111 0000 0101 0011 0011 0000 0101 1000 1000 Rev. A | Page 11 of 20 ADIS16210 SIGNAL PROCESSING, BIAS CORRECTION, AND ALIGNMENT USER-ADJUSTABLE BIAS CORRECTION XACCL_NULL, YACCL_NULL, ZACCL_NULL FACTORY CALIBRATION AND ALIGNMENT 3-AXIS MEMS ACCEL USER REFERENCE ALIGNMENT PITCH ROLL ANGLE CALCULATION XACCL_OUT YACCL_OUT ZACCL_OUT NUMBER OF AVERAGES AVG_CNT USER-DRIVEN ALIGNMENT CORRECTION SET GLOB_CMD[0] = 1 XINCL_OUT YINCL_OUT ZINCL_OUT 09593-020 GRAVITY AXIS DEFINITION SELECT USING MSC_CTRL[1:0] Figure 17. Sensor Signal Processing Diagram (Each Axis) The ADIS16210 provides user controls for digital filtering, accelerometer bias correction, gravity vector axis definition, and the measurement mode. Accelerometer Bias Correction The XACCL_NULL (Table 24), YACCL_NULL (Table 25), and ZACCL_NULL (Table 26) registers add to the accelerometer outputs to provide a bias adjustment function. They use the same format as each accelerometer output register. For example, set XACCL_NULL = 0x00F (DIN = 0x9300, 0x920F) to increase the x-axis bias by 15 LSB, or 915.5 μg (15 ÷ 16,384). Table 24. XACCL_NULL (Base Address = 0x12), Read/Write Bits [15:0] Description (Default = 0x0000) Same format as XACCL_OUT, see Table 9 Digital Filtering The digital filter uses an averaging/decimating architecture to produce a low-pass response. The AVG_CNT register (Table 22) provides access to the average factor, m, which determines the number of averages (N) in the filtering stage. Table 23 provides the resulting cut-off frequency (fC) and output register update rate (fS) associated with each setting in AVG_CNT. Table 22. AVG_CNT (Base Address = 0x38), Read/Write Bits [15:4] [3:0] Description (Default = 0x0009) Not used Average factor, m, binary format Number of averages, N = 2m Table 25. YACCL_NULL (Base Address = 0x14), Read/Write Bits [15:0] Description (Default = 0x0000) Same format as YACCL_OUT, see Table 10 Table 26. ZACCL_NULL (Base Address = 0x16), Read/Write Bits [15:0] Noise (p-p) ±0.32 ±0.30 ±0.27 ±0.22 ±0.17 ±0.12 ±0.09 ±0.06 ±0.04 ±0.03 ±0.02 ±0.02 Description (Default = 0x0000) Same format as ZACCL_OUT, see Table 11 Table 23. AVG_CNT Sample Rate, Bandwidth AVG_CNT[7:0] 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009 0x000A 0x000B m 0 1 2 3 4 5 6 7 8 9 10 11 N 1 2 4 8 16 32 64 128 256 512 1024 2048 fS (Output) 512 256 128 64 32 16 8 4 2 1 0.5 0.25 fC (−3 dB) 48.2 44.6 36.1 23.9 13.5 7.0 3.5 1.8 0.89 0.44 0.22 0.11 Gravity Vector Axis Definition The ADIS16210 uses the following equations to translate calibrated, triaxial accelerometer data into incline angles: ⎛ aP θ = atan 2⎜ ⎜ 2 2 ⎜ K GP a R + a G ⎝ ⎛ φ = atan2⎜ ⎜ ⎜ K GP ⎝ ⎛ ψ = atan2⎜ ⎜ ⎜ K GP ⎝ aR ⎞ ⎟ ⎟ ⎟ ⎠ ⎞ ⎟ 2 2⎟ a P + aG ⎟ ⎠ ⎞ aG ⎟ 2 2⎟ aP + aR ⎟ ⎠ Rev. A | Page 12 of 20 ADIS16210 The pitch (θ) and roll (φ) axes provide ±180° of measurement range, whereas the gravity (ψ) axis provides ±90° of measurement range. The MSC_CTRL register (see Table 27) provides three control bits that set the orientation of the device, which assigns each accelerometer to an angle axis (pitch, roll, gravity). Table 27. MSC_CTRL (Base Address = 0x34), Read/Write Bits [15:10] [9:8] Value Description (Default = 0x0002) Not used Measurement mode Inclinometer Accelerometer Not used Gravity vector polarity, KGP Negative, pointing down (−) Positive, pointing up (+) Gravity vector orientation X = gravity vector Y = pitch axis (θ, aP) Z = roll axis (φ, aR) Y = gravity vector X = pitch axis (θ, aP) Z = roll axis (φ, aR) Z = gravity vector X = pitch axis (θ, aP) Y = roll axis (φ, aR) Reserved aZ 0 1 [7:3] [2] 1 0 [1:0] 00 Figure 18. Z-Axis Gravity Vector, Negative Polarity Set MSC_CTRL = 0x0006 (DIN = 0xB406) aX 10 Figure 19. X-Axis Gravity Vector, Positive Polarity Set MSC_CTRL = 0x0000 (DIN = 0xB400) 11 For best use of the available range and accuracy, use Bits[2:0] in the MSC_CTRL register to establish the accelerometer that best aligns with gravity when the device is oriented at its reference point. For example, Figure 11 provides a reference point orientation, where the z-axis accelerometer aligns with gravity, for which the factory default setting for MSC_CTRL (0x0002) is optimal. Bits[1:0] provide a control for setting the axis that is most closely aligned with the gravity vector and assigns the pitch and roll axes. Bit 2 provides a control for the direction/polarity of this. Thus, when using the factory default setting for MSC_CTRL, read XINCL_OUT for the pitch angle and YINCL_OUT for the roll angle measurements. Figure 18, Figure 19, and Figure 20 provide several examples for these settings, which are different from the factory programmed settings. aY Figure 20. Y-Axis Gravity Vector, Negative Polarity Set MSC_CTRL = 0x0005 (DIN = 0xB405) Measurement Mode MSC_CTRL[8] establishes the primary measurement function. Setting MSC_CTRL[8] = 1 (DIN = 0xB501) disables signal processing on the accelerometer data, which is specific to producing incline angle measurements. Rev. A | Page 13 of 20 09593-019 09593-018 01 09593-021 ADIS16210 SYSTEM TOOLS The ADIS16210 provides control registers for the following system level functions: global commands (including self test), input/output functions, device identification, status/error flags, and flash memory management. wake-up time), a negative assertion of the RST line (33.8 ms recovery time), or a power cycle (156 ms start-up time). Table 29. SLP_CNT (Base Address = 0x3A), Read/Write Bits [15:8] [7:0] Description (Default = 0x0000) Not used Binary, sleep time, 0.5 seconds/LSB 0x00 = indefinite sleep mode GLOBAL COMMANDS The GLOB_CMD register (Table 28) provides an array of single write commands. Set the assigned bit to 1 to activate each function. Proper execution of each command depends on the power supply being within normal limits and no SPI communication, during the process times listed in Table 28. Table 28. GLOB_CMD (Base Address = 0x3E), Write Only Bits [15:8] [7] [6] [5] [4] [3] [2] [1] [0] 1 INPUT/OUTPUT FUNCTIONS The DIO_CTRL register (Table 30) provides configuration control options for the two digital I/O lines. Bits[5:4] and Bit 1 assign the function and active polarity for DIO2. Bits[3:2] and Bit 0 assigned the function and polarity for DIO1. Table 30. DIO_CTRL (Base Address = 0x36), Read/Write Bits [15:6] [5:4] Value Description (Default = 0x0007) Not used DIO2 function selection General-purpose Data ready Alarm indicator Busy signal DIO1 function selection General-purpose Data ready Alarm indicator Busy signal DIO2 polarity Active high Active low DIO1 polarity active high active low Description Not used Software reset User register save to flash memory Flash memory test Clear DIAG_STAT register Restore factory default configuration Self test Power-down Not used Process Time1 N/A2 33.7 ms 28.0 ms 31.3 ms 93 μs 68.6 ms 53.7 ms N/A2 N/A2 00 01 10 11 [3:2] 00 01 10 11 [1] 1 0 [0] 1 0 This indicates the typical duration of time between the command write and the device returning to normal operation. 2 N/A means not applicable. Software Reset Set GLOB_CMD[7] = 1 (DIN = 0xBE80) to execute an internal reset, which flushes all data and restores the register values to the values that are stored in nonvolatile flash memory. User Register Save to Flash Memory Set GLOB_CMD[6] = 1 (DIN = 0xBE40) to back up all of the current register settings into nonvolatile flash memory. Flash Memory Test Set GLOB_CMD[5] = 1 (DIN = 0xBE20) to execute the internal flash memory test routine, which computes a check sum verification of all flash memory locations that are not configurable through user commands. Data Ready Indicator The data ready signal pulses to its inactive state when loading fresh data into the output registers, then back to its active state when the register update process completes, as shown in Figure 21, which shows the factory default operation. Set DIO_CTRL[7:0] = 0x13 (DIN = 0xB613) to change the data ready assignment to DIO2 with a positive polarity. DIO1 ACTIVE INACTIVE 09593-023 Self Test Set GLOB_CMD[2] = 1 (DIN = 0xBE04) to execute an internal test routine that exercises the sensors and signal processing circuit, then writes the pass/fail result to Bit 5 of the DIAG_STAT register. Figure 21. Data Ready Operation, DIO_CTRL[7:0] = 0x05 Power-Down Set GLOB_CMD[1] = 1 (DIN = 0xBE02) to put the device into sleep mode. Use the SLP_CNT register to establish the duration of the sleep period. For example, set SLP_CNT[7:0] = 0x64 (DIN = 0xBA64) to set the sleep period to 50 seconds. Set SLP_CNT[7:0] = 0x00 (DIN = 0xBA00) to establish the sleep period as indefinite. Indefinite sleep mode requires one of the three actions to wake up: negative assertion of the CS line (22.3 ms Alarm Indicator Set DIO_CTRL[7:0] = 0x27 (DIN = 0xB627) to configure DIO2 as an alarm indicator with an active high polarity. The alarm indicator transitions to its active state when the acceleration or system data exceeds the threshold settings in the ALM_MAG_x registers. Set GLOB_CMD[4] = 1 (DIN = 0xBF10) to clear the DIAG_STAT error flags and restore the alarm indicator to its inactive state. Rev. A | Page 14 of 20 ADIS16210 General-Purpose Input/Output If DIO_CTRL configures either DIO1 or DIO2 as a generalpurpose digital line, use the GPIO_CTRL register (Table 31) to configure its input/output direction, set the output level when configured as an output, and monitor the status of an input. For example, set DIO_CTRL[3:0] = 0x00 (DIN = 0xB600) to establish DIO1 as a general-purpose line, set GPIO_CTRL[0] = 1 (DIN = 0xB201) to establish DIO1 as an output, and set GPIO_CTRL[8] = 1 (DIN = 0xB301) to set DIO1 high. Table 31. GPIO_CTRL (Base Address = 0x32), Read/Write Bits [15:10] [9] [8] [7:2] [1] [0] Description (Default = 0x0000) Not used DIO2 output level, 1 = high, 0 = low DIO1 output level, 1 = high, 0 = low Reserved DIO2 direction control, 1 = output, 0 = input DIO1 direction control, 1 = output, 0 = input Table 36. DIAG_STAT (Base Address = 0x3C), Read Only Bits [15:12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0] Description (Default = 0x0000) Not used Alarm S flag Alarm Z flag Alarm Y flag Alarm X flag Data ready Flash test Self test Not used SPI failure Flash update failure VDD > 3.625 VDD < 2.975 FLASH MEMORY MANAGEMENT Set GLOB_CMD[5] = 1 (DIN = 0xBE20) to run an internal checksum test on the flash memory, which reports a pass/fail result to DIAG_STAT[6]. The FLASH_CNT register (Table 37) provides a running count of flash memory write cycles. This is a tool for managing the endurance of the flash memory. Figure 22 quantifies the relationship between data retention and junction temperature. Table 37. FLASH_CNT (Base Address = 0x00), Read Only Bits [15:0] Description Binary counter for writing to flash memory DEVICE IDENTIFICATION Table 32. LOT_ID1 (Base Address = 0x52), Read Only Bits [15:0] Bits [15:0] Bits [15:0] Bits [15:0] Description Lot identification code Description Lot identification code Table 33. LOT_ID2 (Base Address = 0x54), Read Only Table 34. PROD_ID (Base Address = 0x56), Read Only 600 Description (Default = 0x3F52) RETENTION (Years) 0x3F52 = 16,210 Description Serial number, lot specific Table 35. SERIAL_NUM (Base Address = 0x58), Read Only 450 300 STATUS/ERROR FLAGS The DIAG_STAT register, in Table 36, provides a number of status/error flags that reflect the conditions observed during a capture, during SPI communication and diagnostic tests. A 1 indicates an error condition and all of the error flags are sticky, which means that they remain until they are reset by setting GLOB_CMD[4] = 1 (DIN = 0xBE10). The flag in Bit 3 of the DIAG_STAT register indicates that the total number of SCLK clocks is not a multiple of 16. Set DIN = 0x3C00 to read this register. 150 30 40 55 70 85 100 125 135 150 JUNCTION TEMPERATURE (°C) Figure 22. Flash/EE Memory Data Retention Rev. A | Page 15 of 20 09593-115 0 ADIS16210 ALARMS There are four independent alarms, which provide trigger level and polarity controls. The ALM_CTRL register (Table 38) provides individual settings for data source selection (Bits[7:4]), static and dynamic comparison (Bits[14:12]), trigger direction/polarity (Bits[11:8]), and alarm enable (Bits[3:0]). Table 38. ALM_CTRL (Base Address = 0x2E), Read/Write Bits [15] [14] [13] [12] [11] Description (Default = 0x0000) Not used Alarm Z, dynamic control 1 = dynamic, 0 = static Alarm Y, dynamic control 1 = dynamic, 0 = static Alarm X, dynamic control 1 = dynamic, 0 = static Alarm S, comparison polarity 1 = SUPPLY_OUT/TEMP_OUT > ALM_MAG_S 0 = SUPPLY_OUT/TEMP_OUT < ALM_MAG_S Alarm Z, comparison polarity 1 = ZACCL_OUT/ZINCL_OUT > ALM_MAG_Z 0 = ZACCL_OUT/ZINCL_OUT < ALM_MAG_Z Alarm Y, comparison polarity 1 = YACCL_OUT/YINCL_OUT > ALM_MAG_Y 0 = YACCL_OUT/YINCL_OUT < ALM_MAG_Y Alarm X, comparison polarity 1 = XACCL_OUT/XINCL_OUT > ALM_MAG_X 0 = XACCL_OUT/XINCL_OUT < ALM_MAG_X Alarm S, source selection 1 = SUPPLY_OUT, 0 = TEMP_OUT Alarm Z, source selection 1 = ZINCL_OUT, 0 = ZACCL_OUT Alarm Y, source selection 1 = YINCL_OUT, 0 = YACCL_OUT Alarm X, source selection 1 = XINCL_OUT, 0 = XACCL_OUT Alarm S, enable 1 = enabled, 0 = disabled Alarm Z, enable 1 = enabled, 0 = disabled Alarm Y, enable 1 = enabled, 0 = disabled Alarm X, enable 1 = enabled, 0 = disabled in the ALM_MAG_x registers (Table 39, Table 40, and Table 41) using the trigger direction/polarity settings in ALM_CTRL[10:8]. For example, if ALM_CTRL[10] = 0, ALM_CTRL[6] = 1, and ALM_MAG_Z = 0x2000, then Alarm Z becomes active when ZINCL_OUT is less than 0x2000, or 45°. DYNAMIC ALARMS The dynamic alarm setting monitors the data selection for a rate-of-change comparison. The rate-of-change comparison is represented by the magnitude in the ALM_MAG_x registers (Table 39, Table 40, and Table 41), divided by the time in the ALM_SMPL_x registers (Table 43, Table 44, Table 45). For example, if ALM_CTRL[9] = 1, ALM_CTRL[5] = 0, ALM_MAG_Y = 0x4000, and ALM_SMPL_Y = 0x0064, then Alarm Y (DIAG_STAT[9]) becomes active when YACCL_OUT changes by more than +1 g over 100 samples. The AVG_CNT register (Table 22) establishes the time for each sample. Table 39. ALM_MAG_X (Base Address = 0x20), Read/Write Bits [15:0] Description (Default = 0x0000) Same data format as ZACCL_OUT or ZINCL_OUT, according to the setting in ALM_CTRL[4] Description (Default = 0x0000) Same data format as ZACCL_OUT or ZINCL_OUT, according to the setting in ALM_CTRL[5] Description (Default = 0x0000) Same data format as ZACCL_OUT or ZINCL_OUT, according to the setting in ALM_CTRL[6] Description (Default = 0x0000) Same data format as SUPPLY_OUT or TEMP_OUT, according to the setting in ALM_CTRL[7] Description (Default = 0x0001) Not used Binary, number of samples Description (Default = 0x0001) Not used Binary, number of samples Description (Default = 0x0001) Not used Binary, number of samples [10] [9] Table 40. ALM_MAG_Y (Base Address = 0x22), Read/Write Bits [15:0] [8] [7] [6] [5] [4] [3] [2] [1] [0] Table 41. ALM_MAG_Z (Base Address = 0x24), Read/Write Bits [15:0] Table 42. ALM_MAG_S (Base Address =0x26), Read/Write Bits [15:0] Table 43. ALM_SMPL_X (Base Address = 0x28), Read/Write Bits [15:8] [7:0] Bits [15:8] [7:0] Bits [15:8] [7:0] Table 44. ALM_SMPL_Y (Base Address = 0x2A), Read/Write SYSTEM ALARM The system alarm monitors either power supply or internal temperature, according to the user selections in ALM_CTRL[11], ALM_CTRL[7], ALM_CTRL[3], and the ALM_MAG_S register in Table 42. For example, set ALM_CTRL = 0x0008 (DIN = 0xA900, 0xA808) and ALM_MAG_S = 0x533 (DIN = 0xA705, 0xA633) to disable all three inertial alarms and configure the system alarm active when TEMP_OUT < 0°C. Table 45. ALM_SMPL_Z (Base Address = 0x2C), Read/Write ALARM REPORTING See DIAG_STAT[11:8] (Table 36) for alarm flags, which equal 1 when an alarm condition is detected. DIO_CTRL (Table 30) offers settings that configure DIO1 or DIO2 as an alarm indicator signal. STATIC ALARMS The static alarm setting enables the ADIS16210 to compare the data source (ALM_CTRL[6:4]) with the corresponding values Rev. A | Page 16 of 20 ADIS16210 APPLICATIONS INFORMATION INTERFACE BOARD The ADIS16210/PCBZ provides the ADIS16210CMLZ on a small printed circuit board (PCB) that simplifies the connection to an existing processor system. This PCB provides a silkscreen for proper placement and four mounting holes, which have threads for M2 × 0.4 mm machine screws. The second set of mounting holes on the interface boards are in the four corners of the PCB and provide clearance for 4-40 machine screws. The third set of mounting holes provides a pattern that matches the ADISUSBZ evaluation system, using M2 × 0.4mm × 4 mm machine screws. These boards are made of IS410 material and are 0.063 inches thick. J1 is a 16-pin connector, in a dual row, 2 mm geometry, which enables simple connection to a 1 mm ribbon cable system. For example, use Molex P/N 87568-1663 for the mating connector and 3M P/N 3625/16 for the ribbon cable. The LEDs (D1 and D2) are not populated, but the pads are available to install to provide a visual representation of the DIO1 and DIO2 signals. The pads accommodate Chicago Miniature Lighting Part No. CMD28-21VRC/TR8/T1, which works well when R1 and R2 are approximately 400 Ω (0603 pad sizes). 40.6mm 37.4mm 2.9mm Figure 24. PCB Assembly View and Dimensions SLIDER LOCKING DIRECTION MATING CONNECTOR The mating connector for the ADIS16210, J2, is AVX P/N 04-6288-015-000-846. Figure 25 provides a close-up view of this connector, which clamps down on the flex to press its metal pads onto the metal pads inside of the mating connector. ADIS16210 FLEX CABLE SLIDER MATING CONNECTOR Figure 25. Mating Connector Detail ADIS16210A1 PACKAGE PIN OUT 09593-024 Figure 23. Electrical Schematic Rev. A | Page 17 of 20 09593-200 09593-025 ADIS16210 OUTLINE DIMENSIONS 15.20 15.00 SQ 14.80 TOP VIEW Ø 1.65 Hole and Slot Size for 1.5 mm Pin 24.20 24.00 23.80 20.20 20.00 19.80 BOTTOM VIEW 2.65 (4 PLCS) 3.50 (4 PLCS) R 2.65 (4 PLCS) R 0.83 (Centers of 2 R 0.83 Circles Separated by 0.89) 3.75 (4 PLCS) 20.00 BSC 0.254 NOM 8.20 8.00 7.80 0.50 NOM PITCH DETAIL A 3.50 NOM FRONT VIEW 15.20 15.00 14.80 DETAIL A Figure 26. 15-Lead Module with Connector Interface (ML-15-1) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADIS16210CMLZ ADIS16210/PCBZ 1 Temperature Range −40°C to +125°C Package Description 15-Lead Module with Connector Interface Evaluation Board Package Option ML-15-1 Z = RoHS Compliant Part. Rev. A | Page 18 of 20 04-27-2011-A ADIS16210 NOTES Rev. A | Page 19 of 20 ADIS16210 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09593-0-6/11(A) Rev. A | Page 20 of 20