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ADIS16334/PCBZ

ADIS16334/PCBZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    BOARD EVAL FOR ADIS16334

  • 数据手册
  • 价格&库存
ADIS16334/PCBZ 数据手册
Low Profile, Six Degrees of Freedom Inertial Sensor ADIS16334 Data Sheet FEATURES GENERAL DESCRIPTION Triaxial digital gyroscope with digital range scaling ±75°/sec, ±150°/sec, ±300°/sec settings Tight orthogonal alignment: –78.70°/sec Figure 12. Example SPI Read, Second 16-Bit Sequence Burst Read Function The ADIS16334 SPI interface supports full-duplex serial communication (simultaneous transmit and receive) and uses the bit sequence shown in Figure 14. Table 7 provides a list of the most common settings that require attention to initialize a processor’s serial port for the ADIS16334 SPI interface. The burst read function enables the user to read all output registers using one command on the DIN line and shortens the stall time between each 16-bit segment to one SCLK cycle (see Table 2). Figure 13 provides the burst read sequence of data on each SPI signal. The sequence starts with writing 0x3E00 to DIN, followed by each output register clocking out on DOUT, in the order in which they appear in Table 8. Table 7. Generic Master Processor SPI Settings Description The ADIS16334 operates as a slave. Maximum serial clock rate. CPOL = 1 (polarity), CPHA = 1 (phase). Bit sequence. Shift register/data length. CS 1 2 3 8 SCLK DIN 0x3E00 DON’T CARE DOUT XGYRO_OUT For burst read, SCLK rate ≤ 1 MHz. YGYRO_OUT TEMP_OUT Figure 13. Burst Read Sequence CS SCLK DIN DOUT R/W D15 A6 A5 A4 A3 A2 A1 A0 D14 D13 D12 D11 D10 D9 D8 DC7 DC6 D7 D6 DC5 D5 DC4 DC3 D4 D3 DC2 DC1 DC0 D2 D1 D0 NOTES 1. THE DOUT BIT PATTERN REFLECTS THE ENTIRE CONTENTS OF THE REGISTER IDENTIFIED BY [A6:A0] IN THE PREVIOUS 16-BIT DIN SEQUENCE WHEN R/W = 0. 2. IF R/W = 1 DURING THE PREVIOUS SEQUENCE, DOUT IS NOT DEFINED. Figure 14. SPI Communication Bit Sequence Rev. D | Page 10 of 20 R/W D15 A6 A5 D14 D13 09362-012 1 0x0800 CS Table 6. Generic Master Processor Pin Names and Functions Processor Setting Master SCLK Rate ≤ 2 MHz1 SPI Mode 3 MSB First Mode 16-Bit Mode 0x0600 Figure 11. SPI Read Example Figure 10. Electrical Connection Diagram Pin Name SS SCLK MOSI MISO IRQ 0x0400 15 09362-008 13 09362-009 5V 09362-010 I/O LINES ARE COMPATIBLE WITH 3.3V OR 5V LOGIC LEVELS The ADIS16334 provides two different options for acquiring sensor data: single register and burst register. A single register read requires two 16-bit SPI cycles. The first cycle requests the contents of a register using the bit assignments in Figure 14. Bit DC7 to Bit DC0 are don’t cares for a read, and then the output register contents follow on DOUT during the second sequence. Figure 11 includes three single register reads in succession. In this example, the process starts with DIN = 0x0400 to request the contents of XGYRO_OUT, then follows with 0x0600 to request YGYRO_OUT and 0x0800 to request ZGYRO_OUT. Full-duplex operation enables processors to use the same 16-bit SPI cycle to read data from DOUT while requesting the next set of data on DIN. Figure 12 provides an example of the four SPI signals when reading XGYRO_OUT in a repeating pattern. 09362-011 VDD READING SENSOR DATA Data Sheet ADIS16334 MEMORY MAP Table 8. User Register Memory Map Name FLASH_CNT Reserved XGYRO_OUT YGYRO_OUT ZGYRO_OUT XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT Reserved Reserved Reserved Reserved XGYRO_OFF YGYRO_OFF ZGYRO_OFF XACCL_OFF YACCL_OFF ZACCL_OFF ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL Reserved GPIO_CTRL MSC_CTRL SMPL_PRD SENS_AVG Reserved DIAG_STAT GLOB_CMD Reserved LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM 1 2 User Access 1 Read only N/A Read only Read only Read only Read only Read only Read only Read only N/A N/A N/A N/A Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write N/A Read/write Read/write Read/write Read/write N/A Read only Write only N/A Read only Read only Read only Read only Flash Backup1 Yes N/A No No No No No No No N/A N/A N/A N/A Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes N/A No Yes Yes Yes N/A No No N/A Yes Yes Yes Yes Address1, 2 0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x32 0x34 0x36 0x38 0x3A 0x3C 0x3E 0x40 to 0x51 0x52 0x54 0x56 0x58 Default1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 N/A 0x0000 0x0006 0x0001 0x0402 N/A 0x0000 0x0000 N/A N/A N/A 0x3FCE N/A Register Description Flash memory write count Reserved Output, x-axis gyroscope Output, y-axis gyroscope Output, z-axis gyroscope Output, x-axis accelerometer Output, y-axis accelerometer Output, z-axis accelerometer Output, internal temperature Reserved Reserved Reserved Reserved Bias correction, x-axis gyroscope Bias correction, y-axis gyroscope Bias correction, z-axis gyroscope Bias correction, x-axis accelerometer Bias correction, y-axis accelerometer Bias correction, z-axis accelerometer Alarm 1, trigger polarity, threshold Alarm 2, trigger polarity, threshold Alarm 1, sample size Alarm 2, sample size Alarm, control Reserved System, DIOx configuration and control System, data ready, self-test, calibration Sample rate, decimation control Dynamic range, digital filter control Reserved System, status/error flags System, global commands Reserved System, Lot Identification Code 1 System, Lot Identification Code 2 System, product identification System, serial number Bit Function1 Table 30 N/A Table 10 Table 10 Table 10 Table 12 Table 12 Table 12 Table 14 N/A N/A N/A N/A Table 20 Table 20 Table 20 Table 21 Table 21 Table 21 Table 32 Table 33 Table 34 Table 34 Table 35 N/A Table 24 Table 25 Table 17 Table 18 N/A Table 26 Table 23 N/A Table 27 Table 27 Table 28 Table 29 N/A is not applicable. Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1. Rev. D | Page 11 of 20 ADIS16334 Data Sheet OUTPUT DATA REGISTERS Table 11. Gyroscope Data Format Examples Table 9 provides a summary of the output registers. The most significant bit in each output register provides a new data indicator function. Every time a new data sample loads into the output data registers, the ND bit is a 1, until a read operation accesses the data sample. Then, this bit sets to 0, until the next data sample loads in. The second most significant bit provides an error/alarm indicator. This bit is equal to 1 if any error flag in the DIAG_STAT register is equal to 1 (active). Rate1 +300°/sec +0.1°/sec +0.05°/sec 0°/sec −0.05°/sec −0.1°/sec −300°/sec 1 Table 9. Output Data Register Summary 1 Address1 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 Binary XX01 0111 0111 0000 XX00 0000 0000 0010 XX00 0000 0000 0001 XX00 0000 0000 0000 XX11 1111 1111 1111 XX11 1111 1111 1110 XX10 1000 1001 0000 Accelerometers Function Gyroscope output, x-axis Gyroscope output, y-axis Gyroscope output, z-axis Accelerometer output, x-axis Accelerometer output, y-axis Accelerometer output, z-axis Gyroscope temperature, x-axis The output registers for the accelerometers are XACCL_OUT, YACCL_OUT, and ZACCL_OUT. Table 12 provides the bit assignments for these registers, along with the digital formatting for converting the digital codes into angular rate values. Table 13 provides several examples for converting the 14-bit, twos complement data into acceleration measurements, and Figure 15 provides the physical/directional reference for these sensors. Table 12. Accelerometer Register Bit Assignments Lower byte address shown. Gyroscopes Bit(s) [15] [14] [13:0] The output registers for the gyroscopes (angular rate of rotation) are XGYRO_OUT, YGYRO_OUT, and ZGRYO_OUT. Table 10 provides the bit assignments for these registers, along with the digital formatting for converting the digital codes into angular rate values. Table 11 provides several examples for converting the 14-bit, twos complement data into angular rate measurements, and Figure 15 provides the physical/directional reference for these sensors. Description New data, 1 = new data since last read access Error/alarm Linear acceleration output data. Twos complement digital format, typical sensitivity = 1 mg/LSB Table 13. Acceleration, Twos Complement Format Acceleration +5 g +2 mg +1 mg 0g −1 mg −2 mg −5 g Table 10. Gyroscope Register Bit Assignments Bit(s) [15] [14] [13:0] Hex 0x1770 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2890 The numbers in the rate column reflect the default range setting, ±300°/sec. Description New data, 1 = new data since last read access Error/alarm Angular rate output data. Twos complement digital format, typical sensitivity = 0.05°/sec per LSB Decimal +5000 LSB +2 LSB +1 LSB 0 LSB −1 LSB −2 LSB −5000 LSB Z-AXIS aZ gZ X-AXIS Y-AXIS aX aY gX gY PIN 20 PIN 2 NOTES 1. ACCELERATION (aX, aY, aZ) AND ROTATIONAL (gX, gY, gZ) ARROWS INDICATE THE DIRECTION OF MOTION THAT PRODUCES A POSITIVE OUTPUT. Figure 15. Sensor Axes and Orientation Reference Diagram Rev. D | Page 12 of 20 09362-013 Register XGYRO_OUT YGYRO_OUT ZGYRO_OUT XACCL_OUT YACCL_OUT ZACCL_OUT TEMP_OUT Decimal +6000 LSB +2 LSB +1 LSB 0 LSB −1 LSB −2 LSB −6000 LSB Hex 0x1388 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2C78 Binary XX01 0011 1000 1000 XX00 0000 0000 0010 XX00 0000 0000 0001 XX00 0000 0000 0000 XX11 1111 1111 1111 XX11 1111 1111 1110 XX10 1100 0111 1000 Data Sheet ADIS16334 Internal Temperature Measurements DEVICE CONFIGURATION The TEMP_OUT register provides relative temperature measurements for inside of the ADIS16334. This measurement can be above ambient temperature and does not reflect external conditions. Table 14 provides the bit assignments for this register, along with the digital data format. Table 15 provides several examples for converting the 12-bit, offset binary data into temperature measurements. The control registers in Table 8 provide users with a variety of configuration options. The SPI provides access to these registers, one byte at a time, using the bit assignments in Figure 14. Each register has 16 bits, where Bits[7:0] represent the lower address, and Bits[15:8] represent the upper address. Figure 16 provides an example of writing 0x03 to Address 0x37 (SMPL_PRD[15:8]), using DIN = 0xB703. This example reduces the sample rate by a factor of eight (see Table 17). Table 14. Temperature Register Bit Assignments CS Description New data, 1 = new data since last read access Error/alarm Not used Temperature output data, offset binary format, typical sensitivity = 0.06785°/LSB, 25°C = 0x0000 SCLK DIN DIN = 1011 0111 0000 0011 = 0xB703, WRITES “0x03” TO ADDRESS “0x37.” 09362-014 Bit(s) [15] [14] [13:12] [11:0] Figure 16. Example SPI Write Sequence Table 15. Temperature, Twos Complement Format Dual Memory Structure Temperature +105°C +85°C +25.1537°C +25.06785°C +25°C +24.93215°C +24.8643°C −40°C Writing configuration data to a control register updates its SRAM contents, which are volatile. After optimizing each relevant control register setting in a system, set GLOB_CMD[3] = 1 (DIN = 0xBE08) to back these settings up in nonvolatile flash memory. The flash backup process requires a valid power supply level for the entire 75 ms process time. The user register map in Table 8 provides a column that indicates the registers that have flash back-up support. A yes in the Flash Backup column indicates that a register has a mirror location in flash and, when backed up properly, it automatically restores itself during startup or after a reset. Figure 17 provides a diagram of the dual-memory structure used to manage operation and store critical user settings. Hex 0x49B 0x374 0x002 0x001 0x000 0xFFF 0xFFE 0xC42 Binary XXXX 0100 1001 1011 XXXX 0011 0111 0100 XXXX 0000 0000 0010 XXXX 0000 0000 0001 XXXX 0000 0000 0000 XXXX 1111 1111 1111 XXXX 1111 1111 1110 XXXX 1100 0100 0010 MANUAL FLASH BACKUP NONVOLATILE FLASH MEMORY VOLATILE SRAM (NO SPI ACCESS) SPI ACCESS START-UP RESET Figure 17. SRAM and Flash Memory Diagram Rev. D | Page 13 of 20 09362-015 Decimal +1179 LSB +884 LSB +2 LSB +1 LSB 0 LSB −1 LSB −2 LSB −958 LSB ADIS16334 Data Sheet DIGITAL PROCESSING CONFIGURATION 0 Table 16. Digital Processing Registers Description Sample rate control Digital filtering and range control –20 –40 SAMPLE RATE The internal sampling system produces new data in the output data registers at a rate of 819.2 SPS. The SMPL_PRD register in Table 17 provides two functional controls for internal sampling and register update rates: SMPL_PRD[12:8] for decimation and SMPL_PRD[0] for enabling the external clock option. The decimation filter reduces the update rate, using an averaging filter with a decimated output. These bits provide a binomial control that divides the data rate by a factor of 2 every time this number increases by 1. For example, set SMPL_PRD[12:8] = 00100 (DIN = 0xB704) to set the decimation factor to 16. This reduces the update rate to 51.2 SPS and the bandwidth to 25 Hz. –60 –80 –100 –120 –140 0.001 N=2 N=4 N = 16 N = 64 0.01 0.1 FREQUENCY (f/fS) 1 09362-016 Address 0x36 0x38 MAGNITUDE (dB) Register Name SMPL_PRD SENS_AVG Figure 18. Bartlett Window, FIR Filter Frequency Response (Phase Delay = N Samples) DYNAMIC RANGE INPUT CLOCK CONFIGURATION The SENS_AVG[10:8] bits provide three dynamic range settings for this gyroscope. The lower dynamic range settings (±75°/sec and ±150°/sec) limit the minimum filter tap sizes to maintain resolution. For example, set SENS_AVG[10:8] = 010 (DIN = 0xB902) for a measurement range of ±150°/sec. Because this setting can influence the filter settings, program SENS_AVG[10:8] before programming SENS_AVG[2:0] if additional filtering is required. SMPL_PRD[0] provides a control for synchronizing the internal sampling to an external clock source. Set SMPL_PRD[0] = 0 (DIN = 0xB600) to enable the external clock. See Table 2 and Figure 4 for timing information. Bits [15:11] [10:8] Table 17. SMPL_PRD Bit Descriptions Description (Default = 0x0001) Not used Average/decimation rate setting, binomial Not used Clock: 1 = internal (819.2 SPS), 0 = external Table 18. SENS_AVG Bit Descriptions Description (Default = 0x0402) Not used Measurement range (sensitivity) selection 100 = ±300°/sec (default condition) 010 = ±150°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02) 001 = ±75°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04) Not used Number of taps in each stage; value of B in NB = 2B DIGITAL FILTERING The SENS_AVG register in Table 18 provides user controls for the low-pass filter. This filter contains two cascaded averaging filters that provide a Bartlett window, FIR filter response (see Figure 19). For example, set SENS_AVG[2:0] = 100 (DIN = 0xB804) to set each stage to 16 taps. When used with the default sample rate of 819.2 SPS and zero decimation (SMPL_PRD[12:8] = 00000), this value reduces the sensor bandwidth to approximately 16 Hz. [7:3] [2:0] BARTLETT WINDOW FIR FILTER MEMS SENSOR LOW-PASS FILTER 330Hz ADC GYROSCOPES LOW-PASS, TWO-POLE (404Hz, 757Hz) ACCELEROMETERS CLOCK 1 NB NB x(n) n=1 1 NB AVERAGE/ DECIMATION FILTER NB 1 ND x(n) n=1 B = SENS_AVG[2:0] NB = 2B NB = NUMBER OF TAPS (PER STAGE) ND ÷ND x(n) n=1 D = SMPL_PRD[12:8] ND = 2D ND = NUMBER OF TAPS LOW-PASS, SINGLE-POLE (330Hz) EXTERNAL CLOCK ENABLED BY SMPL_PRD[0] = 0 Figure 19. Sampling and Frequency Response Block Diagram Rev. D | Page 14 of 20 09362-017 Bit(s) [15:13] [12:8] [7:1] [0] Data Sheet ADIS16334 OPTIMIZING ACCURACY The mechanical structure and assembly process of the ADIS16334 provide excellent position and alignment stability for each sensor, even after subjected to temperature cycles, shock, vibration, and other environmental conditions. The factory calibration includes a dynamic characterization of each sensor’s behavior over temperature and generates sensor-specific correction formulas. The bias correction registers in Table 19 provide users with the ability to address bias shifts that can result from mechanical stress. Figure 20 illustrates the summing function of each sensor’s offset correction register. FACTORY CALIBRATION AND FILTERING Bits [15:13] [12:0] Table 21. XACCL_OFF, YACCL_OFF, and ZACCL_OFF Bit Descriptions Bits [15:12] [11:0] XGYRO_OUT Description (Default = 0x0000) Not used Data bits. Twos complement, 1mg/LSB. Typical adjustment range = ±2 g. RESTORING FACTORY CALIBRATION XGYRO_OFF Figure 20. User Calibration, XGYRO_OFF Example There are two options for optimizing gyroscope bias accuracy prior to system deployment: automatic bias correction (ABC) and manual bias correction (MBC). AUTOMATIC BIAS CORRECTION The ABC function provides a simple measure-and-adjust function for the three gyroscope sensors. Set GLOB_CMD[0] = 1 (DIN = 0xBE01) to start the ABC function, which automatically performs the following steps to correct the bias on each gyroscope: 1. 2. 3. 4. 5. 6. Description (Default = 0x0000) Not used Data bits. Twos complement, 0.0125°/sec per LSB. Typical adjustment range = ±50°/sec. Sets the output range to ±75°/sec Waits for the next output register update Reads the output register of the gyroscope Multiplies the measurement by −1 to change its polarity Writes the final value into the offset register Performs a manual flash back-up function to store the correction factor in nonvolatile flash memory Set GLOB_CMD[1] = 1 (DIN = 0xBE02) to execute the factory calibration restore function. This is a single-command function, which resets each user calibration register to 0x0000 and all sensor data to 0. Then, it automatically updates the flash memory within 50 ms. See Table 23 for more information on GLOB_CMD. POINT-OF-PERCUSSION/LINEAR-g COMPENSATION Set MSC_CTRL[6] = 1 (DIN = 0xB446) to enable this feature and maintain the factory-default settings for DIO1. This feature performs a point-of-percussion translation to the point identified in Figure 6. See Table 25 for more information on MSC_CTRL. Set MSC_CTRL[7] = 1 to enable internal compensation for linear-g on the gyroscope bias. The accuracy of the bias correction depends on the internal averaging time used for the data sample, which depends on the decimation setting. For example, set SMPL_PRD[15:8] = 0x10 (DIN = 0xB710) to establish a decimation rate of 216, or 65536. This establishes an averaging time of 80 seconds at a sample rate of 819.2 SPS, which results in an Allan Variance of 0.006°/sec in Figure 7. Rev. D | Page 15 of 20 PIN 20 PIN 2 ORIGIN ALIGNMENT REFERENCE POINT SEE MSC_CTRL[6]. Figure 21. Point of Percussion Reference 09362-019 ADC Description Gyroscope bias, x-axis Gyroscope bias, y-axis Gyroscope bias, z-axis Accelerometer bias, x-axis Accelerometer bias, y-axis Accelerometer bias, z-axis Automatic calibration 09362-018 X-AXIS MEMS GYRO Address 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x3E The MBC function requires the user to collect the desired number of samples, calculate the averages to develop bias estimates for each gyroscope channel, and then write them into the bias offset registers, located in Table 20 for the gyroscopes. For example, set XGYRO_OFF = 0x1FF6 (DIN = 0x9B1F, 0x9AF6) to adjust the XGYRO_OUT offset by −0.125°/sec (−10 LSBs). Table 21 provides a manual adjustment function for the accelerometer channels as well. Table 20. XGYRO_OFF, YGYRO_OFF, and ZGYRO_OFF Bit Descriptions Table 19. Registers for User Calibration Register XGYRO_OFF YGYRO_OFF ZGYRO_OFF XACCL_OFF YACCL_OFF ZACCL_OFF GLOB_CMD MANUAL BIAS CORRECTION ADIS16334 Data Sheet SYSTEM TOOLS Table 22 provides an overview of the control registers that provide support for the following system level functions: global commands, I/O control, status/error flags, device identification, MEMS selftest, and flash memory management. Table 22. System Tool Register Addresses Register Name FLSH_CNT GPIO_CTRL MSC_CTRL DIAG_STAT GLOB_CMD LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM Address 0x00 0x32 0x34 0x3C 0x3E 0x52 0x54 0x56 0x58 Description Flash write cycle count General-purpose I/O control Manual self-test controls Status, error flags Global commands Lot Identification Code 1 Lot Identification Code 2 Product identification Serial number Table 24. GPIO_CTRL Bit Descriptions Bit(s) [15:12] [11] [10] [9] [8] [7:4] [3] [2] [1] [0] Description (Default = 0x0000) Not used General-Purpose I/O Line 4 (DIO4) data level General-Purpose I/O Line 3 (DIO3) data level General-Purpose I/O Line 2 (DIO2) data level General-Purpose I/O Line 1 (DIO1) data level Not used General-Purpose I/O Line 4 (DIO4) direction control (1 = output, 0 = input) General-Purpose I/O Line 3 (DIO3) direction control (1 = output, 0 = input) General-Purpose I/O Line 2 (DIO2) direction control (1 = output, 0 = input) General-Purpose I/O Line 1 (DIO1) direction control (1 = output, 0 = input) GLOBAL COMMANDS Data Ready I/O Indicator The GLOB_CMD register provides an array of single-write commands for convenience. Setting the assigned bit in Table 23 to 1 activates each function. When the function completes, the bit restores itself to 0. For example, clear the capture buffers by setting GLOB_CMD[8] = 1 (DIN = 0xBF01). All of the commands in the GLOB_CMD register require the power supply to be within normal limits for the execution times listed in Table 23. Avoid communicating with the SPI interface during these execution times because it interrupts the process and causes data loss or corruption. The factory default sets DIO1 as a positive data ready indicator signal. In this configuration, the signal pulses high when all of the output data registers have fresh data from the same sample period. The MSC_CTRL[2:0] bits provide configuration options for changing the default. For example, set MSC_CTRL[2:0] = 100 (DIN = 0xB404) to change the polarity of the data ready signal on DIO1 for interrupt inputs that require negative logic inputs for activation. See Figure 4 for an example of the data-ready timing. Table 23. GLOB_CMD Bit Descriptions Bit(s) [15:8] [7] [6:4] [3] [2] [1] [0] 1 Description Not used Software reset Not used Register back-up to flash Not used Factory calibration restore Gyroscope auto-null Execution Time1 Not applicable 60 ms Not applicable Table 25. MSC_CTRL Bit Descriptions Bit(s) [15:12] [11] [10] [9:8] [7] Not applicable This indicates the typical duration of time between the command write and the device returning to normal operation. General-Purpose I/O DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose I/O lines that serve multiple purposes according to the following control register priority: MSC_CTRL, ALM_CTRL, and GPIO_CTRL. For example, set GPIO_CTRL = 0x080C (DIN = 0xB308, and then 0xB20C) to configure DIO1 and DIO2 as inputs and DIO3 and DIO4 as outputs, with DIO3 set low and DIO4 set high. In this configuration, read GPIO_CTRL (DIN = 0x3200). The digital state of DIO1 and DIO2 is in GPIO_CTRL[9:8]. [6] [5:3] [2] [1] [0] Rev. D | Page 16 of 20 Description (Default = 0x0006) Not used Memory test (cleared upon completion) (1 = enabled, 0 = disabled) Internal self-test enable (cleared upon completion) (1 = enabled, 0 = disabled) Not used Linear acceleration bias compensation for gyroscopes (1 = enabled, 0 = disabled) Linear accelerometer origin alignment (1 = enabled, 0 = disabled) Not used Data ready enable (1 = enabled, 0 = disabled) Data ready polarity (1 = active high, 0 = active low) Data ready line select (1 = DIO2, 0 = DIO1) Data Sheet ADIS16334 Self-Test DEVICE IDENTIFICATION The self-test function allows the user to verify the mechanical integrity of each MEMS sensor. It applies an electrostatic force to each sensor element, which results in mechanical displacement that simulates a response to actual motion. Table 1 lists the expected response for each sensor and provides pass/fail criteria. Set MSC_CTRL[10] = 1 (DIN = 0xB504) to run the internal self-test routine, which exercises all inertial sensors, measures each response, makes pass/fail decisions, and reports them to error flags in the DIAG_STAT register. MSC_CTRL[10] resets itself to 0 after completing the routine. Zero rotation provides results that are more reliable. Table 27. LOT_ID1 and LOT_ID2 Bit Descriptions Bits [15:0] Description Lot identification code Table 28. PROD_ID Bit Descriptions Bits [15:0] Description 0x3FCE = 16,334 (decimal) Table 29. SERIAL_NUM Bit Descriptions Bits [15:0] Description Serial number, lot specific Memory Test FLASH MEMORY MANAGEMENT Setting MSC_CTRL[11] = 1 (DIN = 0xB508) performs a checksum verification of the flash memory locations. The pass/fail result is loaded into DIAG_STAT[6]. Set MSC_CTRL[11] = 1 (DIN = 0xB508) to run an internal checksum test on the flash memory, which reports a pass/fail result to DIAG_STAT[6]. The FLASH_CNT register (see Table 30) provides a running count of flash memory write cycles. This is a tool for managing the endurance of the flash memory. Figure 22 quantifies the relationship between data retention and junction temperature. The error flags provide indicator functions for common system level issues. All of the flags are cleared (set to 0) after each DIAG_STAT register read cycle. If an error condition remains, the error flag returns to 1 during the next sample cycle. The DIAG_STAT[1:0] bits do not require a read of this register to return to 0. If the power supply voltage goes back into range, these two flags are cleared automatically. Table 30. FLASH_CNT Bit Descriptions Bits [15:0] Table 26. DIAG_STAT Bit Descriptions Description (Default = 0x0000) Z-axis accelerometer self-test failure (1 = fail, 0 = pass) Y-axis accelerometer self-test failure (1 = fail, 0 = pass) X-axis accelerometer self-test failure (1 = fail, 0 = pass) Z-axis gyroscope self-test failure (1 = fail, 0 = pass) Y-axis gyroscope self-test failure (1 = fail, 0 = pass) X-axis gyroscope self-test failure (1 = fail, 0 = pass) Alarm 2 status (1 = active, 0 = inactive) Alarm 1 status (1 = active, 0 = inactive) Not used Flash test, checksum flag (1 = fail, 0 = pass) Self-test diagnostic error flag (1 = fail, 0 = pass) Sensor overrange (1 = fail, 0 = pass) SPI communication failure (1 = fail, 0 = pass) Flash update failure (1 = fail, 0 = pass) Not used 600 RETENTION (Years) Bit(s) [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1:0] Description Binary counter for writing to flash memory Rev. D | Page 17 of 20 450 300 150 0 30 40 55 70 85 100 125 135 JUNCTION TEMPERATURE (°C) Figure 22. Flash/EE Memory Data Retention 150 09362-020 Status ADIS16334 Data Sheet ALARMS The ADIS16334 provides two independent alarms, Alarm 1 and Alarm 2, which have a number of programmable settings. Table 31 provides a list of registers for these user settings. Table 31. Registers for Alarm Configuration Register ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL Address 0x26 0x28 0x2A 0x2C 0x2E Description Alarm 1 trigger setting Alarm 2 trigger setting Alarm 1 sample period Alarm 2 sample period Alarm configuration ALARM REPORTING The DIAG_STAT[9:8] bits provide error flags that indicate an alarm condition. The ALM_CTRL[2:0] bits provide controls for a hardware indicator using DIO1 or DIO2. Table 35. ALM_CTRL Bit Descriptions Bit(s) [15:12] The ALM_CTRL register in Table 35 provides data source selection (Bits[15:8]), static/dynamic setting for each alarm (Bits[7:6]), data source filtering (Bit[4]), and alarm indicator signal (Bits[2:0]). STATIC ALARM USE The static alarms setting compares the data source selection (ALM_CTRL[15:8]) with the values in the ALM_MAGx registers in Table 32 and Table 33. The data format in these registers matches the format of the data selection in ALM_CTRL[15:8]. The MSB (Bit[15]) of each ALM_MAGx register establishes the polarity for this comparison. See Table 36, Alarm 1, for a static alarm configuration example. Table 32. ALM_MAG1 Bit Descriptions Bit(s) [15] [14] [13:0] Description (Default = 0x0000) Trigger polarity, 1= greater than, 0 = less than Not used Threshold setting; matches for format of ALM_CTRL[11:8] output register selection Alarm Example Table 36 offers an example that configures Alarm 1 to trigger when filtered ZACCL_OUT data drops below 0.7 g, and Alarm 2 to trigger when filtered ZGYRO_OUT data changes by more than 50°/sec over a 100 ms period, or 500°/sec2. The filter setting helps reduce false triggers from noise and refine the accuracy of the trigger points. The ALM_SMPL2 setting of 82 samples provides a comparison period that is 97.7 ms for an internal sample rate of 819.2 SPS. Table 33. ALM_MAG2 Bit Descriptions Bit(s) [15] [14] [13:0] Description (Default = 0x0000) Trigger polarity, 1= greater than, 0 = less than Not used Threshold setting; matches for format of ALM_CTRL[15:12] output register selection Table 36. Alarm Configuration Example 1 DYNAMIC ALARM USE The dynamic alarm setting monitors the data selection for a rate-of-change comparison. The rate-of-change comparison is represented by the magnitude in the ALM_MAGx registers over the time represented by the number-of-samples setting in the ALM_SMPLx registers located in Table 34. See Table 36, Alarm 2, for a dynamic alarm configuration example. Table 34. ALM_SMPL1 and ALM_SMPL2 Bit Descriptions Bits [15:8] [7:0] [11:8] [7] [6] [5] [4] [3] [2] [1] [0] Description (Default = 0x0000) Alarm 2 data source selection 0000 = disable 0001 = x-axis gyroscope output 0010 = y-axis gyroscope output 0011 = z-axis gyroscope output 0100 = x-axis accelerometer output 0101 = y-axis accelerometer output 0110 = z-axis accelerometer output 0111 = internal temperature output Alarm 1 data source selection (same as Alarm 2) Alarm 2, dynamic/static (1 = dynamic, 0 = static) Alarm 1, dynamic/static (1 = dynamic, 0 = static) Not used Data source filtering (1 = filtered, 0 = unfiltered) Not used Alarm indicator (1 = enabled, 0 = disabled) Alarm indicator active polarity (1 = high, 0 = low) Alarm output line select (1 = DIO2, 0 = DIO1) Description (Default = 0x0000) Not used Binary, number of samples (both 0x00 and 0x01 = 1) DIN 0xAF36, 0xAE97 0xA983, 0xA8E8 0xA702, 0xA6BC 0xAC66 Rev. D | Page 18 of 20 Description ALM_CTRL = 0x3697. Alarm 2: dynamic, ΔZGYRO_OUT (Δ-time, ALM_SMPL2) > ALM_MAG2. Alarm 1: static, ZACCL_OUT < ALM_MAG1. Use filtered data source for comparison. DIO2 output indicator, positive polarity. ALM_MAG2 = 0x83E8 (true if ΔZGYRO_OUT > 50°/sec) 50°/sec ÷ 0.05°/sec per LSB = 1000 = 0x03E8, ALM_MAG2[15] = 1 for greater than. ALM_MAG1 = 0x02BC (true if ZACCL_OUT < 0.7g) 0.7 g ÷ 1 mg/LSB = 700 LSB = 0x02BC, ALM_MAG1[15] = 0 for less than. ALM_SMPL2[7:0] = 0x52 (82 samples). Data Sheet ADIS16334 APPLICATIONS INFORMATION MOUNTING TIPS ADIS16IMU2/PCBZ The mounting and installation process can influence gyroscope bias repeatability and other key parametric behaviors. To preserve the best performance, use the following guidelines when developing an attachment approach for the ADIS16334: The ADIS1644X/FLEX and ADIS16IMU2/PCBZ accessories provide a simple method for connecting to an embedded processor platform or to the EVAL-ADIS2 evaluation system. Figure 24 provides a mechanical design example for using these two components with the ADIS16334 inertial measurement unit (IMU) in a system. • Figure 23 provides the pin assignments for J1 on the ADIS16IMU2/PCBZ breakout board. J1 For additional information about mounting ideas and tips, refer to Application Note AN-1305 and Application Note AN-1146. POWER SUPPLY CONSIDERATIONS The power supply must be within 4.75 V and 5.25 V for normal operation and optimal performance. During start up, the internal power conversion system starts drawing current when VDD reaches 1.6 V. The internal processor begins initializing when VDD is equal to 2.35 V. After the processor starts, VDD must reach 2.7 V within 128 ms. Ensure that the power supply drops below 1.6 V to shut down the device. 1 2 SCLK CS 3 4 DOUT DNC 5 6 DIN GND 7 8 GND GND 9 10 VDD VDD 11 12 VDD DIO1 13 14 DIO2 DIO3 15 16 DIO4/CLKIN Figure 23. J1Pin Assignments for the ADIS16IMU2/PCBZ The C1 and C2 locations on the ADIS16IMU2/PCBZ provide users with the pads to install decoupling capacitance across VDD and GND. PC-BASED EVALUATION TOOLS BREAKOUT BOARDS The EVAL-ADIS2 supports PC-based evaluation of the ADIS16334. Please refer to the EVAL-ADIS2 Evaluation System Wiki Guide, for more information on connecting the ADIS16334 to the EVAL-ADIS2 system. The ADIS1644X/FLEX and ADIS16IMU2/PCBZ evaluation tools combine to provide a simplified method for connecting the ADIS16334 to an embedded processor system, or to the EVAL-ADIS2 evaluation system. See the ADIS16IMU2/PCBZ Breakout Board Wiki-Guide for more information on using these tools to connect the ADIS16334. X-RAY SENSITIVITY Exposure to high dose rate X-rays, such as those in production systems that inspect solder joints in electronic assemblies, may affect accelerometer bias errors. For optimal performance, avoid exposing the ADIS16334 to this type of inspection. EVALUATION SYSTEM The EVAL-ADIS2 evaluation system, in conjunction with the ADIS1644X/FLEX and ADIS16IMU2/PCBZ, provides a simplified method for evaluating the ADIS16334, using a personal computer platform. Refer to the EVAL-ADIS2 Evaluation System Wiki Guide, for more information on using these tools to evaluate the ADIS16334. 15mm TO 45mm 33.40mm RST 23.75mm 2 J2 1 16 J1 15 15.05mm 20.15mm 10.07mm 09362-211 • Focus mounting force at the machine screw locations. Avoid direct force application on the substrate. Avoid placing mounting pressure on the package lid, except for the edges that border the exposed side of the substrate. Use a consistent mounting torque of 28 inch-ounces on mounting hardware. Avoid placing translational forces on the electrical connector. 24 ADIS16334BMLZ ADIS1644X/FLEX (FLEXIBILE CONNECTOR/CABLE) 23 2 1 ADIS16IMU2/PCBZ (INTERFACE BOARD) NOTES 1. USE FOUR M2 MACHINE SCREWS TO ATTACH THE ADIS16334. 2. USE FOUR M3 MACHINE SCREWS TO ATTACH THE INTERFACE PCB. Figure 24. Physical Diagram for ADIS16334 Accessories Rev. D | Page 19 of 20 30.10mm 09362-021 • • • ADIS16334 Data Sheet OUTLINE DIMENSIONS 24.53 24.15 23.77 22.15 BSC 19.91 19.65 19.39 4.70 4.50 4.30 2.00 BSC 2.60 Ø 2.40 2.20 (4 PLCS) 4.70 4.50 4.30 2.00 BSC 25.08 BSC 30.40 BSC 33.08 32.70 32.32 0.66 BSC 1.00 BSC 2.96 2.70 2.44 10.90 10.60 10.30 TOP VIEW 6.09 5.83 5.57 18.59 18.33 18.07 7.58 BSC 2.30 BSC (2 PLCS) 21.85 BSC 1.00 BSC PITCH 10.23 BSC 3.12 2.86 2.60 5.96 5.70 5.44 01-18-2011-B 2.96 BSC END VIEW Figure 25. 20-Lead Module with Connector Interface (ML-20-1) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADIS16334BMLZ ADIS16IMU2/PCBZ ADIS1644X/FLEX EVAL-ADIS2Z 1 Temperature Range −40°C to +105°C Package Description 20-Lead Module with Connector Interface Breakout Board Flexible Connector Evaluation System Z = RoHS Compliant Part. ©2011–2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09362-0-4/19(D) Rev. D | Page 20 of 20 Package Option ML-20-1
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