Data Sheet
Six Degrees of Freedom Inertial Sensor
ADIS16367
GENERAL DESCRIPTION
Tri-axis digital gyroscope with digital range scaling
±300°/sec, ±600°/sec, ±1200°/sec settings
Tight orthogonal alignment: 0.05°
Tri-axis digital accelerometer: ±18 g
Autonomous operation and data collection
No external configuration commands required
Start-up time: 180 ms
Sleep mode recovery time: 4 ms
Factory-calibrated sensitivity, bias, and axial alignment
Calibration temperature range: −40°C to +85°C
SPI-compatible serial interface
Wide bandwidth: 330 Hz
Embedded temperature sensor
Programmable operation and control
Automatic and manual bias correction controls
Bartlett window, FIR filter length, number of taps
Digital I/O: data ready, alarm indicator, general-purpose
Alarms for condition monitoring
Sleep mode for power management
DAC output voltage
Enable external sample clock input: up to 1.2 kHz
Single-command self-test
Single-supply operation: 4.75 V to 5.25 V
2000 g shock survivability
Operating temperature range: −40°C to +105°C
The ADIS16367 iSensor® is a complete inertial system that includes
a tri-axis gyroscope and tri-axis accelerometer. Each sensor in
the ADIS16367 combines industry-leading iMEMS® technology
with signal conditioning that optimizes dynamic performance.
The factory calibration characterizes each sensor for sensitivity,
bias, alignment, and linear acceleration (gyro bias). As a result, each
sensor has its own dynamic compensation formulas that provide
accurate sensor measurements over a temperature range of
−40°C to +85°C.
TE
FEATURES
B
SO
LE
The ADIS16367 provides a simple, cost-effective method for
integrating accurate, multiaxis inertial sensing into industrial
systems, especially when compared with the complexity and
investment associated with discrete designs. All necessary motion
testing and calibration are part of the production process at the
factory, greatly reducing system integration time. Tight orthogonal
alignment simplifies inertial frame alignment in navigation
systems. An improved SPI interface and register structure provide
faster data collection and configuration control.
APPLICATIONS
The ADIS16367 uses a compatible pinout and the same package
as the ADIS1635x family. Therefore, systems that currently use
the ADIS1635x family can upgrade their performance with minor
firmware adjustments in their processor designs.
This compact module is approximately 23 mm × 23 mm × 23 mm
and provides a flexible connector interface that enables multiple
mounting orientation options.
Medical instrumentation
Robotics
Platform controls
Navigation
FUNCTIONAL BLOCK DIAGRAM
O
AUX_
ADC
AUX_
DAC
TEMPERATURE
SENSOR
MEMS
ANGULAR RATE
SENSOR
CS
SIGNAL
CONDITIONING
AND
CONVERSION
CALIBRATION
AND
DIGITAL
PROCESSING
OUTPUT
REGISTERS
AND SPI
INTERFACE
SCLK
DIN
DOUT
TRI-AXIS MEMS
ACCELERATION
SENSOR
VCC
ALARMS
POWER
MANAGEMENT
DIGITAL
CONTROL
GND
RST DIO1 DIO2 DIO3 DIO4/
CLKIN
08398-001
SELF-TEST
ADIS16367
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2010–2012 Analog Devices, Inc. All rights reserved.
ADIS16367
Data Sheet
TABLE OF CONTENTS
Memory Map .............................................................................. 10
Applications ....................................................................................... 1
Burst Read Data Collection ...................................................... 11
General Description ......................................................................... 1
Output Data Registers................................................................ 11
Functional Block Diagram .............................................................. 1
Calibration................................................................................... 12
Revision History ............................................................................... 2
Operational Control................................................................... 12
Specifications..................................................................................... 3
Input/Output Functions ............................................................ 14
Timing Specifications .................................................................. 5
Diagnostics .................................................................................. 15
Timing Diagrams.......................................................................... 5
Product Identification................................................................ 16
Absolute Maximum Ratings ............................................................ 6
Applications Information .............................................................. 17
ESD Caution .................................................................................. 6
Installation/Handling................................................................. 17
Pin Configuration and Function Descriptions ............................. 7
Gyroscope Bias Optimization ................................................... 17
Typical Performance Characteristics ............................................. 8
Input ADC Channel ................................................................... 17
Theory of Operation ........................................................................ 9
Interface Printed Circuit Board (PCB) .................................... 17
Basic Operation ............................................................................ 9
Outline Dimensions ....................................................................... 18
LE
TE
Features .............................................................................................. 1
Reading Sensor Data .................................................................... 9
Ordering Guide .......................................................................... 18
Device Configuration .................................................................. 9
REVISION HISTORY
1/10—Revision 0: Initial Version
B
SO
9/12—Rev. A to Rev. B
Change to Device Configuration Section...................................... 9
O
2/11—Rev. 0 to Rev. A
Changes to Gyroscopes Misalignment and Accelerometers
Misalignment Test Conditions/Comments, Table 1 .................... 3
Changes to Table 30 and Table 31 ................................................ 16
Rev. B | Page 2 of 20
Data Sheet
ADIS16367
SPECIFICATIONS
TA = 25°C, VCC = 5.0 V, angular rate = 0°/sec, dynamic range = ±300°/sec ± 1 g, unless otherwise noted.
Table 1.
±1200°/sec range setting
Each axis
B
SO
Nonlinearity
Initial Bias Error
In-Run Bias Stability
Angular Random Walk
Bias Temperature Coefficient
Linear Acceleration Effect on Bias
Bias Voltage Sensitivity
Output Noise
Rate Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
Self-Test Change in Output Response
ACCELEROMETERS
Dynamic Range
Initial Sensitivity
Sensitivity Temperature Coefficient
Misalignment
Dynamic range = ±1200°/sec
Dynamic range = ±600°/sec
Dynamic range = ±300°/sec
−40°C ≤ TA ≤ +85°C
Axis-to-axis
Axis-to-frame (package)
Best-fit straight line
±1 σ
1 σ, SMPL_PRD = 0x0001
1 σ, SMPL_PRD = 0x0001
−40°C ≤ TA ≤ +85°C
Any axis, 1 σ (MSC_CTRL[7] = 1)
VCC = 4.75 V to 5.25 V
±1200°/sec range, no filtering
f = 25 Hz, ±1200°/sec range, no filtering
O
Nonlinearity
Initial Bias Error
In-Run Bias Stability
Velocity Random Walk
Bias Temperature Coefficient
Bias Voltage Sensitivity
Output Noise
Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
Self-Test Change in Output Response
TEMPERATURE SENSOR
Scale Factor
ADC INPUT
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Input Range
Input Capacitance
Min
Typ
±1200
0.198
±1400
0.2
0.1
0.05
±40
±0.05
±0.5
±0.1
±3
0.013
2.0
±0.01
0.075
±0.3
0.8
0.044
330
14.5
±350
Max
0.202
TE
Sensitivity Temperature Coefficient
Misalignment
Test Conditions/Comments
LE
Parameter
GYROSCOPES
Dynamic Range
Initial Sensitivity
±170
±18
3.285
−40°C ≤ TA ≤ +85°C
Axis-to-axis
Axis-to-frame (package)
Best-fit straight line
±1 σ
1σ
1σ
−40°C ≤ TA ≤ +85°C
VCC = 4.75 V to 5.25 V
No filtering
No filtering
X-axis and y-axis
3.33
±50
0.2
±0.5
0.1
±50
0.2
0.2
±0.3
2.5
9
0.5
330
5.5
59
Output = 0x0000 at 25°C (±5°C)
Rev. B | Page 3 of 20
3.38
151
°/sec
°/sec/LSB
°/sec/LSB
°/sec/LSB
ppm/°C
Degrees
Degrees
% of FS
°/sec
°/sec
°/√hr
°/sec/°C
°/sec/g
°/sec/V
°/sec rms
°/sec/√Hz rms
Hz
kHz
LSB
g
mg/LSB
ppm/°C
Degrees
Degrees
% of FS
mg
mg
m/sec/√hr
mg/°C
mg/V
mg rms
mg/√Hz rms
Hz
kHz
LSB
0.136
°C/LSB
12
±2
±1
±4
±2
Bits
LSB
LSB
LSB
LSB
V
pF
0
During acquisition
±625
Unit
3.3
20
ADIS16367
Data Sheet
Test Conditions/Comments
5 kΩ/100 pF to GND
Min
Typ
12
±4
±1
±5
±0.5
101 LSB ≤ input code ≤ 4095 LSB
0
3.3
2
10
2.0
0.8
0.55
CS signal to wake up from sleep mode
20
LE
VIH = 3.3 V
VIL = 0 V
ISOURCE = 1.6 mA
ISINK = 1.6 mA
Endurance 2
TJ = 85°C
Time until data is available
Normal mode, SMPL_PRD ≤ 0x09
Low power mode, SMPL_PRD ≥ 0x0A
Normal mode, SMPL_PRD ≤ 0x09
Low power mode, SMPL_PRD ≥ 0x0A
Normal mode, SMPL_PRD ≤ 0x09
Low power mode, SMPL_PRD ≥ 0x0A
Normal mode, SMPL_PRD ≤ 0x09
Low power mode, SMPL_PRD ≥ 0x0A
SMPL_PRD = 0x0001
SMPL_PRD = 0x0001 to 0x00FF
B
SO
CS Wake-Up Pulse Width
Logic 1 Input Current, IIH
Logic 0 Input Current, IIL
All Pins Except RST
RST Pin
Input Capacitance, CIN
DIGITAL OUTPUTS1
Output High Voltage, VOH
Output Low Voltage, VOL
FLASH MEMORY
Data Retention 3
FUNCTIONAL TIMES 4
Power-On, Start-Up Time
Reset Recovery Time
Sleep Mode Recovery Time
Flash Memory Test Time
O
Automatic Self-Test Time
CONVERSION RATE
Clock Accuracy
Sync Input Clock 5
POWER SUPPLY
Power Supply Current
Max
TE
Parameter
DAC OUTPUT
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Output Range
Output Impedance
Output Settling Time
LOGIC INPUTS 1
Input High Voltage, VIH
Input Low Voltage, VIL
Operating voltage range, VCC
Low power mode
Normal mode
Sleep mode
1
±0.2
±10
40
1
10
60
2.4
0.4
10,000
20
180
250
60
130
4
9
17
90
12
0.413
0.8
4.75
5.0
24
49
500
819.2
±3
1.2
5.25
Unit
Bits
LSB
LSB
mV
%
V
Ω
µs
V
V
V
µs
µA
µA
mA
pF
V
V
Cycles
Years
ms
ms
ms
ms
ms
ms
ms
ms
ms
SPS
%
kHz
V
mA
mA
µA
The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.
Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.
3
The data retention lifetime equivalent is at a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction
temperature.
4
These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy.
5
The sync input clock functions below the specified minimum value, at reduced performance levels.
2
Rev. B | Page 4 of 20
Data Sheet
ADIS16367
TIMING SPECIFICATIONS
TA = 25°C, VCC = 5 V, unless otherwise noted.
Table 2.
Normal Mode
(SMPL_PRD ≤ 0x09)
Min 1
Typ
Max
0.01
2.0
9
40
48.8
tDAV
tDSU
tDHD
tSCLKR, tSCLKF
tDR, tDF
tSFS
t1
tx
t2
t3
DOUT valid after SCLK edge
DIN setup time before SCLK rising edge
DIN hold time after SCLK rising edge
SCLK rise/fall times
DOUT rise/fall times
CS high after SCLK edge
Input sync positive pulse width
Input sync low time
Input sync to data-ready output
Input sync period
1
100
24.4
48.8
12.5
12.5
5
5
100
100
24.4
48.8
5
5
12.5
12.5
5
600
48.8
100
24.4
48.8
5
5
Burst Read
Min1
Typ Max
0.01
1.0
1/fSCLK
TE
Description
Serial clock
Stall period between data
Read rate
Chip select to clock edge
5
5
12.5
12.5
5
5
100
LE
Parameter
fSCLK
tSTALL
tREADRATE
tCS
Low Power Mode
(SMPL_PRD ≥ 0x0A)
Min1
Typ
Max
0.01
0.3
75
100
48.8
833
600
833
Guaranteed by design and characterization, but not tested in production.
TIMING DIAGRAMS
B
SO
CS
tCS
1
2
3
4
5
tSFS
6
15
16
SCLK
tDAV
MSB
DB14
DB13
tDSU
DIN
R/W
A6
DB12
DB11
A4
A3
DB10
DB2
DB1
LSB
tDHD
A5
D2
A2
D1
08398-002
DOUT
LSB
Figure 2. SPI Timing and Sequence
O
tREADRATE
tSTALL
08398-003
CS
SCLK
Figure 3. Stall Time and Data Rate
t3
t2
t1
tX
08398-004
SYNC
CLOCK (DIO4)
DATA
READY
Figure 4. Input Clock Timing Diagram
Rev. B | Page 5 of 20
Unit
MHz
µs
µs
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
ADIS16367
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Parameter
Acceleration
Any Axis, Unpowered
Any Axis, Powered
VCC to GND
Digital Input Voltage to GND
Digital Output Voltage to GND
Analog Input to GND
Operating Temperature Range
Storage Temperature Range
1
Rating
2000 g
2000 g
−0.3 V to +6.0 V
−0.3 V to +5.3 V
−0.3 V to VCC + 0.3 V
−0.3 V to +3.6 V
−40°C to +105°C
−65°C to +125°C 1, 2
Table 4. Package Characteristics
Package Type
24-Lead Module (ML-24-2)
ESD CAUTION
O
B
SO
LE
Extended exposure to temperatures outside the specified temperature
range of −40°C to +105°C can adversely affect the accuracy of the factory
calibration. For best accuracy, store the parts within the specified operating
range of −40°C to +105°C.
2
Although the device is capable of withstanding short-term exposure to
150°C, long-term exposure threatens internal mechanical integrity.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. B | Page 6 of 20
θJA
39.8°C/W
θJC
14.2°C/W
TE
Table 3.
Device
Weight
16 grams
Data Sheet
ADIS16367
DIO3
SCLK
DIN
DIO1
DIO2
VCC
GND
GND
DNC
DNC
AUX_ADC
DNC
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
DIO4/CLKIN
DOUT
CS
RST
VCC
VCC
GND
DNC
DNC
AUX_DAC
DNC
DNC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADIS16367
TOP VIEW
(Not to Scale)
08398-005
TE
NOTES
1. THIS REPRESENTATION DISPLAYS THE TOP VIEW PINOUT
FOR THE MATING SOCKET CONNECTOR.
2. THE ACTUAL CONNECTOR PINS ARE NOT VISIBLE FROM THE TOP VIEW.
3. MATING CONNECTOR: SAMTEC CLM-112-02 OR EQUIVALENT.
4. DNC = DO NOT CONNECT.
Figure 5. Pin Configuration
Z-AXIS
aZ
Y-AXIS
aY
X-AXIS
aX
gX
B
SO
gY
LE
gZ
PIN 23
NOTES
1. ACCELERATION (aX, aY, aZ) AND ROTATIONAL (gX, gY, gZ) ARROWS
INDICATE THE DIRECTION OF MOTION THAT PRODUCES
A POSITIVE OUTPUT.
08398-006
ORIGIN ALIGNMENT REFERENCE POINT
SEE MSC_CTRL[6].
PIN 1
Figure 6. Axial Orientation
O
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7, 9
8
10, 11, 12
13, 14, 15
16, 17, 18, 19, 22, 23, 24
20
21
1
Mnemonic
DIO3
DIO4/CLKIN
SCLK
DOUT
DIN
CS
DIO1, DIO2
RST
VCC
GND
DNC
AUX_DAC
AUX_ADC
Type 1
I/O
I/O
I
O
I
I
I/O
I
S
S
N/A
O
I
Description
Configurable Digital Input/Output.
Configurable Digital Input/Output or Sync Clock Input.
SPI Serial Clock.
SPI Data Output. Clocks output on SCLK falling edge.
SPI Data Input. Clocks input on SCLK rising edge.
SPI Chip Select.
Configurable Digital Input/Output.
Reset.
Power Supply.
Power Ground.
Do Not Connect.
Auxiliary, 12-Bit DAC Output.
Auxiliary, 12-Bit ADC Input.
I/O is input/output, I is input, O is output, S is supply, and N/A is not applicable.
Rev. B | Page 7 of 20
ADIS16367
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
MEAN
0.01
1
10
100
Tau (Seconds)
1k
10k
08398-007
0.001
0.1
–1σ
0.001
+1σ
MEAN
0.0001
0.1
1
10
100
1k
Tau (Seconds)
Figure 8. Accelerometer Allan Variance
B
SO
LE
Figure 7. Gyroscope Allan Variance
Rev. B | Page 8 of 20
–1σ
10k
08398-008
+1σ
TE
ROOT ALLAN VARIANCE (g)
0.01
O
ROOT ALLAN VARIANCE (°/sec)
0.1
Data Sheet
ADIS16367
THEORY OF OPERATION
BASIC OPERATION
The ADIS16367 is an autonomous sensor system that starts up
after it has a valid power supply voltage and begins producing
inertial measurement data at the factory default sample rate
setting of 819.2 SPS. After each sample cycle, the sensor data is
loaded into the output registers, and DIO1 pulses high, which
provides a new data-ready control signal for driving systemlevel interrupt service routines. In a typical system, a master
processor accesses the output data registers through the SPI
interface, using the connection diagram shown in Figure 9.
Table 6 provides a generic functional description for each pin
on the master processor. Table 7 describes the typical master
processor settings that are normally found in a configuration
register and used for communicating with the ADIS16367.
SS
6
CS
SCLK
3
SCLK
MOSI
5
DIN
MISO
4
DOUT
IRQ
7
DIO1
12
08398-009
Figure 9. Electrical Connection Diagram
Table 6. Generic Master Processor Pin Names and Functions
Pin Name
SS
SCLK
MOSI
MISO
IRQ
Function
Slave select
Serial clock
Master output, slave input
Master input, slave output
Interrupt request
O
Table 7. Generic Master Processor SPI Settings
Processor Setting
Master
SCLK Rate ≤ 2 MHz1
SPI Mode 3
MSB First Mode
16-Bit Mode
7
6
5
4
3
2
Description
The ADIS16367 operates as a slave
Normal mode, SMPL_PRD[7:0] ≤ 0x09
CPOL = 1 (polarity), CPHA = 1 (phase)
Bit sequence
Shift register/data length
The user register memory map (see Table 8) identifies
configuration registers with either a W or R/W. Configuration
commands also use the bit sequence shown in Figure 11. If the
MSB = 1, the last eight bits (DC7 to DC0) in the DIN sequence
are loaded into the memory address associated with the address
bits (A6 to A0). For example, if DIN = 0xA11F, 0x1F is loaded
into Address 0x21 (XACCL_OFF, upper byte) at the conclusion
of the data frame.
The master processor initiates the backup function by setting
GLOB_CMD[3] = 1 (DIN = 0xBE08). This command copies
the user registers into their assigned flash memory locations
and requires the power supply to stay within its normal operating
range for the entire 50 ms process. The FLASH_CNT register
provides a running count of these events for monitoring the
long-term reliability of the flash memory.
CS
SCLK
DOUT
R/W
D15
0
DEVICE CONFIGURATION
For burst read, SCLK rate ≤ 1 MHz. For low power mode, SCLK rate ≤ 300 kHz.
DIN
1
LOWER BYTE
A6
A5
A4
A3
A2
A1
A0
D14
D13
D12
D11
D10
D9
D8
DC7 DC6
D7
D6
DC5
DC4
DC3
DC2
D5
D4
D3
D2
DC1 DC0
D1
D0
NOTES
1. THE DOUT BIT PATTERN REFLECTS THE ENTIRE CONTENTS OF THE REGISTER IDENTIFIED BY [A6:A0] AND [R/W = 0]
IN THE PREVIOUS SEQUENCE.
2. IF R/W = 1 DURING THE PREVIOUS SEQUENCE, DOUT IS NOT DEFINED.
Figure 11. SPI Communication Bit Sequence
Rev. B | Page 9 of 20
R/W
D15
A6
A5
D14
D13
08398-011
1
8
The SPI operates in full-duplex mode, which means that the master
processor can read the output data from DOUT while using the
same SCLK pulses to transmit the next target address on DIN.
B
SO
15
9
Although the ADIS16367 produces data independently, it
operates as a SPI slave device that communicates with system
(master) processors using the 16-bit segments displayed in
Figure 11. Individual register reads require two of these 16-bit
sequences. The first 16-bit sequence contains the read command
bit (R/W = 0) and the target register address (A6 to A0); the last
eight bits are “don’t care” bits when requesting a read. The second
16-bit sequence transmits the register contents (D15 to D0) on
the DOUT line. For example, if DIN = 0x0A00, the contents of
XACCL_OUT are shifted out on the DOUT line during the
next 16-bit sequence.
SPI SLAVE
14
10
READING SENSOR DATA
ADIS16367
13
11
Figure 10. Generic Register Bit Assignments
5V
11
12
LE
10
13
UPPER BYTE
VDD
SYSTEM
PROCESSOR
SPI MASTER
14
TE
I/O LINES ARE COMPATIBLE WITH
3.3V OR 5V LOGIC LEVELS
15
08398-010
The user registers provide addressing for all input/output
operations on the SPI interface. Each 16-bit register has two
7-bit addresses: one for its upper byte and one for its lower byte.
Table 8 lists the lower byte address for each register, and Figure 10
shows the generic bit assignments.
ADIS16367
Data Sheet
MEMORY MAP
Table 8. User Register Memory Map
1
Default
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0006
0x0001
0x0402
0x0000
0x0000
0x0000
N/A
N/A
N/A
0x3FEF
N/A
Register Description
Flash memory write count
Power supply measurement
X-axis gyroscope output
Y-axis gyroscope output
Z-axis gyroscope output
X-axis accelerometer output
Y-axis accelerometer output
Z-axis accelerometer output
X-axis gyroscope temperature output
Y-axis gyroscope temperature output
Z-axis gyroscope temperature output
Auxiliary ADC output
Reserved
X-axis gyroscope bias offset factor
Y-axis gyroscope bias offset factor
Z-axis gyroscope bias offset factor
X-axis acceleration bias offset factor
Y-axis acceleration bias offset factor
Z-axis acceleration bias offset factor
Alarm 1 amplitude threshold
Alarm 2 amplitude threshold
Alarm 1 sample size
Alarm 2 sample size
Alarm control
Auxiliary DAC data
Auxiliary digital input/output control
Data-ready, self-test, miscellaneous
Internal sample period (rate) control
Dynamic range and digital filter control
Sleep mode control
System status
System command
Reserved
Lot Identification Code 1
Lot Identification Code 2
Product identification
Serial number
TE
Address 1
0x00
0x02
0x04
0x06
0x08
0x0A
0x0C
0x0E
0x10
0x12
0x14
0x16
0x18
0x1A
0x1C
0x1E
0x20
0x22
0x24
0x26
0x28
0x2A
0x2C
0x2E
0x30
0x32
0x34
0x36
0x38
0x3A
0x3C
0x3E
0x40 to 0x51
0x52
0x54
0x56
0x58
LE
Flash Backup
Yes
No
No
No
No
No
No
No
No
No
No
No
N/A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
No
No
N/A
N/A
Yes
Yes
Yes
Yes
B
SO
User Access
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
N/A
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Write only
Read only
Write only
N/A
Read only
Read only
Read only
Read only
O
Name
FLASH_CNT
SUPPLY_OUT
XGYRO_OUT
YGYRO_OUT
ZGYRO_OUT
XACCL_OUT
YACCL_OUT
ZACCL_OUT
XTEMP_OUT
YTEMP_OUT
ZTEMP_OUT
AUX_ADC
Reserved
XGYRO_OFF
YGYRO_OFF
ZGYRO_OFF
XACCL_OFF
YACCL_OFF
ZACCL_OFF
ALM_MAG1
ALM_MAG2
ALM_SMPL1
ALM_SMPL2
ALM_CTRL
AUX_DAC
GPIO_CTRL
MSC_CTRL
SMPL_PRD
SENS_AVG
SLP_CNT
DIAG_STAT
GLOB_CMD
Reserved
LOT_ID1
LOT_ID2
PROD_ID
SERIAL_NUM
Bit Function
N/A
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
See Table 9
N/A
See Table 15
See Table 15
See Table 15
See Table 16
See Table 16
See Table 16
See Table 27
See Table 27
See Table 28
See Table 28
See Table 29
See Table 23
See Table 21
See Table 22
See Table 18
See Table 20
See Table 19
See Table 26
See Table 17
N/A
See Table 32
See Table 32
See Table 32
See Table 32
Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1.
Rev. B | Page 10 of 20
Data Sheet
ADIS16367
Burst read data collection is a process-efficient method for
collecting data from the ADIS16367. In the burst read, all
output registers are clocked out on DOUT, 16 bits at a time, in
sequential data cycles (each separated by one SCLK period). To
start a burst read sequence, set DIN = 0x3E00. The contents of
each output register are then shifted out on DOUT, starting
with SUPPLY_OUT and ending with AUX_ADC (see Figure 13)
according to their address (see Table 8).
OUTPUT DATA REGISTERS
Each output data register uses the format in Figure 12 and Table 9.
Figure 6 shows the positive direction for each inertial sensor. The
ND bit is equal to 1 when the register contains unread data. The EA
bit is high when any error/alarm flag in the DIAG_STAT register is
equal to 1.
MSB FOR 14-BIT OUTPUT
08398-013
ND EA
MSB FOR 12-BIT OUTPUT
Table 9. Output Data Register Formats
2
Scale
2.418 mV
0.2°/sec
0.2°/sec
0.2°/sec
3.333 mg
3.333 mg
3.333 mg
0.136°C
0.136°C
0.136°C
805.8 µV
Table 10. Power Supply, Offset Binary Format
Hex
0x87B
0x815
0x814
0x813
0x7AC
O
Decimal
2171 LSB
2069 LSB
2068 LSB
2067 LSB
1964 LSB
CS
1
Binary
XXXX 1000 0111 1011
XXXX 1000 0001 0101
XXXX 1000 0001 0100
XXXX 1000 0001 0011
XXXX 0111 1010 1100
2
Hex
0x1770
0x0002
0x0001
0x0000
0x3FFF
0x3FFE
0x2890
Binary
XX01 0111 0111 0000
XX00 0000 0000 0010
XX00 0000 0000 0001
XX00 0000 0000 0000
XX11 1111 1111 1111
XX11 1111 1111 1110
XX10 1000 1001 0000
Table 12. Acceleration, Twos Complement Format
Acceleration
+18 g
+6.667 mg
+3.333 mg
0g
−3.333 mg
−6.667 mg
−18 g
Decimal
+5401 LSB
+2 LSB
+1 LSB
0 LSB
−1 LSB
−2 LSB
−5401 LSB
Hex
0x1519
0x0002
0x0001
0x0000
0x3FFF
0x3FFE
0x2AE7
Binary
XX01 0101 0001 1001
XX00 0000 0000 0010
XX00 0000 0000 0001
XX00 0000 0000 0000
XX11 1111 1111 1111
XX11 1111 1111 1110
XX10 1010 1110 0111
Table 13. Temperature, Twos Complement Format
Reference
See Table 10
See Table 11
See Table 11
See Table 11
See Table 12
See Table 12
See Table 12
See Table 13
See Table 13
See Table 13
See Table 14
Assumes that the scaling is set to ±1200°/sec. This factor scales with the range.
0x0000 = 25°C (±5°C).
Supply Voltage
5.25 V
5.002418 V
5V
4.997582 V
4.75 V
Decimal
+6000 LSB
+2 LSB
+1 LSB
0 LSB
−1 LSB
−2 LSB
−6000 LSB
Temperature
+105°C
+85°C
+25.272°C
+25.136°C
+25°C
+24.864°C
+24.728°C
−40°C
Decimal
+588 LSB
+441 LSB
+2 LSB
+1 LSB
0 LSB
−1 LSB
−2 LSB
−478 LSB
Hex
0x24C
0x1B9
0x002
0x001
0x000
0xFFF
0xFFE
0xE22
Binary
XXXX 0010 0100 1100
XXXX 0001 1011 1001
XXXX 0000 0000 0010
XXXX 0000 0000 0001
XXXX 0000 0000 0000
XXXX 1111 1111 1111
XXXX 1111 1111 1110
XXXX 1110 0010 0010
Table 14. Analog Input, Offset Binary Format
Input Voltage
3.3 V
1V
1.6116 mV
805.8 µV
0V
Decimal
4095 LSB
1241 LSB
2 LSB
1 LSB
0 LSB
3
4
5
XGYRO_OUT
YGYRO_OUT
ZGYRO_OUT
Hex
0xFFF
0x4D9
0x002
0x001
0x000
Binary
XXXX 1111 1111 1111
XXXX 0100 1101 1001
XXXX 0000 0000 0010
XXXX 0000 0000 0001
XXXX 0000 0000 0000
12
SCLK
DIN
DOUT
0x3E00
PREVIOUS
DON’T CARE
SUPPLY_OUT
AUX_ADC
NOTES
1. THE DOUT LINE HAS BEEN SIMPLIFIED FOR SPACE CONSTRAINTS BUT, IDEALLY, SHOULD INCLUDE ALL REGISTERS FROM SUPPLY_OUT
THROUGH AUX_ADC.
Figure 13. Burst Read Sequence
Rev. B | Page 11 of 20
08398-012
1
Bits
12
14
14
14
14
14
14
12
12
12
12
B
SO
Register
SUPPLY_OUT
XGYRO_OUT1
YGYRO_OUT1
ZGYRO_OUT1
XACCL_OUT
YACCL_OUT
ZACCL_OUT
XTEMP_OUT2
YTEMP_OUT2
ZTEMP_OUT2
AUX_ADC
Rotation Rate
+1200°/sec
+0.4°/sec
+0.2°/sec
0°/sec
−0.2°/sec
−0.4°/sec
−1200°/sec
LE
Figure 12. Output Data Register Bit Assignments
Table 11. Rotation Rate, Twos Complement Format
TE
BURST READ DATA COLLECTION
ADIS16367
Data Sheet
CALIBRATION
Restoring Factory Calibration
Manual Bias Calibration
Set GLOB_CMD[1] = 1 (DIN = 0xBE02) to execute the factory
calibration restore function. This function resets each user
calibration register to 0x0000 (see Table 15 and Table 16), resets
all sensor data to 0, and automatically updates the flash memory
within 50 ms (see Table 17).
The bias offset registers in Table 15 and Table 16 provide a
manual adjustment function for the output of each sensor. For
example, if XGYRO_OFF = 0x1FF6 (DIN = 0x9B1F, 0x9AF6),
the XGYRO_OUT offset shifts by −10 LSBs, or −0.5°/sec.
Linear Acceleration Bias Compensation (Gyroscope)
Table 15. XGYRO_OFF, YGYRO_OFF, ZGYRO_OFF
Bit Descriptions
Description (Default = 0x0000)
Not used.
Data bits. Twos complement, 0.05°/sec per LSB.
Typical adjustment range = ±200°/sec.
OPERATIONAL CONTROL
TE
Bit
[15:13]
[12:0]
Set MSC_CTRL[7] = 1 (DIN = 0xB486) to enable correction for
low frequency acceleration influences on gyroscope bias. The
DIN sequence also preserves the factory default condition for
the data-ready function (see Table 22).
Global Commands
Table 16. XACCL_OFF, YACCL_OFF, ZACCL_OFF
Bit Descriptions
Description (Default = 0x0000)
Not used.
Data bits. Twos complement, 3.333 mg/LSB.
Typical adjustment range = ±6.75 g.
Gyroscope Automatic Bias Null Calibration
LE
Bit
[15:12]
[11:0]
The GLOB_CMD register provides trigger bits for several useful
functions. Setting the assigned bit to 1 starts each operation,
which returns the bit to 0 after completion. For example, set
GLOB_CMD[7] = 1 (DIN = 0xBE80) to execute a software reset,
which stops the sensor operation and runs the device through
its start-up sequence. This sequence includes loading the control
registers with the data in their respective flash memory locations
prior to producing new data. Reading the GLOB_CMD register
(DIN = 0x3E00) starts the burst read sequence.
Table 17. GLOB_CMD Bit Descriptions
Bits
[15:8]
[7]
[6:5]
[4]
[3]
B
SO
Set GLOB_CMD[0] = 1 (DIN = 0xBE01) to execute the automatic
bias null calibration function. This function measures all three
gyroscope output registers and then loads each gyroscope offset
register with the opposite value to provide a quick bias calibration.
All sensor data is then reset to 0, and the flash memory is
updated automatically within 50 ms (see Table 17).
Gyroscope Precision Automatic Bias Null Calibration
[2]
[1]
[0]
O
Set GLOB_CMD[4] = 1 (DIN = 0xBE10) to execute the precision
automatic bias null calibration function. This function takes the
sensor offline for 30 sec while it collects a set of data and calculates
more accurate bias correction factors for each gyroscope. After
this function is executed, the newly calculated correction factor
is loaded into the gyroscope offset registers, all sensor data is
reset to 0, and the flash memory is updated automatically within
50 ms (see Table 17).
Rev. B | Page 12 of 20
Description
Not used
Software reset command
Not used
Precision autonull command
Flash update command (see the Device Configuration
section)
Auxiliary DAC data latch (see Table 24)
Factory calibration restore command
Autonull command
Data Sheet
ADIS16367
Internal Sample Rate
Digital Filtering
The SMPL_PRD register provides discrete sample rate settings
using the bit assignments in Table 18 and the following equation:
The N blocks in Figure 14 are part of the programmable low-pass
filter, which provides additional noise reduction on the inertial
sensor outputs. This filter contains two cascaded averaging filters
that provide a Bartlett window, FIR filter response (see Figure 15).
For example, set SENS_AVG[2:0] = 100 (DIN = 0xB804) to set
each stage to 16 taps. When used with the default sample rate
of 819.2 SPS, this value reduces the sensor bandwidth to
approximately 16 Hz.
tS = tB × (NS + 1)
For example, when SMPL_PRD[7:0] = 0x0A, the sample rate is
149 SPS.
Table 18. SMPL_PRD Bit Descriptions
0
–20
–40
–60
–80
–100
Power Management
–140
0.001
0.01
0.1
FREQUENCY (Ratio)
1
08398-015
N=2
N=4
N = 16
N = 64
–120
LE
The default sample rate setting of 819.2 SPS preserves the sensor
bandwidth and provides optimal performance. For systems that
value slower sample rates, keep the internal sample rate at
819.2 SPS. Use the programmable filter (SENS_AVG) to reduce
the bandwidth, which helps to prevent aliasing. The data-ready
function (MSC_CTRL) can drive an interrupt routine that uses
a counter to help ensure data coherence at the reduced rates.
TE
[6:0]
Description (Default = 0x0001)
Not used
Time base (tB)
0 = 0.61035 ms, 1 = 18.921 ms
Increment setting (NS)
Internal sample period = tS = tB × (NS + 1)
MAGNITUDE (dB)
Bits
[15:8]
[7]
Figure 15. Bartlett Window, FIR Filter Frequency Response
(Phase Delay = N Samples)
The SENS_AVG[10:8] bits provide three dynamic range settings
for this gyroscope. The lower dynamic range settings (±300°/sec
and ±600°/sec) limit the minimum filter tap sizes to maintain
resolution. For example, set SENS_AVG[10:8] = 010 (DIN =
0xB902) for a measurement range of ±600°/sec. Because this
setting can influence the filter settings, program SENS_AVG[10:8]
and then SENS_AVG[2:0] if more filtering is required.
Table 19. SLP_CNT Bit Descriptions
Table 20. SENS_AVG Bit Descriptions
Bits
[15:9]
[8]
[7:0]
Bits
[15:11]
[10:8]
B
SO
Setting SMPL_PRD ≥ 0x0A also sets the sensor to low power
mode. For systems that require lower power dissipation, insystem characterization helps users to quantify the associated
performance trade-offs. In addition to sensor performance, this
mode affects SPI data rates (see Table 2). Set SLP_CNT[8] = 1
(DIN = 0xBB01) to start the indefinite sleep mode, which requires
a CS assertion (high to low), reset, or power cycle to wake up.
Use SLP_CNT[7:0] to put the device into sleep mode for a
specified period. For example, SLP_CNT[7:0] = 0x64
(DIN = 0xBA64) puts the ADIS16367 to sleep for 50 sec.
O
Description
Not used
Indefinite sleep mode; set to 1
Programmable sleep time bits, 0.5 sec/LSB
Dynamic Range
Sensor Bandwidth
The signal chain for each MEMS sensor has several filter stages,
which shape their frequency response. Figure 14 provides a
block diagram for both gyroscope and accelerometer signal
paths. Table 20 provides additional information for digital filter
configuration.
LPF
404Hz
FROM
ACCELERATION
SENSOR
N
N
N
N
LPF
757Hz
LPF
330Hz
N = 2m
m = SENS_AVG[2:0]
08398-022
FROM
GYROSCOPE
SENSOR
[7:3]
[2:0]
Figure 14. MEMS Analog and Digital Filters
Rev. B | Page 13 of 20
Description (Default = 0x0402)
Not used
Measurement range (sensitivity) selection
100 = ±1200°/sec (default condition)
010 = ±600°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02)
001 = ±300°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04)
Not used
Number of taps in each stage; value of m in N = 2m
ADIS16367
Data Sheet
INPUT/OUTPUT FUNCTIONS
Table 22. MSC_CTRL Bit Descriptions
General-Purpose I/O
Bits
[15:12]
[11]
[10]
[9]
[8]
In this configuration, read GPIO_CTRL (DIN = 0x3200). The
digital state of DIO1 and DIO2 is in GPIO_CTRL[9:8].
[7]
Table 21. GPIO_CTRL Bit Descriptions
[6]
[1]
[0]
[5:3]
[2]
[1]
[0]
Auxiliary DAC
LE
[2]
Description (Default = 0x0000)
Not used
General-Purpose I/O Line 4 (DIO4) data level
General-Purpose I/O Line 3 (DIO3) data level
General-Purpose I/O Line 2 (DIO2) data level
General-Purpose I/O Line 1 (DIO1) data level
Not used
General-Purpose I/O Line 4 (DIO4) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 3 (DIO3) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 2 (DIO2) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 1 (DIO1) direction control
(1 = output, 0 = input)
The 12-bit AUX_DAC line can drive its output to within 5 mV
of the ground reference when it is not sinking current. As the
output approaches 0 V, the linearity begins to degrade (~100 LSB
starting point). As the sink current increases, the nonlinear range
increases. The DAC latch command moves the values of the
AUX_DAC register into the DAC input register, enabling both
bytes to take effect at the same time.
B
SO
Bits
[15:12]
[11]
[10]
[9]
[8]
[7:4]
[3]
TE
DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose
I/O lines that serve multiple purposes according to the following
control register priority: MSC_CTRL, ALM_CTRL, and
GPIO_CTRL. For example, set GPIO_CTRL = 0x080C
(DIN = 0xB308, and then 0xB20C) to configure DIO1 and
DIO2 as inputs and DIO3 and DIO4 as outputs, with DIO3
set low and DIO4 set high.
Description (Default = 0x0006)
Not used
Memory test (cleared upon completion)
(1 = enabled, 0 = disabled)
Internal self-test enable (cleared upon completion)
(1 = enabled, 0 = disabled)
Manual self-test, negative stimulus
(1 = enabled, 0 = disabled)
Manual self-test, positive stimulus
(1 = enabled, 0 = disabled)
Linear acceleration bias compensation for gyroscopes
(1 = enabled, 0 = disabled)
Linear accelerometer origin alignment
(1 = enabled, 0 = disabled)
Not used
Data-ready enable (1 = enabled, 0 = disabled)
Data-ready polarity (1 = active high, 0 = active low)
Data-ready line select (1 = DIO2, 0 = DIO1)
Table 23. AUX_DAC Bit Descriptions
Input Clock Configuration
The input clock function allows for external control sampling in
the ADIS16367. Set GPIO_CTRL[3] = 0 (DIN = 0xB200) and
SMPL_PRD[7:0] = 0x00 (DIN = 0xB600) to enable this
function. See Table 2 and Figure 4 for timing information.
Description (Default = 0x0000)
Not used
Data bits, scale factor = 0.8059 mV/LSB
Offset binary format, 0 V = 0 LSB
Table 24. Setting AUX_DAC = 1 V
Data Ready I/O Indicator
The factory default sets DIO1 as a positive data-ready indicator
signal. The MSC_CTRL[2:0] bits provide configuration options
for changing the default. For example, set MSC_CTRL[2:0] =
100 (DIN = 0xB404) to change the polarity of the data ready
signal on DIO1 for interrupt inputs that require negative logic
inputs for activation. The pulse width is between 100 µs and
200 µs over all conditions.
O
Bits
[15:12]
[11:0]
DIN
0xB0D9
0xB104
0xBE04
Rev. B | Page 14 of 20
Description
AUX_DAC[7:0] = 0xD9 (217 LSB)
AUX_DAC[15:8] = 0x04 (1024 LSB)
GLOB_CMD[2] = 1; move values into the DAC input
register, resulting in a 1 V output level
Data Sheet
ADIS16367
DIAGNOSTICS
Memory Test
Self-Test
Setting MSC_CTRL[11] = 1 (DIN = 0xB508) performs a
checksum verification of the flash memory locations. The
pass/fail result is loaded into DIAG_STAT[6].
Set MSC_CTRL[10] = 1 (DIN = 0xB504) to run the internal
self-test routine, which exercises all inertial sensors, measures
each response, makes pass/fail decisions, and reports them to
error flags in the DIAG_STAT register. MSC_CTRL[10] resets
itself to 0 after completing the routine. The MSC_CTRL[9:8] bits
provide manual control over the self-test function for
investigation of potential failures. Table 25 outlines an example
test flow for using this option to verify the x-axis gyroscope
function.
Table 25. Manual Self-Test Example Sequence
0x0400
0xB501
0x0400
0xB500
The error flags provide indicator functions for common system
level issues. All of the flags are cleared (set to 0) after each
DIAG_STAT register read cycle. If an error condition remains,
the error flag returns to 1 during the next sample cycle. The
DIAG_STAT[1:0] bits do not require a read of this register to
return to 0. If the power supply voltage goes back into range,
these two flags are cleared automatically.
Table 26. DIAG_STAT Bit Descriptions
Bit
[15]
[14]
[13]
[12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
Description (Default = 0x0000)
Z-axis accelerometer self-test failure (1 = fail, 0 = pass)
Y-axis accelerometer self-test failure (1 = fail, 0 = pass)
X-axis accelerometer self-test failure (1 = fail, 0 = pass)
Z-axis gyroscope self-test failure (1 = fail, 0 = pass)
Y-axis gyroscope self-test failure (1 = fail, 0 = pass)
X-axis gyroscope self-test failure (1 = fail, 0 = pass)
Alarm 2 status (1 = active, 0 = inactive)
Alarm 1 status (1 = active, 0 = inactive)
Not used
Flash test, checksum flag (1 = fail, 0 = pass)
Self-test diagnostic error flag (1 = fail, 0 = pass)
Sensor overrange (1 = fail, 0 = pass)
SPI communication failure (1 = fail, 0 = pass)
Flash update failure (1 = fail, 0 = pass)
Power supply > 5.25 V (1 = power supply > 5.25 V,
0 = power supply ≤ 5.25 V)
Power supply < 4.75 V (1 = power supply < 4.75 V,
0 = power supply ≥ 4.75 V)
LE
0x0400
0xB502
Description
SMPL_PRD[7:0] = 0x01, sample rate = 819.2 SPS
SENS_AVG[15:8] = 0x04, gyro range = ±1200°/sec
SENS_AVG[7:0] = 0x02, four-tap averaging filter
Delay = 50 ms
Read XGYRO_OUT
MSC_CTRL[9] = 1, gyroscope negative self-test
Delay = 50 ms
Read XGYRO_OUT
Determine whether the bias in the gyroscope
output change according to the self-test response
specified in Table 1
MSC_CTRL[9:8] = 01, gyroscope/accelerometer
positive self-test
Delay = 50 ms
Read XGYRO_OUT
Determine whether the bias in the gyroscope
output changed according to the self-test
response specified in Table 1
MSC_CTRL[15:8] = 0x00
B
SO
DIN
0xB601
0xB904
0xB802
Status
TE
The self-test function allows the user to verify the mechanical
integrity of each MEMS sensor. It applies an electrostatic force to
each sensor element, which results in mechanical displacement that
simulates a response to actual motion. Table 1 lists the expected
response for each sensor, which provides pass/fail criteria.
[0]
O
Zero motion provides results that are more reliable. The settings
in Table 25 are flexible and allow for optimization around speed
and noise influence. For example, using fewer filtering taps decreases
delay times but increases the possibility of noise influence.
Rev. B | Page 15 of 20
ADIS16367
Data Sheet
The alarm function provides monitoring for two independent
conditions. The ALM_CTRL register provides control inputs
for data source, data filtering (prior to comparison), static
comparison, dynamic rate-of-change comparison, and output
indicator configurations. The ALM_MAGx registers establish
the trigger threshold and polarity configurations. Table 30 gives
an example of how to configure a static alarm. The ALM_SMPLx
registers provide the numbers of samples to use in the dynamic
rate-of-change configuration. The period equals the number in
the ALM_SMPLx register multiplied by the sample period time,
which is established by the SMPL_PRD register. See Table 31 for
an example of how to configure the sensor for this type of function.
Table 27. ALM_MAG1, ALM_MAG2 Bit Descriptions
Description (Default = 0x0000)
Comparison polarity (1 = greater than, 0 = less than)
Not used
Data bits that match the format of the trigger
source selection
Table 28. ALM_SMPL1, ALM_SMPL2 Bit Descriptions
Bits
[15:8]
[7:0]
Description (Default = 0x0000)
Not used
Data bits: number of samples (both 0x00 and 0x01 = 1)
Table 29. ALM_CTRL Bit Descriptions
[11:8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
0xA700,
0xA696
0xA937,
0xA86A
Description
ALM_CTRL = 0x5517
Alarm 1 input = XACCL_OUT
Alarm 2 input = XACCL_OUT
Static level comparison, filtered data
DIO2 output indicator, positive polarity
ALM_MAG1 = 0x8096
Alarm 1 is true if XACCL_OUT > +0.5 g
ALM_MAG2 = 0x376A
Alarm 2 is true if XACCL_OUT < −0.5 g
Table 31. Alarm Configuration Example 2
DIN
0xAF76,
0xAEC7
0xB601
0xAA08
0xAC50
0xA700,
0xA696
B
SO
Description (Default = 0x0000)
Alarm 2 source selection
0000 = disable
0001 = power supply output
0010 = x-axis gyroscope output
0011 = y-axis gyroscope output
0100 = z-axis gyroscope output
0101 = x-axis accelerometer output
0110 = y-axis accelerometer output
0111 = z-axis accelerometer output
1000 = x-axis gyroscope temperature output
1001 = y-axis gyroscope temperature output
1010 = z-axis gyroscope temperature output
1011 = auxiliary ADC input
Alarm 1 source selection (same as Alarm 2)
Rate-of-change enable for Alarm 2 (1 = rate of change,
0 = static level)
Rate-of-change enable for Alarm 1 (1 = rate of change,
0 = static level)
Not used
Comparison data filter setting (1 = filtered data,
0 = unfiltered data)
Not used
Alarm output enable (1 = enabled, 0 = disabled)
Alarm output polarity (1 = active high, 0 = active low)
Alarm output line select (1 = DIO2, 0 = DIO1)
O
Bits
[15:12]
DIN
0xAF55,
0xAE17
Description
ALM_CTRL = 0x76C7
Alarm 1 input = YACCL_OUT
Alarm 2 input = ZACCL_OUT
Rate-of-change comparison, unfiltered data
DIO2 output indicator, positive polarity
SMPL_PRD = 0x0001
Sample rate = 819.2 SPS
ALM_SMPL1 = 0x0008
Alarm 1 rate-of-change period = 9.77 ms
ALM_SMPL2 = 0x0050
Alarm 2 rate-of-change period = 97.7 ms
ALM_MAG1 = 0x8096
Alarm 1 is true if YACCL_OUT increases by more than
0.5 g in 9.77 ms.
ALM_MAG2 = 0x376A
Alarm 2 is true if ZACCL_OUT decreases by more
than 0.5 g in 97.7 ms.
LE
Bits
[15]
[14]
[13:0]
Table 30. Alarm Configuration Example 1
TE
Alarm Registers
0xA937,
0xA86A
PRODUCT IDENTIFICATION
Table 32 provides a summary of the registers that identify
the product: PROD_ID, which identifies the product type;
LOT_ID1 and LOT_ID2, the 32-bit lot identification code;
and SERIAL_NUM, which displays the 12-bit serial number.
All four registers are two bytes in length. When using the
SERIAL_NUM value to calculate the serial number, mask
off the upper four bits and convert the remaining 12 bits to a
decimal number.
Table 32. Identification Registers
Register Name
LOT_ID1
LOT_ID2
PROD_ID
Address
0x52
0x54
0x56
SERIAL_NUM
0x58
Rev. B | Page 16 of 20
Description
Lot Identification Code 1
Lot Identification Code 2
Product identification = 0x3FEF
(hexadecimal number for 16,367)
Serial number
Data Sheet
ADIS16367
APPLICATIONS INFORMATION
INSTALLATION/HANDLING
INTERFACE PRINTED CIRCUIT BOARD (PCB)
For ADIS16367 installation, use the following two-step process:
The ADIS16367/PCBZ includes one ADIS16367BLMZ and
one interface PCB. The interface PCB simplifies the process
of integrating the ADIS16367BMLZ into an existing processor
system.
1.
2.
Gently pry the connector from its mate using a small slot
screwdriver.
Remove the screws and lift the part up.
Never attempt to unplug the connector by pulling on the plastic
case or baseplate. Although the flexible connector is very reliable
in normal operation, it can break when subjected to unreasonable
handling. When broken, the flexible connector cannot be repaired.
The AN-1041 Application Note, iSensor® IMU Quick Start
Guide and Bias Optimization Tips, provides more information
about developing an appropriate mechanical interface design.
23.75
LE
GYROSCOPE BIAS OPTIMIZATION
J1 and J2 are dual-row, 2 mm (pitch) connectors that work with
a number of ribbon cable systems, including 3M Part Number
152212-0100-GB (ribbon crimp connector) and 3M Part Number
3625/12 (ribbon cable). Figure 17 provides a hole pattern design
for installing the ADIS16367BMLZ and the interface PCB onto
the same surface. Figure 18 provides the pin assignments for each
connector. The pin descriptions match those listed in Table 5.
The ADIS16367 does not require external capacitors for normal
operation; therefore, the interface PCB does not use the C1/C2
pads (not shown in Figure 17).
B
SO
The factory calibration addresses initial bias errors along with
temperature-dependent bias behaviors. Installation and certain
environmental conditions can introduce modest bias errors.
The precision autonull command (GLOB_CMD[4]) provides
a simple predeployment method for correcting these errors to
an accuracy of approximately 0.013°/sec, using an average of
30 sec. Averaging the sensor output data for 100 sec can provide
incremental performance gains, as well. Controlling device
rotation, power supply, and temperature during these averaging
times helps to ensure optimal accuracy during this process.
Refer to the AN-1041 Application Note for more information
about optimizing performance.
INPUT ADC CHANNEL
11
J1
1
11
D
27.70
2
1.20
12
Figure 17. Physical Diagram for the ADIS16367/PCBZ
J2
J1
RST
1
2
SCLK
AUX_ADC
1
2
GND
CS
3
4
DOUT
AUX_DAC
3
4
DIO3
DNC
5
6
DIN
GND
5
6
DIO4
GND
7
8
GND
DNC
7
8
DNC
GND
9
10
VCC
DNC
9
10
DNC
VCC
11
12
VCC
DIO2
11
12
DIO1
R1 C2
08398-014
C1
12
NOTES
1. DIMENSIONS IN MILLIMETERS.
VCC
D
2
30.10
O
The AUX_ADC register provides access to the auxiliary ADC
input channel. The ADC is a 12-bit successive approximation
converter that has an input circuit equivalent to the one shown
in Figure 16. The maximum input is 3.3 V. The ESD protection
diodes can handle 10 mA without causing irreversible damage.
The on resistance (R1) of the switch has a typical value of 100 Ω.
The sampling capacitor, C2, has a typical value of 16 pF.
J2
1
21.24
08398-020
For removal,
Figure 16. Equivalent Analog Input Circuit
(Conversion Phase: Switch Open, Track Phase: Switch Closed)
Rev. B | Page 17 of 20
Figure 18. J1/J2 Pin Assignments
08398-021
Secure the baseplate using machine screws.
Press the connector into its mate.
TE
1.
2.
ADIS16367
Data Sheet
OUTLINE DIMENSIONS
31.900
31.700
31.500
9.464
9.210
8.956
(2×)
17.41
17.21
17.01
(2×)
1.588
BSC
TOP VIEW
22.964
22.710
22.456
1.588
BSC
10.60
BSC
0.05
BSC
PIN 1
FRONT VIEW
2.660
2.500
2.340
B
SO
23.504
23.250
22.996
7.18
BSC
1.00
BSC
LE
10.50
BSC
BOTTOM VIEW
21.410
21.210
21.010
5.20
5.00
4.80
(2×)
14.950
14.550
14.150
PIN 24
4.20
4.00
3.80
(2×)
0.305
BSC (24×)
1.00
BSC (22×)
SIDE VIEW
4.330
BSC
4.162 BSC
1.65 BSC
14.00 BSC
O
2.00 BSC
12.10
BSC
DETAIL A
DETAIL A
CASTING
FEATURE
12-16-2011-C
2.382
BSC
TE
23.454
23.200
22.946
Figure 19. 24-Lead Module with Connector Interface
(ML-24-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADIS16367BMLZ
ADIS16367/PCBZ
1
Temperature Range
−40°C to +105°C
Package Description
24-Lead Module with Connector Interface
Interface Board
Z = RoHS Compliant Part.
Rev. B | Page 18 of 20
Package Option
ML-24-2
Data Sheet
ADIS16367
O
B
SO
LE
TE
NOTES
Rev. B | Page 19 of 20
ADIS16367
Data Sheet
O
B
SO
LE
TE
NOTES
©2010–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08398-0-9/12(B)
Rev. B | Page 20 of 20
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