Wide Dynamic Range, Miniature MEMs IMU
ADIS16470
Data Sheet
FEATURES
GENERAL DESCRIPTION
Triaxial, digital gyroscope, ±2000°/sec dynamic range
8°/hr in run bias stability
0.008°/sec/√Hz rms rate noise density
Triaxial, digital accelerometer dynamic range: ±40 g
13 μg in run bias stability
Triaxial, delta angle and delta velocity outputs
Factory calibrated sensitivity, bias, and axial alignment
Calibration temperature range: −10°C to +75°C
SPI compatible data communications
Programmable operation and control
Automatic and manual bias correction controls
Data ready indicator for synchronous data acquisition
External sync modes: direct, pulse, scaled, and output
On demand self test of inertial sensors
On demand self test of flash memory
Single-supply operation (VDD): 3.0 V to 3.6 V
2000 g mechanical shock survivability
Operating temperature range: −25°C to +85°C
The ADIS16470 is a miniature MEMS inertial measurement
unit (IMU) that includes a triaxial gyroscope and a triaxial
accelerometer. Each inertial sensor in the ADIS16470 combines
with signal conditioning that optimizes dynamic performance.
The factory calibration characterizes each sensor for sensitivity,
bias, alignment, linear acceleration (gyroscope bias), and point
of percussion (accelerometer location). As a result, each sensor
has dynamic compensation formulas that provide accurate
sensor measurements over a broad set of conditions.
The ADIS16470 provides a simple, cost effective method for
integrating accurate, multiaxis inertial sensing into industrial
systems, especially when compared with the complexity and
investment associated with discrete designs. All necessary motion
testing and calibration are part of the production process at the
factory, greatly reducing system integration time. Tight orthogonal
alignment simplifies inertial frame alignment in navigation
systems. The serial peripheral interface (SPI) and register
structure provide a simple interface for data collection and
configuration control.
APPLICATIONS
Navigation, stabilization, and instrumentation
Unmanned and autonomous vehicles
Smart agriculture/construction machinery
Factory/industrial automation, robotics
Virtual/augmented reality
Internet of Moving Things
The ADIS16470 is in a 44-ball, ball grid array (BGA) package
that is approximately 11 mm × 15 mm × 11 mm.
FUNCTIONAL BLOCK DIAGRAM
DR
SELF TEST
RST
VDD
POWER
MANAGEMENT
INPUT/OUTPUT
OUTPUT
DATA
REGISTERS
TRIAXIAL
GYROSCOPE
TRIAXIAL
ACCELEROMETER
CONTROLLER
TEMPERATURE
CALIBRATION
AND
FILTERS
GND
CS
SCLK
SPI
USER
CONTROL
REGISTERS
DIN
DOUT
ADIS16470
SYNC
15343-001
CLOCK
Figure 1.
Rev. C
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ADIS16470
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Device Configuration ................................................................ 15
Applications ....................................................................................... 1
User Register Memory Map .......................................................... 16
General Description ......................................................................... 1
User Register Defintions................................................................ 18
Functional Block Diagram .............................................................. 1
Gyroscope Data .......................................................................... 18
Revision History ............................................................................... 2
Delta Angles ................................................................................ 21
Specifications..................................................................................... 3
Delta Velocity .............................................................................. 22
Timing Specifications .................................................................. 5
Calibration................................................................................... 24
Absolute Maximum Ratings ....................................................... 7
Applications Information .............................................................. 31
Thermal Resistance ...................................................................... 7
Assembly and Handling Tips .................................................... 31
ESD Caution .................................................................................. 7
Power Supply Considerations ................................................... 32
Pin Configuration and Function Descriptions ............................. 8
Serial Port Operation ................................................................. 32
Typical Performance Characteristics ........................................... 10
Digital Resolution of Gyroscopes and Accelerometers ......... 32
Theory of Operation ...................................................................... 11
Evaluation Tools ......................................................................... 33
Introduction ................................................................................ 11
Tray Drawing .............................................................................. 35
Inertial Sensor Signal Chain ..................................................... 11
Packaging and Ordering Information ......................................... 36
Register Structure ....................................................................... 12
Outline Dimensions ................................................................... 36
Serial Peripheral Interface (SPI) ............................................... 13
Ordering Guide .......................................................................... 36
Data Ready (DR) ........................................................................ 13
Reading Sensor Data .................................................................. 14
REVISION HISTORY
4/2019—Rev. B to Rev. C
Changes to Serial Peripheral Interface (SPI) Section................. 13
Changes to Figure 28 ...................................................................... 14
Changes to Table 10 and Gyroscope Data Section ..................... 18
Changes to Acceleration Data Section ......................................... 19
Added Accelerometer Data Formatting Section ........................ 20
Deleted Accelerometer Resolution Section Header ................... 20
Added Serial Port Operation Section, Maximum Throughput
Section, Serial Port SCLK Underrun/Overrun Conditions, and
Digital Resolution of Gyroscopes and Accelerometers Section..... 32
Moved Gyroscope Data Width (Digital Resolution) Section and
Accelerometer Data Width (Digital Resolution) Section.......... 32
Added Tray Drawing Section ........................................................ 35
Added Figure 50.............................................................................. 35
2/2019—Rev. A to Rev. B
Changes to Table 2 ............................................................................ 5
Changes to Figure 5 .......................................................................... 6
Changes to Figure 9, Figure 10, Figure 11, Figure 12, and
Figure 13 .......................................................................................... 10
Changes to Figure 14, Figure 15, and Figure 16 ......................... 11
Changes to Figure 18 and Figure 19............................................. 12
Added Gyroscope Data Width (Digital Resolution) Section ... 18
Added Accelerometer Data Width (Digital Resolution) Section .. 20
Change to Calibration, Accelerometer Bias (XA_BIAS_LOW
and XA_BIAS_HIGH) Section ..................................................... 25
Change to Filter Control Register (FILT_CTRL) Section ......... 26
Changes to Direct Sync Mode Section and Pulse Sync Mode
Section.............................................................................................. 27
Changed Self Test Section to Sensor Self Test Section .............. 28
Changes to Sensor Self Test Section ............................................. 28
11/2017—Rev. 0 to Rev. A
Changes to Table 1.............................................................................3
10/2017—Rev. 0: Initial Version
Rev. C | Page 2 of 36
Data Sheet
ADIS16470
SPECIFICATIONS
TC = 25°C, VDD = 3.3 V, angular rate = 0°/sec, dynamic range = ±2000°/sec ± 1 g, unless otherwise noted.
Table 1.
Parameter
GYROSCOPES
Dynamic Range
Sensitivity
Error over Temperature
Misalignment
Nonlinearity1
Bias
In Run Stability
Angular Random Walk
Error over Temperature
Linear Acceleration Effect
Vibration Rectification Error
Output Noise
Rate Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
ACCELEROMETERS2
Dynamic Range
Sensitivity
Error over temperature
Misalignment
Nonlinearity
Bias
In Run Stability
Velocity Random Walk
Error over Temperature
Output Noise
Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
Test Conditions/Comments
Min
Typ
Max
±2000
Unit
16-bit format
32-bit format
−10°C ≤ TC ≤ +75°C
Axis to axis
Full scale (FS) = 2000°/sec
10
655,360
±0.25
±0.1
±0.25
°/sec
LSB/°/sec
LSB/°/sec
%
Degrees
%FS
1σ
1σ
−10°C ≤ TC ≤ +75°C, 1 σ
Any direction, 1 σ
8
0.34
0.2
0.015
0.0005
0.17
0.008
550
66
°/hr
°/√hr
°/sec
°/sec/g
°/sec/g2
°/sec rms
°/sec/√Hz rms
Hz
kHz
16-bit format
32-bit format
−10°C ≤ TC ≤ +75°C
Axis to axis
Best fit straight line, FS = ±10 g
Best fit straight line, FS = ±20 g
Best fit straight line, FS = ±40 g
800
52,428,800
±0.1
±0.1
0.02
0.4
1.5
g
LSB/g
LSB/g
%
Degrees
% FS
% FS
% FS
1σ
1σ
−10°C ≤ TC ≤ +75°C, 1 σ
No filtering
f = 10 Hz to 40 Hz, no filtering
13
0.037
±4
2.3
100
600
5.65
5.25
μg
m/sec/√Hr
mg
mg rms
μg/√Hz rms
Hz
kHz
kHz
0.1
°C/LSB
1 σ, no filtering
1 σ, f = 10 Hz to 40 Hz
Each axis
±40
Y-axis, z-axis
X-axis
TEMPERATURE SENSOR
Scale Factor
LOGIC INPUTS3
Input Voltage
High, VIH
Low, VIL
RST Pulse Width
CS Wake-Up Pulse Width
2.0
0.8
1
20
Rev. C | Page 3 of 36
V
V
μs
μs
ADIS16470
Parameter
Input Current
Logic 1, IIH
Logic 0, IIL
All Pins Except RST
RST Pin
Input Capacitance, CIN
DIGITAL OUTPUTS
Output Voltage
High, VOH
Low, VOL
FLASH MEMORY
Data Retention5
FUNCTIONAL TIMES6
Power-On Start-Up Time
Hardware Reset Recovery Time7
Software Reset Recovery Time
Flash Memory Update Time
Flash Memory Test Time
Factory Calibration Restore Time
Sensor Self Test Time8
CONVERSION RATE
Initial Clock Accuracy
Sync Input Clock
POWER SUPPLY, VDD
Power Supply Current9
Data Sheet
Test Conditions/Comments
Min
Typ
VIH = 3.3 V
VIL = 0 V
Max
Unit
10
μA
10
μA
mA
pF
0.33
10
ISOURCE = 0.5 mA
ISINK = 2.0 mA
Endurance4
TJ = 85°C
Time until data is available
VDD > 3.0 V to DR pulsing (see Figure 23)
RST > VOH to DR pulsing (see Figure 25)
Register GLOB_CMD, Bit 7 = 1 (see Table 109)
Register GLOB_CMD, Bit 3 = 1 (see Table 109
Register GLOB_CMD, Bit 4 = 1 (see Table 109
Register GLOB_CMD, Bit 1 = 1 (see Table 109)
Register GLOB_CMD, Bit 2 = 1 (see Table 109)
Operating voltage range
Normal mode, VDD = 3.3 V
1
2.4
0.4
10000
20
252
193
193
72
32
142
14
2000
3
1.9
3.0
42
2.1
3.6
50
V
V
Cycles
Years
ms
ms
ms
ms
ms
ms
ms
SPS
%
kHz
V
mA
Linearity is based on the deviation from a best fit linear model.
All specifications associated with the accelerometers relate to the full-scale range of ±40 g, unless otherwise noted.
3
The digital input/output signals use a 3.3 V system.
4
Endurance is qualified as per JEDEC Standard 22, Method A117, measured at −40°C, +25°C, +85°C, and +125°C.
5
The data retention specification assumes a junction temperature (TJ) of 85°C per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ.
6
These times do not include thermal settling and internal filter response times, which may affect overall accuracy.
7
The RST line must be in a low state for at least 10 μs to ensure a proper reset initiation and recovery.
8
Sensor self test time can extend when using external clock rates that are lower than 2000 Hz.
9
Supply current transients can reach 250 mA during initial startup or reset recovery.
2
Rev. C | Page 4 of 36
Data Sheet
ADIS16470
TIMING SPECIFICATIONS
TA = 25°C, VDD = 3.3 V, unless otherwise noted.
Table 2.
Normal Mode
Min1
Typ
Max
0.1
2.0
16
24
200
Parameter
fSCLK
tSTALL
tREADRATE
tCS
Description
Serial clock
Stall period3 between data
Read rate
Chip select to SCLK edge
tDAV
tDSU
tDHD
tSCLKR, tSCLKF
tDR, tDF
tSFS
t1
DOUT valid after SCLK edge
DIN setup time before SCLK rising edge
DIN hold time after SCLK rising edge
SCLK rise/fall times
DOUT rise/fall times
CS high after SCLK edge
Input sync positive pulse width
Pulse sync mode, MSC_CTRL = 101 (binary, see Table 101)
Input sync to data ready valid transition
Direct sync mode, MSC_CTRL = 001 (binary, see Table 101)
Pulse sync mode, MSC_CTRL = 101 (binary, see Table 101)
Data invalid time
Input sync period4
tSTDR
tNV
t2
Burst Read
Min1, 2
Typ
Max
0.1
1.0
N/A
200
25
25
0
0
ns
ns
ns
ns
ns
ns
5
5
μs
25
50
25
50
5
5
12.5
12.5
5
5
256
256
20
12.5
12.5
256
256
20
477
μs
μs
μs
μs
477
1
Guaranteed by design and characterization, but not tested in production.
N/A means not applicable.
3
When using the burst read mode, the stall period is not applicable.
4
This specification is rounded up from the cycle time that comes from the maximum input clock frequency (2100 Hz).
2
Timing Diagrams
tSCLKR
tSCLKF
CS
tCS
tSFS
SCLK
2
3
4
5
tDAV
DOUT
MSB
D14
R/W
A6
15
16
tDR
D13
tDSU
DIN
6
D12
D11
tDHD
A5
D10
D2
D1
LSB
tDF
A4
A3
A2
DC2
DC1
15343-002
1
LSB
Figure 2. SPI Timing and Sequence
tREADRATE
tSTALL
15343-003
CS
SCLK
Figure 3. Stall Time and Data Rate
Rev. C | Page 5 of 36
Unit
MHz
μs
μs
ns
ADIS16470
Data Sheet
t2
tSTDR
t1
SYNC
tNV
15343-004
DR
Figure 4. Input Clock Timing Diagram, Pulse Sync Mode, Register MSC_CTRL, Bits[4:2] = 101 (Binary)
t2
t1
SYNC
tNV
tSTDR
15343-305
DR
Figure 5. Input Clock Timing Diagram, Direct Sync Mode, Register MSC_CTRL, Bits[4:2] = 001 (Binary)
Rev. C | Page 6 of 36
Data Sheet
ADIS16470
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Parameter
Mechanical Shock Survivability
Any Axis, Unpowered
Any Axis, Powered
VDD to GND
Digital Input Voltage to GND
Digital Output Voltage to GND
Operating Temperature Range
Storage Temperature Range1
Barometric Pressure
1
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Rating
2000 g
2000 g
−0.3 V to +3.6 V
−0.3 V to VDD + 0.2 V
−0.3 V to VDD + 0.2 V
−25°C to +85°C
−65°C to +150°C
2 bar
The ADIS16470 is a multichip module that includes many
active components. The values in Table 4 identify the thermal
response of the hottest component inside of the ADIS16470,
with respect to the overall power dissipation of the module.
This approach enables a simple method for predicting the
temperature of the hottest junction, based on either ambient or
case temperature.
For example, when the ambient temperature is 70°C, the hottest
junction temperature (TJ) inside of the ADIS16470 is 93°C.
Extended exposure to temperatures that are lower than −20°C or higher
than +85°C can adversely affect the accuracy of the factory calibration.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
TJ = θJA × VDD × IDD + 70°C
TJ = 158.2°C/W × 3.3 V × 0.044 A + 70°C
TJ = 93°C
Table 4. Package Characteristics
Package Type
ML-44-13
1
θJA1
158.2°C/W
θJC2
106.1°C/W
Device Weight
1.3 grams
θJA is the natural convection junction to ambient thermal resistance
measured in a one cubic foot sealed enclosure.
2
θJC is the junction to case thermal resistance.
3
Thermal impedance values come from direct observation of the hottest
temperature inside of the ADIS16470, when it is attached to a FR4-08 PCB
that has two metal layers and has a thickness of 0.063”.
ESD CAUTION
Rev. C | Page 7 of 36
ADIS16470
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADIS16470
A
B
C
D
E
F
G
H
J
K
1
A1 PIN
INDICATOR
2
A1 PIN
INDICATOR
3
PIN A1
4
5
6
7
PIN K8
Figure 6. Pin Assignments, Bottom View
Figure 7. Pin Assignments, Package Level View
Table 5. Pin Function Descriptions
Pin No.
A1
A2
A3
A4
A5
A6
A7
A8
B3
B4
B5
B6
C2
C3
C6
C7
D3
D6
E2
E3
E6
E7
F1
F3
F6
F8
G2
G3
G6
G7
H1
H3
H6
H8
Mnemonic
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DNC
GND
VDD
GND
VDD
GND
VDD
GND
GND
GND
RST
GND
GND
GND
CS
DIN
GND
VDD
DOUT
SCLK
GND
15343-006
BOTTOM VIEW OF PACKAGE
15343-005
PIN A8
8
Type
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Not applicable
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Input
Supply
Supply
Supply
Input
Input
Supply
Supply
Output
Input
Supply
Rev. C | Page 8 of 36
Description
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Power Ground
Do Not Connect
Power Ground
Power Supply
Power Ground
Power Supply
Power Ground
Power Supply
Power Ground
Power Ground
Power Ground
Reset
Power Ground
Power Ground
Power Ground
SPI, Chip Select
SPI, Data Input
Power Supply
Power Supply
SPI, Data Output
SPI, Serial Clock
Power Ground
Data Sheet
Pin No.
J2
J3
J4
J5
J6
J7
K1
K3
K6
K8
ADIS16470
Mnemonic
GND
SYNC
VDD
VDD
DR
GND
GND
GND
VDD
GND
Type
Supply
Input
Supply
Supply
Output
Supply
Supply
Supply
Supply
Supply
Rev. C | Page 9 of 36
Description
Power Ground
Sync (External Clock)
Power Supply
Power Supply
Data Ready
Power Ground
Power Ground
Power Ground
Power Supply
Power Ground
ADIS16470
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
1k
100
0.1
1
10
100
1k
10k
Tau (Seconds)
ACCELEROMETER BIAS ERROR (mg)
4
0.6
0.4
µ + 1σ
µ
µ – 1σ
–0.4
–0.6
–0.8
0
10
20
30
40
50
60
70
CASE TEMPERATURE (°C)
100
1k
10k
3
2
µ + 1σ
1
µ
0
µ – 1σ
–1
–2
–3
–4
–5
–10
0
10
20
30
40
50
60
70
CASE TEMPERATURE (°C)
Figure 9. Gyroscope Bias Error vs. Case Temperature
Figure 12. Accelerometer Bias Error vs. Case Temperature
2.0
ACCELEROMETER SCALE ERROR (% FS)
0.20
1.5
1.0
0.5
0
µ
µ + 1σ
–0.5
µ – 1σ
–1.0
0
10
20
30
40
50
60
70
CASE TEMPERATURE (°C)
Figure 10. Gyroscope Scale (Sensitivity) Error vs. Case Temperature
0.15
0.10
0.05
µ + 1σ
0
µ
–0.05
µ – 1σ
–0.10
–0.15
–0.20
–10
15343-009
–1.5
–2.0
–10
10
0
10
20
30
40
50
CASE TEMPERATURE (°C)
60
70
15343-012
–1.0
–10
15343-008
GYROSCOPE BIAS ERROR (°/Seconds)
0.8
–0.2
1
Figure 11. Accelerometer Root Allan Variance, TC = 25°C
5
0
0.1
Tau (Seconds)
1.0
0.2
µ
µ – 1σ
1
0.01
Figure 8. Gyroscope Root Allan Variance, TC = 25°C
GYROSCOPE SCALE ERROR (% FS)
µ + 1σ
10
15343-011
1
0.01
15343-007
10
100
15343-311
ROOT ALLAN VARIANCE (µg/Hour)
ROOT ALLAN VARIANCE (°/Hour)
1k
Figure 13. Accelerometer Scale (Sensitivity) Error vs. Case Temperature
Rev. C | Page 10 of 36
Data Sheet
ADIS16470
THEORY OF OPERATION
Inertial Sensor Calibration
When using the factory default configuration for all user
configurable control registers, the ADIS16470 initializes itself
and automatically starts a continuous process of sampling,
processing, and loading calibrated sensor data into its output
registers at a rate of 2000 SPS.
The inertial sensor calibration function for the gyroscopes and the
accelerometers has two components: factory calibration and user
calibration (see Figure 17).
FROM
MEMS
SENSOR
INERTIAL SENSOR SIGNAL CHAIN
AVERAGING
DECIMATING
FILTER
CALIBRATION
OUTPUT
DATA
REGISTERS
l11 l12
l21 l22
l31 l32
Gyroscope Data Sampling
ADC
TO
BARTLETT
WINDOW
FIR FILTER
INTERNAL
DATA
REGISTER
fSG = 4100Hz
fSM = 2000Hz
15343-014
MEMS
GYROSCOPE
Figure 15. Gyroscope Data Sampling
Accelerometer Data Sampling
The three accelerometers produce linear acceleration measurements
along the same orthogonal axes (x, y, and z) as the gyroscopes.
Figure 16 provides the sampling plan for each accelerometer
when the ADIS16470 operates in the internal clock mode
(default, see Register MSC_CTRL, Bits[4:2] in Table 101).
ADC
1 2
a(n)
2 nΣ
=1
÷2
2 × fSM = 4000Hz
where:
ωXC, ωYC, and ωZC are the gyroscope outputs (post calibration).
m11, m12, m13, m21, m22, m23, m31, m32, and m33 provide scale and
alignment correction.
ωX, ωY, and ωZ are the gyroscope outputs (precalibration).
bX, bY, and bZ provide bias correction.
l11, l12, l13, l21, l22, l23, l31, l32, and l33 provide linear g correction
aXC, aYC, and aZC are the accelerometer outputs (post calibration).
All of the correction factors in this relationship come from
direct observation of the response of each gyroscope at multiple
temperatures over the calibration temperature range (−10°C ≤
TC ≤ +75°C). These correction factors are stored in the flash
memory bank, but they are not available for observation or
configuration. Register MSC_CTRL, Bit 7 (see Table 101)
provides the only user configuration option for the factory
calibration of the gyroscopes: an on/off control for the linear g
compensation. See Figure 40 for more details on the user
calibration options that are available for the gyroscopes.
TO
BARTLETT
WINDOW
FIR FILTER
15343-020
MEMS
ACCELEROMETER
m13 ω X bX
m23 ωY bY
m33 ωZ bZ
l13 a XC
l23 aYC
l33 aZC
ω XC m11 m12
ωYC m21 m22
ω m31 m32
ZC
Figure 14. Signal Processing Diagram, Inertial Sensors
The three gyroscopes produce angular rate measurements around
three orthogonal axes (x, y, and z). Figure 15 shows the sampling
plan for each gyroscope when the ADIS16470 operates in the
internal clock mode (default, see Register MSC_CTRL, Bits[4:2]
in Table 101). Each gyroscope has an analog-to-digital converter
(ADC) and sample clock (fSG) that drives data sampling at a rate of
4100 Hz (±5%). The internal processor reads and processes this
data from each gyroscope at a rate of 2000 Hz (fSM).
TO
DIGITAL
FILTERS
The factory calibration of the gyroscope applies the following
correction formulas to the data of each gyroscope:
15343-019
BARTLETT
WINDOW
FIR
FILTER
USER
CALIBRATION
Figure 17. Inertial Sensor Calibration Processing
Figure 14 provides the basic signal chain for the inertial sensors
in the ADIS16470. This signal chain produces an update rate
of 2000 SPS in the output data registers when it operates in
internal clock mode (default, see Register MSC_CTRL,
Bits [4:2] in Table 101).
MEMS
SENSORS
FACTORY
CALIBRATION
15343-021
INTRODUCTION
Figure 16. Accelerometer Data Sampling
External Clock Options
The ADIS16470 provides three different modes of operation
that support the device using an external clock to control the
internal processing rate (fSM in Figure 15 and Figure 16) through
the SYNC pin. The MSC_CTRL register (see Table 101)
provides the configuration options for these external clock
modes in Bits[4:2].
Rev. C | Page 11 of 36
ADIS16470
Data Sheet
p32
FROM
MEMS
SENSOR
p13 2XC
2
p23 YC
0 2ZC
1 N
ω(n)
N nΣ
=1
1 N
ω(n)
N nΣ
=1
TO
FACTORY
CALIBRATION
Figure 18. Bartlett Window FIR Filter Signal Path
where:
aXC, aYC, and aZC are the accelerometer outputs (post calibration).
m11, m12, m13, m21, m22, m23, m31, m32, and m33 provide scale and
alignment correction.
aX, aY, and aZ are the accelerometer outputs (precalibration).
bX, bY, and bZ provide bias correction.
p12, p13, p21, p23, p31 and p32 provide point of percussion alignment
correction to (see Figure 43).
ω2XC, ω2YC, and ω2ZC are the square of the gyroscope outputs
(post calibration).
All of the correction factors in this relationship come from
direct observation of the response of each accelerometer at
multiple temperatures, over the calibration temperature range
(−10°C ≤ TC ≤ +75°C). These correction factors are stored
in the flash memory bank; but they are not available for
observation or configuration. MSC_CTRL, Bit 6 (see Table 101)
provides the only user configuration option for the factory
calibration of the accelerometers: an on/off control for the point of
percussion, alignment function. See Figure 41 for more details
on the user calibration options that are available for the
accelerometers.
Averaging/Decimating Filter
The second digital filter averages multiple samples together to
produce each register update. In this type of filter structure, the
number of samples in the average is equal to the reduction in
the update rate for the output data registers. The DEC_RATE
register (see Table 105) provides the configuration controls for
this filter.
FROM
USER
CALIBRATION
1 N
Σ ω(n)
Nn = 1
÷N
TO OUTPUT
REGISTERS
Figure 19. Averaging/Decimating Filter Diagram
REGISTER STRUCTURE
All communication between the ADIS16470 and an external
processor involves either reading the contents of an output
register or writing configuration/command information to a
control register. The output data registers include the latest
sensor data, error flags, and identification information. The
control registers include sample rate, filtering, calibration, and
diagnostic options. Each user accessible register has two bytes
(upper and lower), each of which have their own unique
address. See Table 8 for a detailed list of all user registers, along
with their addresses.
TRIAXIAL
GYROSCOPE
TRIAXIAL
ACCELEROMETER
TEMPERATURE
SENSOR
SENSOR
SIGNAL
PROCESSING
OUTPUT
REGISTERS
CONTROLLER
CONTROL
REGISTERS
Figure 20. Basic Operation of the ADIS16470
Rev. C | Page 12 of 36
15343-022
p12
0
15343-223
0
p21
p31
m13 a X b X
m23 aY bY
m33 aZ bZ
The Bartlett window finite impulse response (FIR) filter (see
Figure 18) contains two averaging filter stages, in a cascade
configuration. The FILT_CTRL register (see Table 99) provides
the configuration controls for this filter.
SPI
a XC m11 m12
aYC m21 m22
a ZC m31 m32
Bartlett Window FIR Filter
15343-222
The factory calibration of the accelerometer applies the following
correction formulas to the data of each accelerometer:
Data Sheet
ADIS16470
DATA READY (DR)
The SPI provides access to the user registers (see Table 8). Figure 21
provides the most common connections between the ADIS16470
and a SPI master, which is often an embedded processor that
has a SPI-compatible interface. In this example, the SPI master
uses an interrupt service routine to collect data every time the
data ready (DR) signal pulses.
The factory default configuration provides users with a DR
signal on the DR pin (see Table 5), which pulses when the
output data registers are updating. Connect this with a pin on
the embedded processor, which triggers data collection, on the
second edge of this pulse. The MSC_CTRL register, Bit 0 (see
Table 101), controls the polarity of this signal. In Figure 22,
Register MSC_CTRL, Bit 0 = 1, which means that data
collection must start on the rising edges of the DR pulses.
Additional information on the ADIS16470 SPI can be found in
the Applications Information section of this data sheet.
INPUT/OUTPUT LINES ARE COMPATIBLE WITH
3.3V LOGIC LEVELS
+3.3V
VDD
15343-025
SERIAL PERIPHERAL INTERFACE (SPI)
DR
ACTIVE
INACTIVE
Figure 22. Data Ready When Register MSC_CTRL, Bit 0 = 1 (Default)
SCLK
MOSI
DIN
MISO
DOUT
DR
15343-023
IRQ
During the startup and reset recovery processes, the DR signal
may exhibit some transient behavior before data production
begins. Figure 23 provides an example of the DR behavior
during startup, and Figure 24 and Figure 25 provide examples
of the DR behavior during recovery from reset commands.
TIME THAT VDD > 3V
VDD
Figure 21. Electrical Connection Diagram
PULSING INDICATES
DATA PRODUCTION
Table 6. Generic SPI Master Pin Names and Functions
Mnemonic
SS
SCLK
MOSI
MISO
IRQ
Function
Slave select
Serial clock
Master output, slave input
Master input, slave output
Interrupt request
DR
START-UP TIME
Figure 23. Data Ready Response During Startup
SOFTWARE RESET COMMAND
GLOB_CMD[7] = 1
Embedded processors typically use control registers to configure
their serial ports for communicating with SPI slave devices such
as the ADIS16470. Table 7 provides a list of settings that describe
the SPI protocol of the ADIS16470. The initialization routine
of the master processor typically establishes these settings using
firmware commands to write them into its control registers.
DR PULSING
RESUMES
DR
RESET RECOVERY TIME
Figure 24. Data Ready Response During Reset
(Register GLOB_CMD, Bit 7 = 1) Recovery
Table 7. Generic Master Processor SPI Settings
Processor Setting
Master
SCLK ≤ 2 MHz1
SPI Mode 3
MSB First Mode
16-Bit Mode
1
Description
ADIS16470 operates as slave
Maximum serial clock rate
CPOL = 1 (polarity), CPHA = 1 (phase)
Bit sequence, see Figure 26 for coding
Shift register and data length
15343-228
CS
SCLK
15343-229
SS
ADIS16470
RST PIN
RELEASED
RST
DR PULSING
RESUMES
DR
Burst mode read requires this to be ≤1 MHz (see Table 2 for more
information).
RESET RECOVERY TIME
Figure 25. Data Ready Response During Reset (RST = 0) Recovery
Rev. C | Page 13 of 36
15343-230
SYSTEM
PROCESSOR
SPI MASTER
ADIS16470
Data Sheet
CS
SCLK
DIN
R/W
DOUT
D15
A6
A5
A4
A3
A2
A1
A0
D14
D13
D12
D11
D10
D9
D8
DC7 DC6
D7
D6
DC5
DC4
DC3
DC2
DC1
DC0
D5
D4
D3
D2
D1
D0
R/W
D15
A6
A5
D14
D13
15343-024
NOTES
1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
FOR OTHER DEVICES.
Figure 26. SPI Communication Bit Sequence
CS
1
2
3
11
SCLK
DIN
DOUT
DIAG_STAT
X_GYRO_OUT
CHECKSUM
15343-030
0x6800
Figure 27. Burst Read Sequence
CS
SCLK
DIN = 0x7200 = 0111 0010 0000 0000
DOUT HIGH-Z
HIGH-Z
DOUT = 0100 0000 0101 0110 = 0x4056 = 16470 (PROD_ID)
15343-029
DIN
Figure 28. SPI Signal Pattern Showing a Read of the PROD_ID Register
Burst Read Function
Reading a single register requires two 16-bit cycles on the SPI:
one to request the contents of a register and another to receive
those contents. The 16-bit command code (see Figure 26) for a
read request on the SPI has three parts: the read bit (R/W = 0),
either address of the register, [A6:A0], and eight don’t care bits,
[DC7:DC0]. Figure 29 provides an example that includes two
register reads in succession. This example starts with DIN =
0x0C00, to request the contents of the Z_GYRO_LOW
register, and follows with 0x0E00, to request the contents of
the Z_GYRO_OUT register. The sequence in Figure 29 also
illustrates full duplex mode of operation, which means that the
ADIS16470 can receive requests on DIN while also transmitting
data out on DOUT within the same 16-bit SPI cycle.
The burst read function provides a way to read a batch of
output data registers, using a continuous stream of bits, at a rate
of up to 1 MHz (SCLK). This method does not require a stall
time between each 16-bit segment (see Figure 3). As shown in
Figure 27, start this mode by setting DIN = 0x6800, and then
read each of the registers in the sequence out of DOUT while
keeping CS low for the entire 176-bit sequence.
DIN
DOUT
0x0C00
0x0E00
NEXT
ADDRESS
Z_GYRO_LOW
Z_GYRO_OUT
15343-028
READING SENSOR DATA
Figure 29. SPI Read Example
Figure 28 provides an example of the four SPI signals when reading
the PROD_ID register (see Table 117) in a repeating pattern.
This pattern can be helpful when troubleshooting the SPI
interface setup and communications because the signals are
the same for each 16-bit sequence, except during the first cycle.
The sequence of registers (and checksum value) in the burst read
response depends on which sample clock mode that the ADIS16470
is operating in (Register MSC_CTRL, Bits[4:2], see Table 101).
In all clock modes, except when operating in scaled sync mode
(Register MSC_CTRL, Bits[4:2] = 010), the burst read response
includes the following registers and checksum value: DIAG_STAT,
X_GYRO_OUT, Y_GYRO_OUT, Z_GYRO_OUT, X_ACCL_
OUT, Y_ACCL_OUT, Z_ACCL_OUT, TEMP_OUT, DATA_
CNTR, and checksum. In these cases, use the following formula
to verify the checksum value, treating each byte in the formula as
an independent, unsigned, 8-bit number:
Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] +
X_GYRO_OUT, Bits[15:8] + X_GYRO_OUT, Bits[7:0] +
Y_GYRO_OUT, Bits[15:8] + Y_GYRO_OUT, Bits[7:0] +
Z_GYRO_OUT, Bits[15:8] + Z_GYRO_OUT, Bits[7:0] +
X_ACCL_OUT, Bits[15:8] + X_ACCL_OUT, Bits[7:0] +
Y_ACCL_OUT, Bits[15:8] + Y_ACCL_OUT, Bits[7:0] +
Z_ACCL_OUT, Bits[15:8] + Z_ACCL_OUT, Bits[7:0] +
TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] +
DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0]
Rev. C | Page 14 of 36
Data Sheet
ADIS16470
When operating in scaled sync mode (Register MSC_CTRL,
Bits[4:2] = 010), the burst read response includes the following
registers and value: DIAG_STAT, X_GYRO_OUT, Y_GYRO_OUT,
Z_GYRO_OUT, X_ACCL_OUT, Y_ACCL_OUT, Z_ACCL_OUT,
TEMP_OUT, TIME_STMP, and the checksum value. In this
case, use the following formula to verify the checksum value,
treating each byte in the formula as an independent, unsigned,
8-bit number.
Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] +
X_GYRO_OUT, Bits[15:8] + X_GYRO_OUT, Bits[7:0] +
Y_GYRO_OUT, Bits[15:8] + Y_GYRO_OUT, Bits[7:0] +
Z_GYRO_OUT, Bits[15:8] + Z_GYRO_OUT, Bits[7:0] +
X_ACCL_OUT, Bits[15:8] + X_ACCL_OUT, Bits[7:0] +
Y_ACCL_OUT, Bits[15:8] + Y_ACCL_OUT, Bits[7:0] +
Z_ACCL_OUT, Bits[15:8] + Z_ACCL_OUT, Bits[7:0] +
TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits 7:0] +
TIME_STMP, Bits[15:8] + TIME_STMP, Bits[7:0]
Memory Structure
Figure 31 provides a functional diagram for the memory
structure of the ADIS16470. The flash memory bank contains
the operational code, unit specific calibration coefficients and
user configuration settings. During initialization (power
application or reset recover), this information loads from the
flash memory into the SRAM, which supports all normal
operation, including register access through the SPI port.
Writing to a configuration register (using the SPI) updates its
SRAM location but does not automatically update its settings
in the flash memory bank. The manual flash memory update
command (Register GLOB_CMD, Bit 3, see Table 109) provides
a convenient method for saving all of these settings to the flash
memory bank at one time. A Yes in the flash back-up column of
Table 8 identifies the registers that have storage support in the
flash memory bank.
MANUAL
FLASH
BACKUP
Each configuration register contains 16 bits (two bytes). Bits[7:0]
contain the low byte, and Bits[15:8] contain the high byte of
each register. Each byte has its own unique address in the user
register map (see Table 8). Updating the contents of a register
requires writing to both of its bytes in the following sequence:
low byte first, high byte second. There are three parts to coding
a SPI command (see Figure 26) that write a new byte of data to
a register: the write bit (R/W = 1), the address of the byte, [A6:A0],
and the new data for that location, [DC7:DC0]. Figure 30
provides a coding example for writing 0x0004 to the
FILT_CTRL register (see Table 99). In Figure 30, the 0xDC04
command writes 0x04 to Address 0x5C (lower byte) and the
0xDD00 command writes 0x00 to Address 0x5D (upper byte).
CS
DIN
0xDC04
0xDD00
15343-031
SCLK
Figure 30. SPI Sequence for Writing 0x0004 to FILT_CTRL
Rev. C | Page 15 of 36
NONVOLATILE
FLASH MEMORY
VOLATILE
SRAM
SPI ACCESS
(NO SPI ACCESS)
START-UP
RESET
Figure 31. SRAM and Flash Memory Diagram
15343-032
DEVICE CONFIGURATION
ADIS16470
Data Sheet
USER REGISTER MEMORY MAP
Table 8. User Register Memory Map (N/A Means Not Applicable)
Name
Reserved
DIAG_STAT
X_GYRO_LOW
X_GYRO_OUT
Y_GYRO_LOW
Y_GYRO_OUT
Z_GYRO_LOW
Z_GYRO_OUT
X_ACCL_LOW
X_ACCL_OUT
Y_ACCL_LOW
Y_ACCL_OUT
Z_ACCL_LOW
Z_ACCL_OUT
TEMP_OUT
TIME_STAMP
Reserved
DATA_CNTR
X_DELTANG_LOW
X_DELTANG_OUT
Y_DELTANG_LOW
Y_DELTANG_OUT
Z_DELTANG_LOW
Z_DELTANG_OUT
X_DELTVEL_LOW
X_DELTVEL_OUT
Y_DELTVEL_LOW
Y_DELTVEL_OUT
Z_DELTVEL_LOW
Z_DELTVEL_OUT
Reserved
XG_BIAS_LOW
XG_BIAS_HIGH
YG_BIAS_LOW
YG_BIAS_HIGH
ZG_BIAS_LOW
ZG_BIAS_HIGH
XA_BIAS_LOW
XA_BIAS_HIGH
YA_BIAS_LOW
YA_BIAS_HIGH
ZA_BIAS_LOW
ZA_BIAS_HIGH
Reserved
FILT_CTRL
Reserved
MSC_CTRL
UP_SCALE
R/W
N/A
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
N/A
R
R
R
R
R
R
R
R
R
R
R
R
R
N/A
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
R/W
N/A
R/W
R/W
Flash Backup
N/A
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
N/A
No
No
No
No
No
No
No
No
No
No
No
No
No
N/A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
N/A
Yes
N/A
Yes
Yes
Address
0x00, 0x01
0x02, 0x03
0x04, 0x05
0x06, 0x07
0x08, 0x09
0x0A, 0x0B
0x0C, 0x0D
0x0E, 0x0F
0x10, 0x11
0x12, 0x13
0x14, 0x15
0x16, 0x17
0x18, 0x19
0x1A, 0x1B
0x1C, 0x1D
0x1E, 0x1F
0x20, 0x21
0x22, 0x23
0x24, 0x25
0x26, 0x27
0x28, 0x29
0x2A, 0x2B
0x2C, 0x2D
0x2E, 0x2F
0x30, 0x31
0x32, 0x33
0x34, 0x35
0x36, 0x37
0x38, 0x39
0x3A, 0x3B
0x3C to 0x3F
0x40, 0x41
0x42, 0x43
0x44, 0x45
0x46, 0x47
0x48, 0x49
0x4A, 0x4B
0x4C, 0x4D
0x4E, 0x4F
0x50, 0x51
0x52, 0x53
0x54, 0x55
0x56, 0x57
0x58 to 0x5B
0x5C, 0x5D
0x5E, 0x5F
0x60, 0x61
0x62, 0x63
Default
N/A
0x0000
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
N/A
0x0000
N/A
0x00C1
0x07D0
DEC_RATE
R/W
Yes
0x64, 0x65
0x0000
Rev. C | Page 16 of 36
Register Description
Reserved
Output, system error flags
Output, x-axis gyroscope, low word
Output, x-axis gyroscope, high word
Output, y-axis gyroscope, low word
Output, y-axis gyroscope, high word
Output, z-axis gyroscope, low word
Output, z-axis gyroscope, high word
Output, x-axis accelerometer, low word
Output, x-axis accelerometer, high word
Output, y-axis accelerometer, low word
Output, y-axis accelerometer, high word
Output, z-axis accelerometer, low word
Output, z-axis accelerometer, high word
Output, temperature
Output, time stamp
Reserved
New data counter
Output, x-axis delta angle, low word
Output, x-axis delta angle, high word
Output, y-axis delta angle, low word
Output, y-axis delta angle, high word
Output, z-axis delta angle, low word
Output, z-axis delta angle, high word
Output, x-axis delta velocity, low word
Output, x-axis delta velocity, high word
Output, y-axis delta velocity, low word
Output, y-axis delta velocity, high word
Output, z-axis delta velocity, low word
Output, z-axis delta velocity, high word
Reserved
Calibration, offset, gyroscope, x-axis, low word
Calibration, offset, gyroscope, x-axis, high word
Calibration, offset, gyroscope, y-axis, low word
Calibration, offset, gyroscope, y-axis, high word
Calibration, offset, gyroscope, z-axis, low word
Calibration, offset, gyroscope, z-axis, high word
Calibration, offset, accelerometer, x-axis, low word
Calibration, offset, accelerometer, x-axis, high word
Calibration, offset, accelerometer, y-axis, low word
Calibration, offset, accelerometer, y-axis, high word
Calibration, offset, accelerometer, z-axis, low word
Calibration, offset, accelerometer, z-axis, high word
Reserved
Control, Bartlett window FIR filter
Reserved
Control, input/output and other miscellaneous options
Control, scale factor for input clock, pulse per second (PPS)
mode
Control, decimation filter (output data rate)
Data Sheet
Name
NULL_CNFG
GLOB_CMD
Reserved
FIRM_REV
FIRM_DM
FIRM_Y
PROD_ID
SERIAL_NUM
USER_SCR1
USER_SCR2
USER_SCR3
FLSHCNT_LOW
FLSHCNT_HIGH
ADIS16470
R/W
R/W
W
N/A
R
R
R
R
R
R/W
R/W
R/W
R
R
Flash Backup
Yes
No
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Address
0x66, 0x67
0x68, 0x69
0x6A to 0x6B
0x6C, 0x6D
0x6E, 0x6F
0x70, 0x71
0x72, 0x73
0x74, 0x75
0x76, 0x77
0x78, 0x79
0x7A, 0x7B
0x7C, 0x7D
0x7E, 0x7E
Default
0x070A
N/A
N/A
N/A
N/A
N/A
0x4056
N/A
N/A
N/A
N/A
N/A
N/A
Rev. C | Page 17 of 36
Register Description
Control, bias estimation period
Control, global commands
Reserved
Identification, firmware revision
Identification, date code, day and month
Identification, date code, year
Identification, part number
Identification, serial number
User Scratch Register 1
User Scratch Register 2
User Scratch Register 3
Output, flash memory write cycle counter, lower word
Output, flash memory write cycle counter, upper word
ADIS16470
Data Sheet
USER REGISTER DEFINTIONS
Status/Error Flag Indicators (DIAG_STAT)
GYROSCOPE DATA
Table 9. DIAG_STAT Register Definition
The gyroscopes in the ADIS16470 measure the angular rate of
rotation around three orthogonal axes (x, y, and z). Figure 32
illustrates the orientation of each gyroscope axis, along with the
direction of rotation that produces a positive response in each
of their measurements.
Access
R
Flash Backup
No
Table 10. DIAG_STAT Bit Assignments
Bits
[15:8]
7
6
5
4
3
2
1
0
Description
Reserved.
Clock error. A 1 indicates that the internal data sampling
clock (fSM, see Figure 15 and Figure 16) does not
synchronize with the external clock, which only applies
when using scale sync mode (Register MSC_CTRL,
Bits[4:2] = 010, see Table 101). When this occurs, adjust
the frequency of the clock signal on the SYNC pin to
operate within the appropriate range.
Memory failure. A 1 indicates a failure in the flash memory
test (Register GLOB_CMD, Bit 4, see Table 109), which
involves a comparison between a cyclic redundancy
check (CRC) computation of the present flash memory
and a CRC computation from the same memory
locations at the time of initial programming (during
production process). If this occurs, repeat the same test.
If this error persists, replace the ADIS16470 device.
Sensor failure. A 1 indicates failure of at least one sensor,
at the conclusion of the self test (Register GLOB_CMD,
Bit 2, see Table 109). If this occurs, repeat the same test.
If this error persists, replace the ADIS16470. Motion, during
the execution of this test, can cause a false failure.
Standby mode. A 1 indicates that the voltage across
VDD and GND is
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