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ADIS16477-2BMLZ

ADIS16477-2BMLZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    Modular

  • 描述:

    ADIS16477-2BMLZ

  • 数据手册
  • 价格&库存
ADIS16477-2BMLZ 数据手册
Data Sheet ADIS16477 Precision, Miniature MEMs IMU FEATURES ► ► ► ► ► ► ► ► ► GENERAL DESCRIPTION Triaxial, digital gyroscope ► ±125°/sec, ±500°/sec, ±2000°/sec range models ► 2°/hr in-run bias stability (ADIS16477-1) ► 0.15°/√hr angle random walk (ADIS16477-1 and ADIS16477-2) ► ±0.1° axis-to-axis misalignment error Triaxial, digital accelerometer, ±40 g ► 13 μg in-run bias stability Triaxial, delta angle and delta velocity outputs Factory calibrated sensitivity, bias, and axial alignment ► Calibration temperature range: −40°C to +85°C SPI compatible data communications Programmable operation and control ► Automatic and manual bias correction controls ► Data ready indicator for synchronous data acquisition ► External sync modes: direct, pulse, scaled, and output ► On demand self test of inertial sensors ► On demand self test of flash memory Single-supply operation (VDD): 3.0 V to 3.6 V 2000 g mechanical shock survivability Operating temperature range: −40°C to +105°C The ADIS16477 is a precision, miniature MEMS inertial measurement unit (IMU) that includes a triaxial gyroscope and a triaxial accelerometer. Each inertial sensor in the ADIS16477 combines with signal conditioning that optimizes dynamic performance. The factory calibration characterizes each sensor for sensitivity, bias, alignment, linear acceleration (gyroscope bias), and point of percussion (accelerometer location). As a result, each sensor has dynamic compensation formulas that provide accurate sensor measurements over a broad set of conditions. The ADIS16477 provides a simple, cost effective method for integrating accurate, multiaxis inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. All necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. Tight orthogonal alignment simplifies inertial frame alignment in navigation systems. The serial peripheral interface (SPI) and register structure provide a simple interface for data collection and configuration control. The ADIS16477 is available in a 44-ball, ball grid array (BGA) package that is approximately 11 mm × 15 mm × 11 mm. APPLICATIONS ► ► ► ► ► ► Navigation, stabilization, and instrumentation Unmanned and autonomous vehicles Smart agriculture/construction machinery Factory/industrial automation, robotics Virtual/augmented reality Internet of Moving Things FUNCTIONAL BLOCK DIAGRAM Figure 1. Rev. E DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Data Sheet ADIS16477 TABLE OF CONTENTS Features................................................................ 1 Applications........................................................... 1 General Description...............................................1 Functional Block Diagram......................................1 Specifications........................................................ 4 Timing Specifications......................................... 6 Absolute Maximum Ratings...................................8 Thermal Resistance........................................... 8 ESD Caution.......................................................8 Pin Configuration and Function Descriptions........ 9 Typical Performance Characteristics................... 11 Theory of Operation.............................................13 Introduction.......................................................13 Inertial Sensor Signal Chain.............................13 Register Structure............................................ 14 Serial Peripheral Interface (SPI).......................14 Data Ready (DR)..............................................15 Reading Sensor Data....................................... 16 Device Configuration........................................ 17 User Register Memory Map.................................19 User Register Definitions.....................................21 Status/Error Flag Indicators (DIAG_STAT).......21 Gyroscope Data...................................................22 Gyroscope Measurement Range/Scale Factor............................................................. 22 Gyroscope Data Formatting............................. 22 X-Axis Gyroscope (X_GYRO_LOW and X_GYRO_OUT)..............................................22 Y-Axis Gyroscope (Y_GYRO_LOW and Y_GYRO_OUT)..............................................22 Z-Axis Gyroscope (Z_GYRO_LOW and Z_GYRO_OUT)..............................................23 Acceleration Data............................................. 23 Accelerometer Data Formatting....................... 23 X-Axis Accelerometer (X_ACCL_LOW and X_ACCL_OUT)...............................................23 Y-Axis Accelerometer (Y_ACCL_LOW and Y_ACCL_OUT)...............................................23 Z-Axis Accelerometer (Z_ACCL_LOW and Z_ACCL_OUT)...............................................24 Internal Temperature (TEMP_OUT)................. 24 Time Stamp (TIME_STAMP)............................ 24 Data Update Counter (DATA_CNTR)...............24 Delta Angles........................................................ 25 Delta Angle Measurement Range.................... 25 X-Axis Delta Angle (X_DELTANG_LOW and X_DELTANG_OUT)........................................25 Y-Axis Delta Angle (Y_DELTANG_LOW and Y_DELTANG_OUT)........................................25 analog.com Z-Axis Delta Angle (Z_DELTANG_LOW and Z_DELTANG_OUT)........................................ 25 Delta Angle Resolution.....................................26 Delta Velocity.......................................................27 X-Axis Delta Velocity (X_DELTVEL_LOW and X_DELTVEL_OUT)................................. 27 Y-Axis Delta Velocity (Y_DELTVEL_LOW and Y_DELTVEL_OUT)................................. 27 Z-Axis Delta Velocity (Z_DELTVEL_LOW and Z_DELTVEL_OUT)..................................27 Delta Velocity Resolution..................................28 Calibration........................................................... 29 Calibration, Gyroscope Bias (XG_BIAS_LOW and XG_BIAS_HIGH)......... 29 Calibration, Gyroscope Bias (YG_BIAS_LOW and YG_BIAS_HIGH)......... 29 Calibration, Gyroscope Bias (ZG_BIAS_LOW and ZG_BIAS_HIGH)......... 29 Calibration, Accelerometer Bias (XA_BIAS_LOW and XA_BIAS_HIGH)..........29 Calibration, Accelerometer Bias (YA_BIAS_LOW and YA_BIAS_HIGH).......... 30 Calibration, Accelerometer Bias (ZA_BIAS_LOW and ZA_BIAS_HIGH).......... 30 Filter Control Register (FILT_CTRL)................ 30 Range Identifier (RANG_MDL).........................31 Miscellaneous Control Register (MSC_CTRL)..................................................31 Point of Percussion ......................................... 31 Linear Acceleration Effect on Gyroscope Bias................................................................ 31 Internal Clock Mode......................................... 32 Output Sync Mode............................................32 Direct Sync Mode............................................. 32 Pulse Sync Mode............................................. 32 Scaled Sync Mode........................................... 32 Decimation Filter (DEC_RATE)........................ 32 Data Update Rate in External Sync Modes......33 Continuous Bias Estimation (NULL_CNFG).....33 Global Commands (GLOB_CMD).................... 33 Software Reset.................................................33 Flash Memory Test .......................................... 33 Flash Memory Update ..................................... 33 Sensor Self Test .............................................. 33 Factory Calibration Restore .............................34 Bias Correction Update.................................... 34 Firmware Revision (FIRM_REV)...................... 34 Firmware Revision Day and Month (FIRM_DM).....................................................34 Rev. E | 2 of 41 Data Sheet ADIS16477 TABLE OF CONTENTS Firmware Revision Year (FIRM_Y)...................34 Product Identification (PROD_ID).................... 34 Serial Number (SERIAL_NUM)........................ 34 Scratch Registers (USER_SCR_1 to USER_SCR_3)...............................................34 Flash Memory Endurance Counter (FLSHCNT_LOW and FLSHCNT_HIGH).......35 Applications Information...................................... 36 Assembly and Handling Tips............................36 Power Supply Considerations.......................... 36 Serial Port Operation........................................37 Digital Resolution of Gyroscopes and Accelerometers.............................................. 37 Evaluation Tools............................................... 38 Tray Drawing....................................................... 40 Outline Dimensions............................................. 41 Ordering Guide.................................................41 Evaluation Boards............................................ 41 REVISION HISTORY 7/2022—Rev. D to Rev. E Changes to Serial Peripheral Interface (SPI) Section, Table 6, and Table 7..................................................14 Changes to Burst Read Function Section......................................................................................................16 Added 16-Bit Burst Mode with BURST_SEL = 0 Section.............................................................................. 16 Added 16-Bit Burst Mode with BURST_SEL = 1 Section.............................................................................. 16 Added 32-Bit Burst Mode with BURST_SEL = 0 Section.............................................................................. 17 Added 32-Bit Burst Mode with BURST_SEL = 1 Section.............................................................................. 17 Changes to Table 105.................................................................................................................................... 31 Changes to Assembly Tips Section............................................................................................................... 36 Changes to Gyroscope Data Width (Digital Resolution) Section................................................................... 37 Changes to PC-Based Evaluation, EVAL-ADIS-FX3 Section........................................................................ 39 Changes to Evaluation Boards...................................................................................................................... 41 analog.com Rev. E | 3 of 41 Data Sheet ADIS16477 SPECIFICATIONS Case temperature (TC) = 25°C, VDD = 3.3 V, angular rate = 0°/sec, dynamic range = ±2000°/sec ± 1 g, unless otherwise noted. Table 1. Parameter GYROSCOPES Dynamic Range Sensitivity Error over Temperature Repeatability1 Misalignment Error Nonlinearity2 Bias Repeatability1 In-Run Bias Stability Angular Random Walk Error over Temperature Linear Acceleration Effect Vibration Rectified Error (VRE) Output Noise Rate Noise Density 3 dB Bandwidth Sensor Resonant Frequency ACCELEROMETERS3 Dynamic Range Sensitivity Error over temperature Repeatability1 Misalignment Error Nonlinearity Bias Repeatability1 In-Run Bias Stability analog.com Test Conditions/Comments Min ADIS16477-1 ADIS16477-2 ADIS16477-3 ADIS16477-1, 16-bit ADIS16477-2, 16-bit ADIS16477-3, 16-bit ADIS16477-1, 32-bit ADIS16477-2, 32-bit ADIS16477-3, 32-bit −40°C ≤ TC ≤ +85°C, 1 σ −40°C ≤ TC ≤ +85°C, 1 σ Axis to axis, −40°C ≤ TC ≤ +85°C, 1 σ ADIS16477-1, full scale (FS) = 125°/sec ADIS16477-2, FS = 500°/sec ADIS16477-3, FS = 2000°/sec ±125 ±500 ±2000 Typ Max Unit 160 40 10 10,485,760 2,621,440 655,360 ±0.3 ±0.3 ±0.1 0.2 0.2 0.25 °/sec °/sec °/sec LSB/°/sec LSB/°/sec LSB/°/sec LSB/°/sec LSB/°/sec LSB/°/sec % % Degrees % FS % FS % FS 0.7 2 2.5 7 0.15 0.15 0.3 ±0.2 0.01 0.0005 0.07 0.08 0.17 0.003 0.003 0.007 550 66 °/sec °/hr °/hr °/hr °/√hr °/√hr °/√hr °/sec °/sec/g °/sec/g2 °/sec rms °/sec rms °/sec rms °/sec/√Hz rms °/sec/√Hz rms °/sec/√Hz rms Hz kHz 32-bit data format −40°C ≤ TC ≤ +85°C, 1 σ −40°C ≤ TC ≤ +85°C, 1 σ Axis to axis, −40°C ≤ TC ≤ +85°C, 1 σ Best fit straight line, ±10 g Best fit straight line, ±20 g Best fit straight line, ±40 g 52,428,800 ±0.1 ±0.1 ±0.05 0.02 0.4 1.5 g LSB/g % % Degrees % FS % FS % FS −40°C ≤ TC ≤ +85°C, 1 σ 1σ 6 13 mg μg −40°C ≤ TC ≤ +85°C, 1 σ ADIS16477-1, 1 σ ADIS16477-2, 1 σ ADIS16477-3, 1 σ ADIS16477-1, 1 σ ADIS16477-2, 1 σ ADIS16477-3, 1 σ −40°C ≤ TC ≤ +85°C, 1 σ Any direction, 1 σ Random vibration, 2 grms, 50 Hz to 2 kHz ADIS16477-1, 1 σ, no filtering ADIS16477-2, 1 σ, no filtering ADIS16477-3, 1 σ, no filtering ADIS16477-1, f = 10 Hz to 40 Hz ADIS16477-2, f = 10 Hz to 40 Hz ADIS16477-3, f = 10 Hz to 40 Hz Each axis ±40 Rev. E | 4 of 41 Data Sheet ADIS16477 SPECIFICATIONS Table 1. Parameter Velocity Random Walk Error over Temperature Output Noise Noise Density 3 dB Bandwidth Sensor Resonant Frequency TEMPERATURE SENSOR Scale Factor LOGIC INPUTS4 Input Voltage High, VIH Low, VIL RST Pulse Width Input Current Logic 1, IIH Logic 0, IIL All Pins Except RST RST Pin Input Capacitance, CIN DIGITAL OUTPUTS Output Voltage High, VOH Low, VOL FLASH MEMORY Data Retention6 FUNCTIONAL TIMES7 Power-On Start-Up Time Reset Recovery Time8 Factory Calibration Restore Flash Memory Backup Flash Memory Test Time Self Test Time9 CONVERSION RATE Initial Clock Accuracy Sync Input Clock POWER SUPPLY, VDD Power Supply Current10 1 Test Conditions/Comments Min 1σ −40°C ≤ TC ≤ +85°C, 1 σ No filtering f = 10 Hz to 40 Hz, no filtering Typ Max Unit Y-axis and z-axis X-axis 0.037 ±3 2.3 100 600 5.65 5.25 m/sec/√hr mg mg rms μg/√Hz rms Hz kHz kHz Output = 0x0000 at 0°C (±5°C) 0.1 °C/LSB 2.0 0.8 V V µs 10 µA 10 µA mA pF 1 VIH = 3.3 V VIL = 0 V 0.33 10 ISOURCE = 0.5 mA ISINK = 2.0 mA Endurance5 TJ = 85°C Time until data is available 2.4 0.4 10000 20 252 193 142 72 32 14 2000 3 GLOB_CMD, Bit 7 = 1 (see Table 113) GLOB_CMD, Bit 1 = 1 (see Table 113) GLOB_CMD, Bit 3 = 1 (see Table 113) GLOB_CMD, Bit 4 = 1 (see Table 113) GLOB_CMD, Bit 2 = 1 (see Table 113) Operating voltage range Normal mode, VDD = 3.3 V 1.9 3.0 44 2.1 3.6 55 V V Cycles Years ms ms ms ms ms ms SPS % kHz V mA Bias repeatability provides an estimate for long-term drift in the bias, as observed during 500 hours of high temperature operating life (HTOL) at 105°C. 2 This measurement is based on the deviation from a best fit linear model. 3 All specifications associated with the accelerometers relate to the full-scale range of ±8 g, unless otherwise noted. 4 The digital input/output signals use a 3.3 V system. 5 Endurance is qualified as per JEDEC Standard 22, Method A117, measured at −40°C, +25°C, +85°C, and +125°C. 6 The data retention specification assumes a junction temperature (TJ) of 85°C per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ. 7 These times do not include thermal settling and internal filter response times, which may affect overall accuracy. 8 The RST line must be in a low state for at least 10 μs to ensure a proper reset initiation and recovery. 9 The self test time can extend when using external clock rates lower than 2000 Hz. analog.com Rev. E | 5 of 41 Data Sheet ADIS16477 SPECIFICATIONS Table 1. Parameter 10 Test Conditions/Comments Min Typ Max Unit Power supply current transients can reach 100 mA during initial startup or reset recovery. TIMING SPECIFICATIONS TA = 25°C, VDD = 3.3 V, unless otherwise noted. Table 2. Normal Mode Parameter Description Min fSCLK tSTALL tREADRATE tCS tDAV tDSU tDHD tSCLKR, tSCLKF tDR, tDF tSFS t1 Serial clock Stall period between data Read rate Chip select to SCLK edge DOUT valid after SCLK edge DIN setup time before SCLK rising edge DIN hold time after SCLK rising edge SCLK rise/fall times DOUT rise/fall times CS high after SCLK edge Input sync positive pulse width; pulse sync mode, MSC_CTRL = 101 (binary, see Table 105) Input sync to data ready valid transition Direct sync mode, MSC_CTRL = 001 (binary, see Table 105) Pulse sync mode, MSC_CTRL = 101 (binary, see Table 105) Data invalid time Input sync period2 0.1 16 24 200 tSTDR tNV t2 Typ Burst Read Mode Max Min1 2 0.1 N/A Typ 25 50 0 5 N/A means not applicable. This specification is rounded up from the cycle time that comes from the maximum input clock frequency (2100 Hz). MHz µs µs ns ns ns ns ns ns ns µs 25 12.5 12.5 5 5 0 5 256 256 20 2 1 25 50 5 5 1 Unit 200 25 477 Max 256 256 20 477 12.5 12.5 µs µs µs µs Timing Diagrams Figure 2. SPI Timing and Sequence Diagram analog.com Rev. E | 6 of 41 Data Sheet ADIS16477 SPECIFICATIONS Figure 3. Stall Time and Data Rate Timing Diagram Figure 4. Input Clock Timing Diagram, Pulse Sync Mode, Register MSC_CTRL, Bits[4:2] = 101 (Binary) Figure 5. Input Clock Timing Diagram, Direct Sync Mode, Register MSC_CTRL, Bits[4:2] = 001 (Binary) analog.com Rev. E | 7 of 41 Data Sheet ADIS16477 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Rating Mechanical Shock Survivability Any Axis, Unpowered Any Axis, Powered VDD to GND Digital Input Voltage to GND Digital Output Voltage to GND Calibration Temperature Range Operating Temperature Range Storage Temperature Range1 Barometric Pressure 2000 g 2000 g −0.3 V to +3.6 V −0.3 V to VDD + 0.2 V −0.3 V to VDD + 0.2 V −40°C to +85°C −40°C to +105°C −65°C to +150°C 2 bar 1 Extended exposure to temperatures that are lower than −40°C or higher than +105°C may adversely affect the accuracy of the factory calibration. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. The ADIS16477 is a multichip module that includes many active components. The values in Table 4 identify the thermal response of the hottest component inside of the ADIS16477, with respect to the overall power dissipation of the module. This approach enables a simple method for predicting the temperature of the hottest junction, based on either ambient or case temperature. For example, when the ambient temperature is 70°C, the hottest junction temperature (TJ) inside of the ADIS16477 is 76.7°C. TJ = θJA × VDD × IDD + 70°C TJ = 158.2°C/W × 3.3 V × 0.044 A + 70°C TJ = 93°C Table 4. Package Characteristics Package Type θJA1 θJC2 Device Weight ML-44-13 158.2°C/W 106.1°C/W 1.3 g 1 θJA is the natural convection junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. 2 θJC is the junction to case thermal resistance. 3 Thermal impedance values come from direct observation of the hottest temperature inside of the ADIS16477, when it is attached to an FR4-08 PCB that has two metal layers and has a thickness of 0.063 inches. ESD CAUTION ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. analog.com Rev. E | 8 of 41 Data Sheet ADIS16477 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 7. Pin Assignments, Package Level View Figure 6. Pin Assignments, Bottom View Table 5. Pin Function Descriptions Pin No. Mnemonic Type Description A1 A2 A3 A4 A5 A6 A7 A8 B3 B4 B5 B6 C2 C3 C6 C7 D3 D6 E2 E3 E6 E7 F1 F3 F6 F8 G2 G3 G6 G7 H1 H3 H6 H8 J2 J3 J4 J5 GND GND GND GND GND GND GND GND GND GND GND GND GND DNC GND VDD GND VDD GND VDD GND GND GND RST GND GND GND CS DIN GND VDD DOUT SCLK GND GND SYNC VDD VDD Supply Supply Supply Supply Supply Supply Supply Supply Supply Supply Supply Supply Supply Not applicable Supply Supply Supply Supply Supply Supply Supply Supply Supply Input Supply Supply Supply Input Input Supply Supply Output Input Supply Supply Input Supply Supply Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Do Not Connect Power Ground Power Supply Power Ground Power Supply Power Ground Power Supply Power Ground Power Ground Power Ground Reset Power Ground Power Ground Power Ground SPI, Chip Select SPI, Data Input Power Supply Power Supply SPI, Data Output SPI, Serial Clock Power Ground Power Ground Sync (External Clock) Power Supply Power Supply analog.com Rev. E | 9 of 41 Data Sheet ADIS16477 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Type Description J6 J7 K1 K3 K6 K8 DR GND GND GND VDD GND Output Supply Supply Supply Supply Supply Data Ready Power Ground Power Ground Power Ground Power Supply Power Ground analog.com Rev. E | 10 of 41 Data Sheet ADIS16477 TYPICAL PERFORMANCE CHARACTERISTICS Figure 8. Gyroscope Allan Deviation, TC = 25°C, ADIS16477-1 Figure 11. Accelerometer Allan Deviation, TC = 25°C Figure 9. Gyroscope Allan Deviation, TC = 25°C, ADIS16477-2 Figure 12. ADIS16477-1 Gyroscope Sensitivity Error vs. Ambient Temperature Figure 10. Gyroscope Allan Deviation, TC = 25°C, ADIS16477-3 Figure 13. ADIS16477-2 Gyroscope Sensitivity Error vs. Ambient Temperature analog.com Rev. E | 11 of 41 Data Sheet ADIS16477 TYPICAL PERFORMANCE CHARACTERISTICS Figure 14. ADIS16477-3 Gyroscope Sensitivity Error vs. Ambient Temperature Figure 17. ADIS16477-3 Gyroscope Bias Error vs. Ambient Temperature Figure 15. ADIS16477-1 Gyroscope Bias Error vs. Ambient Temperature Figure 16. ADIS16477-2 Gyroscope Bias Error vs. Ambient Temperature analog.com Rev. E | 12 of 41 Data Sheet ADIS16477 THEORY OF OPERATION INTRODUCTION Inertial Sensor Calibration When using the factory default configuration for all user configurable control registers, the ADIS16477 initializes itself and automatically starts a continuous process of sampling, processing, and loading calibrated sensor data into its output registers at a rate of 2000 SPS. The inertial sensor calibration function for the gyroscopes and the accelerometers has two components: factory calibration and user calibration (see Figure 21). INERTIAL SENSOR SIGNAL CHAIN Figure 18 provides the basic signal chain for the inertial sensors in the ADIS16477. This signal chain produces an update rate of 2000 SPS in the output data registers when it operates in internal clock mode (default, see Register MSC_CTRL, Bits[4:2] in Table 105). Figure 18. Signal Processing Diagram, Inertial Sensors Gyroscope Data Sampling The three gyroscopes produce angular rate measurements around three orthogonal axes (x, y, and z). Figure 19 shows the data sampling plan for each gyroscope when the ADIS16477 operates in internal clock mode (default, see Register MSC_CTRL, Bits[4:2] in Table 105). Each gyroscope has an analog-to-digital converter (ADC) and sample clock (fSG) that drives data sampling at a rate of 4100 Hz (±5%). The internal processor reads and processes this data from each gyroscope at a rate of 2000 Hz (fSM). Figure 19. Gyroscope Data Sampling Accelerometer Data Sampling The three accelerometers produce linear acceleration measurements along the same orthogonal axes (x, y, and z) as the gyroscopes. Figure 20 shows the data sampling plan for each accelerometer when the ADIS16477 operates in internal clock mode (default, see Register MSC_CTRL, Bits[4:2] in Table 105). Figure 20. Accelerometer Data Sampling External Clock Options The ADIS16477 provides three different modes of operation that support the device using an external clock to control the internal processing rate (fSM in Figure 19 and Figure 20) through the SYNC pin. The MSC_CTRL register (see Table 105) provides the configuration options for these external clock modes in Bits[4:2]. analog.com Figure 21. Inertial Sensor Calibration Processing The factory calibration of the gyroscope applies the following correction formulas to the data of each gyroscope: ωXC m11  m12  m13 ωYC = m21 m22 m23 × ωZC m31 m32 m33 l11  l12  l13 aXC l21 l22 l23 × aYC l31 l32 l33 ωX bX ωY + bY ωZ bZ + aZC where: ωXC, ωYC, and ωZC are the gyroscope outputs (post calibration). m11, m12, m13, m21, m22, m23, m31, m32, and m33 provide scale and alignment correction. ωX, ωY, and ωZ are the gyroscope outputs (precalibration). bX, bY, and bZ provide bias correction. l11, l12, l13, l21, l22, l23, l31, l32, and l33 provide linear g correction. aXC, aYC, and aZC are the accelerometer outputs (post calibration). All of the correction factors in this relationship come from direct observation of the response of each gyroscope at multiple temperatures over the calibration temperature range (−40°C ≤ TC ≤ +85°C). These correction factors are stored in the flash memory bank, but they are not available for observation or configuration. Register MSC_CTRL, Bit 7 (see Table 105) provides the only user configuration option for the factory calibration of the gyroscopes: an on/off control for the linear g compensation. See Figure 44 for more details on the user calibration options available for the gyroscopes. The factory calibration of the accelerometer applies the following correction formulas to the data of each accelerometer: aXC m11  m12  m13 aYC = m21 m22 m23 × aZC m31 m32 m33 aX bX aY + bY aZ ω2XC 0   p12  p13 2 p21 0 p23 × ωYC 2 p31 p32 0 ωZC bZ + where: aXC, aYC, and aZC are the accelerometer outputs (post calibration). Rev. E | 13 of 41 Data Sheet ADIS16477 THEORY OF OPERATION m11, m12, m13, m21, m22, m23, m31, m32, and m33 provide scale and alignment correction. aX, aY, and aZ are the accelerometer outputs (precalibration). bX, bY, and bZ provide bias correction. p12, p13, p21, p23, p31 and p32 provide a point of percussion alignment correction (see Figure 47). ω2XC, ω2YC, and ω2ZC are the square of the gyroscope outputs (post calibration). All of the correction factors in this relationship come from direct observation of the response of each accelerometer at multiple temperatures, over the calibration temperature range (−40°C ≤ TC ≤ +85°C). These correction factors are stored in the flash memory bank, but they are not available for observation or configuration. MSC_CTRL, Bit 6 (see Table 105) provides the only user configuration option for the factory calibration of the accelerometers: an on/off control for the point of percussion, alignment function. See Figure 45 for more details on the user calibration options available for the accelerometers. Figure 24. Basic Operation of the ADIS16477 SERIAL PERIPHERAL INTERFACE (SPI) The SPI provides access to the user registers (see Table 8). Figure 25 shows the most common connections between the ADIS16477 and a SPI host device which is often an embedded processor that has a SPI-compatible interface. In this example, the SPI host uses an interrupt service routine to collect data every time the data ready (DR) signal pulses. Additional information on the ADIS16477 SPI can be found in the Serial Port Operation section of this data sheet. Bartlett Window FIR Filter The Bartlett window finite impulse response (FIR) filter (see Figure 22) contains two averaging filter stages, in a cascade configuration. The FILT_CTRL register (see Table 101) provides the configuration controls for this filter. Figure 25. Electrical Connection Diagram Figure 22. Bartlett Window FIR Filter Signal Path Averaging/Decimating Filter The second digital filter averages multiple samples together to produce each register update. In this type of filter structure, the number of samples in the average is equal to the reduction in the update rate for the output data registers. The DEC_RATE register (see Table 109) provides the configuration controls for this filter. Figure 23. Averaging/Decimating Filter Diagram REGISTER STRUCTURE All communication between the ADIS16477 and an external processor involves either reading the contents of an output register or writing configuration/command information to a control register. The output data registers include the latest sensor data, error flags, and identification information. The control registers include sample rate, filtering, calibration, and diagnostic options. Each user accessible register has two bytes (upper and lower), each of which has its own unique address. See Table 8 for a detailed list of all user registers, along with their addresses. analog.com Table 6. Generic SPI Host Pin Names and Functions Mnemonic Function SS SCLK MOSI MISO IRQ Peripheral select Serial clock Host output, peripheral input Host input, peripheral output Interrupt request Embedded processors typically use control registers to configure their serial ports for communicating with SPI peripheral devices such as the ADIS16477. Table 7 provides a list of settings that describe the SPI protocol of the ADIS16477. The initialization routine of the host processor typically establishes these settings using firmware commands to write them into the control registers. Table 7. Generic Host Processor SPI Settings Processor Setting Description Host Maximum SCLK Frequency1 SPI Mode 3 MSB First Mode 16-Bit Mode ADIS16477 operates as peripheral Maximum serial clock rate 1 CPOL = 1 (polarity), CPHA = 1 (phase) Bit sequence, see Figure 30 for coding Shift register and data length See Table 2 for the maximum SCLK frequency. Rev. E | 14 of 41 Data Sheet ADIS16477 THEORY OF OPERATION DATA READY (DR) The factory default configuration provides users with a DR signal on the DR pin (see Table 5), which pulses when the output data registers are updating. Connect the DR pin to a pin on the embedded processor, which triggers data collection, on the second edge of this pulse. The MSC_CTRL register, Bit 0 (see Table 105), controls the polarity of this signal. In Figure 26, Register MSC_CTRL, Bit 0 = 1, which means that data collection must start on the rising edges of the DR pulses. Figure 28. Data Ready Response During Reset (Register GLOB_CMD, Bit 7 = 1) Recovery Figure 26. Data Ready When Register MSC_CTRL, Bit 0 = 1 (Default) During the start-up and reset recovery processes, the DR signal may exhibit some transient behavior before data production begins. Figure 27 shows an example of the DR behavior during startup, and Figure 28 and Figure 29 provide examples of the DR behavior during recovery from reset commands. Figure 29. Data Ready Response During Reset (RST = 0) Recovery Figure 27. Data Ready Response During Startup Figure 30. SPI Communication Bit Sequence Figure 31. Burst Read Sequence Figure 32. SPI Signal Pattern Showing a Read of the PROD_ID Register analog.com Rev. E | 15 of 41 Data Sheet ADIS16477 THEORY OF OPERATION READING SENSOR DATA Reading a single register requires two 16-bit cycles on the SPI: one to request the contents of a register and another to receive those contents. The 16-bit command code (see Figure 30) for a read request on the SPI has three parts: the read bit (R/W = 0), either address of the register, [A6:A0], and eight don’t care bits, [DC7:DC0]. Figure 33 shows an example that includes two register reads in succession. This example starts with DIN = 0x0C00, to request the contents of the Z_GYRO_LOW register, and follows with 0x0E00, to request the contents of the Z_GYRO_OUT register. The sequence in Figure 33 also shows full duplex mode of operation, which means that the ADIS16477 can receive requests on DIN while also transmitting data out on DOUT within the same 16-bit SPI cycle. Figure 33. SPI Read Example Figure 32 provides an example of the four SPI signals when reading the PROD_ID register (see Table 121) in a repeating pattern. This pattern can be helpful when troubleshooting the SPI interface setup and communications because the signals are the same for each 16-bit sequence, except during the first cycle. Burst Read Function The burst read function provides a way to read a batch of output data registers, using a continuous stream of bits, at a rate of up to 1 MHz (SCLK). This method does not require a stall time between each 16-bit segment (see Figure 3). As shown in Figure 31, start this mode by setting DIN = 0x6800, and then read each of the registers in the sequence out of DOUT while keeping CS low for the entire sequence. The sequence of registers (and checksum value) in the burst read response depends on which sample clock mode that the ADIS16477 is operating in Register MSC_CTRL, Bits[4:2] (see Table 105). In all clock modes, except when operating in scaled sync mode (Register MSC_CTRL, Bits[4:2] = 010), the burst read response ends with the DATA_CNTR, Bits[7:0] register contents, followed by the checksum value. Checksum value computations for the various burst modes are described in the following sections. Scaled sync mode (Register MSC_CTRL, Bits[4:2] = 010) uses an identical format to that described in the previous paragraph, except that the DATA_CNTR, Bits[7:0] register is replaced by the TIME_STAMP, Bits[7:0] register. In scaled sync mode, the TIME_STAMP, Bits[7:0] register always replaces the DATA_CNTR, Bits[7:0] register for all combinations of the BURST_SEL and BURST32 settings. Refer to the Miscellaneous Control Register (MSC_CTRL) section for more details. Note that the 32-bit burst modes and BURST_SEL function are only available in Firmware Version 1.34 and newer. Older firmware analog.com versions only have 16-bit burst transfer with BURST_SEL = 0. See the FIRM_REV, Bits[7:0] for the firmware revision. 16-Bit Burst Mode with BURST_SEL = 0 In 16-bit burst mode with BURST_SEL = 0, a burst contains calibrated gyroscope and accelerometer data in 16-bit format. This mode is particularly appropriate for cases where there is no decimation nor filtering. Not only is the sample rate high (~2 kSPS), the lower 16 bits are not used unless the user is averaging or filtering. Note that when using this mode, the linear g compensation must be disabled because the linear g compensation relies on 32-bit data to perform optimally. The sequence of registers (and checksum value) in the burst read includes the following registers and value: DIAG_STAT, X_GYRO_OUT, Y_GYRO_OUT, Z_GYRO_OUT, X_ACCL_ OUT, Y_ACCL_OUT, Z_ACCL_OUT, TEMP_OUT, DATA_ CNTR, and the checksum value. In these cases, use the following formula to verify the 16-bit checksum value, treating each byte in the formula as an independent, unsigned, 8-bit number: Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] + X_GYRO_OUT, Bits[15:8] + X_GYRO_OUT, Bits[7:0] + Y_GYRO_OUT, Bits[15:8] + Y_GYRO_OUT, Bits[7:0] + Z_GYRO_OUT, Bits[15:8] + Z_GYRO_OUT, Bits[7:0] + X_ACCL_OUT, Bits[15:8] + X_ACCL_OUT, Bits[7:0] + Y_ACCL_OUT, Bits[15:8] + Y_ACCL_OUT, Bits[7:0] + Z_ACCL_OUT, Bits[15:8] + Z_ACCL_OUT, Bits[7:0] + TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] + DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0] 16-Bit Burst Mode with BURST_SEL = 1 In 16-bit burst mode with BURST_SEL = 1, a burst contains calibrated delta angle and delta velocity data in 16-bit format. This mode is particularly appropriate for cases where there is no decimation nor filtering. Not only is the sample rate high (~2 kSPS), the lower 16 bits are not used. The sequence of registers (and checksum value) in the burst read includes the following registers and value: DIAG_STAT, X_DELTANG_OUT, Y_DELTANG_OUT, Z_DELTANG_OUT, X_DELTVEL_OUT, Y_DELTVEL_OUT, Z_DELTVEL_OUT, TEMP_OUT, DATA_ CNTR, and the checksum value. In these cases, use the following formula to verify the 16-bit checksum value, treating each byte in the formula as an independent, unsigned, 8-bit number: Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] + X_DELTANG_OUT, Bits[15:8] + X_DELTANG_OUT, Bits[7:0] + Y_DELTANG_OUT, Bits[15:8] + Y_DELTANG_OUT, Bits[7:0] + Z_DELTANG_OUT, Bits[15:8] + Z_DELTANG_OUT, Bits[7:0] + X_DELTVEL_OUT, Bits[15:8] + X_DELTVEL_OUT, Bits[7:0] + Y_DELTVEL_OUT, Bits[15:8] + Y_DELTVEL_OUT, Bits[7:0] + Z_DELTVEL_OUT, Bits[15:8] + Z_DELTVEL_OUT, Bits[7:0] + Rev. E | 16 of 41 Data Sheet ADIS16477 THEORY OF OPERATION TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] + DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0] 32-Bit Burst Mode with BURST_SEL = 0 In 32-bit burst mode with BURST_SEL = 0, a burst contains calibrated gyroscope and accelerometer data in 32-bit format. This mode is appropriate for cases where there is averaging (decimation) and/or low-pass filtering of the data. This mode is also the recommended burst mode if the application depends on optimal performance of the linear g compensation feature. The sequence of registers (and checksum value) in the burst read includes the following registers and value: DIAG_STAT, X_GYRO_LOW, X_GYRO_OUT, Y_GYRO_LOW, Y_GYRO_OUT, Z_GYRO_LOW, Z_GYRO_OUT, X_ACCL_LOW, X_ACCL_OUT, Y_ACCL_LOW, Y_ACCL_OUT, Z_ACCL_LOW, Z_ACCL_OUT, TEMP_OUT, DATA_ CNTR, and the checksum value. In these cases, use the following formula to verify the 16-bit checksum value, treating each byte in the formula as an independent, unsigned, 8-bit number: Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] + X_GYRO_LOW, Bits[15:8] + X_GYRO_LOW, Bits[7:0] + X_GYRO_OUT, Bits[15:8] + X_GYRO_OUT, Bits[7:0] + Y_GYRO_LOW, Bits[15:8] + Y_GYRO_LOW, Bits[7:0] + Y_GYRO_OUT, Bits[15:8] + Y_GYRO_OUT, Bits[7:0] + Z_GYRO_LOW, Bits[15:8] + Z_GYRO_LOW, Bits[7:0] + Z_GYRO_OUT, Bits[15:8] + Z_GYRO_OUT, Bits[7:0] + X_ACCL_LOW, Bits[15:8] + X_ACCL_LOW, Bits[7:0] + X_ACCL_OUT, Bits[15:8] + X_ACCL_OUT, Bits[7:0] + Y_ACCL_LOW, Bits[15:8] + Y_ACCL_LOW, Bits[7:0] + Y_ACCL_OUT, Bits[15:8] + Y_ACCL_OUT, Bits[7:0] + Z_ACCL_LOW, Bits[15:8] + Z_ACCL_LOW, Bits[7:0] + Z_ACCL_OUT, Bits[15:8] + Z_ACCL_OUT, Bits[7:0] + TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] + DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0] 32-Bit Burst Mode with BURST_SEL = 1 In 32-bit burst mode with BURST_SEL = 1, a burst contains calibrated delta angle and delta velocity data in 32-bit format. This mode is appropriate for cases where there is averaging (decimation) and/or low-pass filtering of the data. The sequence of registers (and checksum value) in the burst read includes the following registers and value: DIAG_STAT, X_DELTANG_LOW, X_DELTANG_OUT, Y_DELTANG_LOW, Y_DELTANG_OUT, Z_DELTANG_LOW, Z_DELTANG_OUT, X_DELTVEL_LOW, X_DELTVEL_OUT, Y_DELTVEL_LOW, Y_DELTVEL_OUT, Z_DELTVEL_LOW, Z_DELTVEL_OUT, TEMP_OUT, DATA_ CNTR, and the checksum value. In these cases, use the following formula to verify the 16-bit checksum value, treating each byte in the formula as an independent, unsigned, 8-bit number: Y_DELTANG_LOW, Bits[15:8] + Y_DELTANG_LOW, Bits[7:0] + Y_DELTANG_OUT, Bits[15:8] + Y_DELTANG_OUT, Bits[7:0] + Z_DELTANG_LOW, Bits[15:8] + Z_DELTANG_LOW, Bits[7:0] + Z_DELTANG_OUT, Bits[15:8] + Z_DELTANG_OUT, Bits[7:0] + X_DELTVEL_LOW, Bits[15:8] + X_DELTVEL_LOW, Bits[7:0] + X_DELTVEL_OUT, Bits[15:8] + X_DELTVEL_OUT, Bits[7:0] + Y_DELTVEL_LOW, Bits[15:8] + Y_DELTVEL_LOW, Bits[7:0] + Y_DELTVEL_OUT, Bits[15:8] + Y_DELTVEL_OUT, Bits[7:0] + Z_DELTVEL_LOW, Bits[15:8] + Z_DELTVEL_LOW, Bits[7:0] + Z_DELTVEL_OUT, Bits[15:8] + Z_DELTVEL_OUT, Bits[7:0] + TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] + DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0] DEVICE CONFIGURATION Each configuration register contains 16 bits (two bytes). Bits[7:0] contain the low byte, and Bits[15:8] contain the high byte of each register. Each byte has its own unique address in the user register map (see Table 8). Updating the contents of a register requires writing to both of its bytes in the following sequence: low byte first, high byte second. There are three parts to coding a SPI command (see Figure 30) that write a new byte of data to a register: the write bit (R/W = 1), the address of the byte, [A6:A0], and the new data for that location, [DC7:DC0]. Figure 34 shows a coding example for writing 0x0004 to the FILT_CTRL register (see Table 101). In Figure 34, the 0xDC04 command writes 0x04 to Address 0x5C (lower byte) and the 0xDD00 command writes 0x00 to Address 0x5D (upper byte). Figure 34. SPI Sequence for Writing 0x0004 to FILT_CTRL Memory Structure Figure 35 provides a functional diagram for the memory structure of the ADIS16477. The flash memory bank contains the operational code, unit specific calibration coefficients and user configuration settings. During initialization (power application or reset recover), this information loads from the flash memory into the static random access memory (SRAM), which supports all normal operation, including register access through the SPI port. Writing to a configuration register using the SPI updates the SRAM location of the register but does not automatically update its settings in the flash memory bank. The manual flash memory update command (Register GLOB_CMD, Bit 3, see Table 113) provides a convenient method for saving all of these settings to the flash memory bank at one time. A yes in the flash backup column of Table 8 identifies the registers that have storage support in the flash memory bank. Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] + X_DELTANG_LOW, Bits[15:8] + X_DELTANG_LOW, Bits[7:0] + X_DELTANG_OUT, Bits[15:8] + X_DELTANG_OUT, Bits[7:0] + analog.com Rev. E | 17 of 41 Data Sheet ADIS16477 THEORY OF OPERATION Figure 35. SRAM and Flash Memory Diagram analog.com Rev. E | 18 of 41 Data Sheet ADIS16477 USER REGISTER MEMORY MAP Table 8. User Register Memory Map (N/A Means Not Applicable) Name R/W Flash Backup Address Default Register Description Reserved DIAG_STAT X_GYRO_LOW X_GYRO_OUT Y_GYRO_LOW Y_GYRO_OUT Z_GYRO_LOW Z_GYRO_OUT X_ACCL_LOW X_ACCL_OUT Y_ACCL_LOW Y_ACCL_OUT Z_ACCL_LOW Z_ACCL_OUT TEMP_OUT TIME_STAMP Reserved DATA_CNTR X_DELTANG_LOW X_DELTANG_OUT Y_DELTANG_LOW Y_DELTANG_OUT Z_DELTANG_LOW Z_DELTANG_OUT X_DELTVEL_LOW X_DELTVEL_OUT Y_DELTVEL_LOW Y_DELTVEL_OUT Z_DELTVEL_LOW Z_DELTVEL_OUT Reserved XG_BIAS_LOW XG_BIAS_HIGH YG_BIAS_LOW YG_BIAS_HIGH ZG_BIAS_LOW ZG_BIAS_HIGH XA_BIAS_LOW XA_BIAS_HIGH YA_BIAS_LOW YA_BIAS_HIGH ZA_BIAS_LOW ZA_BIAS_HIGH Reserved FILT_CTRL RANG_MDL MSC_CTRL UP_SCALE DEC_RATE N/A R R R R R R R R R R R R R R R N/A R R R R R R R R R R R R R N/A R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W N/A R/W R R/W R/W R/W N/A No No No No No No No No No No No No No No No N/A No No No No No No No No No No No No No N/A Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes N/A Yes No Yes Yes Yes 0x00, 0x01 0x02, 0x03 0x04, 0x05 0x06, 0x07 0x08, 0x09 0x0A, 0x0B 0x0C, 0x0D 0x0E, 0x0F 0x10, 0x11 0x12, 0x13 0x14, 0x15 0x16, 0x17 0x18, 0x19 0x1A, 0x1B 0x1C, 0x1D 0x1E, 0x1F 0x20, 0x21 0x22, 0x23 0x24, 0x25 0x26, 0x27 0x28, 0x29 0x2A, 0x2B 0x2C, 0x2D 0x2E, 0x2F 0x30, 0x31 0x32, 0x33 0x34, 0x35 0x36, 0x37 0x38, 0x39 0x3A, 0x3B 0x3C to 0x3F 0x40, 0x41 0x42, 0x43 0x44, 0x45 0x46, 0x47 0x48, 0x49 0x4A, 0x4B 0x4C, 0x4D 0x4E, 0x4F 0x50, 0x51 0x52, 0x53 0x54, 0x55 0x56, 0x57 0x58 to 0x5B 0x5C, 0x5D 0x5E, 0x5F 0x60, 0x61 0x62, 0x63 0x64, 0x65 N/A 0x0000 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 N/A 0x0000 N/A1 0x00C1 0x07D0 0x0000 Reserved Output, system error flags Output, x-axis gyroscope, low word Output, x-axis gyroscope, high word Output, y-axis gyroscope, low word Output, y-axis gyroscope, high word Output, z-axis gyroscope, low word Output, z-axis gyroscope, high word Output, x-axis accelerometer, low word Output, x-axis accelerometer, high word Output, y-axis accelerometer, low word Output, y-axis accelerometer, high word Output, z-axis accelerometer, low word Output, z-axis accelerometer, high word Output, temperature Output, time stamp Reserved New data counter Output, x-axis delta angle, low word Output, x-axis delta angle, high word Output, y-axis delta angle, low word Output, y-axis delta angle, high word Output, z-axis delta angle, low word Output, z-axis delta angle, high word Output, x-axis delta velocity, low word Output, x-axis delta velocity, high word Output, y-axis delta velocity, low word Output, y-axis delta velocity, high word Output, z-axis delta velocity, low word Output, z-axis delta velocity, high word Reserved Calibration, offset, gyroscope, x-axis, low word Calibration, offset, gyroscope, x-axis, high word Calibration, offset, gyroscope, y-axis, low word Calibration, offset, gyroscope, y-axis, high word Calibration, offset, gyroscope, z-axis, low word Calibration, offset, gyroscope, z-axis, high word Calibration, offset, accelerometer, x-axis, low word Calibration, offset, accelerometer, x-axis, high word Calibration, offset, accelerometer, y-axis, low word Calibration, offset, accelerometer, y-axis, high word Calibration, offset, accelerometer, z-axis, low word Calibration, offset, accelerometer, z-axis, high word Reserved Control, Bartlett window FIR filter Measurement range (model specific) identifier Control, input/output and other miscellaneous options Control, scale factor for input clock, pulse per second (PPS) mode Control, decimation filter (output data rate) analog.com Rev. E | 19 of 41 Data Sheet ADIS16477 USER REGISTER MEMORY MAP Table 8. User Register Memory Map (N/A Means Not Applicable) Name R/W Flash Backup Address Default Register Description NULL_CNFG GLOB_CMD Reserved FIRM_REV FIRM_DM FIRM_Y PROD_ID SERIAL_NUM USER_SCR_1 USER_SCR_2 USER_SCR_3 FLSHCNT_LOW FLSHCNT_HIGH R/W W N/A R R R R R R/W R/W R/W R R Yes No N/A No No No No No Yes Yes Yes No No 0x66, 0x67 0x68, 0x69 0x6A to 0x6B 0x6C, 0x6D 0x6E, 0x6F 0x70, 0x71 0x72, 0x73 0x74, 0x75 0x76, 0x77 0x78, 0x79 0x7A, 0x7B 0x7C, 0x7D 0x7E, 0x7E 0x070A N/A N/A N/A N/A N/A 0x405D N/A N/A N/A N/A N/A N/A Control, bias estimation period Control, global commands Reserved Identification, firmware revision Identification, date code, day and month Identification, date code, year Identification, device number Identification, serial number User Scratch Register 1 User Scratch Register 2 User Scratch Register 3 Output, flash memory write cycle counter, lower word Output, flash memory write cycle counter, upper word 1 See Table 102 for the default value in this register, which is model specific. analog.com Rev. E | 20 of 41 Data Sheet ADIS16477 USER REGISTER DEFINITIONS STATUS/ERROR FLAG INDICATORS (DIAG_STAT) Table 9. DIAG_STAT Register Definition Addresses Default Access Flash Backup 0x02, 0x03 0x0000 R No Table 10. DIAG_STAT Bit Assignments Bits Description [15:8] 7 Reserved. Clock error. A 1 indicates that the internal data sampling clock (fSM, see Figure 19 and Figure 20) does not synchronize with the external clock, which only applies when using scaled sync mode (Register MSC_CTRL, Bits[4:2] = 010, see Table 105). When this error occurs, adjust the frequency of the clock signal on the SYNC pin to operate within the appropriate range. Memory failure. A 1 indicates a failure in the flash memory test (Register GLOB_CMD, Bit 4, see Table 113), which involves a comparison between a cyclic redundancy check (CRC) calculation of the present flash memory and a CRC calculation from the same memory locations at the time of initial programming (during the production process). If this error occurs, repeat the same test. If this error persists, replace the ADIS16477 device. Sensor failure. A 1 indicates failure of at least one sensor, at the conclusion of the self test (Register GLOB_CMD, Bit 2, see Table 113). If this error occurs, repeat the same test. If this error persists, replace the ADIS16477. Motion, during the execution of this test, can cause a false failure. Standby mode. A 1 indicates that the voltage across VDD and GND is
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