Precision, Miniature MEMS IMU
ADIS16505
Data Sheet
FEATURES
GENERAL DESCRIPTION
Triaxial, digital gyroscope
±125°/sec, ±500°/sec, ±2000°/sec dynamic range models
2.3°/hr in-run bias stability (ADIS16505-1)
0.13°/√hr angular random walk, x-axis and y-axis, 1 σ
(ADIS16505-1)
±0.25° axis to axis misalignment error
Triaxial, digital accelerometer, ±78.4 m/sec² dynamic range
26.5 μm/sec² in-run bias stability (x-axis and y-axis)
Triaxial, delta angle and delta velocity outputs
Factory calibrated sensitivity, bias, and axial alignment
Calibration temperature range: −40°C to +85°C
SPI compatible data communications
Programmable operation and control
Automatic and manual bias correction controls
Data ready indicator for synchronous data acquisition
External sync modes: direct, scaled, and output
On demand self-test of inertial sensors
On demand self-test of flash memory
Single-supply operation (VDD): 3.0 V to 3.6 V
14,700 m/sec2 mechanical shock survivability
Operating temperature range: −40°C to +105°C
The ADIS16505 is a precision, miniature microelectromechanical
system (MEMS) inertial measurement unit (IMU) that includes
a triaxial gyroscope and a triaxial accelerometer. Each inertial
sensor in the ADIS16505 combines with signal conditioning
that optimizes dynamic performance. The factory calibration
characterizes each sensor for sensitivity, bias, alignment,
linear acceleration (gyroscope bias), and point of percussion
(accelerometer location). As a result, each sensor has dynamic
compensation formulas that provide accurate sensor
measurements over a broad set of conditions.
The ADIS16505 provides a simplified, cost effective method for
integrating accurate, multiaxis inertial sensing into industrial
systems, especially when compared with the complexity and
investment associated with discrete designs. All necessary motion
testing and calibration are part of the production process at the
factory, greatly reducing system integration time. Tight orthogonal
alignment simplifies inertial frame alignment in navigation
systems. The serial peripheral interface (SPI) and register
structure provide a simple interface for data collection and
configuration control.
The ADIS16505 is available in a 100-ball, ball grid array (BGA)
package that is approximately 15 mm × 15 mm × 5 mm.
APPLICATIONS
Navigation, stabilization, and instrumentation
Unmanned and autonomous vehicles
Smart agriculture and construction machinery
Factory/industrial automation, robotics
Virtual/augmented reality
Internet of Moving Things
FUNCTIONAL BLOCK DIAGRAM
DR
SELF TEST
RST
POWER
MANAGEMENT
INPUT/OUTPUT
OUTPUT
DATA
REGISTERS
TRIAXIAL
GYROSCOPE
TRIAXIAL
ACCELEROMETER
CONTROLLER
CALIBRATION
AND
FILTERS
GND
CS
SPI
USER
CONTROL
REGISTERS
SCLK
DIN
DOUT
CLOCK
ADIS16505
SYNC
17328-001
TEMPERATURE
SENSOR
VDD
Figure 1.
Rev. C
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ADIS16505
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
SPI ................................................................................................ 17
Applications ...................................................................................... 1
Data Ready (DR) ........................................................................ 17
General Description ......................................................................... 1
Reading Sensor Data .................................................................. 18
Functional Block Diagram .............................................................. 1
Burst Read Function .................................................................. 19
Revision History ............................................................................... 2
Latency ......................................................................................... 21
Specifications .................................................................................... 3
Device Configuration ................................................................ 21
Timing Specifications .................................................................. 6
Memory Structure ...................................................................... 21
Absolute Maximum Ratings ....................................................... 7
User Register Memory Map.......................................................... 22
Thermal Resistance ...................................................................... 7
User Register Defintions ............................................................... 24
ESD Caution.................................................................................. 7
Gyroscope Data .......................................................................... 24
Pin Configuration and Function Descriptions ............................ 8
Delta Angles ................................................................................ 28
Typical Performance Characteristics ........................................... 11
Delta Velocity ............................................................................. 29
Gyroscopes .................................................................................. 11
Calibration .................................................................................. 31
Accelerometers ........................................................................... 14
Applications Information ............................................................. 38
Theory of Operation ...................................................................... 15
Assembly and Handling Tips ................................................... 38
Introduction ................................................................................ 15
Power Supply Considerations .................................................. 39
Clock Control ............................................................................. 15
Evaluation Tools......................................................................... 39
Bartlett Window Filter ............................................................... 16
Packaging and Ordering Information ......................................... 41
Calibration................................................................................... 16
Outline Dimensions ................................................................... 41
Decimation Filter ....................................................................... 16
Ordering Guide .......................................................................... 41
Register Structure ....................................................................... 16
REVISION HISTORY
10/2020—Rev. B to Rev. C
Change to Linear Acceleration Effect Parameter, Table 1.......... 3
Changes to Figure 29 ..................................................................... 15
Changes to SPI Section and Figure 34 ......................................... 17
Changes to Burst Read Function .................................................. 19
Changes to Table 27 ....................................................................... 26
Changes to Figure 64 and Figure 65 ............................................ 40
Changes to Ordering Guide .......................................................... 41
7/2020—Rev. A to Rev. B
Changes to Table 1 ........................................................................... 3
Changes to Table 3 and Table 4...................................................... 7
Changes to Clock Control Section ............................................... 15
Changes to Figure 44 and Figure 45 ............................................ 20
Changes to Table 9 ......................................................................... 23
Changes to Table 11 ....................................................................... 24
Changes to Table 102 and Table 106 ........................................... 33
Changes to Table 108 and Table 110 ........................................... 34
Deleted Table 111 and Table 112; Renumbered Sequentially........34
Deleted Bias Correction Update Section .........................................35
Changes to Table 113, Table 115, Table 117, Table 119, and
Table 121 ...................................................................................................36
Changes to Table 129 and Table 131 ........................................... 37
Changes to Figure 65 ..................................................................... 40
10/2019—Revision A: Initial Version
Rev. C | Page 2 of 41
Data Sheet
ADIS16505
SPECIFICATIONS
Case temperature (TC) = 25°C, VDD = 3.3 V, angular rate = 0°/sec, and dynamic range = ±2000°/sec ± 1 g, unless otherwise noted. 1 g is
the acceleration due to gravity and assumed to be 9.8 m/sec2.
Table 1.
Parameter
GYROSCOPES
Dynamic Range
Sensitivity
Error over Temperature
Misalignment Error1
Nonlinearity2
Bias
Repeatability3
In-Run Bias Stability
Angular Random Walk
Error over Temperature
Linear Acceleration Effect
Vibration Rectified Error (VRE)
Test Conditions/Comments
Min
ADIS16505-1
ADIS16505-2
ADIS16505-3
ADIS16505-1, 16-bit data format
ADIS16505-2, 16-bit data format
ADIS16505-3, 16-bit data format
ADIS16505-1, 32-bit data format
ADIS16505-2, 32-bit data format
ADIS16505-3, 32-bit data format
ADIS16505-1, −40°C ≤ TC ≤ +85°C, 1σ
ADIS16505-2, −40°C ≤ TC ≤ +85°C, 1σ
ADIS16505-3, −40°C ≤ TC ≤ +85°C, 1σ
Axis to axis, −40°C ≤ TC ≤ +85°C, 1 σ
ADIS16505-1, full scale (FS) = 125°/sec
ADIS16505-2, FS = 500°/sec
ADIS16505-3, FS = 2000°/sec
±125
±500
±2000
−40°C ≤ TC ≤ +85°C, 1 σ, x-axis and z-axis
−40°C ≤ TC ≤ +85°C, 1 σ, y-axis
ADIS16505-1, 1 σ, x-axis
ADIS16505-1, 1 σ, y-axis
ADIS16505-1, 1 σ, z-axis
ADIS16505-2, 1 σ, x-axis
ADIS16505-2, 1 σ, y-axis
ADIS16505-2, 1 σ, z-axis
ADIS16505-3, 1 σ, x-axis
ADIS16505-3, 1 σ, y-axis
ADIS16505-3, 1 σ, z-axis
ADIS16505-1, x-axis and y-axis, 1 σ
ADIS16505-1, z-axis, 1 σ
ADIS16505-2, x-axis and y-axis, 1 σ
ADIS16505-2, z-axis, 1 σ
ADIS16505-3, x-axis and y-axis, 1 σ
ADIS16505-3, z-axis, 1 σ
−40°C ≤ TC ≤ +85°C, 1 σ, x-axis and z-axis
−40°C ≤ TC ≤ +85°C, 1 σ, y-axis
X-axis, 1 σ
Y-axis, 1 σ
Z-axis, 1 σ
X-axis, random vibration, 19.6 m/sec2 rms,
50 Hz to 2 kHz
Y-axis, random vibration, 19.6 m/sec2 rms,
50 Hz to 2 kHz
Z-axis, random vibration, 19.6 m/sec2 rms,
50 Hz to 2 kHz
Rev. C | Page 3 of 41
Typ
Max
Unit
160
40
10
10,485,760
2,621,440
655,360
±0.5
±0.5
±0.3
±0.25
0.2
0.2
0.2
°/sec
°/sec
°/sec
LSB/°/sec
LSB/°/sec
LSB/°/sec
LSB/°/sec
LSB/°/sec
LSB/°/sec
%
%
%
Degrees
%FS
%FS
%FS
0.14
1.4
1.5
2.3
1.7
2.2
2.7
1.6
7.5
8.1
4.9
0.13
0.19
0.15
0.2
0.29
0.32
±0.3
±0.7
0.572 × 10−3
1.02 × 10−3
0.045 × 10−3
3.1 × 10−6
°/sec
°/sec
°/hr
°/hr
°/hr
°/hr
°/hr
°/hr
°/hr
°/hr
°/hr
°/√hr
°/√hr
°/√hr
°/√hr
°/√hr
°/√hr
°/sec
°/sec
(°/sec)/(m/sec2)
(°/sec)/(m/sec2)
(°/sec)/(m/sec2)
(°/sec)/(m/sec2)2
5.6 × 10−6
(°/sec)/(m/sec2)2
0.3 × 10−6
(°/sec)/(m/sec2)2
ADIS16505
Parameter
Output Noise
Rate Noise Density
3 dB Bandwidth
Sensor Resonant Frequency
ACCELEROMETERS4
Dynamic Range
Sensitivity
Error over Temperature
Repeatability3
Misalignment Error
Nonlinearity
Bias
Repeatability3
In-Run Bias Stability
X-Axis and Y-Axis
Z-Axis
Velocity Random Walk
X-Axis and Y-Axis
Z-Axis
Error over Temperature
Output Noise
X-Axis and Y-Axis
Z-Axis
Noise Density
X-Axis and Y-Axis
Z-Axis
3 dB Bandwidth
Sensor Resonant Frequency
TEMPERATURE SENSOR
Scale Factor
Data Sheet
Test Conditions/Comments
No filtering, 1 σ, 25°C
ADIS16505-1, x-axis, y-axis
ADIS16505-1, z-axis
ADIS16505-2, x-axis, y-axis
ADIS16505-2, z-axis
ADIS16505-3, all axes
Frequency = 10 Hz to 40 Hz
ADIS16505-1, x-axis and y-axis
ADIS16505-1, z-axis
ADIS16505-2, x-axis and y-axis
ADIS16505-2, z-axis
ADIS16505-3, x-axis and y-axis
ADIS16505-3, z axis
ADIS16505-1, ADIS16505-2, x-axis and y-axis
ADIS16505-1, ADIS16505-2, z-axis
ADIS16505-3, x-axis and y-axis
ADIS16505-3, z-axis
X-axis, y-axis
Z-axis
Each axis
Min
Typ
68 × 10−3
104 × 10−3
82 × 10−3
116 × 10−3
152 × 10−3
181 × 10−3
Max
Unit
°/sec rms
°/sec rms
°/sec rms
°/sec rms
°/sec rms
3.0 × 10−3
4.3 × 10−3
3.4 × 10−3
4.6 × 10−3
6.1 × 10−3
480
590
573
639
66
78
°/sec/√Hz rms
°/sec/√Hz rms
°/sec/√Hz rms
°/sec/√Hz rms
°/sec/√Hz rms
°/sec/√Hz rms
Hz
Hz
Hz
Hz
kHz
kHz
32-bit data format
−40°C ≤ TC ≤ +85°C, 1 σ
−40°C ≤ TC ≤ +85°C, 1 σ
Axis to axis, −40°C ≤ TC ≤ +85°C, 1 σ
Best fit straight line, ±19.6 m/sec2
Best fit straight line, ±78.4 m/sec2, x-axis
Best fit straight line, ±78.4 m/sec2,
y-axis and z-axis
26,756,268
±0.07
±0.1
±0.05
0.25
0.5
1.5
m/sec2
LSB/(m/sec2)
%
%
Degrees
%FS
%FS
%FS
−40°C ≤ TC ≤ +85°C, 1 σ
1σ
19.6 × 10−3
m/sec2
26.5 × 10−6
43.1 × 10−6
m/sec2
m/sec2
0.009
0.012
±9.8 × 10−3
m/sec/√hr
m/sec/√hr
m/sec2
4.8 × 10−3
6.07 × 10−3
m/sec2 rms
m/sec2 rms
X-axis and y-axis
Z-axis
167 × 10−6
243 × 10−6
750
2.4
2.2
m/sec2/√Hz rms
m/sec2/√Hz rms
Hz
kHz
kHz
Output = 0x0000 at 0°C (±5°C)
0.1
°C/LSB
±78.4
1σ
−40°C ≤ TC ≤ +85°C, 1 σ
No filtering
f = 10 Hz to 40 Hz, no filtering
Rev. C | Page 4 of 41
Data Sheet
Parameter
LOGIC INPUTS5
Input Voltage
High, VIH
Low, VIL
RST Pulse Width
Input Current
Logic 1, IIH
Logic 0, IIL
All Pins Except RST
RST Pin
Input Capacitance, CIN
DIGITAL OUTPUTS
Output Voltage
High, VOH
Low, VOL
FLASH MEMORY
Data Retention7
FUNCTIONAL TIMES8
Power-On Start-Up Time
Reset Recovery Time9
Factory Calibration Restore
Flash Memory Backup
Flash Memory Test Time
Self Test Time10
CONVERSION RATE
Initial Clock Accuracy
Sync Input Clock
POWER SUPPLY, VDD
Power Supply Current11
ADIS16505
Test Conditions/Comments
Min
Typ
Max
Unit
0.8
V
V
μs
10
μA
10
μA
mA
pF
2.0
1
VIH = 3.3 V
VIL = 0 V
0.33
10
Source current (ISOURCE) = 0.5 mA
Sink current (ISINK) = 2.0 mA
Endurance6
TJ = 85°C
Time until data is available
2.4
0.4
10,000
20
310
255
136
70
30
24
2000
3
GLOB_CMD, Bit 7 = 1 (see Table 112)
GLOB_CMD, Bit 1 = 1 (see Table 112)
GLOB_CMD, Bit 3 = 1 (see Table 112)
GLOB_CMD, Bit 4 = 1 (see Table 112)
GLOB_CMD, Bit 2 = 1 (see Table 112)
Operating voltage range
Normal mode, VDD = 3.3 V
1
1.9
3.0
44
2.1
3.6
55
V
V
Cycles
Years
ms
ms
ms
ms
ms
ms
SPS
%
kHz
V
mA
Cross-axis sensitivity is the sine of this number.
This measurement is based on the deviation from a best fit linear model.
3
Bias repeatability provides an estimate for long-term drift in the bias, as observed during 500 hours of high temperature operating life (HTOL) at 105°C.
4
All specifications associated with the accelerometers relate to the full-scale range of ±8 g, unless otherwise noted.
5
The digital input/output signals use a 3.3 V system.
6
Endurance is qualified as per JEDEC Standard 22, Method A117, measured at −40°C, +25°C, +85°C, and +125°C.
7
The data retention specification assumes a junction temperature (TJ) of 85°C per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ.
8
These times do not include thermal settling and internal filter response times, which may affect overall accuracy.
9
The RST line must be in a low state for at least 10 μs to ensure a proper reset initiation and recovery.
10
The self test time can extend when using external clock rates lower than 2000 Hz.
11
Power supply current transients can reach 100 mA during initial startup or reset recovery.
2
Rev. C | Page 5 of 41
ADIS16505
Data Sheet
TIMING SPECIFICATIONS
TA = 25°C, VDD = 3.3 V, unless otherwise noted.
Table 2.
Parameter
fSCLK
tSTALL
tREADRATE
tCS
Description
Serial clock
Stall period between data
Read rate
Chip select to SCLK edge
tDAV
tDSU
tDHD
tSCLKR, tSCLKF
tDR, tDF
tSFS
t1
DOUT valid after SCLK edge
DIN setup time before SCLK rising edge
DIN hold time after SCLK rising edge
SCLK rise/fall times
DOUT rise/fall times
CS high after SCLK edge
Input sync positive pulse width; direct sync mode,
MSC_CTRL[3:2] = 01 (binary, see Table 106)
Input sync to data ready valid transition, no SPI traffic,
direct sync mode, MSC_CTRL[3:2] = 01 (binary, see Table 106)
Input sync to data ready valid transition, full SPI traffic2,
direct sync mode, MSC_CTRL[3:2] = 01 (binary, see Table 106)
Data invalid time
Input sync period
tSTDR
tNV
t2
1
2
Min
0.1
16
24
200
Normal Mode
Typ
Max
2.1
Burst Read Mode
Min
Typ
Max
0.1
1.1
N/A1
200
25
25
25
50
25
50
5
5
12.5
12.5
5
5
0
5
12.5
12.5
0
5
Unit
MHz
μs
μs
ns
ns
ns
ns
ns
ns
ns
μs
305
305
μs
405
405
μs
23
μs
μs
23
500
500
N/A means not applicable.
Full SPI traffic is defined as a transfer of 64 16-bit registers using an SCLK frequency of 2 MHz. Reading the sensor values from the previous data sample proportionally
increases the tSTDR on the current cycle.
Timing Diagrams
tSCLKR
CS
tSCLKF
tCS
tSFS
SCLK
2
3
4
5
tDAV
MSB
DOUT
R/W
15
16
tDR
DB14
DB13
tDSU
DIN
6
DB12
DB11
DB10
tDHD
A6
A5
DB2
DB1
LSB
tDF
A4
A3
A2
D2
D1
17328-002
1
LSB
Figure 2. SPI Timing and Sequence Diagram
tREADRATE
tSTALL
17328-003
CS
SCLK
Figure 3. Stall Time and Data Rate Timing Diagram
t2
tSTDR
t1
DR
tNV
17328-004
SYNC
Figure 4. Input Clock Timing Diagram, Direct Sync Mode, Register MSC_CTRL[3:2] = 01 (Binary)
Rev. C | Page 6 of 41
Data Sheet
ADIS16505
THERMAL RESISTANCE
ABSOLUTE MAXIMUM RATINGS
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Table 3.
Parameter
Mechanical Shock Survivability
Any Axis, Unpowered, 0.5 ms ,
½ Sine.
VDD to GND
Digital Input Voltage to GND
Digital Output Voltage to GND
Temperature Range
Calibration
Operating
Storage1
Barometric Pressure
1
Rating
The ADIS16505 is a multichip module that includes many
active components. The values in Table 4 identify the thermal
response of the hottest component inside of the ADIS16505,
with respect to the overall power dissipation of the module.
This approach enables a simple method for predicting the
temperature of the hottest junction, based on either ambient
or case temperature.
14,700 m/sec2
−0.3 V to +3.6 V
−0.3 V to VDD + 0.2 V
−0.3 V to VDD + 0.2 V
−40°C to +85°C
−40°C to +105°C
−65°C to +150°C
2 bar
For example, when the ambient temperature is 70°C, the hottest
junction temperature (TJ) inside of the ADIS16505 is 76.7°C.
TJ = θJA × VDD × IDD + 70°C
Extended exposure to temperatures that are lower than −40°C or higher
than +105°C can adversely affect the accuracy of the factory calibration.
TJ = 107.1°C/W × 3.3 V × 0.044 A + 70°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
TJ = 85.6°C
Table 4. Package Characteristics
Package Type
ML-100-13
1
θJA1
107.1°C/W
θJC2
74.7°C/W
Device Weight
3V
DR
VDD
17328-026
IRQ
33Ω
DR
17328-027
SPI
PULSING INDICATES
DATA PRODUCTION
Figure 34. Electrical Connection Diagram
START-UP TIME
Table 6. Generic SPI Master Pin Names and Functions
Figure 36. Data Ready Response During Startup
Function
Slave select
Serial clock
Master output, slave input
Master input, slave output
Interrupt request
SOFTWARE RESET COMMAND
GLOB_CMD, BIT 7 = 1
DR PULSING
RESUMES
DR
Embedded processors typically configure their serial ports for
communicating with SPI slave devices such as the ADIS16505 by
using control registers on the processor itself. Table 7 lists the
SPI protocol settings for the ADIS16505.
RESET RECOVERY TIME
17328-029
Mnemonic
SS
SCLK
MOSI
MISO
IRQ
17328-028
DR
Table 6 provides an example list of pin names for the SPI port
in an embedded processor.
Figure 37. Data Ready Response During Reset Recovery
(Register GLOB_CMD, Bit 7 = 1)
RST PIN
RELEASED
Table 7. Generic Master Processor SPI Settings
1
Description
ADIS16505 operates as slave
Maximum serial clock rate
CPOL = 1 (polarity), CPHA = 1 (phase)
Bit sequence, see Figure 40 for coding
Shift register and data length
RST
DR PULSING
RESUMES
DR
RESET RECOVERY TIME
A burst mode read requires this value to be ≤1 MHz (see Table 2 for more
information).
Rev. C | Page 17 of 41
Figure 38. Data Ready Response During Reset (RST = 0) Recovery
17328-030
Processor Setting
Master
SCLK ≤ 2 MHz1
SPI Mode 3
MSB First Mode
16-Bit Mode
ADIS16505
Data Sheet
Reading a single register requires two 16-bit cycles on the SPI:
one to request the contents of a register and another to receive
those contents. The 16-bit command code (see Figure 40) for a
read request on the SPI has three parts: the read bit (R/W = 0),
either address of the register, [A6:A0], and eight don’t care bits,
[DC7:DC0]. Figure 39 shows an example that includes two register
reads in succession. This example starts with DIN = 0x0C00 to
request the contents of the Z_GYRO_LOW register, and follows
with 0x0E00 to request the contents of the Z_GYRO_OUT
register. The sequence in Figure 39 also shows full duplex mode
of operation, which means that the ADIS16505 can receive
DIN
0x0E00
NEXT
ADDRESS
Z_GYRO_LOW
Z_GYRO_OUT
0x0C00
DOUT
Figure 39. SPI Read Example
Figure 41 provides an example of the four SPI signals when
reading the PROD_ID register (see Table 120) in a repeating
pattern. This pattern can be helpful when troubleshooting the
SPI interface setup and communications because the signals are
the same for each 16-bit sequence, except during the first cycle.
CS
DOUT
R/W
D15
A6
A5
A4
A3
A2
A1
A0
DC7
DC6
DC5
DC4
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
DC3 DC2
D3
DC1
DC0
D1
D0
D2
R/W
D15
A6
A5
D14
D13
NOTES
1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
FOR OTHER DEVICES.
Figure 40. SPI Communication Bit Sequence
CS
SCLK
DIN = 0x7200 = 0111 0010 0000 0000
DOUT HIGH-Z
HIGH-Z
DOUT = 0100 0000 0111 1001 = 0x4079 = 16505 (PROD_ID)
Figure 41. SPI Signal Pattern, Repeating Read of the PROD_ID Register
Rev. C | Page 18 of 41
17328-060
DIN
17328-033
SCLK
DIN
17328-031
requests on DIN while also transmitting data out on DOUT
within the same 16-bit SPI cycle.
READING SENSOR DATA
Data Sheet
ADIS16505
The burst read function provides a way to read a batch of output
data registers, using a continuous stream of bits, at a rate of up
to 1 MHz (SCLK). This method does not require a stall time
between each 16-bit segment (see Figure 3). As shown in Figure 42,
start this mode by setting DIN = 0x6800, and then read each of
the registers in the sequence out of DOUT while keeping CS
low for the entire data transfer sequence. However, keeping the
CS pin low after a burst transfer is complete may delay the next
data ready pulse and may potentially interfere with the
processing of the next IMU sample.
The three options for burst mode include: scaled sync mode on
or off, BURST32 enabled and disabled, and BURST_SEL = 0 or
BURSET_SEL = 1. This results in eight possible burst data formats.
Scaled Sync Mode Enabled vs. Disabled
The only differences in the burst data format between these two
modes are the final two bytes in a burst. In scaled sync mode,
the final two bytes are the values of the TIME_STAMP registers.
When scaled sync mode is disabled, the final two bytes are the
values in the DATA_CNTR registers. As always, Bits[15:8]
appear before Bits[7:0] in both modes.
For the rest of this section, it is assumed that scaled sync mode
is disabled.
In 16-bit burst mode with BURST_SEL = 0, a burst contains
calibrated gyroscope and accelerometer data in 16-bit format.
This mode is particularly appropriate for cases where there is
no decimation nor filtering. Not only is the sample rate high
(~2 kSPS), the lower 16 bits are not used unless the user is
averaging or filtering.
1
2
3
0x6800
DIAG_STAT
X_GYRO_OUT
CHECKSUM
17328-034
DOUT
16-Bit Burst Mode with BURST_SEL = 1
In 16-bit burst mode with BURST_SEL = 1, a burst contains
calibrated delta angle and delta velocity data in 16-bit format.
This mode is particularly appropriate for cases where there is
no decimation nor filtering. Not only is the sample rate high
(~2 kSPS), the lower 16 bits are not used.
CS
1
2
3
11
SCLK
DIN
0x6800
DIAG_STAT
X_DELTANG_
OUT
CHECKSUM
Figure 43. Burst Read Sequence with BURST_SEL = 1
The sequence of registers (and checksum value) in the burst
read includes the following registers and value: DIAG_STAT,
X_DELTANG_OUT, Y_DELTANG_OUT, Z_DELTANG_OUT,
X_DELTVEL_OUT, Y_DELTVEL_OUT, Z_DELTVEL_OUT,
TEMP_OUT, DATA_ CNTR, and the checksum value.
In these cases, use the following formula to verify the 16-bit
checksum value, treating each byte in the formula as an
independent, unsigned, 8-bit number:
11
SCLK
DIN
Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] +
X_GYRO_OUT, Bits[15:8] + X_GYRO_OUT, Bits[7:0] +
Y_GYRO_OUT, Bits[15:8] + Y_GYRO_OUT, Bits[7:0] +
Z_GYRO_OUT, Bits[15:8] + Z_GYRO_OUT, Bits[7:0] +
X_ACCL_OUT, Bits[15:8] + X_ACCL_OUT, Bits[7:0] +
Y_ACCL_OUT, Bits[15:8] + Y_ACCL_OUT, Bits[7:0] +
Z_ACCL_OUT, Bits[15:8] + Z_ACCL_OUT, Bits[7:0] +
TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] +
DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0]
DOUT
16-Bit Burst Mode with BURST_SEL = 0
CS
In these cases, use the following formula to verify the 16-bit
checksum value, treating each byte in the formula as an
independent, unsigned, 8-bit number:
17328-056
BURST READ FUNCTION
Figure 42. Burst Read Sequence with BURST_SEL = 0
The sequence of registers (and checksum value) in the burst
read includes the following registers and value: DIAG_STAT,
X_GYRO_OUT, Y_GYRO_OUT, Z_GYRO_OUT, X_ACCL_
OUT, Y_ACCL_OUT, Z_ACCL_OUT, TEMP_OUT, DATA_
CNTR, and the checksum value.
Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] +
X_DELTANG_OUT, Bits[15:8] + X_DELTANG_OUT, Bits[7:0] +
Y_DELTANG_OUT, Bits[15:8] + Y_DELTANG_OUT, Bits[7:0] +
Z_DELTANG_OUT, Bits[15:8] + Z_DELTANG_OUT, Bits[7:0] +
X_DELTVEL_OUT, Bits[15:8] + X_DELTVEL_OUT, Bits[7:0] +
Y_DELTVEL_OUT, Bits[15:8] + Y_DELTVEL_OUT, Bits[7:0] +
Z_DELTVEL_OUT, Bits[15:8] + Z_DELTVEL_OUT, Bits[7:0] +
TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] +
DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0]
Rev. C | Page 19 of 41
ADIS16505
Data Sheet
32-Bit Burst Mode with BURST_SEL = 0
32-Bit Burst Mode with BURST_SEL = 1
In 32-bit burst mode with BURST_SEL = 0, a burst contains
calibrated gyroscope and accelerometer data in 32-bit format.
This mode is appropriate for cases where there is averaging
(decimation) and/or low-pass filtering of the data.
In 32-bit burst mode with BURST_SEL = 1, a burst contains
calibrated delta angle and delta velocity data in 32-bit format.
This mode is appropriate for cases where there is averaging
(decimation) and/or low-pass filtering of the data.
1
2
3
17
CS
SCLK
DOUT
2
3
17
SCLK
0x6800
DIAG_STAT
X_GYRO_LOW
17328-057
DIN
1
CHECKSUM
DIN
DOUT
0x6800
DIAG_STAT
X_DELTANG_
LOW
CHECKSUM
17328-058
CS
Figure 44. Burst Read Sequence with BURST_SEL = 0
Figure 45. Burst Read Sequence with BURST_SEL = 1
The sequence of registers (and checksum value) in the burst
read includes the following registers and value: DIAG_STAT,
X_GYRO_LOW, X_GYRO_OUT, Y_GYRO_LOW,
Y_GYRO_OUT, Z_GYRO_LOW, Z_GYRO_OUT,
X_ACCL_LOW, X_ACCL_OUT, Y_ACCL_LOW,
Y_ACCL_OUT, Z_ACCL_LOW, Z_ACCL_OUT, TEMP_OUT,
DATA_ CNTR, and the checksum value. In these cases, use the
following formula to verify the 16-bit checksum value, treating
each byte in the formula as an independent, unsigned, 8-bit
number:
The sequence of registers (and checksum value) in the burst
read includes the following registers and value: DIAG_STAT,
X_DELTANG_LOW, X_DELTANG_OUT,
Y_DELTANG_LOW, Y_DELTANG_OUT,
Z_DELTANG_LOW, Z_DELTANG_OUT, X_DELTVEL_LOW,
X_DELTVEL_OUT, Y_DELTVEL_LOW, Y_DELTVEL_OUT,
Z_DELTVEL_LOW, Z_DELTVEL_OUT, TEMP_OUT, DATA_
CNTR, and the checksum value. In these cases, use the following
formula to verify the 16-bit checksum value, treating each byte
in the formula as an independent, unsigned, 8-bit number:
Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] +
X_GYRO_LOW, Bits[15:8] + X_GYRO_LOW, Bits[7:0] +
X_GYRO_OUT, Bits[15:8] + X_GYRO_OUT, Bits[7:0] +
Y_GYRO_LOW, Bits[15:8] + Y_GYRO_LOW, Bits[7:0] +
Y_GYRO_OUT, Bits[15:8] + Y_GYRO_OUT, Bits[7:0] +
Z_GYRO_LOW, Bits[15:8] + Z_GYRO_LOW, Bits[7:0] +
Z_GYRO_OUT, Bits[15:8] + Z_GYRO_OUT, Bits[7:0] +
X_ACCL_LOW, Bits[15:8] + X_ACCL_LOW, Bits[7:0] +
X_ACCL_OUT, Bits[15:8] + X_ACCL_OUT, Bits[7:0] +
Y_ACCL_LOW, Bits[15:8] + Y_ACCL_LOW, Bits[7:0] +
Y_ACCL_OUT, Bits[15:8] + Y_ACCL_OUT, Bits[7:0] +
Z_ACCL_LOW, Bits[15:8] + Z_ACCL_LOW, Bits[7:0] +
Z_ACCL_OUT, Bits[15:8] + Z_ACCL_OUT, Bits[7:0] +
TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] +
DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0]
Checksum = DIAG_STAT, Bits[15:8] + DIAG_STAT, Bits[7:0] +
X_DELTANG_LOW, Bits[15:8] + X_DELTANG_LOW, Bits[7:0] +
X_DELTANG_OUT, Bits[15:8] + X_DELTANG_OUT, Bits[7:0] +
Y_DELTANG_LOW, Bits[15:8] + Y_DELTANG_LOW, Bits[7:0] +
Y_DELTANG_OUT, Bits[15:8] + Y_DELTANG_OUT, Bits[7:0] +
Z_DELTANG_LOW, Bits[15:8] + Z_DELTANG_LOW, Bits[7:0] +
Z_DELTANG_OUT, Bits[15:8] + Z_DELTANG_OUT, Bits[7:0] +
X_DELTVEL_LOW, Bits[15:8] + X_DELTVEL_LOW, Bits[7:0] +
X_DELTVEL_OUT, Bits[15:8] + X_DELTVEL_OUT, Bits[7:0] +
Y_DELTVEL_LOW, Bits[15:8] + Y_DELTVEL_LOW, Bits[7:0] +
Y_DELTVEL_OUT, Bits[15:8] + Y_DELTVEL_OUT, Bits[7:0] +
Z_DELTVEL_LOW, Bits[15:8] + Z_DELTVEL_LOW, Bits[7:0] +
Z_DELTVEL_OUT, Bits[15:8] + Z_DELTVEL_OUT, Bits[7:0] +
TEMP_OUT, Bits[15:8] + TEMP_OUT, Bits[7:0] +
DATA_CNTR, Bits[15:8] + DATA_CNTR, Bits[7:0]
Rev. C | Page 20 of 41
Data Sheet
ADIS16505
LATENCY
Table 8 contains the group delay for each inertial sensor when
the ADIS16505 is operating with the factory default settings for
the FILT_CTRL (see Table 101) and DEC_RATE (see Table 109)
registers.
data for that location, [DC7:DC0]. Figure 46 shows a coding
example for writing 0x0004 to the FILT_CTRL register (see
Table 102). In Figure 46, the 0xDC04 command writes 0x04 to
Address 0x5C (lower byte) and the 0xDD00 command writes
0x00 to Address 0x5D (upper byte).
CS
Table 8. Group Delay with No Filtering
1
Group Delay (ms)1
1.57
1.51
1.51
1.29
DIN
0xDC04
17328-035
SCLK
0xDD00
Figure 46. SPI Sequence for Writing 0x0004 to FILT_CTRL
In this context, latency represents the time between the motion (linear
acceleration and/or angular rate of rotation) and the time that the
representative data is available in the output data register.
MEMORY STRUCTURE
When the FILT_CTRL register is not equal to 0, the group
delay contribution of the Bartlett window filter (in terms of
sample cycles) is equal to N (see Table 102). When the DEC_RATE
register is not equal to 0, the group delay contribution of the
decimation filter (in terms of sample cycles) is equal D + 1,
divided by 2 (see Table 110).
Data Acquisition
The total latency is equal to the sum of the group delay and
the data acquisition time, which represents the time it takes the
system processor to read the data from the output data registers
of the ADIS16505. For example, when using the burst read
function, with an SCLK rate of 1 MHz, the data acquisition
time is equal to 176 μs (11 segments × 16 SCLKs/segment ×
1 μs/SCLK).
Figure 47 provides a functional diagram for the memory
structure of the ADIS16505. The flash memory bank contains
the operational code, unit specific calibration coefficients, and
user configuration settings. During initialization (power
application or reset recover), this information loads from the
flash memory into the static random access memory (SRAM),
which supports all normal operation including register access
through the SPI port. Writing to a configuration register using
the SPI updates the SRAM location of the register but does not
automatically update its settings in the flash memory bank. The
manual flash memory update command (Register GLOB_CMD,
Bit 3, see Table 112) provides a convenient method for saving
all of these settings to the flash memory bank at one time. A yes
in the flash backup column of Table 9 identifies the registers
that have storage support in the flash memory bank.
MANUAL
FLASH
BACKUP
DEVICE CONFIGURATION
Each configuration register contains 16 bits (two bytes). Bits[7:0]
contain the low byte, and Bits[15:8] contain the high byte. Each
byte has its own unique address in the user register map (see
Table 9). Updating the contents of a register requires writing to
both of its bytes in the following sequence: low byte first, high
byte second. There are three parts to coding a SPI command
(see Figure 40) that write a new byte of data to a register: the
write bit (R/W = 1), the address of the byte, [A6:A0], and the new
Rev. C | Page 21 of 41
NONVOLATILE
FLASH MEMORY
VOLATILE
SRAM
(NO SPI ACCESS)
SPI ACCESS
START-UP
RESET
Figure 47. SRAM and Flash Memory Diagram
17328-036
Inertial Sensor
Accelerometer
Gyroscope (X-Axis)
Gyroscope (Y-Axis)
Gyroscope (Z-Axis)
ADIS16505
Data Sheet
USER REGISTER MEMORY MAP
Table 9. User Register Memory Map (N/A Means Not Applicable)
Name
Reserved
DIAG_STAT
X_GYRO_LOW
X_GYRO_OUT
Y_GYRO_LOW
Y_GYRO_OUT
Z_GYRO_LOW
Z_GYRO_OUT
X_ACCL_LOW
X_ACCL_OUT
Y_ACCL_LOW
Y_ACCL_OUT
Z_ACCL_LOW
Z_ACCL_OUT
TEMP_OUT
TIME_STAMP
Reserved
DATA_CNTR
X_DELTANG_LOW
X_DELTANG_OUT
Y_DELTANG_LOW
Y_DELTANG_OUT
Z_DELTANG_LOW
Z_DELTANG_OUT
X_DELTVEL_LOW
X_DELTVEL_OUT
Y_DELTVEL_LOW
Y_DELTVEL_OUT
Z_DELTVEL_LOW
Z_DELTVEL_OUT
Reserved
XG_BIAS_LOW
XG_BIAS_HIGH
YG_BIAS_LOW
YG_BIAS_HIGH
ZG_BIAS_LOW
ZG_BIAS_HIGH
XA_BIAS_LOW
XA_BIAS_HIGH
YA_BIAS_LOW
YA_BIAS_HIGH
ZA_BIAS_LOW
ZA_BIAS_HIGH
Reserved
FILT_CTRL
RANG_MDL
R/W
N/A
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
N/A
R
R
R
R
R
R
R
R
R
R
R
R
R
N/A
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
R/W
R
Flash Backup
N/A
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
N/A
No
No
No
No
No
No
No
No
No
No
No
No
No
N/A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
N/A
Yes
No
Address
0x00, 0x01
0x02, 0x03
0x04, 0x05
0x06, 0x07
0x08, 0x09
0x0A, 0x0B
0x0C, 0x0D
0x0E, 0x0F
0x10, 0x11
0x12, 0x13
0x14, 0x15
0x16, 0x17
0x18, 0x19
0x1A, 0x1B
0x1C, 0x1D
0x1E, 0x1F
0x20, 0x21
0x22, 0x23
0x24, 0x25
0x26, 0x27
0x28, 0x29
0x2A, 0x2B
0x2C, 0x2D
0x2E, 0x2F
0x30, 0x31
0x32, 0x33
0x34, 0x35
0x36, 0x37
0x38, 0x39
0x3A, 0x3B
0x3C to 0x3F
0x40, 0x41
0x42, 0x43
0x44, 0x45
0x46, 0x47
0x48, 0x49
0x4A, 0x4B
0x4C, 0x4D
0x4E, 0x4F
0x50, 0x51
0x52, 0x53
0x54, 0x55
0x56, 0x57
0x58 to 0x5B
0x5C, 0x5D
0x5E, 0x5F
Default
N/A
0x0000
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
N/A
0x0000
N/A1
Rev. C | Page 22 of 41
Register Description
Reserved
Output, system error flags
Output, x-axis gyroscope, low word
Output, x-axis gyroscope, high word
Output, y-axis gyroscope, low word
Output, y-axis gyroscope, high word
Output, z-axis gyroscope, low word
Output, z-axis gyroscope, high word
Output, x-axis accelerometer, low word
Output, x-axis accelerometer, high word
Output, y-axis accelerometer, low word
Output, y-axis accelerometer, high word
Output, z-axis accelerometer, low word
Output, z-axis accelerometer, high word
Output, temperature
Output, time stamp
Reserved
New data counter
Output, x-axis delta angle, low word
Output, x-axis delta angle, high word
Output, y-axis delta angle, low word
Output, y-axis delta angle, high word
Output, z-axis delta angle, low word
Output, z-axis delta angle, high word
Output, x-axis delta velocity, low word
Output, x-axis delta velocity, high word
Output, y-axis delta velocity, low word
Output, y-axis delta velocity, high word
Output, z-axis delta velocity, low word
Output, z-axis delta velocity, high word
Reserved
Calibration, offset, gyroscope, x-axis, low word
Calibration, offset, gyroscope, x-axis, high word
Calibration, offset, gyroscope, y-axis, low word
Calibration, offset, gyroscope, y-axis, high word
Calibration, offset, gyroscope, z-axis, low word
Calibration, offset, gyroscope, z-axis, high word
Calibration, offset, accelerometer, x-axis, low word
Calibration, offset, accelerometer, x-axis, high word
Calibration, offset, accelerometer, y-axis, low word
Calibration, offset, accelerometer, y-axis, high word
Calibration, offset, accelerometer, z-axis, low word
Calibration, offset, accelerometer, z-axis, high word
Reserved
Control, Bartlett window FIR filter
Measurement range (model specific) identifier
Data Sheet
Name
MSC_CTRL
UP_SCALE
DEC_RATE
Reserved
GLOB_CMD
Reserved
FIRM_REV
FIRM_DM
FIRM_Y
PROD_ID
SERIAL_NUM
USER_SCR_1
USER_SCR_2
USER_SCR_3
FLSHCNT_LOW
FLSHCNT_HIGH
1
ADIS16505
R/W
R/W
R/W
R/W
N/A
W
N/A
R
R
R
R
R
R/W
R/W
R/W
R
R
Flash Backup
Yes
Yes
Yes
N/A
No
N/A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Address
0x60, 0x61
0x62, 0x63
0x64, 0x65
0x66, 0x67
0x68, 0x69
0x6A to 0x6B
0x6C, 0x6D
0x6E, 0x6F
0x70, 0x71
0x72, 0x73
0x74, 0x75
0x76, 0x77
0x78, 0x79
0x7A, 0x7B
0x7C, 0x7D
0x7E, 0x7E
Default
0x00C1
0x07D0
0x0000
N/A
N/A
N/A
N/A
N/A
N/A
0x4079
N/A
N/A
N/A
N/A
N/A
N/A
See Table 103 for the model specific default value for this register.
Rev. C | Page 23 of 41
Register Description
Control, input/output and other miscellaneous options
Control, scale factor for input clock, scaled sync mode
Control, decimation filter (output data rate)
Reserved
Control, global commands
Reserved
Identification, firmware revision
Identification, date code, day and month
Identification, date code, year
Identification, device number (0x4079 = 16,505 decimal)
Identification, serial number
User Scratch Register 1
User Scratch Register 2
User Scratch Register 3
Output, flash memory write cycle counter, lower word
Output, flash memory write cycle counter, upper word
ADIS16505
Data Sheet
USER REGISTER DEFINTIONS
Bits
2
Addresses
0x02, 0x03
Default
0x0000
Access
R
Flash Backup
No
1
Table 11. DIAG_STAT Bit Assignments
Bits
[15:11]
10
9
8
7
6
5
4
3
Description
Reserved.
Accelerometer failure. A 1 indicates failure of the
accelerometer at the conclusion of the self test
(Register GLOB_CMD, Bit 2, see Table 112). If this error
occurs, repeat the same test. If this error persists,
replace the ADIS16507. Motion during this test may
cause a false failure.
Gyroscope 2 failure. A 1 indicates failure of Gyroscope 2 at
the conclusion of the self test (Register GLOB_CMD, Bit 2,
see Table 112). If this error occurs, repeat the same test.
If this error persists, replace the ADIS16507. Motion
during this test may cause a false failure.
Gyroscope 1 failure. A 1 indicates failure of Gyroscope 1 at
the conclusion of the self test (Register GLOB_CMD, Bit 2,
see Table 112). If this error occurs, repeat the same test.
If this error persists, replace the ADIS16507. Motion
during this test may cause a false failure.
Clock error. A 1 indicates that the internal data
sampling clock (fSM, see Figure 30) does not
synchronize with the external clock, which only applies
when using scaled sync mode (Register MSC_CTRL,
Bits[3:2] = 10, see Table 106). When this error occurs,
adjust the frequency of the clock signal on the SYNC pin
to operate within the appropriate range.
Memory failure. A 1 indicates a failure in the flash memory
test (Register GLOB_CMD, Bit 4, see Table 112), which
involves a comparison between a cyclic redundancy
check (CRC) calculation of the present flash memory
and a CRC calculation from the same memory locations at
the time of initial programming (during the production
process). If this error occurs, repeat the same test. If this
error persists, replace the ADIS16505.
Sensor failure. A 1 indicates failure of at least one
sensor, at the conclusion of the self test (Register
GLOB_CMD, Bit 2, see Table 112). If this error occurs,
repeat the same test. If this error persists, replace the
ADIS16505. Motion during this test may cause a false
failure.
Standby mode. A 1 indicates that the voltage across
VDD and GND is
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