ADL5317-EVAL

Avalanche Photodiode Bias Controller and Wide Range (5 nA to 5 mA) Current Monitor ADL5317 FEATURES Accurately sets avalanche photodiode (APD) bias voltage Wide bias range from 6 V to 75 V 3 V-compatible control interface Monitors photodiode current (5:1 ratio) over six decades Linearity 0.25% from 10 nA to 1 mA, 0.5% from 5 nA to 5 mA Overcurrent protection and overtemperature shutdown Miniature 16-lead chip scale package (LFCSP 3 mm × 3 mm) FUNCTIONAL BLOCK DIAGRAM 16 15 14 13 COMM FALT 1 COMM COMM COMM ADL5317 OVERCURRENT PROTECTION THERMAL PROTECTION CURRENT MIRROR 5:1 NC 12 APPLICATIONS Optical power monitoring and biasing in APD systems Wide dynamic range voltage sourcing and current monitoring in high voltage systems VSET 2 30 × VSET IPDM 11 29 × R IAPD 5 3 VPLV VPHV VPHV 5 R IAPD VCLH 6 NC 10 4 GARD 7 VAPD 8 GARD 9 Figure 1. GENERAL DESCRIPTION The ADL5317 is a high voltage, wide dynamic range, biasing and current monitoring device optimized for use with avalanche photodiodes. When used with a stable high voltage supply (up to 80 V), the bias voltage at the VAPD pin can be varied from 6 V to 75 V using the 3 V-compatible VSET pin. The current sourced from the VAPD pin over a range of 5 nA to 5 mA is accurately mirrored with an attenuation of 5 and sourced from the IPDM monitor output. In a typical application, the monitor output drives a current input logarithmic amplifier to produce an output representing the optical power incident upon the photodiode. The photodiode anode can be connected to a high speed transimpedance amplifier for the extraction of the data stream. A signal of 0.2 V to 2.5 V with respect to ground applied at the VSET pin is amplified by a fixed gain of 30 to produce the 6 V to 75 V bias at Pin VAPD. The accuracy of the bias control interface of the ADL5317 allows for straightforward calibration, thereby maintaining a constant avalanche multiplication factor of the photodiode over temperature. The current monitor output, IPDM, maintains its high linearity vs. photodiode current over the full range of APD bias voltage. The current ratio of 5:1 remains constant as VSET and VPHV are varied. The ADL5317 also offers a supply tracking mode compatible with adjustable high voltage supplies. The VAPD pin accurately follows 2.0 V below the VPHV supply pin when VSET is tied to a voltage from 3.0 V to 5.5 V (or higher with a current limiting resistor), and the VCLH pin is open. Protection from excessive input current at VAPD as well as excessive die temperature is provided. The voltage at VAPD falls rapidly from its setpoint when the input current exceeds 18 mA nominally. A die temperature in excess of 140°C will cause the bias controller and monitor to shut down until the temperature falls below 120°C. Either overstress condition will trigger a logic low at the FALT pin, an open collector output loaded by an external pull-up to an appropriate logic supply (1 mA max). The ADL5317 is available in a 16-lead LFCSP package and is specified for operation from −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. 05456-001 ADL5317 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 Typical Performance Characteristics ............................................. 6 Theory of Operation ........................................................................ 9 Bias Control Interface .................................................................. 9 GARD Interface ............................................................................ 9 VCLH Interface .......................................................................... 10 Noise Performance..................................................................... 10 Response Time............................................................................ 10 Device Protection ....................................................................... 10 Applications..................................................................................... 11 Supply Tracking Mode............................................................... 11 Translinear Log Amp Interfacing............................................. 11 Characterization Methods ........................................................ 12 Evaluation Board ............................................................................ 14 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 16 REVISION HISTORY 7/05—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADL5317 SPECIFICATIONS VPHV = 78 V, VPLV = 5 V, VAPD = 60 V, IAPD = 5 μA, TA = 25°C, unless otherwise noted. Table 1. Parameter CURRENT MONITOR OUTPUT Current Gain from VAPD to IPDM Nonlinearity Small-Signal Bandwidth Wideband Noise at IPDM Output Voltage Range APD BIAS CONTROL Specified VAPD Voltage Operating Range 0 0 6 VPHV − 35 VPHV − 35 3 5n 29.7 0.2 100 0.3 20 100 VAPD Supply Tracking Offset (Below VPHV) OVERSTRESS PROTECTION VAPD Current Compliance Limit Thermal Shutdown Trip Point Thermal Hysteresis FALT Output Low Voltage POWER SUPPLIES Low Voltage Supply Quiescent Current High Voltage Supply Quiescent Current 1.90 14 2.0 18 140 20 2.15 21 30 0.5 5m 30.3 5.5 Min 0.198 0.193 Typ 0.200 0.25 0.5 2 2 10 Max 0.202 0.207 1.6 3.0 Unit A/A % % kHz MHz nA V V V V V mV A V/V mV V MΩ μA μsec μsec V mA °C °C V V mA V mA mA Conditions IPDM (Pin 11) TA = 25°C −40°C < TA < +85°C 10 nA < IAPD < 1 mA 5 nA < IAPD < 5 mA IAPD = 5 nA, VPHV = 60 V, VAPD = 30 V IAPD = 5 μA, VPHV = 60 V, VAPD = 30 V IAPD = 5 μA, CGRD = 2 nF, BW = 10 MHz, VPHV = 40 V, VAPD = 30 V VAPD > 3 × VPLV VAPD < 3 × VPLV VSET (Pin 2), VAPD (Pin 8) 10 V < VPHV < 41 V 41 V < VPHV < 76.5 V 76.5 V < VPHV < 80 V Flows from VAPD pin 0.2 V < VSET < 2.5 V 1 VPLV VAPD / 3 VPHV − 1.5 VPHV − 1.5 75 VAPD to GARD Offset Specified Input Current Range, IAPD VSET to VAPD Incremental Gain VSET Input Referred Offset, 1σ VSET Voltage Range Incremental Input Resistance at VSET Input Bias Current at VSET VAPD Settling Time, 5% VSET = 2.0 V VSET = 2.0 V, flows from VSET pin VSET = 1.6 V to 2.4 V, CGRD = 2 nF, VPHV = 60 V, VAPD = 30 V VSET = 2.4 V to 1.6 V, CGRD = 2 nF, VPHV = 60 V, VAPD = 30 V VSET = 5.0 V, 10 V < VPHV < 77 V FALT (Pin 1) VSET = 2.0 V, VAPD deviation of 500 mV Die temperature rising Fault condition, load current < 1 mA VPHV (Pin 4, Pin 5), VPLV (Pin 3) VPLV Independent of IAPD VPHV IAPD = 5 μA, VAPD = 60 V IAPD = 1 mA, VAPD = 60 V 0.8 4 0.7 10 2.3 3.6 6 0.84 80 2.9 4.5 1 Tested 1.5 V < VSET < 2.5 V, guaranteed operation 0.2 V < VSET < 2.5 V. Rev. 0 | Page 3 of 16 ADL5317 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Input Current at VAPD Internal Power Dissipation θJA (Soldered Exposed Paddle) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature Range (Soldering 60 sec) Rating 80 V 25 mA 615 mW 65°C/W 125°C −40°C to +85°C −65°C to +150°C 300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 4 of 16 ADL5317 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 16 COMM 15 COMM 13 COMM 14 COMM FALT 1 VSET 2 VPLV 3 VPHV 4 PIN 1 INDICATOR 12 NC 11 IPDM 10 NC 9 GARD ADL5317 TOP VIEW (Not to Scale) GARD 7 VAPD 8 VPHV 5 VCLH 6 NC = NO CONNECT Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1 2 3 4, 5 6 7, 9 8 10, 12 11 13 to 16 Mnemonic FALT VSET VPLV VPHV VCLH GARD VAPD NC IPDM COMM Description Open Collector (Active Low) Logic Output. Indicates an overcurrent or overtemperature condition. APD Bias Voltage Setting Input. Short to VPLV for supply tracking mode. Low Voltage Supply, 4 V to 6 V. High Voltage Supply, 10 V to 80 V. Can be shorted to VPHV for extended linear operating range. No connect for supply tracking mode. Guard pin tracks VAPD pin and filters setpoint buffer noise (with External Capacitor CGRD to COMM). Optional shielding of VAPD trace. Capacitive load only. APD Bias Voltage Output and Current Input. Sources current only. Optional shielding of IPDM trace. No connection to die. Photodiode Monitor Current Output. Sources current only. Current at this node is equal to IAPD/5. Analog Ground. Rev. 0 | Page 5 of 16 05456-002 ADL5317 TYPICAL PERFORMANCE CHARACTERISTICS VPHV = 78 V, VPLV = 5 V, VAPD = 60 V, IAPD = 5 μA, TA = 25°C, unless otherwise noted. 10m 1m 100μ IPDM (Amperes) 2.0 1.5 1.0 IPDM LINEARITY (%) 10m 1m 100μ +85°C –40°C +25°C VPHV = 78V, VAPD = 60V VPHV = 45V, VAPD = 32V VPHV = 10V, VAPD = 6V VPHV = 78V, VAPD = 60V VPHV = 45V, VAPD = 32V 2.0 1.5 1.0 0.5 0 10μ 1μ 100n 10n 1n 100p 1n 0.5 0 –0.5 –1.0 –1.5 –2.0 10m 10μ 1μ 100n 10n 1n 100p 1n VPHV = 10V, VAPD = 6V –0.5 –1.0 –1.5 –2.0 10m +85°C +25°C –40°C 10n 100n 1μ 10μ 100μ 1m IAPD (Amperes) 05456-003 IPDM LINEARITY (%) 05456-008 IPDM (Amperes) 10n 100n 1μ 10μ 100μ 1m IAPD (Amperes) Figure 3. IPDM Linearity for Multiple Temperatures, Normalized to IAPD = 5 μA, 25°C 80 70 60 50 VAPD (V) Figure 6. IPDM Linearity for Multiple Values of VAPD and VPHV, Normalized to IAPD = 5 μA, VPHV =78 V, VAPD = 60 V 31.0 30.8 30.6 VPHV = 45V, +85°C VPHV = 45V, +25°C VPHV = 45V, –40°C VPHV = 78V, +85°C VPHV = 78V, +25°C VPHV = 78V, –40°C VPHV = 78V, +85°C VPHV = 78V, +25°C VPHV = 78V, –40°C GAIN (V/V) 30.4 30.2 30.0 29.8 29.6 29.4 40 30 20 05456-006 VPHV = 45V, –40°C 0 0 VPHV = 45V, +85°C VPHV = 45V, +25°C 0.5 1.0 1.5 VSET (V) 2.0 2.5 3.0 29.2 29.0 0 0.5 1.0 1.5 VSET (V) 2.0 2.5 3.0 Figure 4. VAPD vs. VSET for Multiple Temperatures, VPHV = 78 V and VPHV = 45 V, IAPD = 5 μA 2.150 2.125 2.100 2.075 –40°C +25°C Figure 7. Incremental Gain from VSET to VAPD vs. VSET for Multiple Temperatures, IAPD = 5 μA, VPHV = 78 V and 45 V 70 60 78/60 +25°C 45/32 +25°C 10/6 +25°C 78/60 –40°C 45/32 –40°C 10/6 –40°C 78/60 +85°C 45/32 +85°C 10/6 +85°C 0.030 VPHV = 78V, VAPD = 60V; +85°C, +25°C, –40°C 0.020 VPHV – VAPD (V) 2.050 2.000 1.975 1.950 1.925 1.900 1.875 1.850 0 10 20 30 40 50 60 70 80 90 VPHV (V) 05456-005 VAPD (V) 2.025 40 0 +85°C 30 VPHV = 45V, VAPD = 32V; +85°C, +25°C, –40°C –0.010 20 –0.020 10 0 1n –0.030 VPHV = 10V, VAPD = 6V; +85°C, +25°C, –40°C 10n 100n 1μ 10μ 100μ 1m IAPD (Amperes) –0.040 10m Figure 5. VAPD Supply Tracking Offset vs. VPHV for Multiple Temperatures Figure 8. VAPD vs. IAPD for Multiple Temperatures and Values of VPHV and VAPD Rev. 0 | Page 6 of 16 VAPD VARIATION (V) 50 0.010 05456-007 10 05456-004 ADL5317 3 +85°C +25°C –40°C 3 +85°C +25°C –40°C 2 2 IPDM LINEARITY (%) 1 IPDM LINEARITY (%) 1 0 0 –1 –1 –2 05456-010 –2 05456-011 –3 1n 10n 100n 1μ 10μ 100μ 1m 10m –3 1n 10n 100n 1μ 10μ 100μ 1m 10m IAPD (Amperes) IAPD (Amperes) Figure 9. IPDM Linearity for Multiple Temperatures and Devices VPHV =75 V, VAPD = 60 V, Normalized to IAPD = 5 μA, 25°C 100pA 5mA 10pA (AMPERES rms/√Hz) Figure 12. IPDM Linearity for Multiple Temperatures and Devices VPHV = 45 V, VAPD = 32 V, Normalized to IAPD = 5 μA, 25°C 4.5 4.0 3.5 500μA 50μA 1pA 5μA (%) 3.0 2.5 2.0 1.5 500nA 50nA 100fA 10fA 5nA 05456-035 1.0 0.5 0 1n 1μ IPDM (Amperes) 10μ 100μ 05456-036 1fA 1k 10k 100k FREQUENCY (Hz) 1M 10M 10n 100n 1m Figure 10. Output Current Noise Density vs. Frequency for Multiple Values of IAPD, CGARD = 2 nF, VPHV = 40 V, VAPD = 30 V 30 +3 SIGMA 20 Figure 13. Output Wideband Current Noise as a Percentage of IPDM vs. IPDM, CGARD = 2 nF, VPHV = 40 V, VAPD = 30 V, BW = 10 MHz 10 5 50μA NORMALIZED RESPONSE (dB) 10 AVERAGE 0 5μA –5 –10 5nA –15 –20 –25 –30 10 500nA VAPD DRIFT (mV) 0 –10 –20 –3 SIGMA 50nA 05456-043 –40 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 05456-042 –30 TEMPERATURE (°C) 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 11. Temperature Drift of VAPD, 3 σ to Either Side of Mean Figure 14. Small Signal AC Response from IAPD to IPDM, for IAPD in Decades from 5 nA to 50 μA, VPHV = 60 V, VAPD = 30 V Rev. 0 | Page 7 of 16 ADL5317 10m 1m 100μ 75 100μA TO 1mA: T-RISE =