50 MHz to 6 GHz
TruPwr Detector
ADL5501
5
FEATURES
True rms response
Excellent temperature stability
Up to 30 dB input dynamic range
50 Ω input impedance
1.25 V rms, 15 dBm, maximum input
Single-supply operation: 2.7 V to 5.5 V
Low power: 3.3 mW at 3 V supply
RoHS-compliant
OUTPUT (V)
1
0.1
Measurement of CDMA-, CDMA2000-, W-CDMA-, and QPSK-/
QAM-based OFDM, and other complex modulation
waveforms
RF transmitter or receiver power measurement
0.03
–25
–20
–15
–10
–5
0
5
10
15
INPUT (dBm)
06056-001
APPLICATIONS
Figure 1. Output vs. Input Level, Supply = 3 V, Frequency = 1.9 GHz
GENERAL DESCRIPTION
The on-chip, 100 Ω series resistance at the output, combined
with an external shunt capacitor, creates a low-pass filter response
that reduces the residual ripple in the dc output voltage. For more
complex waveforms, an external capacitor at the FLTR pin can
be used for supplementary signal demodulation.
The ADL5501 is a mean-responding TruPwr™ power detector
for use in high frequency receiver and transmitter signal chains
from 50 MHz to 6 GHz. It is easy to apply, requiring only a single
supply between 2.7 V and 5.5 V and a power supply decoupling
capacitor. The input is internally ac-coupled and has a nominal
input impedance of 50 Ω. The output is a linear-responding dc
voltage with a conversion gain of 6.3 V/V rms at 900 MHz.
The ADL5501 offers excellent temperature stability across a
30 dB range and near 0 dB measurement error across temperature
over the top portion of the dynamic range. In addition to its
temperature stability, the ADL5501 offers low process variations
that further reduce calibration complexity.
The ADL5501 is intended for true power measurement of simple
and complex waveforms. The device is particularly useful for
measuring high crest factor (high peak-to-rms ratio) signals,
such as CDMA-, CDMA2000-, W-CDMA-, and QPSK-/QAMbased OFDM waveforms. The on-chip modulation filter provides
adequate averaging for most waveforms.
The ADL5501 operates from −40°C to +85°C and is available in
a small 6-lead SC-70 package. It is fabricated on a proprietary
high fT silicon bipolar process.
FUNCTIONAL BLOCK DIAGRAM
ADL5501
INTERNAL FILTER
CAPACITOR
i
TRANSCONDICTANCE
CELLS
x2
VPOS
FLTR
ERROR
AMP
i
BUFFER
BAND-GAP
REFERENCE
100Ω
VRMS
ENBL
COMM
06056-002
RFIN
x2
Figure 2.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2009 Analog Devices, Inc. All rights reserved.
ADL5501
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Coupling Using a Series Resistor ................................... 19
Applications ....................................................................................... 1
Multiple RF Inputs ..................................................................... 19
General Description ......................................................................... 1
Selecting the Square-Domain Filter and Output Low-Pass
Filter ............................................................................................. 19
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 11
Circuit Description ......................................................................... 17
Filtering ........................................................................................ 17
Applications Information .............................................................. 18
Basic Connections ...................................................................... 18
Output Swing .............................................................................. 18
Power Consumption, Enable, and Power-On/Power-Off
Response Time ............................................................................ 20
Output Drive Capability and Buffering................................... 21
VRMS Output Offset ................................................................. 21
Device Calibration and Error Calculation .............................. 22
Calibration for Improved Accuracy ......................................... 22
Drift over a Reduced Temperature Range .............................. 23
Operation Below 100 MHz ....................................................... 23
Evaluation Board ........................................................................ 23
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25
Linearity ....................................................................................... 18
REVISION HISTORY
3/09—Rev. A to Rev. B
Change to Features ........................................................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Figure 4, Figure 5, Figure 7, and Figure 9 ............... 10
Deleted Figure 17 and Figure 21; Renumbered Sequentially ... 12
Changes to Figure 18 and Figure 21 ............................................. 13
Changes to Figure 36 and Figure 39 ............................................. 16
Changes to Figure 42 ...................................................................... 18
Changes to Operation Below 100 MHz Section ......................... 23
Deleted Figure 56 ............................................................................ 22
Deleted Figure 57 ............................................................................ 23
10/07—Rev. 0 to Rev. A
Changes to General Description .....................................................1
Changes to Table 1.............................................................................3
Changes to Figure 30, Figure 32, and Figure 33 ......................... 14
Changes to Figure 35, Figure 37, and Figure 38 ......................... 15
Changes to Circuit Description Section ...................................... 16
Changes to Layout and Operation Below 100 MHz and
Above 4.0 GHz Section .................................................................. 22
Inserted Figure 56 ........................................................................... 22
Inserted Figure 57 ........................................................................... 23
Changes to Figure 58...................................................................... 23
Deleted Figure 57 and Figure 58 .................................................. 24
Changes to Figure 59 and Figure 60............................................. 24
9/06—Revision 0: Initial Version
Rev. B | Page 2 of 28
ADL5501
SPECIFICATIONS
TA = 25°C, VS = 3.0 V, CFLTR = open, COUT = 100 nF, unless otherwise specified.
Table 1.
Parameter
FREQUENCY RANGE
RMS CONVERSION (f = 50 MHz)
Input Impedance
Input Return Loss
Dynamic Range 1
±1 dB Error 2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept 3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
RMS CONVERSION (f = 100 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error 4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Condition
Input RFIN
Input RFIN to Output VRMS
Min
50
CW input, −40°C < TA < +85°C
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = −21 dBm, 20 mV rms
PIN = −5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
VS = 5 V
Max
6000
Ω||pF
dB
25
26
32
35
8
−18
4.5
0.03
1.81
0.11
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0039
−0.0037
dB/°C
dB/°C
78||4.2
12.6
Ω||pF
dB
28
19
20
23
27
26
30
6
−18
6.1
2.47
0.13
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V/V rms
V
V
V
V
0.0028
−0.0018
dB/°C
dB/°C
7.8
0.03
VS = 5 V
PIN = 5 dBm, 400 mV rms
PIN = −21 dBm, 20 mV rms
PIN = −5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Rev. B | Page 3 of 28
Unit
MHz
87||6.9
11.0
5.6
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
Typ
−0.02
+0.1
ADL5501
Parameter
RMS CONVERSION (f = 450 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
RMS CONVERSION (f = 900 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
Condition
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = −21 dBm, 20 mV rms
PIN = −5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = −21 dBm, 20 mV rms
PIN = −5 dBm
25°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +25°C
Rev. B | Page 4 of 28
Min
Typ
Max
Unit
63||1.4
16.0
Ω||pF
dB
32
20
24
25
29
28
33
5
−20
7.1
0.03
2.81
0.15
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0016
−0.0002
dB/°C
dB/°C
52||0.9
17.5
Ω||pF
dB
33
20
23
24
27
27
30
6
−18
6.3
0.03
2.53
0.14
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0019
−0.0002
dB/°C
dB/°C
ADL5501
Parameter
RMS CONVERSION (f = 1900 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
RMS CONVERSION (f = 2350 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
Condition
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = −21 dBm, 20 mV rms
PIN = −5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = −21 dBm, 20 mV rms
PIN = −5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Rev. B | Page 5 of 28
Min
Typ
Max
Unit
+33||−0.1
15
Ω||pF
dB
32
5
7
25
29
28
32
7
−19
5.5
0.02
2.20
0.12
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0031
−0.0034
dB/°C
dB/°C
+32||−0.3
13.6
Ω||pF
dB
8
4
7
25
29
29
32
8
−18
5.0
0.02
2.00
0.10
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0032
−0.0044
dB/°C
dB/°C
ADL5501
Parameter
RMS CONVERSION (f = 2700 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
RMS CONVERSION (f = 4000 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
Condition
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = –21 dBm, 20 mV rms
PIN = –5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = –21 dBm, 20 mV rms
PIN = –5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Rev. B | Page 6 of 28
Min
Typ
Max
Unit
+35||−0.5
13
Ω||pF
dB
5
3
7
25
30
28
33
8
−17
4.6
0.02
1.84
0.09
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0034
−0.0049
dB/°C
dB/°C
+41||−0.1
20.8
Ω||pF
dB
5
4
5
28
31
30
33
10
−18
3.8
0.01
1.53
0.07
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0019
−0.0043
dB/°C
dB/°C
ADL5501
Parameter
RMS CONVERSION (f = 5000 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
RMS CONVERSION (f = 6000 MHz)
Input Impedance
Input Return Loss
Dynamic Range1
±0.25 dB Error4
±0.25 dB Error2
±1 dB Error2
±2 dB Error2
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept3
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
Condition
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = –21 dBm, 20 mV rms
PIN = –5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Input RFIN to Output VRMS
CW input, −40°C < TA < +85°C
Delta from 25°C, VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
VS = 3 V
VS = 5 V
±1 dB error2
±1 dB error2
VOUT = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = –21 dBm, 20 mV rms
PIN = –5 dBm
25°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ +25°C
Rev. B | Page 7 of 28
Min
Typ
Max
Unit
+51||−0.2
17
Ω||pF
dB
5
5
5
31
35
34
38
15
−20
3.3
0.02
1.33
0.08
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0001
−0.0031
dB/°C
dB/°C
+86||−0.1
10.1
Ω||pF
dB
25
20
20
31
31
35
35
14
−17
2.4
0.02
0.97
0.07
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
V/V rms
V
V
V
0.0017
−0.0008
dB/°C
dB/°C
ADL5501
Parameter
OUTPUT OFFSET
ENABLE INTERFACE
Logic Level to Enable Power, High Condition
Input Current when High
Logic Level to Disable Power, Low Condition
Power-Up Response Time5
POWER SUPPLIES
Operating Range
Quiescent Current
Total Supply Current When Disabled
Condition
No signal at RFIN
Pin ENBL
2.7 V ≤ VS ≤ 5.5 V, −40°C < TA < +85°C
2.7 V at ENBL, –40°C ≤ TA ≤ +85°C
2.7 V ≤ VS ≤ 5.5 V, −40°C < TA < +85°C
CFLTR = COUT = open, 0 dBm at RFIN
CFLTR = 1 nF, COUT = open, 0 dBm at RFIN
CFLTR = open, COUT = 100 nF, 0 dBm at RFIN
Min
−40°C < TA < +85°C
No signal at RFIN6
No signal at RFIN, ENBL input low
2.7
1
Rev. B | Page 8 of 28
Max
150
Unit
mV
0.05
VPOS
0.1
+0.5
V
μA
V
μs
μs
μs
5.5
V
mA
μA
1.8
–0.5
6
21
28
The available output swing and, therefore, the dynamic range are altered by the supply voltage; see Figure 8.
Error referred to best-fit line at 25°C.
3
Calculated using linear regression.
4
Error referred to delta from 25°C response; see Figure 13, Figure 14, Figure 15, Figure 19, Figure 20, and Figure 21.
5
The response time is measured from 10% to 90% of settling level; see Figure 30.
6
Supply current is input-level dependent; see Figure 6.
2
Typ
50
1.1
0.1
10 mA), the AD8051, which also has rail-to-rail
capability, can be used down to a supply voltage of 3 V. It can
deliver up to 45 mA of output current.
VRMS OUTPUT OFFSET
The ADL5501 has a ±1 dB error detection range of about 30 dB,
as shown in Figure 10 to Figure 12 and Figure 16 to Figure 18.
The error is referred to the best-fit line defined in the linear region
of the output response. Below an input power of −20 dBm, the
response is no longer linear and begins to lose accuracy. In addition, depending on the supply voltage, saturation of the output
limits the detection accuracy above 10 dBm. Calibration points
should be chosen in the linear region, avoiding the nonlinear
ranges at the high and low extremes.
Figure 50 shows the distribution of the output response vs. the
input power for multiple devices. The ADL5501 loses accuracy at
low input powers as the output response begins to fan out. As the
input power is reduced, the spread of the output response increases
along with the error. Although some devices follow the ideal linear
response at very low input powers, not all devices continue the
ideal linear regression to a near 0 V y-intercept. Some devices
exhibit output responses that rapidly decrease, and some flatten
out. With no RF signal applied, the ADL5501 has a typical output
offset of 50 mV (with a maximum of 150 mV).
10
5V
0.1µF
100pF
OUTPUT (V)
1
0.01µF
VPOS
VRMS
AD8031
ADL5501
12.6V/V rms
0.1
COMM
Figure 47. Output Buffering Options, Slope of 12.6 V/V rms at 900 MHz
5V
0.1µF
VPOS
ADL5501
5kΩ
0.01µF
AD8031
3.2V/V rms
06056-048
COMM
4kΩ
Figure 48. Output Buffering Options, Slope of 3.2 V/V rms at 900 MHz
5V
0.1µF
100pF
VPOS
0.01µF
VRMS
ADL5501
AD8031
–35
–30
–25
–20
–15
–10
–5
0
5
10
INPUT (dBm)
Figure 50. Output vs. Input Level Distribution of 50 Devices,
Frequency = 900 MHz, Supply = 5.0 V
100pF
VRMS
0.01
–40
6.3V/V rms
06056-049
COMM
Figure 49. Output Buffering Options, Slope of 6.3 V/V rms at 900 MHz
Rev. B | Page 21 of 28
15
06056-050
06056-047
5kΩ
5kΩ
ADL5501
DEVICE CALIBRATION AND ERROR CALCULATION
CALIBRATION FOR IMPROVED ACCURACY
Because slope and intercept vary from device to device, boardlevel calibration must be performed to achieve high accuracy.
In general, calibration is performed by applying two input power
levels to the ADL5501 and measuring the corresponding output
voltages. The calibration points are generally chosen to be within
the linear operating range of the device. The best-fit line is characterized by calculating the conversion gain (or slope) and intercept
using the following equations:
Another way of presenting the error function of the ADL5501
is shown in Figure 52. In this case, the dB error at hot and cold
temperatures is calculated with respect to the transfer function
at ambient. This is a key difference in comparison to the previous
plots. Up until now, the errors were calculated with respect to
the ideal linear transfer function at ambient. When this alternative technique is used, the error at ambient becomes equal to
zero by definition (see Figure 52).
(2)
Intercept = VRMS1 − (Gain × VIN1)
(3)
where:
VIN is the rms input voltage to RFIN.
VRMS is the voltage output at VRMS.
3
2
ERROR (dB)
1
After gain and intercept are calculated, an equation can be
written that allows calculation of an (unknown) input power
based on the measured output voltage.
VIN = (VRMS − Intercept)/Gain
Figure 51 includes a plot of the error at 25°C, the temperature
at which the ADL5501 is calibrated. Note that the error is not
zero; this is because the ADL5501 does not perfectly follow the
ideal linear equation, even within its operating region. The
error at the calibration points is, however, equal to zero by
definition.
3
2
ERROR (dB)
1
+25°C
0
–40°C
–1
–20
–15
–10
–5
0
5
10
15
INPUT (dBm)
06056-051
–2
–3
–25
Figure 51. Error from Linear Reference vs. Input at −40°C, +25°C, and
+85°C vs. +25°C Linear Reference, Frequency = 1900 MHz, Supply = 5.0 V
Figure 51 also includes error plots for the output voltage at
−40°C and +85°C. These error plots are calculated using the
gain and intercept at +25°C. This is consistent with calibration in a mass-production environment where calibration at
temperature is not practical.
–40°C
–2
For an ideal (known) input power, the law conformance error of
the measured data can be calculated as
ERROR (dB) =
20 × log [(VRMS, MEASURED − Intercept)/(Gain × VIN, IDEAL)] (5)
+25°C
0
–1
(4)
+85°C
+85°C
–3
–25
–20
–15
–10
–5
INPUT (dBm)
0
5
10
15
06056-052
Gain = (VRMS2 − VRMS1)/(VIN2 − VIN1)
Figure 52. Error from +25°C Output Voltage at −40°C, +25°C, and +85°C
After Ambient Normalization, Frequency = 1900 MHz, Supply = 5.0 V
This plot is a useful tool for estimating temperature drift at a
particular power level with respect to the (nonideal) response at
ambient. The linearity and dynamic range tend to be improved
artificially with this type of plot because the ADL5501 does not
perfectly follow the ideal linear equation (especially outside of
its linear operating range). Achieving this level of accuracy in
an end application requires calibration at multiple points in the
operating range of the device.
In some applications, very high accuracy is required at just one
power level or over a reduced input range. For example, in a wireless transmitter, the accuracy of the high power amplifier (HPA)
is most critical at or close to full power. The ADL5501 offers a
tight error distribution in the high input power range, as shown
in Figure 52. The high accuracy range, centered around 9 dBm at
1900 MHz, offers 7 dB of ±0.1 dB detection error over temperature.
Multiple point calibration at ambient temperature in the reduced
range offers precise power measurement with near 0 dB error
from −40°C to +85°C.
The high accuracy range center varies over frequency. At
1900 MHz, the region is centered at approximately 9 dBm.
At higher frequencies, the high accuracy range is centered
at higher input powers (see Figure 13 through Figure 15 and
Figure 19 through Figure 21).
Rev. B | Page 22 of 28
ADL5501
DRIFT OVER A REDUCED TEMPERATURE RANGE
Figure 53 shows the error over temperature for a 1.9 GHz input
signal. Error due to drift over temperature consistently remains
within ±0.25 dB and begins to exceed this limit only when the
ambient temperature goes above +25°C and below −10°C. For
all frequencies using a reduced temperature range, higher
measurement accuracy is achievable.
1.00
0.50
3
2
0.25
1
ERROR (dB)
0
–0.25
–1
–0.50
–0.75
–2
–20
–15
–10
–5
0
5
10
15
INPUT (dBm rms)
06056-100
–1.00
–25
0
–3
–25
–20
–15
–10
The ADL5501 works at frequencies below 100 MHz but exhibits a
slightly higher linearity error. Figure 54 shows the error distribution
of 12 devices at 50 MHz over temperature. When compared to
an ideal linear transfer function at ambient, the error of the
ADL5501 over temperature remains within ±0.5 dB for the
central 20 dB of the dynamic range. At the higher input power
levels, the error grows as the response becomes nonlinear. The
typical slope and intercept at 50 MHz are 4.5 V/V rms and
0.04 V, respectively.
3
2
ERROR (dB)
1
0
–1
–15
–10
–5
INPUT (dBm)
0
5
10
15
06056-053
–2
–20
0
5
10
15
Figure 55. Output Delta from +25°C Output Voltage for
12 Devices at −40°C and +85°C, Frequency = 50 MHz, Supply = 5.0 V
OPERATION BELOW 100 MHz
–3
–25
–5
INPUT (dBm)
Figure 53. Typical Drift at 1.9 GHz for Various Temperatures
06056-054
ERROR (dB)
+15°C
0°C
–10°C
–25°C
–40°C
+85°C
+70°C
+50°C
+35°C
+25°C
0.75
Due to the repeatability of the performance from part to part,
compensation can be applied to reduce the effects of temperature
drift and linearity error. To detect larger dynamic ranges at
lower frequencies, the transfer function at ambient can be
calibrated, thus eliminating the linearity error. This technique
is discussed in detail in the Calibration for Improved Accuracy
section. Figure 55 shows that the dynamic range within ±0.5 dB
error improves to 30 dB by using this method.
Figure 54. Temperature Drift Distributions for 12 Devices at −40°C, +25°C,
and +85°C vs. +25°C Linear Reference, Frequency = 50 MHz, Supply = 5.0 V
EVALUATION BOARD
Figure 56 shows the schematic of the ADL5501 evaluation
board. The layout and silkscreen of the evaluation board layers
are shown in Figure 57 and Figure 58. The board is powered by
a single supply in the 2.7 V to 5.5 V range. The power supply is
decoupled by 100 pF and 0.1 μF capacitors. Table 5 details the
various configuration options of the evaluation board.
Problems caused by impedance mismatch can arise when the
evaluation board is used to examine ADL5501 performance.
One way to reduce these problems is to put a coaxial 3 dB attenuator on the RFIN SMA connector. Mismatches at the source,
cable, and cable interconnection, as well as those occurring on
the evaluation board, can cause these problems.
A simple (and common) example of such a problem is triple
travel due to mismatch at both the source and the evaluation
board. Here the signal from the source reaches the evaluation
board, and mismatch causes a reflection. When that reflection
reaches the source mismatch, it causes a new reflection, which
travels back to the evaluation board, adding to the original signal
incident at the board. The resulting voltage varies with both
cable length and frequency dependence on the relative phase of
the initial and reflected signals. Placing the 3 dB pad at the input of
the board improves the match at the board and, thus, reduces
the sensitivity to mismatches at the source. When such precautions are taken, measurements are less sensitive to cable length and
other fixture issues. In an actual application when the distance
between the ADL5501 and the source is short and well defined,
this 3 dB attenuator is not needed.
Rev. B | Page 23 of 28
ADL5501
TO EDGE
CONNECTOR
C2
0.1µF
VPOS
ADL5501
1
VRMS
VPOS
R5
(OPEN)
R3
0Ω
VRMS
6
C3
(OPEN)
RFIN
2
FLTR
ENBL
5
3
RFIN
COMM
4
C4
100nF
VPOS
R2
(OPEN)
SW1
ENBL
R1
(OPEN)
R4
49.9Ω
TO EDGE
CONNECTOR
06056-056
C1
100pF
Figure 56. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component
GND, VPOS
C1, C2
Description
Ground and supply vector pins.
Power supply decoupling. The nominal supply decoupling of 100 pF and 0.1 μF.
C3
Filter capacitor. The internal averaging capacitor can be augmented by placing additional
capacitance in C3.
Output filtering. The combination of the internal 100 Ω output resistance and C4 produces a lowpass filter to reduce output ripple. The output can also be scaled down using the resistor divider
pads, R3 and R2. In addition, resistors and capacitors can be placed in C4 and R2 to load test VRMS.
Device enable. When the switch is set toward the SW1 label, the ENBL pin is connected to VPOS,
and the ADL5501 is in operating mode. In the opposite switch position, the ENBL pin is grounded
(through the 49.9 Ω resistor), putting the device in power-down mode. While in this switch position,
the ENBL pin can be driven by a signal generator via the SMA labeled ENBL. In this case, R4 serves as
a termination resistor for generators requiring a 50 Ω match.
Alternate interface. R1and R5 allow for VRMS and ENBL to be accessible from the edge
connector, which is used only for characterization.
R1, R5
R1 = open (Size 0402)
R5 = open (Size 0402)
Figure 57. Layout of Evaluation Board, Component Side
06056-058
R4, SW1
R2 = open (Size 0402)
R3 = 0 Ω (Size 0402)
C4 = 100 nF (Size 0402)
R4 = 49.9 Ω (Size 0402)
SW1 = toward SW1 label
06056-057
R2, R3, C4
Default Condition
Not applicable
C1 = 100 pF (Size 0402)
C2 = 0.1 μF (Size 0402)
C3 = open (Size 0402)
Figure 58. Layout of Evaluation Board, Circuit Side
Rev. B | Page 24 of 28
ADL5501
OUTLINE DIMENSIONS
2.20
2.00
1.80
1.35
1.25
1.15
6
5
4
1
2
3
2.40
2.10
1.80
PIN 1
0.65 BSC
1.30 BSC
1.00
0.90
0.70
1.10
0.80
0.10 MAX
0.30
0.15
0.40
0.10
SEATING
PLANE
0.46
0.36
0.26
0.22
0.08
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 59. 6-Lead Thin Shrink Small Outline Transistor Package [SC-70]
(KS-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADL5501AKSZ-R7 1
ADL5501AKSZ-R21
ADL5501-EVALZ1
1
Temperature Range
–40°C to +85°C
–40°C to +85°C
Package Description
6-Lead SC-70, 7” Tape and Reel
6-Lead SC-70, 7” Tape and Reel
Evaluation Board
Z =RoHS Compliant Part.
Rev. B | Page 25 of 28
Package Option
KS-6
KS-6
Branding
Q0Z
Q0Z
Ordering
Quantity
3,000
250
ADL5501
NOTES
Rev. B | Page 26 of 28
ADL5501
NOTES
Rev. B | Page 27 of 28
ADL5501
NOTES
©2006–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06056-0-3/09(B)
Rev. B | Page 28 of 28
