20 MHz to 500 MHz
IF Gain Block
ADL5531
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
Fixed gain of 20 dB
Operation up to 500 MHz
Input/output internally matched to 50 Ω
Integrated bias control circuit
Output IP3
41 dBm at 70 MHz
39 dBm at 190 MHz
Output 1 dB compression: 20.6 dB at 190 MHz
Noise figure: 2.5 dB at 190 MHz
Single 5 V power supply
Small footprint 8-lead LFCSP
ADL5534 20 dB gain dual-channel version
±2 kV ESD (Class 2)
ADL5531
8 NC
NC 1
RFIN 2
NC 3
NC 4
7 RFOUT
BIAS
CONTROL
LINEARIZER
6 NC
5 CLIN
06833-001
FEATURES
NC = NO CONNECT
Figure 1.
GENERAL DESCRIPTION
The ADL5531 is a broadband, fixed-gain, linear amplifier
that operates at frequencies up to 500 MHz. The device can be
used in a wide variety of equipment, including cellular, satellite,
broadband, and instrumentation equipment.
The ADL5531 is fabricated on a GaAs HBT process and has
an ESD rating of ±2 kV (Class 2). The device is packaged in an
8-lead 3 mm × 3 mm LFCSP that uses an exposed paddle for
excellent thermal impedance.
The ADL5531 provides a gain of 20 dB, which is stable over
frequency, temperature, power supply, and from device to device.
This amplifier is single ended and internally matched to 50 Ω.
Only input/output ac coupling capacitors, power supply decoupling
capacitors, and external inductors are required for operation.
The ADL5531 consumes 100 mA on a single 5 V supply and is
fully specified for operation from −40°C to +85°C.
Rev. C
The dual-channel 20 dB gain version, ADL5534, is also available
from Analog Devices, Inc.
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADL5531
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Functional Block Diagram .............................................................. 1
Basic Connections .............................................................................9
General Description ......................................................................... 1
Revision History ............................................................................... 2
Soldering Information and Recommended PCB Land
Pattern .............................................................................................9
Specifications..................................................................................... 3
Evaluation Board ............................................................................ 10
Typical Scattering Parameters..................................................... 4
Outline Dimensions ....................................................................... 11
Absolute Maximum Ratings ............................................................ 5
Ordering Guide .......................................................................... 11
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
REVISION HISTORY
8/2017—Rev. B to Rev. C
Changed CP-8-2 to CP-8-13 ........................................ Throughout
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 11
11/2013—Rev. A to Rev. B
Changes to Figure 2 .......................................................................... 6
Added Figure 14, Renumbered Sequentially ................................ 8
8/2008—Rev. 0 to Rev. A
Changes to Features Section and General Description
Section ................................................................................................ 1
Added Exposed Pad Notation to Outline Dimensions ............. 11
8/2007—Revision 0: Initial Version
Rev. C | Page 2 of 12
Data Sheet
ADL5531
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
Gain (S21)
Input Return Loss (S11)
Output Return Loss (S22)
Reverse Isolation (S12)
FREQUENCY = 70 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 190 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 380 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
POWER INTERFACE
Supply Voltage
Supply Current
vs. Temperature
Power Dissipation
Conditions
Min
Typ
Max
Unit
500
20.3
−19.5
−26.5
−23.0
MHz
dB
dB
dB
dB
20.9
±0.03
±0.22
±0.19
20.4
41.0
2.5
dB
dB
dB
dB
dBm
dBm
dB
20
190 MHz
190 MHz
190 MHz
190 MHz
± 5 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
19.7
20.3
±0.12
±0.22
±0.17
20.6
39.0
2.5
21.0
dB
dB
dB
dB
dBm
dBm
dB
19.2
19.7
±0.15
±0.24
±0.15
20.4
36.0
3.0
20.5
dB
dB
dB
dB
dBm
dBm
dB
4.75
5
100
±15
0.5
5.25
110
V
mA
mA
W
± 50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
± 50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
Pin RFOUT
−40°C ≤ TA ≤ +85°C
VPOS = 5 V
Rev. C | Page 3 of 12
ADL5531
Data Sheet
TYPICAL SCATTERING PARAMETERS
VPOS = 5 V and TA = 25°C. The effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
20
50
100
150
200
250
300
350
400
450
500
S11
S21
S12
S22
Magnitude (dB)
Angle (°)
Magnitude (dB)
Angle (°)
Magnitude (dB)
Angle (°)
Magnitude (dB)
Angle (°)
−19.9933
−19.6622
−17.9244
−18.4041
−18.6386
−19.2303
−19.4456
−20.1783
−20.2409
−20.7266
−20.6064
−132.614
−151.093
−166.031
−177.116
+179.6269
+175.3384
+175.0622
+173.422
+174.1593
+175.6233
+175.853
21.99753
21.20511
20.83152
20.67117
20.56097
20.45422
20.34563
20.21365
20.07116
19.90932
19.72779
173.7349
170.3258
167.5595
164.1871
160.4721
156.5272
152.4398
148.3008
144.2311
140.0789
135.9952
−24.2574
−23.4894
−23.22
−23.0914
−22.9921
−22.9219
−22.8475
−22.7662
−22.665
−22.5569
−22.4519
4.854191
5.603544
6.119636
6.631844
7.784913
8.763143
9.908631
11.21706
12.36953
13.57857
14.73385
−19.1444
−21.4752
−23.0386
−23.335
−22.8555
−21.6619
−20.2707
−18.7007
−17.1242
−15.726
−14.41
−46.7161
−89.9497
−115.741
−119.722
−115.855
−111.307
−106.681
−104.369
−103.565
−103.863
−105.079
Rev. C | Page 4 of 12
Data Sheet
ADL5531
ABSOLUTE MAXIMUM RATINGS
ESD CAUTION
Table 3.
Parameter
Supply Voltage on RFOUT
Input Power on RFIN
Internal Power Dissipation (Paddle Soldered)
θJA (Junction to Air)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
ESD Rating—Human Body Model
Rating
5.5 V
10 dBm
600 mW
103°C/W
150°C
−40°C to +85°C
−65°C to +150°C
±2 kV
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. C | Page 5 of 12
ADL5531
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC 1
NC 3
NC 4
8 NC
ADL5531
TOP VIEW
(Not to Scale)
7 RFOUT
6 NC
5 CLIN
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD. SOLDER THIS
PAD TO A LOW IMPEDANCE
GROUND PLANE.
06833-002
RFIN 2
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 3, 4, 6, 8
2
5
7
Mnemonic
NC
RFIN
CLIN
RFOUT
EP
Exposed Pad
Description
No Connect.
RF Input. Requires a 10 nF dc blocking capacitor.
A 1 nF capacitor connected between Pin 5 and ground provides decoupling for the on-board linearizer.
RF Output and Bias. DC bias is provided to this pin through a 470 nH inductor (Coilcraft 1008CS-471XJLC or
equivalent). The RF path requires a 10 nF dc blocking capacitor.
GND. Solder this pad to a low impedance ground plane.
Rev. C | Page 6 of 12
Data Sheet
ADL5531
TYPICAL PERFORMANCE CHARACTERISTICS
30
10
27
24
P1dB
6
21
NOISE
FIGURE
0
100
50
150
200
250
300
350
400
450
36
21.0
+85°C
12
500
FREQUENCY (MHz)
32
20.5
–40°C
20.0
19.0
28
0
42
150
200
250
300
350
400
26
500
450
70MHz
20MHz
40
21.0
38
20.8
–40°C
20.4
20.2
+25°C
20.0
19.8
380MHz
34
500MHz
32
30
+85°C
19.6
190MHz
36
OIP3 (dBm)
20.6
28
19.4
26
19.2
50
100
150
200
250
300
350
400
450
500
FREQUENCY (MHz)
24
–8
06833-004
0
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
20
06833-007
GAIN (dB)
100
Figure 6. P1dB and OIP3 vs. Frequency and Temperature
21.2
500
POUT PER TONE (dBm)
Figure 4. Gain vs. Frequency and Temperature
Figure 7. OIP3 vs. Output Power (POUT) and Frequency
0
5.0
–5
4.5
NOISE FIGURE (dB)
–10
S11 (dB)
–15
S12 (dB)
–20
–25
–30
4.0
3.5
+85°C
3.0
+25°C
2.5
–40°C
2.0
–35
S22 (dB)
0
50
100
150
200
250
300
350
400
450
500
FREQUENCY (MHz)
1.5
06833-005
S-PARAMETERS (dB)
50
FREQUENCY (MHz)
21.4
–40
30
19.5
Figure 3. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
19.0
34
+25°C
06833-008
0
21.5
18
15
2
38
+85°C
06833-006
8
P1dB (dBm)
33
12
40
–40°C
22.0
36
14
4
22.5
39
OIP3
16
42
+25°C
OIP3 (dBm)
42
06833-003
NOISE FIGURE, GAIN (dB)
18
23.0
45
GAIN
20
P1dB, OIP3 (dBm)
22
0
50
100
150
200
250
300
350
400
450
FREQUENCY (MHz)
Figure 5. Input Return Loss (S11), Reverse Isolation (S12), and
Output Return Loss (S22) vs. Frequency
Figure 8. Noise Figure vs. Frequency and Temperature
Rev. C | Page 7 of 12
ADL5531
Data Sheet
45
5.0
40
4.5
4.0
NOISE FIGURE (dB)
30
25
20
15
3.5
3.0
2.5
2.0
10
1.5
5
37.9
38.3
38.7
39.1
39.5
39.9
1.0
06833-009
0
37.5
40.3
OIP3 (dBm)
0
50
100
150
Figure 9. OIP3 Distribution at 190 MHz
250
300
350
400
450
500
Figure 12. Noise Figure vs. Frequency at 25°C, Multiple Devices Shown
60
150
140
50
SUPPLY CURRENT (mA)
130
PERCENTAGE (%)
200
FREQUENCY (MHz)
06833-012
PERCENTAGE (%)
35
40
30
20
10
5.25V
120
110
100
5V
90
80
4.75V
70
20.4
20.6
20.8
21.0
21.2
21.4
P1dB (dBm)
50
–40 –30 –20 –10
06833-010
20.2
20
30
40
50
60
70
80
90
Figure 13. Supply Current vs. Supply Voltage and Temperature
115
50
+85°C
110
45
105
35
30
25
20
15
100
90
85
80
70
5
60
19.8
20.1
20.0
20.3
20.2
20.5
20.4
20.7
20.6
20.9
20.8
GAIN (dB)
21.0
06833-011
65
19.9
–40°C
75
10
19.7
+25°C
95
55
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
20
POUT (dBm)
Figure 14. Supply Current vs. POUT and Temperature
Figure 11. Gain Distribution at 190 MHz
Rev. C | Page 8 of 12
22
06833-100
SUPPLY CURRENT (mA)
40
PERCENTAGE (%)
10
TEMPERATURE (°C)
Figure 10. P1dB Distribution at 190 MHz
0
0
06833-013
60
0
20.0
Data Sheet
ADL5531
BASIC CONNECTIONS
2.03mm
8
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
1.78mm
0.5mm
1.85mm
1
4
5
1.53mm
0.71mm
Figure 15 shows the recommended land pattern for ADL5531.
To minimize thermal impedance, the exposed pad on the
package underside is soldered down to a ground plane. If
multiple ground layers exist, they are stitched together using
vias (a minimum of five vias is recommended). Pin 1, Pin 3,
Pin 4, Pin 6, and Pin 8 can be left unconnected or can be connected
to ground. Connecting these pins to ground slightly enhances
thermal impedance. For more information on land pattern design
and layout, refer to AN-772 Application Note, A Design and
Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP).
Figure 15. Recommended Land Pattern
VPOS
C6
1µF
C5
10nF
L1
470nH
(TESTLOOP RED)
W1
GND
C1
10nF
1 NC
ADL5531
2 RFIN
NC 8
RFOUT 7
3 NC
NC 6
4 NC
CLIN 5
C2
RFOUT
10nF
C3
1nF
06833-014
RFIN
(TESTLOOP BLACK)
NC = NO CONNECT
Figure 16. Basic Connections
Rev. C | Page 9 of 12
06833-015
The basic connections for operating the ADL5531 are shown
in Figure 16. The input and output are ac-coupled with 10 nF
(0402) capacitors. DC bias is provided to the amplifier via an
inductor (Coilcraft 1008CS-471XJLC or equivalent) connected
to the RFOUT pin. The bias voltage should be decoupled using
10 nF and 1 μF capacitors.
ADL5531
Data Sheet
EVALUATION BOARD
Figure 19 shows the schematic for the ADL5531 evaluation
board. The board is powered by a single 5 V supply.
06833-017
The components used on the board are listed in Table 5. Power
can be applied to the board through clip-on leads or through
Jumper W1. Note that C4, C7, C8, L3, L4, L5, R1, and R2 have
no function.
06833-016
Figure 18. Evaluation Board Layout (Top)
Figure 17. Evaluation Board Layout (Bottom)
L5
OPEN
C4
OPEN
C1
10nF
C8
OPEN
R1
OPEN
2 RFIN
RFOUT 7
3 NC
NC 6
4 NC
CLIN 5
L3
OPEN
C7
OPEN
Z1
W1
(TESTLOOP BLACK)
NC 8
1 NC
(TESTLOOP RED)
GND
ADL5531
L2
0Ω
C6
1µF
C2
R2
OPEN
L4
OPEN
RFOUT
10nF
C3
1nF
06833-018
RFIN
VPOS
C5
10nF
L1
470nH
NC = NO CONNECT
Figure 19. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component
Z1
C1, C2
C3
C5
C6
C4, C7, C8
R1, R2
L1
L2
L3, L4, L5
VPOS, GND
W1
RFIN, RFOUT
Function
DUT
AC coupling capacitors
Linearizer capacitor
Power supply decoupling capacitor
Power supply decoupling capacitor
DC bias inductor
Clip-on terminals for power supply
2-pin jumper for connection of ground and supply via cable
50 Ω SMA female connectors
Rev. C | Page 10 of 12
Default Value
ADL5531
10 nF, 0402
1 nF, 0603
10 nF, 0603
1 µF, 0603
Open
Open
470 nH, 1008 (Coilcraft 1008CS-471XJLC or equivalent)
0 Ω, 0402
Open
VPOS, GND
W1
RFIN, RFOUT
Data Sheet
ADL5531
OUTLINE DIMENSIONS
0.50
BSC
8
5
PIN 1 INDEX
AREA
TOP VIEW
0.80
0.75
0.70
PKG-003886
1.55
1.45
1.35
EXPOSED
PAD
0.50
0.40
0.30
SEATING
PLANE
DETAIL A
(JEDEC 95)
1.84
1.74
1.64
SIDE VIEW
0.30
0.25
0.20
4
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.203 REF
BOTTOM VIEW
1
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-229-WEED-4
02-10-2017-A
3.10
3.00 SQ
2.90
Figure 20. 8-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
CP-8-13
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADL5531ACPZ-R7
ADL5531-EVALZ
1
Temperature Range
−40°C to +85°C
Package Description
8-Lead LFCSP, 7” Tape and Reel
Evaluation Board
Z = RoHS Compliant Part.
Rev. C | Page 11 of 12
Package Option
CP-8-13
Branding
Q16
ADL5531
Data Sheet
NOTES
©2007–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06833-0-8/17(C)
Rev. C | Page 12 of 12
工商网监
湘ICP备2023018690号
