ADM1232AARNZ

ADM1232AARNZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOIC8

  • 描述:

    IC SUPERVISOR 1 CHANNEL 8SOIC

  • 数据手册
  • 价格&库存
ADM1232AARNZ 数据手册
Microprocessor Supervisory Circuit ADM1232A APPLICATIONS FUNCTIONAL BLOCK DIAGRAM VCC TOLERANCE 5%/10% TOLERANCE SELECT VREF PB RESET DEBOUNCE TD WATCHDOG TIMEBASE SELECT RESET RESET WATCHDOG TIMER STROBE 00061-001 Precision 5 V voltage monitor with 5% or 10% tolerance options Adjustable STROBE monitor with 150 ms, 600 ms, or 1.2 sec options Fast (20 ns) STROBE pulse width No external components required Packaged in 8-Lead SOIC Specified from −40°C to +85°C RESET GENERATOR FEATURES ADM1232A GND Figure 1. Microprocessor systems Portable equipment Computers Controllers Intelligent instruments Automotive systems Protection against damage caused by microprocessor failure GENERAL DESCRIPTION 5V 5V 10kΩ ADM1232A STROBE RESET GND MICROPROCESSOR I/O RESET TD TOLERANCE 00061-002 The ADM1232A is pin-compatible to the MAX1232, DS1232LP, and DS1232. The ADM1232A can detect strobe pulse widths as narrow as 20 ns, making it compatible with high speed microprocessors. The Analog Devices, Inc., ADM1232A is a microprocessor monitoring circuit that monitors microprocessor supply voltage. It can also detect if a microprocessor has locked up or an external interrupt has been issued. The ADM1232A is available in an 8-lead narrow body SOIC and is specified over the −40°C to +85°C temperature range. Figure 2. Typical Supply Monitoring Application Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1999–2009 Analog Devices, Inc. All rights reserved. ADM1232A TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................5 Applications ....................................................................................... 1 Circuit Information ...........................................................................6 Functional Block Diagram .............................................................. 1 PB RESET .......................................................................................6 General Description ......................................................................... 1 STROBE Timeout Selection.........................................................6 Revision History ............................................................................... 2 TOLERANCE ................................................................................6 Specifications..................................................................................... 3 RESET and RESET Outputs .........................................................6 Absolute Maximum Ratings............................................................ 4 Outline Dimensions ..........................................................................7 ESD Caution .................................................................................. 4 Ordering Guide .............................................................................7 REVISION HISTORY 1/09—Rev. 0 to Rev. A Updated Format .................................................................. Universal Deleted RM-8, N-8, R-16 Packages .................................. Universal Changes to Features and General Description Sections.............. 1 Changes to Table 3 ............................................................................ 5 Changes to Tolerance Section ......................................................... 6 Changes to Ordering Guide ............................................................ 8 7/99—Revision 0: Initial Version Rev. A | Page 2 of 8 ADM1232A SPECIFICATIONS VCC = full operating range, TA = TMIN to TMAX, unless otherwise noted. Table 1. Parameter TEMPERATURE RANGE POWER SUPPLY Voltage Current Min −40 Typ Max +85 Unit °C Test Conditions/Comments TA = TMIN to TMAX. 4.5 5.0 20 200 5.5 50 500 V μA μA VIL, VIH = CMOS levels. VIL, VIH = TTL levels. VCC + 0.3 +0.8 V V +1.0 1.6 μA μA STROBE AND PB RESET INPUTS Input High Level Input Low Level INPUT LEAKAGE CURRENT (STROBE, TOLERANCE) TD OUTPUT CURRENT RESET RESET, RESET 8 −8 10 −12 mA mA When VCC is at 4.5 V to 5.5 V. When VCC is at 4.5 V to 5.5 V. OUTPUT VOLTAGE RESET/RESET VCC − 0.5 VCC − 0.1 V While sourcing less than 500 μA, RESET remains within 0.5 V of VCC on power-down until VCC drops below 2.0 V. While sinking less than 500 μA, RESET remains within 0.5 V of GND on power-down until VCC drops below 2.0 V. RESET/RESET High Level RESET/RESET Low Level 2.0 −0.3 −1.0 0.4 1 V OPERATION RESET Output Voltage RESET Output Voltage VCC TRIP POINT 5% 10% CAPACITANCE Input (STROBE, TOLERANCE) Output (RESET, RESET) PB RESET Time Delay RESET ACTIVE TIME STROBE Pulse Width Timeout Period VCC Fall Time Rise Time VCC FAIL DETECT TO RESET OUTPUT DELAY RESET and RESET Are Logically Correct V V 2.4 VCC − 0.1 0.1 4.5 4.25 4.62 4.37 V V While sourcing less than 50 μA. While sinking less than 50 μA. 4.74 4.49 V V TOLERANCE = GND. TOLERANCE = VCC. 5 7 pF pF TA = 25°C. TA = 25°C. ms ms PB RESET must be held low for a minimum of 20 ms to guarantee a reset. 20 1 250 4 610 20 1000 20 62.5 250 500 150 600 1200 250 1000 2000 10 0 250 610 50 1000 ms ns ms ms ms TD = 0 V. TD = floating. TD = VCC. μs μs Guaranteed by design. Guaranteed by design. μs ms After VCC falls below the set tolerance voltage (see Figure 7). After VCC rises above the set tolerance voltage. Rev. A | Page 3 of 8 ADM1232A ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2. Parameter VCC Logic Inputs Storage Temperature Range Lead Temperature (Soldering, 10 sec) Vapor Phase (60 sec) Infrared (15 sec) Power Dissipation Derate by 12 mW/°C Above 25°C θJA Thermal Impedance (Still Air) Rating 5.5 V −0.3 V to VCC + 0.3 V −65°C to +150°C 300°C 215°C 220°C 900 μW Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 153°C/W Rev. A | Page 4 of 8 ADM1232A PB RESET 1 TD 2 ADM1232A TOLERANCE 3 TOP VIEW (Not to Scale) GND 4 8 VCC 7 STROBE 6 RESET 5 RESET 00061-003 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1 Mnemonic PB RESET 2 TD 3 TOLERANCE 4 5 GND RESET 6 7 RESET STROBE 8 VCC Description Push Button Reset Input. This debounced input ignores pulses of less than 1 ms and is guaranteed to respond to pulses greater than 20 ms. Time Delay Set. This pin allows the user to select the maximum amount of time the ADM1232A allows the STROBE input to remain inactive (that is, STROBE is not receiving any high-to-low transitions), without forcing the ADM1232A to generate a RESET pulse. (See Table 1, the strobe timeout settings in Table 4, and Figure 6.) Tolerance Input. This input determines how much the supply voltage will be allowed to decrease (as a percentage tolerance) before a RESET is asserted. Connect to VCC for 10% tolerance and GND for 5% tolerance. 0 V ground reference for all signals. Active High Logic Output. This pin is asserted when VCC decreases below the amount specified by the TOLERANCE input, or PB RESET is forced low, or if there are no high-to-low transitions within the limits set by TD at STROBE, or during power-up. Open Drain, Active Low Logic Output. The inverse of RESET. The STROBE input is used to monitor the activity of a microprocessor. If there are no high-to-low transitions within the time specified by TD, a reset is asserted. Power Supply Input +5 V. Rev. A | Page 5 of 8 ADM1232A CIRCUIT INFORMATION PB RESET Table 4. Strobe Timeout Settings The PB RESET input makes it possible to manually reset a system using either a standard push-button switch or a logic low input. An internal debounce circuit provides glitch immunity when used with a switch, reducing the effects of glitches on the line. The debounce circuit is guaranteed to cause the ADM1232A to assert a reset if PB RESET is brought low for more than 20 ms and is guaranteed to ignore low inputs of less than 1 ms. Condition TD = 0 V TD = floating TD = VCC Unit ms ms ms RESET MICROPROCESSOR 00061-006 TD STROBE STROBE TIMEOUT PERIOD I/O Figure 6. STROBE Parameters RESET TOLERANCE VCC 00061-004 GND Max 250 1000 2000 STROBE ADM1232A PB RESET Typ 150 600 1200 STROBE PULSE WIDTH VCC VCC Min 62.5 250 500 5V 4.5V (5% TRIP POINT) 5V 4.25V (10% TRIP POINT) RESET OUTPUT DELAY WHEN VCC IS FALLING Figure 4. Typical Push-Button Reset Application RESET OUTPUT DELAY WHEN VCC IS RISING RESET PB RESET DELAY PB RESET VIL 00061-007 PB RESET TIME RESET VIH Figure 7. Reset Output Delay TOLERANCE RESET ACTIVE TIME 00061-005 RESET RESET Figure 5. PB RESET STROBE TIMEOUT SELECTION TD or time delay set is used to set the strobe timeout period. The strobe timeout period is defined as being the maximum time between high-to-low transitions that STROBE accepts before a reset is asserted (see Figure 6). The strobe timeout settings are listed in Table 4. The TOLERANCE input is used to determine the level VCC can vary below 5 V without the ADM1232A asserting a reset. Connecting TOLERANCE to ground selects a −5% tolerance level and causes the ADM1232A to generate a reset if VCC falls below 4.75 V. If TOLERANCE is connected to VCC, a −10% tolerance level is selected and causes the ADM1232A to generate a reset if VCC falls below 4.5 V. Check the parameters for the VCC trip point in the Specifications section for more information. RESET AND RESET OUTPUTS While RESET is capable of sourcing and sinking current, RESET is an open drain MOSFET which sinks current only. Therefore, it is necessary to pull RESET output high. Rev. A | Page 6 of 8 ADM1232A OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Figure 8. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model ADM1232AARNZ 1 ADM1232AARNZ-REEL1 1 Temperature Range −40°C to +85°C −40°C to +85°C Package Description 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] Z = RoHS Compliant Part. Rev. A | Page 7 of 8 Package Option R-8 R-8 ADM1232A NOTES ©1999–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00061-0-1/09(A) Rev. A | Page 8 of 8
ADM1232AARNZ 价格&库存

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ADM1232AARNZ
  •  国内价格 香港价格
  • 1+23.318221+3.01710
  • 5+20.960205+2.71200
  • 25+18.5148425+2.39560
  • 98+16.6808298+2.15830

库存:0

ADM1232AARNZ

库存:0

ADM1232AARNZ
    •  国内价格
    • 10+31.53600

    库存:6453