ADM13305-5ARZ1

Dual Processor Supervisors with Watchdog ADM13305 FEATURES Dual supervisory circuits Supply voltage range of 2.7 V to 5.5 V Pretrimmed threshold options: 1.8 V, 2.5 V, 3.3 V, and 5 V Adjustable 0.6 V voltage reference Maximum supply current of 40 μA 140 ms (minimum) reset timeout Watchdog timer with 1.6 sec (typical) timeout RESET valid from VDD ≥ 1.1 V Push-pull RESET and RESET outputs 8-lead, narrow body SOIC package Temperature range: −40°C to +85°C VDD 14kΩ MR RESET SENSE1 R1 R2 RESET LOGIC + TIMER RESET R3 GND 1.25V R4 FUNCTIONAL BLOCK DIAGRAMS ADM13305-18 ADM13305-25 ADM13305-33 SENSE2 APPLICATIONS Supervising DSPs/microcontrollers Industrial and portable equipment Wireless systems Notebook/desktop computers WDI OSCILLATOR WATCHDOG LOGIC + TIMER Figure 1. GENERAL DESCRIPTION The ADM13305 is a dual voltage supervisor designed to monitor two supplies and provide a reset signal to DSP and microprocessor-based systems. There are five models available, all of which feature a combination of internally pretrimmed undervoltage threshold options for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also an adjustable input option with an undervoltage threshold voltage of 0.6 V. The ADM13305-18, ADM13305-25, and ADM13305-33 models have two internally fixed thresholds. The ADM13305-4 and ADM13305-5 offer one internally fixed threshold and one externally programmable threshold via a resistor string. See the Ordering Guide for a list of all available options. During power-up, RESET is asserted when the supply voltage exceeds 1.1 V. The device then monitors the SENSEv input pins and holds the RESET output low as long as either of the SENSEv inputs remains below the rising threshold voltage, VIT+. Once the supplies monitored at the SENSEv inputs rise above their associated thresholds, the reset signal remains low for the reset timeout period before deasserting. Subsequently, if a voltage monitored by the SENSEv pins falls below its associated falling threshold, VIT−, the RESET output asserts. The ADM13305 features both an active high RESET and an active low RESET output. VDD 14kΩ MR RESET SENSE1 R1 GND RESET SENSE2 R2 RESET LOGIC + TIMER ADM13305-4 ADM13305-5 0.6V OSCILLATOR WATCHDOG LOGIC + TIMER Figure 2. . As well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within the preset timeout period. A reset signal can also be asserted by an external push button through the manual reset input pin. The ADM13305 is available in an 8-lead, narrow body SOIC package. The device operates over the extended industrial temperature range of −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. 06922-001 WDI TRANSITION DETECTION 06922-002 TRANSITION DETECTION ADM13305 TABLE OF CONTENTS Features .............................................................................................. 1  Applications ....................................................................................... 1  General Description ......................................................................... 1  Functional Block Diagrams ............................................................. 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Timing Requirements .................................................................. 5  Switching Characteristics ............................................................ 5  Functional Truth Table ................................................................ 5  Absolute Maximum Ratings............................................................ 6  Thermal Resistance ...................................................................... 6  ESD Caution...................................................................................6  Pin Configuration and Function Descriptions..............................7  Typical Performance Characteristics ..............................................8  Theory of Operation ...................................................................... 10  Input Configuration ................................................................... 10  Reset Output ............................................................................... 10  Watchdog Timer ......................................................................... 10  Manual Reset (MR) .................................................................... 11  Outline Dimensions ....................................................................... 12  Ordering Guide .......................................................................... 12  REVISION HISTORY 8/07—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADM13305 SPECIFICATIONS VDD = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted. Table 1. ADM13305-18, ADM13305-25, and ADM13305-33 Parameter OPERATING VOLTAGE RANGE, VDD SUPPLY CURRENT, IDD INPUT CAPACITANCE, CI RESET, RESET OUTPUT High Level Output Voltage, VOH Min 2.7 Typ Max 5.5 40 Unit V μA pF V V V V V V V V V V V V V V V mV mV mV mV 150 −20 μA μA V V ns/V μA μA μA μA μA μA μA WDI = VDD = 5.5 V MR = 0.7 × VDD, VDD = 5.5 V SENSE1 = VDD = 5.5 V SENSE2 = VDD = 5.5 V WDI = 0 V, VDD = 5.5 V MR = 0 V, VDD = 5.5 V SENSE1, SENSE2 = 0 V Test Conditions/Comments 10 VDD − 0.2 VDD − 0.4 VDD − 0.4 0.2 0.4 0.4 0.4 1.64 2.20 2.86 4.46 1.64 2.20 2.86 4.46 1.68 2.25 2.93 4.55 1.68 2.25 2.93 4.55 15 20 30 40 100 −15 0.7 × VDD 0.3 × VDD 50 120 −130 5 6 −120 −430 −1 170 −180 8 9 −170 −600 +1 1.72 2.30 3.00 4.64 1.73 2.32 3.02 4.67 VI = 0 V to VDD IOH = −20 μA IOH = −2 mA, VDD = 3.3 V IOH = −3 mA, VDD = 5.5 V IOL = 20 μA IOL = 2 mA, VDD = 3.3 V IOL = 3 mA, VDD = 5.5 V IOL = 20 μA, VDD ≥ 1.1 V TA = 0°C to 85°C TA = 0°C to 85°C TA = 0°C to 85°C TA = 0°C to 85°C TA = −40°C to +85°C TA = −40°C to +85°C TA = −40°C to +85°C TA = −40°C to +85°C VIT− = 1.68 V VIT− = 2.25 V VIT− = 2.93 V VIT− = 4.55 V WDI = VDD = 5.5 V WDI = 0 V, VDD = 5.5 V Low Level Output Voltage, VOL Power-Up Reset Voltage 1 SENSE INPUTS Falling Threshold Voltage, VIT− Hysteresis at SENSEv Inputs, VHYS WDI Average High Level Input Current, IH(AV) Average Low Level Input Current, IL(AV) INPUT VOLTAGE AT MR AND WDI High Level, VIH Low Level, VIL INPUT TRANSITION RISE AND FALL RATE AT MR HIGH LEVEL INPUT CURRENT, IH WDI MR SENSE1 SENSE2 LOW LEVEL INPUT CURRENT, IL WDI MR SENSEv 1 The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 μs/V. Rev. 0 | Page 3 of 12 ADM13305 VDD = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted. Table 2. ADM13305-4 and ADM13305-5 Parameter OPERATING VOLTAGE RANGE, VDD SUPPLY CURRENT, IDD INPUT CAPACITANCE, CI RESET, RESET OUTPUT High-Level Output Voltage, VOH Min 2.7 Typ Max 5.5 40 Unit V μA pF V V V V V V V V V V mV mV mV μA μA V V ns/V μA μA μA nA μA μA μA WDI = VDD = 5.5 V MR = 0.7 × VDD, VDD = 5.5 V SENSE1 = VDD = 5.5 V SENSE2 = VDD = 5.5 V WDI = 0 V, VDD = 5.5 V MR = 0 V, VDD = 5.5 V SENSE1, SENSE2 = 0 V Test Conditions/Comments 10 VDD − 0.2 VDD − 0.4 VDD − 0.4 0.2 0.4 0.4 0.4 0.5952 2.23 2.90 0.6 2.25 2.93 0 20 30 100 −15 0.7 × VDD 0.3 × VDD 50 120 −130 5 −50 −120 −430 −1 170 −180 8 +50 −170 −600 +1 0.6048 2.29 2.98 VI = 0 V to VDD IOH = −20 μA IOH = −2 mA, VDD = 3.3 V IOH = −3 mA, VDD = 5.5 V IOH = 20 μA IOH = 2 mA, VDD = 3.3 V IOH = 3 mA, VDD = 5.5 V IOH = 20 μA, VDD ≥ 1.1 V TA = −40°C to +85°C TA = −40°C to +85°C TA = −40°C to +85°C VIT− = 0.6 V VIT− = 2.25 V VIT− = 2.93 V WDI = VDD = 5.5 V WDI = 0 V, VDD = 5.5 V Low-Level Output Voltage, VOL Power-Up Reset Voltage 1 SENSEv INPUTS Falling Input Threshold Voltage, VIT− Hysteresis at SENSEv Inputs, VHYS WDI Average High Level Input Current, IH(AV) Average Low Level Input Current, IL(AV) INPUT VOLTAGE AT MR AND WDI High Level, VIH Low Level, VIL INPUT TRANSITION RISE AND FALL RATE AT MR HIGH LEVEL INPUT CURRENT, IH WDI MR SENSE1 SENSE2 LOW LEVEL INPUT CURRENT, IL WDI MR SENSEv 1 150 −20 The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 μs/V. Rev. 0 | Page 4 of 12 ADM13305 TIMING REQUIREMENTS VDD = 2.7 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C. Table 3. ADM13305-18, ADM13305-25 and ADM13305-33 Parameter PULSE WIDTH (tw) SENSEv MR WDI Min 6 100 100 Typ Max Unit μs ns ns Test Conditions/Comments VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V VIH = 0.7 × VDD, VIL = 0.3 × VDD VIH = 0.7 × VDD, VIL = 0.3 × VDD Table 4. ADM13305-4 and ADM13305-5 Parameter PULSE WIDTH (tw) SENSEv MR WDI Min Typ 30 100 100 Max Unit μs ns ns Test Conditions/Comments VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V VIH = 0.7 × VDD, VIL = 0.3 × VDD VIH = 0.7 × VDD, VIL = 0.3 × VDD SWITCHING CHARACTERISTICS VDD = 2.7 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C. Table 5. ADM13305-18, ADM13305-25 and ADM13305-33 Parameter Watchdog Timeout (tt(OUT)) Delay Time (td) Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL) Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH) Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL) Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH) 1 Min 1.1 140 Typ 1.6 200 200 200 1 1 Max 2.3 280 500 500 5 5 Unit sec ms ns ns μs μs Test Conditions/Comments VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD The reset timeout delay of 200 ms masks the propagation delay. Table 6. ADM13305-4 and ADM13305-5 Parameter Watchdog Timeout (tt(out)) Delay Time (td) Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL) Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH) Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL) Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH) 1 Min 1.1 140 Typ 1.6 200 200 200 30 30 Max 2.3 280 500 500 Unit sec ms ns ns μs μs Test Conditions/Comments VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD The reset timeout delay of 200 ms masks the propagation delay. FUNCTIONAL TRUTH TABLE Table 7. MR L H H H H 1 SENSE1 > VIT1 X1 0 0 1 1 SENSE2 > VIT2 X1 0 1 0 1 RESET L L L L H RESET H H H H L X = don’t care. Rev. 0 | Page 5 of 12 ADM13305 ABSOLUTE MAXIMUM RATINGS Table 8. Parameter Supply Voltage Range, VDD MR , WDI SENSE1, SENSE2 RESET, RESET Maximum Low Output Current Maximum High Output Current Input Clamp Current (VI < 0 V, VI > VDD) Output Clamp Current (VO < 0 V, VO > VDD) Operating Temperature Range Storage Temperature Range Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating −0.3 V to +6 V −0.3 V to VDD + 0.3 V (VDD + 0.3 V)VIT/VREF −0.3 V to +6 V 5 mA −5 mA ±20 mA ±20 mA −40°C to +85°C −65°C to +150°C 300°C 215°C 220°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE Table 9. Package Type 8-Lead SOIC_N (R-8) θJA 206 Unit °C/W ESD CAUTION Rev. 0 | Page 6 of 12 ADM13305 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SENSE1 1 SENSE2 2 WDI 3 8 ADM13305 VDD MR 7 Figure 3. Pin Configuration Table 10. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic SENSE1 SENSE2 WDI GND RESET RESET MR VDD Description Sense Input Voltage 1. Sense Input Voltage 2. Watchdog Timer Input. Ground. Active-Low Reset Output. Active-High Reset Output. Manual Reset Input. Supply Voltage. Rev. 0 | Page 7 of 12 06922-003 6 RESET TOP VIEW GND 4 (Not to Scale) 5 RESET ADM13305 TYPICAL PERFORMANCE CHARACTERISTICS 0.6003 10 MINIMUM PULSE DURATION AT SENSE, tW (µs) INPUT THRESHOLD VOLTAGE, VIT (V) 0.6001 0.5999 0.5997 0.5995 0.5993 0.5991 0.5989 0.5987 0.5985 –40 9 8 7 6 5 4 3 2 1 0 0 100 200 300 400 500 600 700 VDD = 5.5V MR = OPEN 06922-004 MR = OPEN –20 0 20 40 60 80 800 900 1000 FREE AIR TEMPERATURE, TA (°C) SENSE THRESHOLD OVERDRIVE (mV) Figure 4. Sense Threshold Voltage vs. Free Air Temperature at VDD Figure 7. ADM13305-18, ADM13305-25 and ADM13305-33 Minimum Pulse Duration at SENSE vs. Sense Threshold Overdrive 40 40 MINIMUM PULSE DURATION AT SENSE, tW (µs) 35 39 38 37 36 35 34 33 32 31 30 0 100 200 300 400 500 600 700 VDD = 5.5V MR = OPEN SUPPLY CURRENT, IDD (µA) 30 25 20 15 10 5 0 –5 –10 –1.0 0 1.0 SENSEv = 5.5V MR = OPEN TA = 25°C –0.5 0.5 2.0 3.0 4.0 5.0 6.0 6.5 1.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE, VDD (V) 06922-005 800 900 1000 SENSE THRESHOLD OVERDRIVE (mV) Figure 5. Supply Current vs. Supply Voltage Figure 8. ADM13305-4 and ADM13305-5 Minimum Pulse Duration at SENSE vs. Sense Threshold Overdrive 2.50 HIGH LEVEL OUTPUT VOLTAGE, VOH (V) 200 100 0 2.00 INPUT CURRENT, II (µA) –100 –200 –300 –400 –500 –600 –700 –800 06922-006 1.50 1.00 0.50 VDD = 2V MR = OPEN 0 0 –1 –2 –3 –4 –5 –900 –1.0 7.0 0 1.0 2.0 3.0 4.0 5.0 6.0 –0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE AT MR, VI (V) –6 HIGH LEVEL OUTPUT CURRENT, IOH (mA) Figure 6. Input Current vs. Input Voltage at MR Figure 9. High Level Output Voltage vs. High Level Output Current Rev. 0 | Page 8 of 12 06922-008 VDD = 5.5V TA = 25°C –40°C 0°C +25°C +85°C 06922-017 06922-007 TA = 25°C VDD = 2V ADM13305 6.0 HIGH LEVEL OUTPUT VOLTAGE, VOH (V) LOW LEVEL OUTPUT VOLTAGE, VOL (V) 1.0 –40°C 0°C +25°C +85°C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 35 40 45 06922-016 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 –40°C 0°C +25°C +85°C –10 –20 –30 –40 –50 –60 06922-009 VDD = 5.5V MR = OPEN VDD = 5.5V MR = OPEN 50 55 60 HIGH LEVEL OUTPUT CURRENT, IOH (mA) LOW LEVEL OUTPUT CURRENT, IOL (mA) Figure 10. High Level Output Voltage vs. High Level Output Current 0.25 LOW LEVEL OUTPUT VOLTAGE, VOL (V) Figure 12. Low Level Output Voltage vs. Low Level Output Current 0.20 –40°C 0°C +25°C +85°C 0.15 0.10 0.05 06922-010 VDD = 2V MR = OPEN 0 0 1 2 3 4 5 6 LOW LEVEL OUTPUT CURRENT, IOL (mA) Figure 11. Low Level Output Voltage vs. Low Level Output Current Rev. 0 | Page 9 of 12 ADM13305 THEORY OF OPERATION The ADM13305 is a dual voltage supervisor designed to monitor two supplies and provide a reset signal to DSP and microprocessor-based systems. There are five models available, all of which feature a combination of internally pretrimmed undervoltage threshold options for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also an adjustable input option with an undervoltage threshold of 0.6 V. The ADM13305-18, ADM13305-25, and ADM13305-33 have two internally fixed thresholds, while the ADM13305-4 and ADM13305-5 offer one internally fixed threshold and one externally programmable threshold via a resistor string. See the Ordering Guide for a list of all available options. SENSEv V(NOM) VIT– t RESET 1 td td Figure 14. Reset Timing Diagram INPUT CONFIGURATION The ADM13305 is powered through VDD. To increase noise immunity in noisy applications, place a 0.1 μF capacitor between the VDD input and ground. The SENSEv inputs are resistant to short power supply glitches. Do not allow an unused SENSEv input to float or to be grounded, instead connect it to a supply voltage greater than its specified threshold voltage. Typically, the threshold voltage at each adjustable SENSEv input is 0.6 V. To monitor a voltage greater than 0.6 V, connect a resistor divider network to the device as depicted in Figure 13, where, Once the supplies monitored at the SENSEv pins rise above their associated threshold level, the RESET signal remains low for the reset timeout period before deasserting. Subsequently, if either of the supplies monitored by the SENSEv pins falls below its associated threshold the RESET output reasserts. The ADM13305 features both an active-low, push-pull RESET output and an active-high, push-pull RESET output. WATCHDOG TIMER The ADM13305 features a watchdog timer that monitors microprocessor activity. A timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (WDI). If the timer counts through the preset watchdog timeout period of 1.6 sec, RESET is asserted, as shown in Figure 15. The microprocessor is required to toggle the WDI pin to avoid being reset. Therefore, failure of the microprocessor to toggle WDI within the timeout period indicates a code execution error and the reset pulse generated restarts the microprocessor in a known state. The watchdog timer can be disabled by leaving WDI floating. WDI 1 R1 + R2 ⎞ V MONITERED = 0.6 V⎛ ⎜ ⎟ ⎝ R2 ⎠ MONITORED VOLTAGE R1 R2 VREF = 0.6V Figure 13. Setting the Adjustable Monitor 06922-012 RESET OUTPUT The reset outputs are guaranteed to be in the correct state for VDD down to 1.1 V. During power-up, RESET is asserted when the supply voltage becomes greater than 1.1 V. 0 RESET 1 tWD t td Figure 15. Watchdog Timing Diagram Rev. 0 | Page 10 of 12 06922-014 0 t 06922-013 0 t ADM13305 MANUAL RESET (MR) The ADM13305 features a manual reset input, which when driven low, asserts the reset output, as shown in Figure 16. When MR transitions from low to high, reset remains asserted for the duration of the reset active timeout period before deasserting. An external push-button switch can be connected between MR and ground to allow the user to generate a reset. MR 1 0 RESET 1 t td Figure 16. Manual Reset Timing Diagram Rev. 0 | Page 11 of 12 06922-015 0 t ADM13305 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 1 5 4 6.20 (0.2441) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) 0.25 (0.0099) 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 45° 0.51 (0.0201) 0.31 (0.0122) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 17. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model ADM13305-18ARZ 1 ADM13305-18ARZ-RL71 ADM13305-25ARZ1 ADM13305-25ARZ-RL71 ADM13305-33ARZ1 ADM13305-33ARZ-RL71 ADM13305-4ARZ1 ADM13305-4ARZ-RL71 ADM13305-5ARZ1 ADM13305-5ARZ-RL71 1 2 Nominal Supervised Voltage SENSE1 SENSE2 3.3 V 1.8 V 3.3 V 1.8 V 3.3 V 2.5 V 3.3 V 2.5 V 5V 3.3 V 5V 3.3 V 3.3 V Adjustable 2 3.3 V Adjustable2 2.5 V Adjustable2 2.5 V Adjustable2 Threshold Voltage (Typical) SENSE1 SENSE2 2.93 V 1.68 V 2.93 V 1.68 V 2.93 V 2.25 V 2.93 V 2.25 V 4.55 V 2.93 V 4.55 V 2.93 V 2.93 V 0.6 V 2.93 V 0.6 V 2.25 V 0.6 V 2.25 V 0.6 V Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C 012407-A Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Package Option R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 Z = RoHS Compliant Part. 0.6 V adjustable. External resistor divider determines the actual sense voltage. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06922-0-8/07(0) Rev. 0 | Page 12 of 12