Half-Duplex, iCoupler
Isolated RS-485 Transceiver
ADM2483
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
VDD1
VDD2
ADM2483
DE
TxD
PV
RxD
A
B
04736-001
RS-485 transceiver with electrical data isolation
Complies with ANSI TIA/EIA RS-485-A and ISO 8482: 1987(E)
500 kbps data rate
Slew rate-limited driver outputs
Low power operation: 2.5 mA max
Suitable for 5 V or 3 V operations (VDD1)
High common-mode transient immunity: >25 kV/μs
True fail-safe receiver inputs
Chatter-free power-up/power-down protection
256 nodes on bus
Thermal shutdown protection
Safety and regulatory approvals
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
IEC 60950-1 800 V rms (basic), 400 V rms (reinforced)
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
VIORM = 560 V peak (reinforced)
VIORM(DC) = 1500 V dc
CQC certification per GB4943.1-2011
Operating temperature range: −40°C to +85°C
GALVANIC ISOLATION
FEATURES
RE
GND1
GND2
Figure 1.
APPLICATIONS
Low power RS-485/RS-422 networks
Isolated interfaces
Building control networks
Multipoint data transmission systems
GENERAL DESCRIPTION
The ADM2483 differential bus transceiver is an integrated,
galvanically isolated component designed for bidirectional data
communication on balanced, multipoint bus transmission lines.
It complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E).
Using the iCoupler technology from Analog Devices, Inc., the
ADM2483 combines a 3-channel isolator, a three-state differential
line driver, and a differential input receiver into a single package.
The logic side of the device is powered with either a 5 V or 3 V
supply, and the bus side uses a 5 V supply only.
The ADM2483 is slew-limited to reduce reflections with
improperly terminated transmission lines. The controlled slew
rate limits the data rate to 500 kbps. The device’s input impedance
is 96 kΩ, allowing up to 256 transceivers on the bus. Its driver
has an active-high enable feature. The driver differential outputs
and receiver differential inputs are connected internally to form
a differential input/output (I/O) port.
Rev. F
When the driver is disabled or when VDD1 or VDD2 = 0 V, this
imposes minimal loading on the bus. An active-high receiver
disable feature, which causes the receive output to enter a high
impedance state, is provided as well.
The receiver inputs have a true fail-safe feature that ensures a
logic-high receiver output level when the inputs are open or
shorted. This guarantees that the receiver outputs are in a
known state before communication begins and at the point
when communication ends.
Current limiting and thermal shutdown features protect against
output short circuits and bus contention situations that might
cause excessive power dissipation. The part is fully specified
over the industrial temperature range and is available in a
16-lead, wide body SOIC package.
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2004–2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADM2483
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Switching Characteristics .............................................................. 10
Applications ....................................................................................... 1
Typical Performance Characteristics ........................................... 11
Functional Block Diagram .............................................................. 1
Circuit Description......................................................................... 14
General Description ......................................................................... 1
Electrical Isolation...................................................................... 14
Revision History ............................................................................... 2
Truth Tables................................................................................. 15
Specifications..................................................................................... 3
Power-Up/Power-Down Characteristics ................................. 15
Timing Specifications....................................................................... 4
Thermal Shutdown .................................................................... 15
Absolute Maximum Ratings............................................................ 5
True Fail-Safe Receiver Inputs .................................................. 15
ESD Caution .................................................................................. 5
Magnetic Field Immunity.......................................................... 15
Package Characteristics ............................................................... 6
Applications Information .............................................................. 17
Regulatory Information ............................................................... 6
Power_Valid Input ..................................................................... 17
Insulation and Safety-Related Specifications ............................ 6
Isolated Power Supply Circuit .................................................. 17
DIN V VDE V 0884-10 Insulation Characteristics ................. 7
Outline Dimensions ....................................................................... 18
Pin Configuration and Function Descriptions ............................. 8
Ordering Guide .......................................................................... 18
Test Circuits ....................................................................................... 9
REVISION HISTORY
3/2018—Rev. E to Rev. F
Changes to Feature Section ............................................................. 1
Changes to Table 4 ............................................................................ 5
Changes to Table 6 and Table 7 ....................................................... 6
Changes to DIN V VDE V 0884-10 Insulation Characteristics
Section and Table 8 ........................................................................... 7
9/2016—Rev. D to Rev. E
Added Table 4; Renumbered Sequentially .................................... 5
7/2015—Rev. C to Rev. D
Change to Features Section ............................................................. 1
Changes to Table 5 and Table 6 ....................................................... 6
Changes to Ordering Guide .......................................................... 18
3/2005—Rev. A to Rev. B
Change to Features ............................................................................1
Change to Package Characteristics .................................................6
Changes to Pin Function Descriptions ...........................................8
Changes to Figure 9 and Figure 11............................................... 10
Change to Power_Valid Input Section......................................... 17
Changes to Figure 30...................................................................... 17
Changes to Ordering Guide .......................................................... 18
1/2005—Rev. 0 to Rev. A
Changes to ESD Maximum Rating Specification..........................5
10/2004—Revision 0: Initial Version
11/2013—Rev. B to Rev. C
Changes to Features Section............................................................ 1
Changes to Table 5 ............................................................................ 6
Changes to VDE V 0884-10 Insulation Characteristics Section .... 7
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
Rev. F | Page 2 of 18
Data Sheet
ADM2483
SPECIFICATIONS
2.7 V ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Outputs
Differential Output Voltage, VOD
Δ |VOD| for Complementary Output States
Common-Mode Output Voltage, VOC
Δ |VOC| for Complementary Output States
Output Short-Circuit Current, VOUT = High
Output Short-Circuit Current, VOUT = Low
Logic Inputs
Input High Voltage
Input Low Voltage
CMOS Logic Input Current (TxD, DE, RE, PV)
RECEIVER
Differential Inputs
Differential Input Threshold Voltage, VTH
Input Hysteresis
Input Resistance (A, B)
Input Current (A, B)
RxD Logic Output
Output High Voltage
Min
Max
Unit
Test Conditions/Comments
2.0
1.5
1.5
5
5
5
5
V
V
V
V
−250
−250
0.2
3
0.2
+250
+250
V
V
V
mA
mA
R = ∞, see Figure 3
R = 50 Ω (RS-422), see Figure 3
R = 27 Ω (RS-485), see Figure 3
VTST = −7 V to +12 V, VDD1 ≥ 4.75,
see Figure 4
R = 27 Ω or 50 Ω, see Figure 3
R = 27 Ω or 50 Ω, see Figure 3
R = 27 Ω or 50 Ω, see Figure 3
−7 V ≤ VOUT ≤ +12 V
−7 V ≤ VOUT ≤ +12 V
0.25 VDD1
+10
V
V
µA
TxD, DE, RE, PV
TxD, DE, RE, PV
TxD, DE, RE, PV = VDD1 or 0 V
0.125
−0.1
mV
mV
kΩ
mA
mA
−7 V ≤ VCM ≤ +12 V
−7 V ≤ VCM ≤ +12 V
−7 V ≤ VCM ≤ +12 V
VIN = +12 V
VIN = −7 V
0.1
0.4
85
±1
V
V
V
V
mA
µA
IOUT = 20 µA, VA − VB = 0.2 V
IOUT = 4 mA, VA − VB = 0.2 V
IOUT = −20 µA, VA − VB = −0.2 V
IOUT = −4 mA, VA − VB = −0.2 V
VOUT = GND or VCC
0.4 V ≤ VOUT ≤ 2.4 V
2.5
mA
1.3
mA
2.0
1.7
mA
mA
kV/µs
4.5 V ≤ VDD1 ≤ 5.5 V, outputs unloaded,
RE = 0 V
2.7 V ≤ VDD1 ≤ 3.3 V, outputs unloaded,
RE = 0 V
Outputs unloaded, DE = 5 V
Outputs unloaded, DE = 0 V
TxD = VDD1 or 0 V, VCM = 1 kV,
transient magnitude = 800 V
0.7 VDD1
−10
+0.01
−200
−125
20
150
96
7
Bus Side
COMMON-MODE TRANSIENT IMMUNITY 1
1
−30
VDD1 − 0.1
VDD1 − 0.4 VDD1 − 0.2
Output Low Voltage
Output Short-Circuit Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
Logic Side
Typ
25
Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation.
VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The
common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
Rev. F | Page 3 of 18
ADM2483
Data Sheet
TIMING SPECIFICATIONS
2.7 V ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay, tPLH, tPHL
Skew, tSKEW
Rise/Fall Time, tR, tF
Enable Time
Disable Time
RECEIVER
Propagation Delay, tPLH, tPHL
Differential Skew, tSKEW
Enable Time
Disable Time
POWER VALID INPUT
Enable Time
Disable Time
Min
Typ
Max
Unit
Test Conditions/Comments
620
40
600
1050
1050
kbps
ns
ns
ns
ns
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 5 and Figure 9
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 5 and Figure 9
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 5 and Figure 9
RL = 500 Ω, CL = 100 pF, see Figure 6 and Figure 11
RL = 500 Ω, CL = 15 pF, see Figure 6 and Figure 11
25
40
1050
250
70
70
ns
ns
ns
ns
CL = 15 pF, see Figure 7 and Figure 10
CL = 15 pF, see Figure 7 and Figure 10
RL = 1 kΩ, CL = 15 pF, see Figure 8 and Figure 12
RL = 1 kΩ, CL = 15 pF, see Figure 8 and Figure 12
1
3
2
5
µs
µs
500
250
200
400
Rev. F | Page 4 of 18
Data Sheet
ADM2483
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. All voltages are relative to
their respective ground.
Table 3.
Parameter
VDD1
VDD2
Digital Input Voltage (DE, RE, TxD)
Digital Output Voltage
RxD
Driver Output/Receiver Input Voltage
ESD Rating: Contact
Human Body Model (A, B Pins)
Operating Temperature Range
Storage Temperature Range
Average Output Current per Pin
θJA Thermal Impedance
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
−0.5 V to +7 V
−0.5 V to +6 V
−0.5 V to VDD1 + 0.5 V
−0.5 V to VDD1 + 0.5 V
−9 V to +14 V
±2 kV
−40°C to +85°C
−55°C to +150°C
−35 mA to +35 mA
73°C/W
Table 4. Maximum Continuous Working Voltage1
Parameter
AC Voltage
Bipolar Waveform
Basic Insulation
Reinforced
Insulation
Unipolar Waveform
Basic Insulation
Reinforced
Insulation
DC Voltage
Basic Insulation
Reinforced
Insulation
1
Unit
Reference Standard
565
565
VPEAK
VPEAK
50-year minimum lifetime
50-year minimum lifetime
1131
1131
VPEAK
VPEAK
50-year minimum lifetime
50-year minimum lifetime
1517
VPEAK
757
VPEAK
Pollution Degree 2,
Material Group I
Pollution Degree 2,
Material Group I
Refers to continuous voltage magnitude imposed across the isolation
barrier.
ESD CAUTION
260°C
215°C
220°C
Max
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. F | Page 5 of 18
ADM2483
Data Sheet
PACKAGE CHARACTERISTICS
Table 5.
Parameter
Resistance (Input-Output) 1
Capacitance (Input-Output)1
Input Capacitance 2
Input IC Junction-to-Case Thermal Resistance
Symbol
RI-O
CI-O
CI
θJCI
Output IC Junction-to-Case Thermal Resistance
θJCO
1
2
Min
Typ
1012
3
4
33
Max
28
Unit
Ω
pF
pF
°C/W
°C/W
Test Conditions
f = 1 MHz
Thermocouple located at center of package
underside
Thermocouple located at center of package
underside
Device considered a 2-terminal device: Pins 1, 2, 3, 4, 5, 6, 7, and 8 shorted together, and Pins 9, 10, 11, 12, 13, 14, 15, and 16 shorted together.
Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADM2483 has been approved by the following organizations:
Table 6.
UL 1
Recognized Under 1577
Component
Recognition Program
File E214100
1
2
CSA
Approved under CSA
Component Acceptance
Notice 5A
IEC 609501 800 V rms
(1131 VPEAK) basic, 400 V rms
(565 VPEAK) reinforced
File 205078
CQC
Approved Under
CQC11-471543-2012
VDE 2
Certified according to
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
Basic insulation per
GB4943.1-2011, 415 V rms
(588 VPEAK) maximum working
voltage, tropical climate,
altitude ≤ 5000 meters
File CQC14001114898
Reinforced insulation, VIORM = 565 V peak,
VIORM(DC) = 1500 V dc
File 2471900-4880-0001
In accordance with UL1577, each ADM2483 is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current leakage detection limit = 5 µA).
In accordance with VDE V 0884-10, each ADM2483 is proof tested by applying an insulation test voltage ≥2813 VPEAK for 1 sec (partial discharge detection limit = 5 pC).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 7.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
L(I01)
Value
2500
7.6 min
Unit
V rms
mm
Minimum External Tracking (Creepage)
L(I02)
7.6 min
mm
Minimum Clearance in the Plane of the Printed Circuit
Board (PCB Clearance)
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
L(PCB)
8.1 min
mm
0.017 min
>400 or
>600
I or II
mm
V
Isolation Group
1
Symbol
CTI
Conditions
1-minute duration
Measured from input terminals to output
terminals, shortest distance through air
Measured from input terminals to output
terminals, shortest distance along body
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1 1
Material Group (Table 1 in DIN VDE 0110,1/89)1
An ampersand (&) on the physical package denotes the CSA attestation of CTI>600 V and isolation of Material Group I.
Rev. F | Page 6 of 18
Data Sheet
ADM2483
DIN V VDE V 0884-10 INSULATION CHARACTERISTICS
This isolator is suitable for reinforced electrical isolation only within this safety limit data. Maintenance of this safety data shall be ensured
by means of protective circuits.
An asterisk (*) on the physical package denotes DIN V VDE V 0884-10 approval.
Table 8.
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤150 V rms
For Rated Mains Voltage ≤300 V rms
For Rated Mains Voltage ≤400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Reinforced
DC (Basic)
Input to Output test Voltage, Method b1
Input-to-Output Test Voltage, Method a
After Environmental Tests, Subgroup 1
After Input and/or Safety Test,
Subgroup 2 and Subgroup 3
Highest Allowable Overvoltage
Surge Isolation Voltage Reinforced
Safety-Limiting Values
Maximum Junction Temperature
Input Current
Output Current
Insulation Resistance at TS
1
Test Conditions/Comments
Symbol
Characteristic
Unit
I to IV
I to III
I to II
40/100/21
2
See Absolute Maximum Ratings 1
VIORM(DC) × 1.875 = Vpd(m), 100% production tested,
tini = tm = 1 sec, partial discharge 100 μs/V), the ADM2483
features a power_valid (PV) digital input. This pin should be
driven low until VDD1 exceeds 2.0 V. When VDD1 is greater than
2.0 V, the pin should be driven high. Conversely, upon powerdown, the PV should be driven low before VDD1 reaches 2.0 V.
The ADM2483 requires isolated power capable of 5 V at 100 mA
to be supplied between the VDD2 and GND2 pins. If no suitable
integrated power supply is available, a discrete circuit, such as
the one in Figure 30, can be used. A center-tapped transformer
provides electrical isolation. The primary winding is excited
with a pair of square waveforms that are 180° out of phase with
each other. A pair of Schottky diodes and a smoothing capacitor
are used to create a rectified signal from the secondary winding.
The ADP667 linear voltage regulator provides a regulated
power supply to the ADM2483’s bus-side circuitry.
The power_valid input can be driven, for example, by the output of
a system reset circuit such as the ADM809Z, which has a threshold
voltage of 2.32 V.
VDD1
To create the pair of square waves, a D-type flip-flop with complementary Q/Q outputs is used. The flip-flop can be connected so
that output Q follows the clock input signal. If no local clock
signal is available, a simple digital oscillator can be implemented
with a hex-inverting Schmitt trigger and a resistor and capacitor.
In this case, values of 3.9 kΩ and 1 nF generate a 364 kHz square
wave. A pair of discrete NMOS transistors, switched by the Q/Q
flip-flop outputs, conduct current through the center tap of the
primary transformer, winding in an alternating fashion.
VDD1
ADM809Z
ADM2483
RESET
PV
GND1
VDD1 2.0V
2.0V
tPOR
04736-029
Figure 29. Driving PV with ADM809Z
VCC
ISOLATION
BARRIER
100nF
3.9k
100nF
SD103C
BS107A
VCC
PR
IN
CLR
D
VCC
Q
22F
OUT
5V
ADP667
74HC74A
CLK
74HC14
1nF
Q
BS107A
SET GND SHDN
78253
SD103C
VCC
VDD1
VDD2
ADM2483
GND1
Figure 30. Isolated Power Supply Circuit
Rev. F | Page 17 of 18
GND2
04736-030
RESET
2.32V
2.32V
ADM2483
Data Sheet
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
45°
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
8°
0°
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
1.27 (0.0500)
0.40 (0.0157)
03-27-2007-B
1
Figure 31. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model 1, 2
ADM2483BRW
ADM2483BRW-REEL
ADM2483BRWZ
ADM2483BRWZ-REEL
EVAL-ADM2483EBZ
1
2
Data Rate (kbps)
500
500
500
500
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Z = RoHS Compliant Part.
-REEL suffix designates a 13-inch (1,000 units) tape-and-reel option.
©2004–2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04736-0-3/18(F)
Rev. F | Page 18 of 18
Package Description
16-Lead, Wide Body SOIC_W
16-Lead, Wide Body SOIC_W
16-Lead, Wide Body SOIC_W
16-Lead, Wide Body SOIC_W
ADM2483 Evaluation Board
Package Option
RW-16
RW-16
RW-16
RW-16
工商网监
湘ICP备2023018690号
