0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
ADM2486BRW

ADM2486BRW

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOIC16_300MIL

  • 描述:

    DGTL ISO RS422/RS485 16SOIC

  • 数据手册
  • 价格&库存
ADM2486BRW 数据手册
High Speed, Half-Duplex iCoupler Isolated RS-485 Transceiver ADM2486 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Isolated RS-485/RS-422 interfaces PROFIBUS networks Industrial field networks Multipoint data transmission systems VDD2 VDD1 ADM2486 DE TxD PV RxD BUS SIDE GALVANIC ISOLATION RTS LOGIC SIDE A B RE GND2 GND1 04604-001 Half-duplex, isolated RS-485 transceiver PROFIBUS® compliant ANSI EIA/TIA 485-A and ISO 8482: 1987(E) compliant 20 Mbps data rate 5 V or 3 V operation (VDD1) High common-mode transient immunity: >25 kV/μs Isolated DE status output Receiver open-circuit, fail-safe design Thermal shutdown protection 50 nodes on bus Safety and regulatory approvals UL recognition—2500 Vrms for 1 minute per UL 1577 CSA Component Acceptance Notice #5A IEC 609501 800 Vrms (basic), 400 Vrms (reinforced) VDE Certificate of Conformity DIN V VDE 0884-10 (VDE V 0884-10): 2006-12 VIORM = 560 V peak Operating temperature range: −40°C to +85°C Wide body, 16-lead SOIC package Figure 1. The ADM2486 driver has an active-high enable feature. The driver differential outputs and the receiver differential inputs are connected internally to form a differential input/output port that imposes minimal loading on the bus when the driver is disabled or when VDD1 or VDD2 = 0 V. Also provided is an active-high receiver disable feature that causes the receive output to enter a high impedance state. The device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention may cause excessive power dissipation. The part is fully specified over the industrial temperature range and is available in a 16-lead, wide body SOIC package. GENERAL DESCRIPTION The ADM2486 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E). The device employs Analog Devices iCoupler® technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. The logic side of the device is powered with either a 5 V or a 3 V supply, and the bus side uses an isolated 5 V supply. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2004–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADM2486 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Switching Characteristics .............................................................. 11 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 12 General Description ......................................................................... 1 Circuit Description......................................................................... 14 Functional Block Diagram .............................................................. 1 Electrical Isolation...................................................................... 14 Revision History ............................................................................... 2 Truth Tables................................................................................. 14 Specifications..................................................................................... 3 Power-Up/Power-Down Thresholds ....................................... 14 Timing Specifications....................................................................... 5 Thermal Shutdown .................................................................... 15 ADM2486 Characteristics ............................................................... 6 Receiver Fail-Safe Inputs ........................................................... 15 Package Characteristics ............................................................... 6 Magnetic Field Immunity.......................................................... 15 Regulatory Information ............................................................... 6 Applications Information .............................................................. 16 Insulation and Safety-Related Specifications ............................ 6 PC Board Layout ........................................................................ 16 VDE 0884-10 Insulation Characteristics................................... 7 Power_Valid Input ..................................................................... 16 Absolute Maximum Ratings............................................................ 8 Isolated Power Supply Circuit .................................................. 17 ESD Caution .................................................................................. 8 Outline Dimensions ....................................................................... 18 Pin Configuration and Function Descriptions ............................. 9 Ordering Guide .......................................................................... 18 Test Circuits ..................................................................................... 10 REVISION HISTORY 11/13—Rev. D to Rev. E Changes to Features Section............................................................ 1 Changes to Table 4 ............................................................................ 6 Changes to VDE 0884-10 Insulation Characteristics Section and Table 6 ......................................................................................... 7 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 2/06—Rev. C to Rev. D Updated Format .................................................................. Universal Changes to Table 1 ............................................................................ 3 Changes to Table 8 ............................................................................ 9 Changes to Figure 22 and Figure 23 ............................................. 13 Changes to Table 9 and Table 10................................................... 14 Added PC Board Layout Section ................................................. 16 Changes to Isolated Power Supply Circuit Section and Figure 32 .......................................................................................... 17 3/05—Rev. B to Rev. C Change to Package Characteristics .................................................7 Changes to Figure 12, Figure 14, and Figure 15 ......................... 11 Change to Power_Valid Input Section......................................... 16 1/05—Rev. A to Rev. B Added PROFIBUS logo ....................................................................1 11/04—Rev. 0 to Rev. A Changes to Figure 1 ...........................................................................1 Changes to Figure 6 ........................................................................ 10 Added Figure 22 through Figure 25 ............................................. 13 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 Rev. E | Page 2 of 20 Data Sheet ADM2486 SPECIFICATIONS 2.7 V ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted. Table 1. Parameter DRIVER Differential Outputs Differential Output Voltage, VOD Δ |VOD| for Complementary Output States Common-Mode Output Voltage, VOC Δ |VOC| for Complementary Output States Output Short-Circuit Current, VOUT = High Output Short-Circuit Current, VOUT = Low Driver Enable Output, DE Pin Output High Voltage Min Typ Max Unit Test Conditions/Comments 2.1 2.1 2.1 5 5 5 5 V V V V 60 60 0.2 3 0.2 200 200 V V V mA mA R = ∞, see Figure 3 R = 50 Ω (RS-422), see Figure 3 R = 27 Ω (RS-485), see Figure 3 VTST = −7 V to +12 V, VDD1 ≥ 4.7, see Figure 4 R = 27 Ω or 50 Ω, see Figure 3 R = 27 Ω or 50 Ω, see Figure 3 R = 27 Ω or 50 Ω, see Figure 3 −7 V ≤ VOUT ≤ +12 V −7 V ≤ VOUT ≤ +12 V 0.1 0.3 0.4 V V V V V V IODE = 20 µA IODE = 1.6 mA IODE = 4 mA IODE = −20 µA IODE = −1.6 mA IODE = −4 mA 0.25 VDD1 +10 V V µA TxD, RTS, RE, PV TxD, RTS, RE, PV TxD, RTS, RE, PV = VDD1 or 0 V 0.6 −0.35 mV mV kΩ mA mA −7 V ≤ VCM ≤ +12 V −7 V ≤ VCM ≤ +12 V −7 V ≤ VCM ≤ +12 V VIN = + 12 V VIN = −7 V 0.1 0.4 85 ±1 V V V V mA µA IOUT = 20 µA, VA − VB = 0.2 V IOUT = 4 mA, VA − VB = 0.2 V IOUT = −20 µA, VA − VB = −0.2 V IOUT = −4 mA, VA − VB = −0.2 V VOUT = GND or VCC 0.4 V ≤ VOUT ≤ 2.4 V mA mA mA mA mA mA mA mA mA RTS = 0 V, VDD1 = 5.5 V 2 Mbps, VDD1 = 5.5 V, see Figure 5 20 Mbps, VDD1 = 5.5 V, see Figure 5 RTS = 0 V, VDD1 = 3 V 2 Mbps, VDD1 = 3 V, see Figure 5 20 Mbps, VDD1 = 3 V, see Figure 5 RTS = 0 V 2 Mbps, RTS = VDD1, see Figure 5 20 Mbps, RTS = VDD1, see Figure 5 VDD2 − 0.1 VDD2 − 0.3 VDD2 − 0.4 VDD2 − 0.1 VDD2 − 0.2 Output Low Voltage 0.1 0.2 Logic Inputs Input High Voltage Input Low Voltage CMOS Logic Input Current (TxD, RTS, RE, PV) RECEIVER Differential Inputs Differential Input Threshold Voltage, VTH Input Hysteresis Input Resistance (A, B) Input Current (A, B) RxD Logic Output Output High Voltage 0.7 VDD1 −10 +0.01 −200 +200 70 30 20 VDD1 − 0.1 VDD1 − 0.4 VDD1 − 0.2 Output Low Voltage 0.2 Output Short-Circuit Current Three-State Output Leakage Current POWER SUPPLY CURRENT Logic Side 7 1.3 1.0 4.0 0.8 1.1 2.1 Bus Side 3.0 43.0 58.0 Rev. E | Page 3 of 20 ADM2486 Parameter COMMON-MODE TRANSIENT IMMUNITY 1 HIGH FREQUENCY, COMMON-MODE NOISE IMMUNITY 1 Data Sheet Min 25 Typ 100 Max Unit kV/µs mV Test Conditions/Comments VCM = 1 kV, transient magnitude = 800 V VHF = +5 V, −2 V < VTEST2 < +7 V, 1 MHz < fTEST < 50 MHz, see Figure 6 Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. E | Page 4 of 20 Data Sheet ADM2486 TIMING SPECIFICATIONS 2.7 V ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted. Table 2. Parameter DRIVER Maximum Data Rate Propagation Delay, tPLH, tPHL RTS-to-DE Propagation Delay Pulse Width Distortion, tPWD Switching Skew, tSKEW Rise/Fall Time, tR, tF Enable Time Disable Time Enable Skew, |tAZH − tBZL|, |tAZL − tBZH| Disable Skew, |tAHZ − tBLZ|, |tALZ − tBHZ| RECEIVER Propagation Delay, tPLH, tPHL Differential Skew, tSKEW Enable Time Disable Time POWER_VALID INPUT Enable Time Disable Time Min Typ Max Unit Test Conditions/Comments 20 25 20 45 35 55 55 5 5 15 53 55 3 5 Mbps ns ns ns ns ns ns ns ns ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 See Figure 8 RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 and Figure 12 RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 and Figure 12 RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 and Figure 12 See Figure 9 and Figure 14 See Figure 9 and Figure 14 See Figure 9 and Figure 14 See Figure 9 and Figure 14 3 3 55 5 13 13 ns ns ns ns CL = 15 pF, see Figure 10 and Figure 13 CL = 15 pF, see Figure 10 and Figure 13 RL = 1 kΩ, CL = 15 pF, see Figure 11 and Figure 15 RL = 1 kΩ, CL = 15 pF, see Figure 11 and Figure 15 1 3 2 5 µs µs 2 5 43 43 1 2 25 45 Rev. E | Page 5 of 20 ADM2486 Data Sheet ADM2486 CHARACTERISTICS PACKAGE CHARACTERISTICS Table 3. Parameter Resistance (Input-to-Output)1 Capacitance (Input-to-Output)1 Input Capacitance2 Input IC Junction-to-Case Thermal Resistance Output IC Junction-to-Case Thermal Resistance 1 2 Symbol RI-O CI-O CI θJCI θJCO Min Typ 1012 3 4 33 28 Max Unit Ω pF pF °C/W °C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside Device considered a 2-terminal device: Pin 1 through Pin 8 shorted together, and Pin 9 through Pin 16 shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADM2486 has been approved by the following organizations: Table 4. Organization UL Approval Type Recognized under 1577 component recognition program. File E214100. CSA Approved under CSA Component Acceptance Notice #5A. File 205078. IEC 609501 800 Vrms (1131 VPEAK) Basic, 400 Vrms (565 VPEAK) reinforced. Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12. File 2471900-4880-0001. VDE Notes In accordance with UL1577, each ADM2486 is proof tested by applying an insulation test voltage ≥3000 Vrms for 1 sec (current leakage detection limit = 5 μA). In accordance with VDE V 0884-10, each ADM2486 is proof tested by applying an insulation test voltage ≥1050 VPEAK for 1 sec (partial discharge detection limit = 5 pC). INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 5. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 2500 7.45 minimum Unit V rms mm Minimum External Tracking (Creepage) L(I02) 8.1 minimum mm Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 minimum >175 IIIa mm V Rev. E | Page 6 of 20 Conditions 1-minute duration. Measured from input terminals to output terminals, shortest distance through air. Measured from input terminals to output terminals, shortest distance along body. Insulation distance through insulation. DIN IEC 112/VDE 0303 Part 1. Material Group (DIN VDE 0110, 1/89, Table 1). Data Sheet ADM2486 VDE 0884-10 INSULATION CHARACTERISTICS This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. An asterisk (*) on the physical package denotes VDE V 0884-10 approval for 560 V peak working voltage. Table 6. Description Installation Classification per DIN VDE 0110 for Rated Mains Voltage ≤150 V rms ≤300 V rms ≤400 V rms Climatic Classification Pollution Degree (DIN VDE 0110, Table 1) Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method b1 VIORM × 1.875 = VPR, 100% Production Tested, tm = 1 sec, Partial Discharge < 5 pC Input-to-Output Test Voltage, Method a After Environmental Tests, Subgroup 1 VIORM × 1.6 = VPR, tm = 60 sec, Partial Discharge < 5 pC After Input and/or Safety Test, Subgroup 2/3 VIORM × 1.2 = VPR, tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage (Transient Overvoltage, ttr = 10 sec) Safety-Limiting Values (Maximum Value Allowed in the Event of a Failure, see Figure 21) Case Temperature Input Current Output Current Insulation Resistance at TS, VIO = 500 V Rev. E | Page 7 of 20 Symbol Characteristic Unit VIORM VPR I-IV I-II I-II 40/100/21 2 560 1050 VPEAK VPEAK 896 VPEAK VPR VTR 672 4000 VPEAK VPEAK TS IS, INPUT IS, OUTPUT RS 150 265 335 >109 °C mA mA Ω ADM2486 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. All voltages are relative to their respective ground. Table 7. Parameter VDD1 VDD2 Digital Input Voltage (RTS, RE, TxD) Digital Output Voltage RxD DE Driver Output/Receiver Input Voltage Operating Temperature Range Storage Temperature Range Average Output Current per Pin θJA Thermal Impedance Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating −0.5 V to +7 V −0.5 V to +6 V −0.5 V to VDD1 + 0.5 V −0.5 V to VDD1 + 0.5 V −0.5 V to VDD2 + 0.5 V −9 V to +14 V −40°C to +85°C −55°C to +150°C −35 mA to +35 mA 73°C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 260°C 215°C 220°C Rev. E | Page 8 of 20 Data Sheet ADM2486 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD1 1 16 VDD2 GND11 2 15 GND21 14 NC RxD 3 ADM2486 RE 4 TOP VIEW 13 B RTS 5 (Not to Scale) 12 A TxD 6 11 NC PV 7 10 DE GND11 8 9 GND21 NC = NO CONNECT 2 AND PIN 8 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND1. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND2. 04604-003 1 PIN Figure 2. Pin Configuration Table 8. Pin Function Descriptions Pin No. 1 Mnemonic VDD1 2, 8 3 GND1 RxD 4 RE 5 6 7 RTS TxD PV 9, 15 10 GND2 DE 11, 14 12 NC A 13 B 16 VDD2 Description Power Supply (Logic Side), 3 V or 5 V Supply. Decoupling capacitor to GND1 required, capacitor value should be between 0.01 µF and 0.1 µF. Ground (Logic Side). Receiver Output Data. This output is high when (A – B) > 200 mV and low when (A – B) < –200 mV. The output is three-stated when the receiver is disabled, that is, when RE is driven high. Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and driving it high disables the receiver. Request to Send Input. Driving this input high enables the driver, and driving it low disables the driver. Transmit Data Input. Data to be transmitted by the driver is applied to this input. Power_Valid. Used during power-up and power-down, needs to be tied high when the ADM2486 is operational, see the Applications Information section. Ground (Bus Side). Driver Enable Status Output. This output signals the driver enable or disable status to other devices on the bus. DE is high when the driver is enabled and low when the driver is disabled. No Connect. Noninverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin A is put into a high impedance state to avoid overloading the bus. Inverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin B is put into a high impedance state to avoid overloading the bus. Power Supply (Bus Side), 5 V Isolated Supply. Decoupling capacitor to GND2 required, capacitor value should be between 0.01 µF and 0.1 µF. Rev. E | Page 9 of 20 ADM2486 Data Sheet TEST CIRCUITS R CL1 A VOD RLDIFF B CL2 Figure 3. Driver Voltage Measurement 04604-007 VOC 04604-005 R Figure 7. Driver Propagation Delay 375Ω DE 150Ω RTS TxD Figure 4. Driver Voltage Measurement RxD DE RTS VDD1 VDD2 Figure 8. RTS-to-DE Propagation Delay VCC 110Ω B A 04604-004 GND1 GND2 VDD2 110Ω S1 TxD 195Ω GND2 VDD1 GND2 195Ω A RE VDD2 GND1 50pF B S2 VOUT 04604-009 RxD B RE 150Ω GALVANIC ISOLATION TxD A 04604-008 375Ω 50pF GALVANIC ISOLATION VTEST 60Ω 04604-006 VOD3 RTS Figure 5. Supply-Current Measurement Test Circuit Figure 9. Driver Enable/Disable A B 2.2kΩ RECEIVE GND2 ENABLE A 195Ω GND1 100nF GND2 GND2 VDD2 50Ω Figure 10. Receiver Propagation Delay FTEST , 110nF VHF 110Ω 470nF 195Ω VDD1 CL VDD2 B +1.5V 50Ω 22kΩ VTEST2 100nF VCC S1 –1.5V 04604-010 RxD RE Figure 6. High Frequency Common-Mode Noise Test Circuit RL RE CL VOUT RE IN Figure 11. Receiver Enable/Disable Rev. E | Page 10 of 20 S2 04604-013 GALVANIC ISOLATION TxD VCM(HF) VOUT DE 04604-012 RTS Data Sheet ADM2486 SWITCHING CHARACTERISTICS VDD1 0.5VDD1 0V 0.5VDD1 tPALH tPBLH 0.7VDD1 tPBHL tPAHL B RTS 0.5VDD1 0.5VDD1 1/2VO 0.3VDD1 VO tZL tLZ A tSKEW tSKEW VOL tHZ VOH VOH – 0.5V 10% POINT 10% POINT VOL tR tF 2.3V A, B 0V 04604-021 A, B VOH + 0.5V tZH 04604-011 VOH 90% POINT 90% POINT 2.3V A, B tPWD = |tPALH – tPAHL |, |tPBLH – tPBHL | Figure 14. Driver Enable/Disable Timing Figure 12. Driver Propagation Delay, Rise/Fall Timing 0.7VDD1 RE 0.3VDD1 0V 0V tPHL tPHL tSKEW = |tPLH – tPHL| VOH + 0.5V O/P LOW VOL tHZ tZH O/P HIGH 1.5V VOH VOL 04604-019 1.5V 1.5V RxD VOH RxD tLZ tZL Figure 13. Receiver Propagation Delay RxD 1.5V VOH – 0.5V 0V Figure 15. Receiver Enable/Disable Timing Rev. E | Page 11 of 20 04604-020 A–B 0.5VDD1 0.5VDD1 ADM2486 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1.4 1.2 SUPPLY CURRENT (mA) IDD1 _RCVR_ENABLE @ 5.5V 1.0 IDD2 _DE_ENABLE @ 5.5V 0.8 1 0.6 2 0.4 25 TEMPERATURE (°C) –40 85 4 04604-029 0 CH1 2.00V CH3 2.00V Figure 16. Unloaded Supply Current vs. Temperature 50 04604-025 0.2 CH2 2.00V CH4 2.00V M20.0ns A CH2 T 6.00000ns 3.12V Figure 19. Driver/Receiver Propagation Delay, Low to High (RLDiff = 54 Ω, CL1 = CL2 = 100 pF) RECEIVER tPLH 45 40 RECEIVER tPHL 1 TIME (ns) 35 30 25 20 3 15 5 –40 25 TEMPERATURE (°C) 85 04604-026 4 0 CH1 5.00V CH3 2.00V Figure 17. Driver Propagation Delay vs. Temperature 2.60V 350 DRIVER tALH 300 DRIVER tBLH DRIVER tAHL 25 20 15 10 0 –40 25 TEMPERATURE (°C) 85 Figure 18. Receiver Propagation Delay vs. Temperature 04604-027 5 250 SIDE 2 200 150 SIDE 1 100 50 0 0 50 100 150 CASE TEMPERATURE (°C) 200 04604-018 SAFETY-LIMITING CURRENT (mA) 35 TIME (ns) M20.0ns A CH1 T –444.400ns DRIVER tBHL 40 30 CH2 2.00V CH4 2.00V Figure 20. Driver/Receiver Propagation Delay, High to Low (RLDiff = 54 Ω, CL1 = CL2 = 100 pF) 50 45 04604-028 10 Figure 21. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per VDE 0884 Rev. E | Page 12 of 20 ADM2486 0 4.78 –5 4.76 OUTPUT VOLTAGE (V) –10 –15 –20 –25 4.72 4.70 3.25 3.50 3.75 4.00 4.25 4.50 OUTPUT VOLTAGE (V) 4.75 5.00 5.25 4.66 –40 Figure 22. Output Current vs. Receiver Output High Voltage 04604-033 04604-031 4.68 –30 3.00 –25 –10 20 35 5 TEMPERATURE (°C) 50 65 80 Figure 24. Receiver Output High Voltage vs. Temperature IRxD= −4 mA 0.32 35 30 0.30 OUTPUT VOLTAGE (V) 25 20 15 10 0.28 0.26 0.24 0.22 5 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 OUTPUT VOLTAGE (V) 2.00 2.25 2.50 04604-032 OUTPUT CURRENT (mA) 4.74 Figure 23. Output Current vs. Receiver Output Low Voltage 0.20 –40 04604-034 OUTPUT CURRENT (mA) Data Sheet –25 –10 20 35 5 TEMPERATURE (°C) 50 65 80 Figure 25. Receiver Output Low Voltage vs. Temperature IRxD = –4 mA Rev. E | Page 13 of 20 ADM2486 Data Sheet CIRCUIT DESCRIPTION Table 9. Transmitting ELECTRICAL ISOLATION In the ADM2486, electrical isolation is implemented on the logic side of the interface. Therefore, the part has two main sections: a digital isolation section and a transceiver section (see Figure 26). Driver input and request-to-send signals, applied to the TxD and RTS pins, respectively, and referenced to logic ground (GND1), are coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the receiver output, referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RxD pin referenced to logic ground. Supply Status VDD1 VDD2 On On On On On On On Off Off On Off Off 1 RTS H H L X X X Inputs TxD H L X X X X A H L Z Z Z Z Outputs1 B DE L H H H Z L Z L Z L Z L The PV pin is tied high. iCoupler Technology Table 10. Receiving The digital signals are transmitted across the isolation barrier using iCoupler technology. This technique uses chip-scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. Digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. At the secondary winding, the induced waveforms are then decoded into the binary value that was originally transmitted. Supply Status VDD1 VDD2 A − B (V) RE Output1 RxD On On On On On On Off Off >0.2 1.0 V to 0.75 V. This is well above the 0.5 V sensing threshold of the decoder. Figure 28 shows the magnetic flux density values in terms of more familiar quantities such as maximum allowable current flow at given distances away from the ADM2486 transformers. 1000.00 The decoder has a sensing threshold of about 0.5 V; therefore, there is a 0.5 V margin in which induced voltages can be tolerated. Given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated as shown in Figure 27. 0.100 0.001 1k MAXIMUM ALLOWABLE CURRENT (kA) MAGNETIC FIELD IMMUNITY 1.000 04604-016 RECEIVER FAIL-SAFE INPUTS 10.000 DISTANCE = 1m 100.00 DISTANCE = 5mm 10.00 DISTANCE = 100mm 1.00 0.10 0.01 1k 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) 100M 04604-017 The ADM2486 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. This circuitry is designed to disable the driver outputs when a die temperature of 150°C is reached. As the device cools, the drivers are re-enabled at a temperature of 140°C. MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kGAUSS) 100.000 THERMAL SHUTDOWN Figure 28. Maximum Allowable Current for Various Current-to-ADM2486 Spacings At combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. Rev. E | Page 15 of 20 ADM2486 Data Sheet APPLICATIONS INFORMATION PC BOARD LAYOUT VDD1 The ADM2486 isolated RS-485 transceiver requires no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins (see Figure 29). Bypass capacitors are most conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The capacitor value should be between 0.01 µF and 0.1 µF. The total lead length between both ends of the capacitor and the input power supply pin should not exceed 20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be considered unless the ground pair on each package side is connected close to the package. RESET ADM2486 PV GND1 VDD1 2.32V 2.0V 2.32V 2.0V 04604-023 tPOR RESET Figure 30. Driving PV with ADM809Z NC = NO CONNECT VDD1 Figure 29. Recommended Printed Circuit Board Layout In applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. Furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could cause voltage differentials between pins exceeding the device’s Absolute Maximum Ratings, thereby leading to latch-up or permanent damage. VDD1 10kΩ ADM809Z 100pF POWER_VALID INPUT To avoid chatter on the A and B outputs caused by slow powerup and power-down transients on VDD1 (>100 µs/V), the device features a power_valid (PV) digital input. This pin should be driven low until VDD1 exceeds 2.0 V. When VDD1 is greater than 2.0 V, this pin should be driven high. Conversely, upon powerdown, PV should be driven low before VDD1 reaches 2.0 V (see Figure 30). If the PV pin is driven with an open-drain output, the recommended value for the pull-up resistor is a 10 kΩ resistor, bypassed with a 100 pF capacitor to GND1 (see Figure 31). The power_valid input can be driven, for example, by the output of a system reset circuit, such as the ADM809Z, which has a threshold voltage of 2.32 V. Rev. E | Page 16 of 20 RESET VDD1 PV ADM2486 GND1 2.32V 2.0V 2.32V 2.0V tPOR RESET Figure 31. Driving PV with an Open-Drain Output 04604-030 ADM2486 VDD2 GND2 NC B A NC DE GND2 ADM809Z 04604-002 VDD1 GND1 RxD RE RTS TxD PV GND1 VDD1 Data Sheet ADM2486 ISOLATED POWER SUPPLY CIRCUIT The ADM2486 requires isolated power capable of 5 V at up to approximately 75 mA (this current is dependent on the data rate and termination resistors used) to be supplied between the VDD2 and the GND2 pins. A transformer driver circuit with a center-tapped transformer and LDO can be used to generate the isolated 5 V supply, as shown in Figure 32. The center-tapped transformer provides electrical isolation of the 5 V isolated power supply. The primary winding of the transformer is excited with a pair of square waveforms that are 180° out of phase with each other. A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. The ADP667 linear voltage regulator provides a regulated 5 V power supply to the ADM2486’s bus-side circuitry (VDD2). ISOLATION BARRIER VCC SD103C TRANSFORMER DRIVER OUT 10µF 22µF ADP667 78253 SD103C VCC ISO 5V VDD1 VDD2 SET GND SHDN 100nF ADM2486 GND1 GND2 04604-035 100nF 5V IN VCC Figure 32. Isolated Power Supply Circuit Rev. E | Page 17 of 20 ADM2486 Data Sheet OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 10.65 (0.4193) 10.00 (0.3937) 8 0.51 (0.0201) 0.31 (0.0122) 0.75 (0.0295) 45° 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 8° 0° 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 1.27 (0.0500) 0.40 (0.0157) 03-27-2007-B 1 Figure 33. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model 1 ADM2486BRW ADM2486BRW-REEL ADM2486BRWZ ADM2486BRWZ-REEL EVAL-ADM2486EBZ 1 Data Rate (Mbps) 20 20 20 20 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W ADM2486 Evaluation Board Z = RoHS Compliant Part. Rev. E | Page 18 of 20 Ordering Quantity 47 1,000 47 1,000 Package Option RW-16 RW-16 RW-16 RW-16 Data Sheet ADM2486 NOTES Rev. E | Page 19 of 20 ADM2486 Data Sheet NOTES ©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04604-0-11/13(E) Rev. E | Page 20 of 20
ADM2486BRW 价格&库存

很抱歉,暂时无法提供与“ADM2486BRW”相匹配的价格&库存,您可以联系我们找货

免费人工找货