ADM2490E_VA

High Speed, ESD-Protected, Full-Duplex, iCoupler Isolated RS-485 Transceiver ADM2490E FEATURES Isolated, full-duplex RS-485/RS-422 transceiver ±8 kV ESD protection on RS-485 input/output pins 16 Mbps data rate Complies with ANSI TIA/EIA-485-A-1998 and ISO 8482: 1987(E) Suitable for 5 V or 3 V operation (VDD1) High common-mode transient immunity: >25 kV/μs Receiver has open-circuit, fail-safe design 32 nodes on the bus Thermal shutdown protection Safety and regulatory approvals UL recognition: 5000 V rms isolation voltage for 1 minute per UL 1577 VDE certificate of conformity DIN EN 60747-5-2 (VDE 0884-10 Part 2): 2003-01 DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000 VIORM = 848 V peak Operating temperature range: −40°C to +105°C Wide body, 16-lead SOIC package FUNCTIONAL BLOCK DIAGRAM VDD1 VDD2 ADM2490E GALVANIC ISOLATION Y Z TxD A B RxD GND1 GND2 Figure 1. APPLICATIONS Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems GENERAL DESCRIPTION The ADM2490E is an isolated data transceiver with ±8 kV ESD protection that is suitable for high speed, full-duplex communication on multipoint transmission lines. It is designed for balanced transmission lines and complies with ANSI TIA/EIA-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler® technology to combine a 2-channel isolator, a threestate differential line driver, and a differential input receiver into a single package. The differential transmitter outputs and receiver inputs feature electrostatic discharge circuitry that provides protection to ±8 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3 V supply, whereas the bus side requires an isolated 5 V supply. The device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention could cause excessive power dissipation. The ADM2490E is available in a wide body, 16-lead SOIC package and operates over the −40°C to +105°C temperature range. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006–2008 Analog Devices, Inc. All rights reserved. 05889-001 ADM2490E TABLE OF CONTENTS Features .............................................................................................. 1  Applications ....................................................................................... 1  Functional Block Diagram .............................................................. 1  General Description ......................................................................... 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Timing Specifications .................................................................. 4  Package Characteristics ............................................................... 4  Regulatory Information ............................................................... 5  Insulation and Safety-Related Specifications ............................ 5  VDE 0884-10 Insulation Characteristics................................... 5  Absolute Maximum Ratings............................................................ 6  ESD Caution .................................................................................. 6  Pin Configuration and Function Descriptions ............................. 7  Test Circuits ....................................................................................... 8  Switching Characteristics .................................................................9  Typical Performance Characteristics ........................................... 10  Circuit Description......................................................................... 12  Electrical Isolation...................................................................... 12  Truth Tables................................................................................. 12  Thermal Shutdown .................................................................... 13  Fail-Safe Receiver Inputs ........................................................... 13  Magnetic Field Immunity.......................................................... 13  Applications Information .............................................................. 14  Isolated Power Supply Circuit .................................................. 14  PCB Layout ................................................................................. 14  Typical Applications ................................................................... 15  Outline Dimensions ....................................................................... 16  Ordering Guide .......................................................................... 16  REVISION HISTORY 8/08—Rev. 0 to Rev. A Changes to Regulatory Approval Status Throughout .................. 1 Changed VDE 0884 to VDE 0884-10 Throughout ...................... 1 Changes to Table 5 ............................................................................ 5 Changes to Table 8 ............................................................................ 6 Changes to Figure 9 .......................................................................... 9 Changes to iCoupler Technology Section ................................... 12 Changes to Magnetic Field Immunity Section ........................... 13 Changes to Isolated Power Supply Circuit Section .................... 14 Changes to Figure 25 ...................................................................... 14 Added Typical Applications Section ............................................ 15 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 16 10/06—Revision 0: Initial Version Rev. A | Page 2 of 16 ADM2490E SPECIFICATIONS All voltages are relative to their respective ground; 2.7 ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5.0 V, unless otherwise noted. Table 1. Parameter SUPPLY CURRENT Power Supply Current, Logic Side TxD/RxD Data Rate < 2 Mbps TxD/RxD Data Rate = 16 Mbps Power Supply Current, Bus Side TxD/RxD Data Rate < 2 Mbps TxD/RxD Data Rate = 16 Mbps DRIVER Differential Outputs Differential Output Voltage, Loaded Symbol Min Typ Max Unit Test Conditions IDD1 IDD1 IDD2 IDD2 3.0 6 4.0 60 mA mA mA mA 2.7 V ≤ VDD1 ≤ 5.5 V, unloaded 100 Ω load between Y and Z 2.7 V ≤ VDD1 ≤ 5.5 V, unloaded 100 Ω load between Y and Z |VOD2| |VOD4| 2.0 1.5 1.5 5.0 5.0 5.0 0.2 3.0 0.2 200 V V V V V V mA V V μA RL = 50 Ω (RS-422), see Figure 3 RL = 27 Ω (RS-485), see Figure 3 −7 V ≤ VTEST1 ≤ +12 V, see Figure 4 RL = 54 Ω or 100 Ω, see Figure 3 RL = 54 Ω or 100 Ω, see Figure 3 RL = 54 Ω or 100 Ω, see Figure 3 ∆|VOD| for Complementary Output States Common-Mode Output Voltage ∆|VOC| for Complementary Output States Short-Circuit Output Current Logic Inputs Input Threshold Low Input Threshold High TxD Input Current RECEIVER Differential Inputs Differential Input Threshold Voltage Input Voltage Hysteresis Input Current (A, B) Line Input Resistance Logic Outputs Output Voltage Low Output Voltage High Short-Circuit Current COMMON-MODE TRANSIENT IMMUNITY 1 1 ∆|VOD| VOC ∆|VOC| IOS VIL VIH ITxD 0.25 × VDD1 −10 +0.01 0.7 × VDD1 +10 VTH VHYS II RIN VOLRxD VOHRxD −0.2 70 +0.2 1.0 −0.8 12 0.2 VDD1 − 0.2 0.4 100 25 V mV mA mA kΩ V V mA kV/μs VOC = 0 V VOC = 12 V VOC = −7 V VDD1 − 0.3 IORxD = 1.5 mA, VA − VB = −0.2 V IORxD = −1.5 mA, VA − VB = 0.2 V VCM = 1 kV, transient magnitude = 800 V CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. A | Page 3 of 16 ADM2490E TIMING SPECIFICATIONS TA = −40°C to +85°C. Table 2. Parameter DRIVER Maximum Data Rate Propagation Delay Pulse Width Distortion, PWD = |tPYLH − tPYHL|, PWD = |tPZLH − tPZHL| Single-Ended Output Rise/Fall Times RECEIVER Propagation Delay Pulse Width Distortion, PWD = |tPLH − tPHL| Symbol Min 16 tPLH, tPHL tPWD, tPWD tR, tF 45 60 7 20 Typ Max Unit Mbps ns ns ns Test Conditions RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 6 and Figure 8 RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 8 RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 8 CL = 15 pF, see Figure 7 and Figure 9 CL = 15 pF, see Figure 7 and Figure 9 tPLH, tPHL tPWD 60 10 ns ns TA = −40°C to +105°C. Table 3. Parameter DRIVER Maximum Data Rate Propagation Delay Pulse Width Distortion, PWD = |tPYLH − tPYHL|, PWD = |tPZLH − tPZHL| Single-Ended Output Rise/Fall Time RECEIVER Propagation Delay Pulse Width Distortion, PWD = |tPLH − tPHL| Symbol Min 10 tPYLH, tPYHL, tPZLH, tPZHL tPWD, tPWD tR, tF 45 60 9 27 Typ Max Unit Mbps ns ns ns Test Conditions RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 8 RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 8 RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 6 and Figure 8 CL = 15 pF, see Figure 7 and Figure 9 CL = 15 pF, see Figure 7 and Figure 9 tPLH, tPHL tPWD 60 10 ns ns PACKAGE CHARACTERISTICS Table 4. Parameter Resistance (Input to Output) 1 Capacitance (Input to Output)1 Input Capacitance 2 Input IC Junction-to-Case Thermal Resistance Output IC Junction-to-Case Thermal Resistance 1 Symbol RI-O CI-O CI θJCI θJCO Min Typ 1012 3 4 33 28 Max Unit Ω pF pF °C/W °C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside Device considered a 2-terminal device: Pin 1, Pin 2, Pin 3, Pin 4, Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together and Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15, and Pin 16 are shorted together. 2 Input capacitance is from any input data pin to ground. Rev. A | Page 4 of 16 ADM2490E REGULATORY INFORMATION Table 5. ADM2490E Approvals Organization UL Approval Type Recognized under the Component Recognition Program of Underwriters Laboratories, Inc. Certified according to DIN EN 60747-5-2 (VDE 0884-10 Part 2): 2003-01, DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000 Notes In accordance with UL 1577, each ADM2490E is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (current leakage detection limit = 10 μA). In accordance with DIN EN 60747-5-2, each ADM2490E is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 second (partial discharge detection limit = 5 pC). VDE INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 6. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Minimum External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group Symbol L(I01) L(I02) Value 5000 7.45 8.1 0.017 >175 IIIa Unit V rms mm min mm min mm min V Conditions 1 minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance along body Insulation distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89) CTI VDE 0884-10 INSULATION CHARACTERISTICS This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. An asterisk (*) on a package denotes VDE 0884-10 approval for 848 V peak working voltage. Table 7. Description Installation Classification per DIN VDE 0110 for Rated Mains Voltage ≤300 V rms ≤450 V rms ≤600 V rms Climatic Classification Pollution Degree (DIN VDE 0110, see Table 1) Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method b1 VIORM × 1.875 = VPR, 100% Production Tested, tm = 1 sec, Partial Discharge < 5 pC Input-to-Output Test Voltage, Method a After Environmental Tests, Subgroup 1 VIORM × 1.6 = VPR, tm = 60 sec, Partial Discharge < 5 pC After Input and/or Safety Test, Subgroup 2/3 VIORM × 1.2 = VPR, tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec) Safety-Limiting Values (Maximum Value Allowed in the Event of a Failure; see Figure 16) Case Temperature Input Current Output Current Insulation Resistance at TS, VIO = 500 V Symbol Characteristic I to IV I to II I to II 40/105/21 2 848 1590 Unit VIORM VPR V peak V peak 1357 VPR VTR TS IS, INPUT IS, OUTPUT RS 1018 6000 150 265 335 >109 V peak V peak V peak °C mA mA Ω Rev. A | Page 5 of 16 ADM2490E ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Each voltage is relative to its respective ground. Table 8. Parameter Storage Temperature Range Ambient Operating Temperature Range VDD1 VDD2 Logic Input Voltages Bus Terminal Voltages Logic Output Voltages Average Output Current, per Pin ESD (Human Body Model) on A, B, Y, and Z Pins θJA Thermal Impedance Rating −55°C to +150°C −40°C to +105°C −0.5 V to +7 V −0.5 V to +6 V −0.5 V to VDD1 + 0.5 V −9 V to +14 V −0.5 V to VDD1 + 0.5 V ±35 mA ±8 kV 60°C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. ESD CAUTION Rev. A | Page 6 of 16 ADM2490E PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD1 1 GND1 2 RxD 3 NC 4 16 15 VDD2 GND2 A TOP VIEW 13 B GND1 5 (Not to Scale) 12 NC TxD 6 11 Z NC 7 GND1 8 10 9 ADM2490E 14 Y 05889-002 GND2 NC = NO CONNECT Figure 2. Pin Configuration Table 9. Pin Function Descriptions Pin No. 1 2, 5, 8 3 4, 7, 12 6 9, 15 10 11 13 14 16 Mnemonic VDD1 GND1 RxD NC TxD GND2 Y Z B A VDD2 Description Power Supply (Logic Side). Decoupling capacitor to GND1 required; capacitor value should be between 0.01 μF and 0.1 μF. Ground (Logic Side). Receiver Output. No Connect. These pins must be left floating. Transmit Data. Ground (Bus Side). Driver Noninverting Output. Driver Inverting Output. Receiver Inverting Input. Receiver Noninverting Input. Power Supply (Bus Side). Decoupling capacitor to GND2 required; capacitor value should be between 0.01 μF and 0.1 μF. Rev. A | Page 7 of 16 ADM2490E TEST CIRCUITS RL VOD 05889-003 Y CL1 RLDIFF CL2 05889-005 05889-006 RL VOC Z Figure 3. Driver Voltage Measurement Figure 6. Driver Propagation Delay 375Ω A VOD3 60Ω VTEST 05889-004 B VOUT CL 375Ω Figure 4. Driver Voltage Measurement Figure 7. Receiver Propagation Delay VDD2 VDD1 VDD2 220Ω 100Ω 220Ω TxD GALVANIC ISOLATION Y Z A B GND2 05889-014 RxD GND1 GND2 Figure 5. Supply-Current Measurement Test Circuit (See Figure 10 and Figure 11) Rev. A | Page 8 of 16 ADM2490E SWITCHING CHARACTERISTICS 3V 1.5V 0V 1.5V tPLH Z VO Y 1/2VO tPHL tPWD = |tPLH – tPHL| VOH A, B VOL 90% POINT 90% POINT tR tF Figure 8. Driver Propagation Delay, Rise/Fall Timing A, B 0V 0V tPLH tPHL VOH RxD 1.5V 1.5V VOL Figure 9. Receiver Propagation Delay Rev. A | Page 9 of 16 05889-008 05889-007 10% POINT 10% POINT ADM2490E TYPICAL PERFORMANCE CHARACTERISTICS 3.00 60 2.95 50 tPLH tPHL 2.90 DELAY (ns) IDD1 (mA) 40 2.85 NO LOAD 100Ω LOAD 220Ω-100Ω-220Ω LOAD 30 2.80 20 2.75 10 05889-015 –20 0 20 40 60 80 100 –20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 10. IDD1 Supply Current vs. Temperature (See Figure 5) Figure 13. Receiver Propagation Delay vs. Temperature 70 60 220 Ω-100Ω-220Ω LOAD 50 IDD2 (mA) TxD 40 30 20 10 0 –40 1 100 Ω LOAD Y AND Z OUTPUTS 2 RxD NO LOAD 4 05889-019 –20 0 20 40 60 80 100 05889-016 TEMPERATURE (°C) CH1 2V CH3 2V CH2 2V CH4 2V M20ns T 44.2% A CH2 2.84V Figure 11. IDD2 Supply Current vs. Temperature (See Figure 5) Figure 14. Driver/Receiver Propagation Delay, Low to High (RLDIFF = 54 Ω, CL1 = CL2 = 100 pF) 60 50 tPZHL tPYLH tPZLH tPYHL TxD 1 40 DELAY (ns) 30 Y AND Z OUTPUTS 20 2 10 4 RxD 05889-020 –20 0 20 40 60 80 100 05889-017 0 –40 TEMPERATURE (°C) CH1 2V CH3 2V CH2 2V CH4 2V M20ns T 44.2% A CH2 2.84V Figure 12. Driver Propagation Delay vs. Temperature Figure 15. Driver/Receiver Propagation Delay, High to Low (RLDIFF = 54 Ω, CL1 = CL2 = 100 pF) Rev. A | Page 10 of 16 05889-018 2.70 –40 0 –40 ADM2490E 350 300 SAFETY-LIMITING CURRENT (mA) 4.77 4.76 4.75 4.74 250 SIDE 2 200 150 VOLTAGE (V) 4.73 4.72 4.71 4.70 4.69 4.68 4.67 SIDE 1 100 50 0 05889-021 0 50 100 150 CASE TEMPERATURE (°C) 200 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 16. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per VDE 0884-10 Figure 19. Receiver Output High Voltage vs. Temperature, IRxD = −4 mA 0 –2 –4 0.35 0.30 0.25 VOLTAGE (V) CURRENT (mA) –6 –8 –10 –12 –14 4.0 0.20 0.15 0.10 0.05 0 –40 05889-022 4.2 4.4 4.6 4.8 5.0 –20 0 20 40 60 80 100 VOLTAGE (V) TEMPERATURE (°C) Figure 17. Output Current vs. Receiver Output High Voltage Figure 20. Receiver Output Low Voltage vs. Temperature, IRxD = –4 mA 16 14 12 CURRENT (mA) 10 8 6 4 2 0 0 0.2 0.4 0.6 VOLTAGE (V) 0.8 1.0 1.2 Figure 18. Output Current vs. Receiver Output Low Voltage 05889-023 Rev. A | Page 11 of 16 05889-025 05889-024 4.66 –40 ADM2490E CIRCUIT DESCRIPTION ELECTRICAL ISOLATION In the ADM2490E, electrical isolation is implemented on the logic side of the interface. Therefore, the part has two main sections: a digital isolation section and a transceiver section (see Figure 21). The driver input signal, which is applied to the TxD pin and referenced to logic ground (GND1), is coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the receiver input, which is referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RxD pin referenced to logic ground. TRUTH TABLES The truth tables in this section use the abbreviations shown in Table 10. Table 10. Truth Table Abbreviations Abbreviation H I L X Description High level Indeterminate Low level Irrelevant iCoupler Technology The digital signals transmit across the isolation barrier using iCoupler technology. This technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. Digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. At the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. Positive and negative logic transitions at the input cause narrow pulses (~1 ns) to be sent to the decoder via the transformer. The decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions at the input for more than ~1 μs, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. If the decoder receives no internal pulses for more than about 5 μs, the input side is assumed to be unpowered or nonfunctional, in which case the output is forced to a default state (see Table 12). VDD1 ISOLATION BARRIER Table 11. Transmitting VDD1 On On Supply Status VDD2 On On Input TxD H L Y H L Outputs Z L H Table 12. Receiving Supply Status VDD1 VDD2 On On On On On On On On On Off Off On Off Off VDD2 Inputs A − B ( V) >0.2 1.0 V to 0.75 V, still well above the 0.5 V sensing threshold of the decoder. Figure 23 shows the magnetic flux density values in terms of more familiar quantities, such as maximum allowable current flow at given distances away from the ADM2490E transformers. 1000 MAXIMUM ALLOWABLE CURRENT (kA) ⎛ −dβ ⎞ 2 V =⎜ ⎟∑ πrn ; n = 1, 2, K , N ⎝ dt ⎠ where: β is the magnetic flux density (gauss). N is the number of turns in the receiving coil. rn is the radius of the nth turn in the receiving coil (cm). Given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field can be determined using Figure 22. DISTANCE = 1m 100 DISTANCE = 5mm 10 DISTANCE = 100mm 1 0.1 10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz) 100M Figure 23. Maximum Allowable Current for Various Current-to-ADM2490E Spacings With combinations of strong magnetic field and high frequency, any loops formed by PCB traces can induce error voltages large enough to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. Rev. A | Page 13 of 16 05889-011 0.01 1k 05889-010 0.001 1k ADM2490E APPLICATIONS INFORMATION ISOLATED POWER SUPPLY CIRCUIT The ADM2490E requires isolated power capable of 5 V at up to approximately 65 mA (this current is dependent on the data rate and termination resistors used) to be supplied between the VDD2 and the GND2 pins. A transformer driver circuit with a center-tapped transformer and LDO can be used to generate the isolated 5 V supply, as shown in Figure 25. The center-tapped transformer provides electrical isolation of the 5 V power supply. The primary winding of the transformer is excited with a pair of square waveforms that are 180° out of phase with each other. A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. The ADP3330 linear voltage regulator provides a regulated power supply to the bus-side circuitry (VDD2) of the ADM2490E. lead length between both ends of the capacitor and the input power-supply pin should not exceed 20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be considered unless the ground pair on each package side is connected close to the package. VDD1 GND1 RxD NC GND1 TxD NC GND1 VDD2 GND2 A B NC Z Y GND2 ADM2490E NC = NO CONNECT Figure 24. Recommended Printed Circuit Board Layout PCB LAYOUT The ADM2490E isolated RS-485 transceiver requires no external interface circuitry for the logic interfaces. Power supply bypassing is required at the input and output supply pins (see Figure 24). Bypass capacitors are conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The capacitor value should be between 0.01 μF and 0.1 μF. The total ISOLATION BARRIER SD103C In applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. Furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. VCC IN VCC TRANSFORMER DRIVER SD 78253 SD103C 22µF OUT 5V 10µF ADP3330 GND ERR VCC VDD1 VDD2 ADM2490E 05889-012 GND1 GND2 Figure 25. Isolated Power-Supply Circuit Rev. A | Page 14 of 16 05889-013 ADM2490E TYPICAL APPLICATIONS The ADM2490E transceiver is designed for point-to-point transmission lines. Figure 26 shows a full-duplex point-to-point application. To minimize reflections, terminate the line at the receiver end with a termination resistor. The value of the termination resistor should be equal to the characteristic impedance of the cable. A RxO R B Z TxD D Y RT RT Y D Z B A R RxD TxD ADM2490E NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. ADM2490E 05889-026 Figure 26. Full-Duplex Point-to-Point Application Rev. A | Page 15 of 16 ADM2490E OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 16 9 7.60 (0.2992) 7.40 (0.2913) 1 8 10.65 (0.4193) 10.00 (0.3937) 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 0.75 (0.0295) 0.25 (0.0098) 8° 0° 0.33 (0.0130) 0.20 (0.0079) 45° SEATING PLANE 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013- AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 27. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model ADM2490EBRWZ 1 ADM2490EBRWZ-REEL71 1 Temperature Range −40°C to +105°C −40°C to +105°C Package Description 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 032707-B Package Option RW-16 RW-16 Z = RoHS Compliant Part. ©2006–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05889-0-8/08(A) Rev. A | Page 16 of 16