Microprocessor Supervisory
Circuit in 4-Lead SOT-143 with DSP
ADM811/ADM812
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
ADM811/ADM812
VCC
RESET
GENERATOR
VREF
MR
RESET/RESET
DEBOUNCE
GND
00092-001
Superior upgrade for MAX811/MAX812
Specified over temperature
Low power consumption: 5 μA typical
Precision voltage monitor: 2.5 V, 3 V, 3.3 V, 5 V options
Reset assertion down to 1 VCC
Power-on reset: 140 ms minimum
Logic low RESET output (ADM811)
Logic high RESET output (ADM812)
Built-in manual reset
Figure 1.
APPLICATIONS
Microprocessor systems
Controllers
Intelligent instruments
Automotive systems
Safety systems
Portable instruments
GENERAL DESCRIPTION
Included in this circuit is a debounced manual reset input.
Reset can be activated using an electrical switch (or an input
from another digital device) or by a degradation of the supply
voltage. The manual reset function is very useful, especially if
the circuit in which the ADM811/ADM812 are operating enters
Rev. H
into a state that can only be detected by the user. Allowing the
user to reset a system manually can reduce the damage or
danger that could otherwise be caused by an out-of-control
or locked system.
MR
VCC
VCC
ADM811
MICROPROCESSOR
SYSTEM
RESET
RESET
100kΩ
GND
GND
00092-002
The ADM811/ADM812 are reliable voltage monitoring devices
suitable for use in most voltage monitoring applications. The
ADM811/ADM812 are designed to monitor six different voltages,
each allowing a 5% or 10% degradation of standard PSU voltages
before a reset occurs. These voltages have been selected for the
effective monitoring of 2.5 V, 3 V, 3.3 V, and 5 V supply voltage
levels.
Figure 2. Typical ADM811 Operating Circuit
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1999–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADM811/ADM812
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Reset Thresholds ...........................................................................8
Applications ....................................................................................... 1
Reset Output ..................................................................................8
Functional Block Diagram .............................................................. 1
Manual Reset..................................................................................8
General Description ......................................................................... 1
Glitch Immunity ............................................................................8
Revision History ............................................................................... 2
Interfacing to Other Devices ............................................................9
Specifications..................................................................................... 3
Output .............................................................................................9
Absolute Maximum Ratings............................................................ 5
Benefits of a Very Accurate Reset Threshold ............................9
ESD Caution .................................................................................. 5
Ensuring a Valid RESET/Reset Output Down to VCC = 0 V....9
Pin Configuration and Function Descriptions ............................. 6
Outline Dimensions ....................................................................... 10
Typical Performance Characteristics ............................................. 7
Ordering Guide .......................................................................... 10
Circuit Information .......................................................................... 8
REVISION HISTORY
3/16—Rev. G to Rev. H
Changed ADM81x to ADM811/ADM812 ................. Throughout
Change RESET/RESET Output Voltage Parameter, Table 1 ......... 3
Changes to Ordering Guide .......................................................... 10
3/13—Rev. F to Rev. G
Changes to Pin 4 Description; Table 3 ........................................... 5
Updated Outline Dimensions ......................................................... 9
Changes to Ordering Guide .......................................................... 10
8/09—Rev. E to Rev. F
Changes to Ordering Guide .......................................................... 10
5/08—Rev. D to Rev. E
Changes to Table 2 ............................................................................ 4
Updated Outline Dimensions ......................................................... 9
Changes to Ordering Guide .......................................................... 10
5/06—Rev. C to Rev. D
Changes to Ordering Guide ............................................................ 9
2/03—Rev. B to Rev. C
Changes to Features Section ............................................................1
Changes to General Description Section .......................................1
Changes to Specifications Section ...................................................2
Removed Note 2 from Ordering Guide ..........................................3
Changes to Pin Function Descriptions ...........................................4
Removed Note from Table I ............................................................6
1/03—Rev. A to Rev. B
Added ADM812 ................................................................. Universal
Changes to Specifications .................................................................2
Changes to Ordering Guide .............................................................3
Changes to Pin Configuration .........................................................4
Changes to Pin Function Description ............................................4
Additions to Table I ...........................................................................6
Changes to Manual Reset section....................................................6
5/02—Rev. 0 to Rev. A
Deleted ADM812................................................................ Universal
4/99—Revision 0: Initial Version
Rev. H | Page 2 of 12
Data Sheet
ADM811/ADM812
SPECIFICATIONS
VCC = full operating range; TA = TMIN to TMAX; VCC typical = 5 V for L/M models, 3.3 V for T/S models, 3 V for R model, 2.5 V for Z
models, unless otherwise noted.
Table 1.
Parameter
SUPPLY
Voltage
Min
1.0
1.2
Current
RESET VOLTAGE THRESHOLD
ADM811L/ADM812L
ADM811L/ADM812L
ADM811M/ADM812M
ADM811M/ADM812M
ADM811T/ADM812T
ADM811T/ADM812T
ADM811S/ADM812S
ADM811S/ADM812S
ADM811R/ADM812R
ADM811R/ADM812R
ADM811Z/ADM812Z
ADM811Z/ADM812Z
RESET THRESHOLD TEMPERATURE
COEFFICIENT
VCC TO RESET/RESET DELAY
RESET ACTIVE TIMEOUT PERIOD
MANUAL RESET
Minimum Pulse Width
Glitch Immunity
RESET/RESET Propagation Delay
Pull-Up Resistance
The Manual Reset Circuit Acts On
An Input Rising Above
An Input Falling Below
An Input Rising Above
An Input Falling Below
Typ
4.54
4.50
4.30
4.25
3.03
3.00
2.88
2.85
2.58
2.55
2.28
2.25
Max
Unit
Test Conditions/Comments
5.5
TA = 0°C to 70°C
TA = −40°C to +85°C
VCC < 5.5 V, ADM811L/ADM812L/ADM811M/ADM812M,
IOUT = 0 mA
VCC < 3.6 V, ADM811R/ADM812R/ADM811S/ADM812S/
ADM811T/ADM812T/ADM811Z/ADM812Z, IOUT = 0 mA
8
15
V
V
µA
5
10
µA
4.63
4.72
4.75
4.46
4.50
3.14
3.15
2.98
3.00
2.68
2.70
2.35
2.38
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
30
V
V
V
V
V
V
V
V
V
V
V
V
ppm/°C
40
20
µs
µs
VOD = 125 mV, ADM811L/ADM812L/ADM811M/ADM812M
VOD = 125 mV, ADM811R/ADM812R/ADM811S/ADM812S/
ADM811T/ADM812T/ADM811Z/ADM812Z
VCC = VTH(MAX)
ADM811-3T only
4.38
3.08
2.93
2.63
2.32
140
300
560
700
ms
ms
30
µs
ns
µs
kΩ
10
10
100
0.5
20
2.3
0.8
V
V
V
0.25 × VCC
V
0.7 × VCC
Rev. H | Page 3 of 12
VCC > VTH(MAX), ADM811L/ADM812L/ADM811M/ADM812M
VCC > VTH(MAX), ADM811L/ADM812L/ADM811M/ADM812M
VCC > VTH(MAX), ADM811R/ADM812R/ADM811S/ADM812S/
ADM811T/ADM812T/ADM811Z/ADM812Z
VCC > VTH(MAX), ADM811R/ADM812R/ADM811S/ADM812S/
ADM811T/ADM812T/ADM811Z/ADM812Z
ADM811/ADM812
Parameter
RESET/RESET Output Voltage
Low (ADM812R/ADM812S/
ADM812T/ADM812Z)
Low (ADM812L/ADM812M)
High (ADM812R/ADM812S/
ADM812T/ADM812Z/ADM812L/
ADM812M)
Low (ADM811R/ADM811S/
ADM811T/ADM811Z)
Low (ADM811L/ADM811M)
Low (ADM811R/ADM811S/
ADM811T/ADM811Z/
ADM811L/ADM811M)
High (ADM811R/ADM811S/
ADM811T/ADM811Z)
High (ADM811L/ADM811M)
Data Sheet
Min
Typ
Max
Unit
Test Conditions/Comments
0.3
V
VCC = VTH(MAX), ISINK = 1.2 mA
0.4
V
V
VCC = VTH(MAX), ISINK = 3.2 mA
1.8 V < VCC < VTH(MIN), ISOURCE = 150 µA
0.3
V
VCC = VTH(MIN), ISINK = 1.2 mA
0.4
0.3
V
V
VCC = VTH(MIN), ISINK = 3.2 mA
VCC > 1.0 V, ISINK = 50 µA
0.8 × VCC
V
VCC > VTH(MAX), ISOURCE = 500 µA
VCC − 1.5
V
VCC > VTH(MAX), ISOURCE = 800 µA
0.8 × VCC
Rev. H | Page 4 of 12
Data Sheet
ADM811/ADM812
ABSOLUTE MAXIMUM RATINGS
Typical values are at TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Terminal Voltage (With Respect to Ground)
VCC
All Other Inputs
Input Current
VCC
MR
Output Current
RESET
Power Dissipation (TA = 70°C)
RA-4 (SOT-143)
Derate by 4 mW/°C Above 70°C
θJA Thermal Impedance
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
ESD Rating
Rating
−0.3 V to +6 V
−0.3 V to VCC + 0.3 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
20 mA
20 mA
20 mA
200 mW
330°C/W
−40°C to +85°C
−65°C to +160°C
300°C
215°C
220°C
3 kV
Rev. H | Page 5 of 12
ADM811/ADM812
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADM811/
ADM812
4
VCC
TOP VIEW
RESET/RESET 2 (Not to Scale) 3 MR
00092-003
GND 1
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1
2
Mnemonic
GND
RESET (ADM811)
RESET (ADM812)
3
MR
4
VCC
Description
Ground Reference For All Signals, 0 V.
Active Low Logic Output. RESET remains low while VCC is below the reset threshold or when MR is low;
RESET then remains low for at least 140 ms (at least 300 ms for the ADM811-3T) after VCC rises above the
reset threshold.
Active High Logic Output. RESET remains high while VCC is below the reset threshold or when MR is low;
RESET then remains high for 240 ms (typical) after VCC rises above the reset threshold.
Manual Reset. This active low debounced input ignores input pulses of 100 ns or less (typical) and is
guaranteed to accept input pulses of greater than 10 μs. Leave floating when not used.
Monitored Supply Voltage of 2.5 V, 3 V, 3.3 V, or 5 V. A 0.1 μF decoupling capacitor between VCC and the
GND pin is recommended.
Rev. H | Page 6 of 12
Data Sheet
ADM811/ADM812
TYPICAL PERFORMANCE CHARACTERISTICS
12
10
IDD @ VCC = 5.5V
9
10
7
8
IDD @ VCC = 3V
IDD (µA)
IDD (µA)
IDD @ VCC = 5.5V
8
6
6
IDD @ VCC = 3V
5
4
4
3
2
2
IDD @ VCC = 1V
1
20
30
50
70
85
100
120
TEMPERATURE (°C)
0
–40
800
POWER-DOWN RESET DELAY (µs)
900
800
700
600
500
VOD = 20mV
300
200 VOD = 125mV
VOD = 200mV
100
0
20
30
50
70
85
100
30
50
70
85
100
120
700
600
500
400
VOD = 20mV
300
200
VOD = 125mV
100
120
TEMPERATURE (°C)
0
–40
00092-005
POWER-DOWN RESET DELAY (µs)
900
–20
20
Figure 7. Supply Current vs. Temperature (ADM811L/ADM812L/
ADM811M/ADM812M)
1000
0
–40
0
TEMPERATURE (°C)
Figure 4. Supply Current vs. Temperature
(ADM811R/ADM812R/ADM811S/ADM812S/
ADM811T/ADM812T/ADM811Z/ADM812Z)
400
–20
VOD = 200mV
–20
0
20
30
50
70
85
100
120
TEMPERATURE (°C)
00092-008
0
00092-004
–20
00092-007
IDD @ VCC = 1V
0
–40
Figure 8. Power-Down RESET Delay vs. Temperature (ADM811L/ADM812L/
ADM811M/ADM812M)
Figure 5. Power-Down RESET Delay vs. Temperature
(ADM811R/ADM812R/ADM811S/ADM812S/
ADM811T/ADM812T/ADM811Z/ADM812Z)
1.007
299
1.006
NORMALIZED RESET THRESHOLD
ADM81xL/M
279
274
269
264
259
254
ADM81xR/S/T/Z
249
1.005
1.004
1.003
1.002
1.002
1.001
1.000
0.999
0.998
0.997
–20
0
20
30
50
70
85
100
TEMPERATURE (°C)
120
0.995
–40
–20
0
20
30
50
70
85
100
120
TEMPERATURE (°C)
Figure 9. RESET Threshold Deviation vs. Temperature
Figure 6. Power-Up RESET Timeout vs. Temperature
Rev. H | Page 7 of 12
00092-009
0.996
244
–40
00092-006
POWER-UP RESET TIMEOUT (ms)
294
ADM811/ADM812
Data Sheet
CIRCUIT INFORMATION
RESET THRESHOLDS
A reset output is provided to the microprocessor whenever the
VCC input is below the reset threshold. The actual reset threshold
depends on whether an L, M, T, S, R, or Z suffix is used (see
Table 4).
Table 4. Reset Threshold Options
Reset Threshold (V)
4.63
4.38
3.08
3.08
2.93
2.63
2.32
4.63
4.38
3.08
2.93
2.63
2.32
During power-down of the ADM811, the RESET output
remains valid (low) with VCC as low as 1 V. This ensures that the
microprocessor is held in a stable shutdown condition as the
supply falls and also ensures that no spurious activity can
occur via the microprocessor as it powers up.
MANUAL RESET
The ADM811/ADM812 are equipped with a manual reset
input. This input is designed to operate in a noisy environment
where unwanted glitches could be induced. These glitches could
be produced by the bouncing action of a switch contact, or where a
manual reset switch may be located some distance away from
the circuit (the cabling of which can pick up noise).
The manual reset input is guaranteed to ignore logically valid
inputs that are faster than 100 ns and to accept inputs longer in
duration than 10 µs.
GLITCH IMMUNITY
The ADM811/ADM812 contain internal filtering circuitry
providing glitch immunity from fast transient glitches on the
power supply line.
RESET OUTPUT
On power-up and after VCC rises above the reset threshold, an
internal timer holds the reset output active for 240 ms (typical).
This is intended as a power-on reset signal for the processor. It
allows time for both the power supply and the microprocessor
to stabilize after power-up. If a power supply brownout or
interruption occurs, the reset output is similarly activated and
remains active for 240 ms (typical) after the supply recovers.
This allows time for the power supply and microprocessor to
stabilize.
Rev. H | Page 8 of 12
VCC
RESET
VREF
t1
VREF
VREF
VREF
t1
t1 = RESET TIME = 250ms TYPICAL
VREF = RESET VOLTAGE THRESHOLD
Figure 10. Power Fall RESET Timing
00092-010
Model
ADM811LART
ADM811MART
ADM811TART
ADM811-3TART
ADM811SART
ADM811RART
ADM811ZART
ADM812LART
ADM812MART
ADM812TART
ADM812SART
ADM812RART
ADM812ZART
The ADM811 provides an active low reset output (RESET)
while the ADM812 provides an active high output (RESET).
Data Sheet
ADM811/ADM812
INTERFACING TO OTHER DEVICES
VCC
OUTPUT
The ADM811/ADM812 are designed to integrate with as many
devices as possible. One feature of the ADM811/ADM812 is the
reset output, which is directly proportional to VCC (this is guaranteed only while VCC is greater than 1 V). This enables the part
to be used with both 3 V and 5 V, or any nominal voltage within
the minimum and maximum specifications for VCC.
VCC
ADM811
GND
00092-011
RESET
Figure 11. Ensuring a Valid RESET Output Down to VCC = 0 V
BENEFITS OF A VERY ACCURATE RESET
THRESHOLD
Because the ADM811/ADM812 can operate effectively even
when there are large degradations of the supply voltages, the
possibility of a malfunction during a power failure is greatly
reduced. Another advantage of the ADM811/ADM812 are the
very accurate internal voltage reference circuits. Combined,
these benefits produce an exceptionally reliable microprocessor
supervisory circuit.
ENSURING A VALID RESET/RESET OUTPUT DOWN
TO VCC = 0 V
When VCC falls below 0.8 V, the RESET/RESET of the ADM811/
ADM812 no longer sinks current. Therefore, a high impedance
CMOS logic input connected to RESET/RESET can drift to
undetermined logic levels. To eliminate this problem, a 100 kΩ
resistor should be connected from RESET/RESET to ground.
Rev. H | Page 9 of 12
ADM811/ADM812
Data Sheet
OUTLINE DIMENSIONS
3.04
2.90
2.80
1.92 BSC
0.20
BSC
4
1.40
1.30
1.20
3
1
2.64
2.10
2
1.72 REF
1.07
0.90
0.75
0.20
0.08
0.100
0.013
0.89
0.76
0.50
0.30
SEATING
PLANE
8°
0°
0.54 REF
0.60
0.50
0.40
COMPLIANT TO JEDEC STANDARDS TO-253-AA
03-13-2012-B
1.22
0.80
Figure 12. 4-Lead Small Outline Transistor Package [SOT-143]
(RA-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1, 2
ADM811LART-REEL7
ADM811LARTZ-REEL7
ADM811MARTZ-REEL
ADM811MARTZ-REEL7
ADM811TART-REEL7
ADM811TARTZ-REEL
ADM811TARTZ-REEL7
ADM811-3TART-REEL7
ADM811-3TARTZ-RL7
ADM811SART-REEL7
ADM811SARTZ-REEL
ADM811SARTZ-REEL7
ADM811RARTZ-REEL7
ADM811ZART-REEL7
ADM811ZARTZ-REEL7
ADM812LARTZ-REEL7
ADM812MARTZ-REEL7
ADM812TARTZ-REEL7
ADM812SARTZ-REEL
ADM812SARTZ-REEL7
ADM812RARTZ-REEL7
ADM812ZARTZ-REEL7
1
2
Reset
Threshold (V)
4.63
4.63
4.38
4.38
3.08
3.08
3.08
3.08
3.08
2.93
2.93
2.93
2.63
2.32
2.32
4.63
4.38
3.08
2.93
2.93
2.63
2.32
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Ordering
Quantity
3,000
3,000
10,000
3,000
3,000
10,000
3,000
3,000
3,000
3,000
10,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
10,000
3,000
3,000
3,000
Package
Description
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
4-Lead SOT-143
Available only in reels.
Z = RoHS Compliant Part. RoHS-compliant parts may have # branded on either the top or bottom of the device.
Rev. H | Page 10 of 12
Package Option
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
RA-4
Branding
MBV
M4J
MBT #
MBT #
MBG
MBG #
MBG #
MB3
M4E
MBE
MBE #
MBE #
M4N
MBZ
M6G
M5D
M6D
M68
M67
M67
M6F
M69
Data Sheet
ADM811/ADM812
NOTES
Rev. H | Page 11 of 12
ADM811/ADM812
Data Sheet
NOTES
©1999–2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00092-0-3/16(H)
Rev. H | Page 12 of 12
工商网监
湘ICP备2023018690号
