Supervisory Circuits with Watchdog and
Manual Reset in 5-Lead SC70 and SOT-23
ADM823/ADM824/ADM825
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Precision 2.5 V to 5 V power supply monitor
7 reset threshold options: 2.19 V to 4.63 V
140 ms (minimum) reset timeout
Watchdog timer with 1.6 sec timeout (ADM823, ADM824)
Manual reset input (ADM823, ADM825)
Push-pull output stages
RESET (ADM823)
RESET, RESET (ADM824/ADM825)
Low power consumption: 5 µA
Guaranteed reset output valid to VCC = 1 V
Power supply glitch immunity
Specified over automotive temperature range
5-lead SC70 and SOT-23 packages
ADM823
VCC
VCC
RESET
GENERATOR
VREF
MR
RESET
DEBOUNCE
04534-001
WATCHDOG
DETECTOR
WDI
GND
Figure 1.
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
GENERAL DESCRIPTION
The ADM823/ADM824/ADM825 are supervisory circuits that
monitor power supply voltage levels and code execution integrity
in microprocessor-based systems. In addition to providing
power-on reset signals, an on-chip watchdog timer can reset the
microprocessor if it fails to strobe within a preset timeout
period. A reset signal can also be asserted by an external pushbutton, through a manual reset input. The three parts feature
different combinations of watchdog input, manual reset input,
and output stage configuration, as shown in Table 1.
These parts are available in a choice of seven reset threshold
options ranging from 2.19 V to 4.63 V. The reset and watchdog
timeout periods are fixed at 140 ms (minimum) and 1.6 sec
(typical), respectively.
The ADM823/ADM824/ADM825 are available in 5-lead SC70
and SOT-23 packages and typically consume only 5 µA, making
them suitable for use in low power, portable applications.
Table 1. Selection Table
Output Stage
Part No.
ADM823
ADM824
ADM825
Rev. D
Watchdog Timer
Yes
Yes
–
Manual Reset
Yes
–
Yes
RESET
RESET
Push-Pull
Push-Pull
Push-Pull
–
Push-Pull
Push-Pull
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ADM823/ADM824/ADM825
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Reset Output ..................................................................................9
Applications ....................................................................................... 1
Manual Reset Input .......................................................................9
Functional Block Diagram .............................................................. 1
Watchdog Input .............................................................................9
General Description ......................................................................... 1
Applications Information .............................................................. 10
Revision History ............................................................................... 2
Watchdog Input Current ........................................................... 10
Specifications..................................................................................... 3
Negative-Going VCC Transients ................................................ 10
Absolute Maximum Ratings ............................................................ 5
Ensuring Reset Valid to VCC = 0 V ........................................... 10
ESD Caution .................................................................................. 5
Watchdog Software Considerations ......................................... 10
Pin Configurations and Function Descriptions ........................... 6
Outline Dimensions ....................................................................... 11
Typical Performance Characteristics ............................................. 7
Ordering Guide .......................................................................... 11
Circuit Description ........................................................................... 9
REVISION HISTORY
7/13—Rev. C to Rev. D
Change to Figure 16 .......................................................................... 9
Updated Outline Dimensions ........................................................11
10/10—Rev. B to Rev. C
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 11
5/08—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Table 4 ............................................................................ 6
Changes to Ordering Guide .......................................................... 11
2/07—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Ordering Guide .......................................................... 11
10/04—Revision 0: Initial Version
Rev. D | Page 2 of 12
Data Sheet
ADM823/ADM824/ADM825
SPECIFICATIONS
VCC = 4.75 V to 5.5 V for ADM82xL, VCC = 4.5 V to 5.5 V for ADM82xM, VCC = 3.15 V to 3.6 V for ADM82xT, VCC = 3 V to 3.6 V
for ADM82xS, VCC = 2.7 V to 3.6 V for ADM82xR, VCC = 2.38 V to 2.75 V for ADM82xZ, VCC = 2.25 V to 2.75 V for ADM82xY,
TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
SUPPLY
VCC Operating Voltage Range
Min
1
1.2
Supply Current
RESET THRESHOLD VOLTAGE
ADM82xL
ADM82xM
ADM82xT
ADM82xS
ADM82xR
ADM82xZ (SC70 Only)
ADM82xY (SC70 Only)
4.56
4.50
4.31
4.25
3.04
3.00
2.89
2.85
2.59
2.55
2.28
2.25
2.16
2.13
RESET THRESHOLD TEMPERATURE COEFFICIENT
RESET THRESHOLD HYSTERESIS
RESET TIMEOUT PERIOD
VCC TO RESET DELAY
Typ
140
RESET/RESET
RESET Output Voltage
Max
Unit
Test Conditions/Comments
5.5
TA = 0°C to 70°C
TA = TMIN to TMAX
WDI and MR unconnected
ADM82xL/M
WDI and MR unconnected
ADM82xT/S/R/Z/Y
10
24
V
V
µA
5
12
µA
4.63
4.70
4.75
4.45
4.50
3.11
3.15
2.96
3.00
2.66
2.70
2.35
2.38
2.22
2.25
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ppm/°C
mV
mV
ms
µs
TA = 25°C
TA = TMIN to TMAX
TA = 25°C
TA = TMIN to TMAX
TA = 25°C
TA = TMIN to TMAX
TA = 25°C
TA = TMIN to TMAX
TA = 25°C
TA = TMIN to TMAX
TA = 25°C
TA = TMIN to TMAX
TA = 25°C
TA = TMIN to TMAX
0.4
V
0.3
V
0.3
V
VCC = VTH min, ISINK = 3.2 mA,
ADM82xL/M
VCC = VTH min, ISINK = 1.2 mA,
ADM82xT/S/R/Z/Y
TA = 0°C to 70°C, VCC = 1 V,
VCC falling, ISINK = 50 µA
VCC = VTH max, ISOURCE = 120 µA,
ADM82xL/M
VCC = VTH max, ISOURCE = 30 µA,
ADM82xT/S/R/Z/Y
VCC = VTH max, ISINK = 3.2 mA,
ADM82xL/M
VCC = VTH max, ISINK = 1.2 mA,
ADM82xT/S/R/Z/Y
VCC ≥ 1.8 V, ISOURCE = 150 µA
4.38
3.08
2.93
2.63
2.32
2.19
40
10
5
200
40
280
VCC − 1.5
V
0.8 × VCC
V
RESET Output Voltage (ADM824, ADM825)
0.4
V
0.3
V
0.8 × VCC
V
Rev. D | Page 3 of 12
ADM82xL/M
ADM82xT/S/R/Z/Y
VTH − VCC = 100 mV
ADM823/ADM824/ADM825
Parameter
WATCHDOG INPUT (ADM823, ADM824)
Watchdog Timeout Period
WDI Pulse Width
WDI Input Threshold, VIL
WDI Input Current
Data Sheet
Min
Typ
Max
Unit
1.12
50
0.7 × VCC
1.6
2.40
sec
ns
V
µA
µA
−20
MANUAL RESET INPUT (ADM823, ADM825)
MR Input Threshold
MR Input Pulse Width
MR Glitch Rejection
MR Pull-Up Resistance
MR to Reset Delay
120
−15
0.7 × VCC
1
35
0.3 × VCC
160
0.3 × VCC
100
52
500
75
Rev. D | Page 4 of 12
V
µs
ns
kΩ
ns
Test Conditions/Comments
VIL = 0.4 V, VIH = 0.8 × VCC
VWDI = VCC, time average
VWDI = 0 V, time average
Data Sheet
ADM823/ADM824/ADM825
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VCC
Output Current (RESET, RESET)
All Other Pins
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance
SC70
SOT-23
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
−0.3 V to +6 V
20 mA
−0.3 V to (VCC + 0.3 V)
−40°C to +125°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
146°C/W
270°C/W
300°C
215°C
220°C
Rev. D | Page 5 of 12
ADM823/ADM824/ADM825
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET 1
VCC
GND 2
TOP VIEW
(Not to Scale)
MR 3
4
WDI
04534-002
GND 2
5
RESET 1
VCC
ADM824
Figure 2. ADM823 Pin Configuration
GND 2
TOP VIEW
(Not to Scale)
RESET 3
5
VCC
4
MR
ADM825
4
WDI
Figure 3. ADM824 Pin Configuration
RESET 3
TOP VIEW
(Not to Scale)
04534-004
5
ADM823
04534-003
RESET 1
Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
Mnemonic
2
3
RESET
GND
MR (ADM823)
4
RESET (ADM824/ADM825)
WDI (ADM823/ADM824)
MR (ADM825)
5
VCC
Description
Active Low, Push-Pull Reset Output. Asserted whenever VCC is below the reset threshold, VTH.
Ground.
Manual Reset Input. This is an active low input which, when forced low for at least 1 µs, generates
a reset. It features a 52 kΩ internal pull-up.
Active High, Push-Pull Reset Output.
Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
Manual Reset Input. This is an active low input which, when forced low for at least 1 µs, generates
a reset. It features a 52 kΩ internal pull-up.
Power Supply Voltage Being Monitored.
Rev. D | Page 6 of 12
Data Sheet
ADM823/ADM824/ADM825
TYPICAL PERFORMANCE CHARACTERISTICS
100
10.0
9.5
90
9.0
80
VCC TO RESET DELAY (µs)
8.5
ADM823L
8.0
ICC (µA)
7.5
7.0
6.5
6.0
ADM824Y
5.5
5.0
70
60
50
40
30
20
4.5
ADM825R
–20
0
10
20
40
60
TEMPERATURE (°C)
80
120
100
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
0
60
20
40
TEMPERATURE (°C)
80
100
120
1.0
1.5
2.0
2.5 3.0
VCC (V)
3.5
4.0
4.5
5.0
5.5
Figure 6. Supply Current vs. Supply Voltage
280
260
240
220
200
180
160
140
120
–20
0
20
40
60
TEMPERATURE (°C)
80
100
120
Figure 9. Manual Reset to Reset Propagation Delay vs. Temperature
(ADM823/ADM825)
250
1.05
1.04
240
RESET TIMEOUT PERIOD (ms)
1.03
1.02
1.01
1.00
0.99
0.98
0.97
230
220
210
200
190
0
60
20
40
TEMPERATURE (°C)
80
100
120
170
–40
04534-007
–20
Figure 7. Normalized Reset Threshold vs. Temperature
–20
0
20
40
60
TEMPERATURE (°C)
80
100
Figure 10. Reset Timeout Period vs. Temperature
Rev. D | Page 7 of 12
120
04534-010
180
0.96
0.95
–40
300
100
–40
04534-006
0.5
320
04534-009
MANUAL RESET TO RESET DELAY (ns)
340
0
NORMALIZED RESET THRESHOLD (V)
–20
Figure 8. Reset Comparator Propagation Delay vs. Temperature (VCC Falling)
Figure 5. Supply Current vs. Temperature
ICC (µA)
0
–40
04534-008
3.5
–40
04534-005
4.0
Data Sheet
2.0
190
1.8
180
1.6
MR MINIMUM PULSE WIDTH (ns)
1.4
1.2
1.0
0.8
0.6
0.4
150
140
130
120
0
40
60
20
TEMPERATURE (°C)
80
100
120
100
–50
Figure 11. Watchdog Timeout Period vs. Temperature
(ADM823/ADM824)
160
0
50
TEMPERATURE (°C)
04534-013
–20
04534-011
0
–40
100
Figure 13. Manual Reset Minimum Pulse Width vs. Temperature
(ADM823/ADM825)
3.8
RESET OCCURS ABOVE GRAPH
3.6
140
MINIMUM PULSE WIDTH (ns)
120
100
VTH = 4.63V
80
60
40
20
3.4
NEGATIVE PULSE
3.2
3.0
2.8
2.6
2.4
POSITIVE PULSE
2.2
VTH = 2.93V
100
OVERDRIVE VOD (mV)
1000
2.0
–40
04534-012
MAXIMUM VCC TRANSIENT DURATION (µs)
160
110
0.2
0
10
170
Figure 12. Maximum VCC Transient Duration vs. Reset Threshold Overdrive
Rev. D | Page 8 of 12
10
60
TEMPERATURE (°C)
110
160
04534-014
WATCHDOG TIMEOUT PERIOD (s)
ADM823/ADM824/ADM825
Figure 14. Watchdog Input Minimum Pulse Width vs. Temperature
(ADM823/ADM824)
Data Sheet
ADM823/ADM824/ADM825
CIRCUIT DESCRIPTION
The ADM823/ADM824/ADM825 provide microprocessor
supply voltage supervision by controlling the reset input of the
microprocessor. Code execution errors are avoided during
power-up, power-down, and brownout conditions by asserting a
reset signal when the supply voltage is below a preset threshold.
Errors are also avoided by allowing supply voltage stabilization
with a fixed timeout reset pulse after the supply voltage rises
above the threshold. In addition, problems with microprocessor
code execution can be monitored and corrected with a watchdog
timer (ADM823/ADM824). By including watchdog strobe
instructions in microprocessor code, a watchdog timer can
detect whether the microprocessor code breaks down or becomes
stuck in an infinite loop. If this happens, the watchdog timer
asserts a reset pulse that restarts the microprocessor in a known
state. If the user detects a problem with the system’s operation, a
manual reset input is available (ADM823/ADM825) to reset the
microprocessor with an external push-button, for example.
RESET OUTPUT
The ADM823 features an active low, push-pull reset output, and
the ADM824/ADM825 feature dual active low and active high
push-pull reset outputs. For active low and active high outputs,
the reset signal is guaranteed to be logic low and logic high,
respectively, for VCC ≥ 1 V.
The reset output is asserted when VCC is below the reset
threshold (VTH), when MR is driven low, or when WDI is not
serviced within the watchdog timeout period (tWD). Reset
remains asserted for the duration of the reset active timeout
period (tRP) after VCC rises above the reset threshold, after MR
transitions from low to high, or after the watchdog timer times
out. Figure 15 illustrates the behavior of the reset outputs.
VCC
VTH
The ADM823/ADM825 feature a manual reset input (MR)
which, when driven low, asserts the reset output. When MR
transitions from low to high, reset remains asserted for the
duration of the reset active timeout period before deasserting.
The MR input has a 52 kΩ internal pull-up so that the input is
always high when unconnected. An external push-button
switch can be connected between MR and ground so that the
user can generate a reset. Debounce circuitry for this purpose is
integrated on chip. Noise immunity is provided on the MR
input and fast, negative-going transients of up to 100 ns (typical)
are ignored. A 0.1 µF capacitor between MR and ground
provides additional noise immunity.
WATCHDOG INPUT
The ADM823/ADM824 feature a watchdog timer that monitors
microprocessor activity. A timer circuit is cleared with every
low-to-high or high-to-low logic transition on the watchdog
input pin (WDI), which detects pulses as short as 50 ns. If the
timer counts through the preset watchdog timeout period (tWD),
reset is asserted. The microprocessor is required to toggle the
WDI pin to avoid being reset. Failure of the microprocessor to
toggle WDI within the timeout period, therefore, indicates a
code execution error, and the reset pulse generated restarts the
microprocessor in a known state.
In addition to logic transitions on WDI, the watchdog timer is
also cleared by a reset assertion due to an undervoltage condition on VCC or by MR being pulled low. When reset is asserted,
the watchdog timer is cleared and does not begin counting again
until reset is deasserted. The watchdog timer can be disabled by
leaving WDI floating or by three-stating the WDI driver.
VTH
VCC
1V
0V
VCC
RESET
tRP
RESET
tRD
tRP
tRD
04534-018
VCC
1V
0V
VTH
1V
0V
VCC
tRP
tWD
tRP
0V
0V
RESET
VCC
WDI
VCC
04534-021
VCC
MANUAL RESET INPUT
0V
Figure 16. Watchdog Timing Diagram
Figure 15. Reset Timing Diagram
Rev. D | Page 9 of 12
ADM823/ADM824/ADM825
Data Sheet
APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT
WATCHDOG SOFTWARE CONSIDERATIONS
To minimize the watchdog input current (and minimize overall
power consumption), leave WDI low for the majority of the
watchdog timeout period. When driven high, WDI can draw as
much as 160 µA. Pulsing WDI low-high-low at a low duty cycle
reduces the effect of the large input current. When WDI is
unconnected, a window comparator disconnects the watchdog
timer from the reset output circuitry so that reset is not asserted
when the watchdog timer times out.
In implementing the microprocessor watchdog strobe code,
quickly switching WDI low-to-high and then high-to-low
(minimizing WDI high time) is desirable for current consumption
reasons. However, a more effective way of using the watchdog
function can be considered.
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply
transients, the ADM823/ADM824/ADM825 are equipped with
glitch rejection circuitry. The typical performance characteristic
in Figure 12 plots VCC transient duration vs. the transient magnitude. The curves show combinations of transient magnitude
and duration for which a reset is not generated for 4.63 V and
2.93 V reset threshold parts. For example, with the 2.93 V
threshold, a transient that goes 100 mV below the threshold and
lasts 8 µs typically does not cause a reset, but if the transient is
any larger in magnitude or duration, a reset is generated. An
optional 0.1 µF bypass capacitor mounted close to VCC provides
additional glitch rejection.
A low-high-low WDI pulse within a given subroutine prevents
the watchdog timing out. However, if the subroutine becomes
stuck in an infinite loop, the watchdog cannot detect this condition because the subroutine continues to toggle WDI. A more
effective coding scheme for detecting this error involves using a
slightly longer watchdog timeout. In the program that calls the
subroutine, WDI is set high (see Figure 18). The subroutine sets
WDI low when it is called. If the program executes without error,
WDI is toggled high and low with every loop of the program.
If the subroutine enters an infinite loop, WDI is kept low, the
watchdog times out, and the microprocessor is reset.
START
SET WDI
HIGH
RESET
ENSURING RESET VALID TO VCC = 0 V
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RETURN
Figure 18. Watchdog Flow Diagram
VCC
VCC
INFINITE LOOP:
WATCHDOG
TIMES OUT
04534-020
Both active low and active high reset outputs are guaranteed to
be valid for VCC as low as 1 V. However, by using an external
resistor with push-pull configured reset outputs, valid outputs
for VCC as low as 0 V are possible. For an active low reset output,
a resistor connected between RESET and ground pulls the output
low when it is unable to sink current. For an active high reset
output, a resistor connected between RESET and VCC pulls the
output high when it is unable to source current. A large resistance such as 100 kΩ should be used so that the reset output is
not overloaded when VCC is above 1 V.
VCC
100kΩ
RESET
100kΩ
ADM824/
ADM825
RESET
ADM823
RESET
MR
WDI
RESET
MICROPROCESSOR
I/O
Figure 17. Ensuring Reset Valid to VCC = 0 V
04534-019
04534-017
ADM823/
ADM824/
ADM825
Figure 19. Typical Application Circuit
Rev. D | Page 10 of 12
Data Sheet
ADM823/ADM824/ADM825
OUTLINE DIMENSIONS
2.20
2.00
1.80
1.35
1.25
1.15
2.40
2.10
1.80
4
5
1
3
2
0.65 BSC
0.40
0.10
1.10
0.80
0.10 MAX
COPLANARITY
0.10
SEATING
PLANE
0.30
0.15
0.46
0.36
0.26
0.22
0.08
072809-A
1.00
0.90
0.70
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 20. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
3.00
2.90
2.80
5
1.70
1.60
1.50
1
4
2
3.00
2.80
2.60
3
0.95 BSC
1.90
BSC
1.45 MAX
0.95 MIN
0.15 MAX
0.05 MIN
0.50 MAX
0.35 MIN
0.20 MAX
0.08 MIN
SEATING
PLANE
10°
5°
0°
0.60
BSC
0.55
0.45
0.35
COMPLIANT TO JEDEC STANDARDS MO-178-AA
11-01-2010-A
1.30
1.15
0.90
Figure 21. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADM823LYKSZ-R7
ADM823LYRJ-R7
ADM823LYRJZ-R7
ADM823MYKSZ-R7
ADM823MYRJZ-R7
ADM823TYKSZ-R7
ADM823TYRJ-R7
ADM823TYRJZ-R7
ADM823SYKSZ-R7
ADM823SYRJ-R7
ADM823SYRJZ-R7
Reset Threshold (V)
4.63
4.63
4.63
4.38
4.38
3.08
3.08
3.08
2.93
2.93
2.93
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Quantity
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
Rev. D | Page 11 of 12
Package Description
5-Lead SC70
5-Lead SOT-23
5-Lead SOT-23
5-Lead SC70
5-Lead SOT-23
5-Lead SC70
5-Lead SOT-23
5-Lead SOT-23
5-Lead SC70
5-Lead SOT-23
5-Lead SOT-23
Package Option
KS-5
RJ-5
RJ-5
KS-5
RJ-5
KS-5
RJ-5
RJ-5
KS-5
RJ-5
RJ-5
Branding
M4L
N07
M4L
M4L
M4L
M4L
N07
M4L
M4L
N07
M4L
ADM823/ADM824/ADM825
Model 1
ADM823RYRJZ-R7
ADM823ZYKSZ-R7
ADM823YYKSZ-R7
ADM824LYRJZ-REEL7
ADM824SYKSZ-REEL7
ADM824RYKSZ-REEL7
ADM824SYRJZ-REEL7
ADM825LYRJ-R7
ADM825LYRJZ-R7
ADM825MYRJ-R7
ADM825TYKSZ-R7
ADM825TYRJ-R7
ADM825TYRJZ-R7
ADM825SYKSZ-R7
ADM825SYRJ-R7
ADM825SYRJZ-R7
ADM825RYRJ-R7
ADM825RYRJZ-R7
ADM825ZYKSZ-R7
1
Reset Threshold (V)
2.63
2.32
2.19
4.63
2.93
2.63
2.93
4.63
4.63
4.38
3.08
3.08
3.08
2.93
2.93
2.93
2.63
2.63
2.32
Data Sheet
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Quantity
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
3k
Z = RoHS Compliant Part.
©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04534-0-7/13(D)
Rev. D | Page 12 of 12
Package Description
5-Lead SOT-23
5-Lead SC70
5-Lead SC70
5-Lead SOT-23
5-Lead SC70
5-Lead SC70
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SC70
5-Lead SOT-23
5-Lead SOT-23
5-Lead SC70
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SC70
Package Option
RJ-5
KS-5
KS-5
RJ-5
KS-5
KS-5
RJ-5
RJ-5
RJ-5
RJ-5
KS-5
RJ-5
RJ-5
KS-5
RJ-5
RJ-5
RJ-5
RJ-5
KS-5
Branding
M4L
M4L
M4L
L9M
M8G
M8G
M8G
N09
M8H
N09
M8H
N09
M8H
M8H
N09
M8H
N09
M8H
M8H
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