CMOS Switched-Capacitor
Voltage Converters
ADM660/ADM8660
TYPICAL CIRCUIT CONFIGURATIONS
FEATURES
ADM660: Inverts or Doubles Input Supply Voltage
ADM8660: Inverts Input Supply Voltage
100 mA Output Current
Shutdown Function (ADM8660)
2.2 F or 10 F Capacitors
0.3 V Drop at 30 mA Load
+1.5 V to +7 V Supply
Low Power CMOS: 600 A Quiescent Current
Selectable Charge Pump Frequency (25 kHz/120 kHz)
Pin Compatible Upgrade for MAX660, MAX665, ICL7660
Available in 16-Lead TSSOP Package
+1.5V TO +7V
INPUT
FC
A Frequency Control (FC) input pin is used to select either
25 kHz or 120 kHz charge-pump operation. This is used to
optimize capacitor size and quiescent current. With 25 kHz
selected, a 10 µF external capacitor is suitable, while with 120 kHz
the capacitor may be reduced to 2.2 µF. The oscillator frequency
on the ADM660 can also be controlled with an external capacitor
connected to the OSC input or by driving this input with an
external clock. In applications where a higher supply voltage is
desired it is possible to use the ADM660 to double the input
voltage. With input voltages from 2.5 V to 7 V, output voltages
from 5 V to 14 V are achievable with up to 100 mA output current.
The ADM8660 features a low power shutdown (SD) pin instead
of the external oscillator (OSC) pin. This can be used to disable
the device and reduce the quiescent current to 300 nA.
LV
GND
CAP–
OUT
C2
+10F
INVERTED
NEGATIVE
OUTPUT
Voltage Inverter Configuration (ADM660)
+1.5V TO +7V
INPUT
FC
ADM8660
V+
CAP+
C1 +
10F
GENERAL DESCRIPTION
Input voltages ranging from +1.5 V to +7 V can be inverted into
a negative –1.5 V to –7 V output supply. This inverting scheme
is ideal for generating a negative rail in single power supply
systems. Only two small external capacitors are needed for the
charge pump. Output currents up to 50 mA with greater than
90% efficiency are achievable, while 100 mA achieves greater
than 80% efficiency.
OSC
CAP+
C1 +
10F
APPLICATIONS
Handheld Instruments
Portable Computers
Remote Data Acquisition
Op Amp Power Supplies
The ADM660/ADM8660 is a charge-pump voltage converter
that can be used to either invert the input supply voltage giving
VOUT = –VIN or double it (ADM660 only) giving VOUT = 2 ⫻ VIN.
V+
ADM660
LV
GND
OUT
CAP–
SHUTDOWN
CONTROL
C2
+10F
SD
INVERTED
NEGATIVE
OUTPUT
Voltage Inverter Configuration with Shutdown (ADM8660)
The ADM660 is a pin compatible upgrade for the MAX660,
MAX665, ICL7660, and LTC1046.
The ADM660/ADM8660 is available in 8-lead DIP and
narrow-body SOIC. The ADM660 is also available in a 16-lead
TSSOP package.
ADM660/ADM8660 Options
Option
ADM660
ADM8660
Inverting Mode
Doubling Mode
External Oscillator
Shutdown
Package Options
R-8
N-8
RU-16
Y
Y
Y
N
Y
N
N
Y
Y
Y
Y
Y
Y
N
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/461-3113
© 2011 Analog Devices, Inc. All rights reserved.
(V+ = +5 V, C1, C2 = 10F,* T = T
noted.)
ADM660/ADM8660–SPECIFICATIONS otherwise
A
Parameter
Min
Typ
Unit
Test Conditions/Comments
7.0
7.0
7.0
V
V
V
RL = 1 kW
Inverting Mode, LV = Open
Inverting Mode, LV = GND
Doubling Mode, LV = OUT
0.6
2.5
1
4.5
mA
mA
No Load
FC = Open (ADM660), GND (ADM8660)
FC = V+, LV = Open
9
9
15
15
16.5
mA
W
W
W
IL = 100 mA
IL = 100 mA, TA = 25∞C
IL = 100 mA, TA = –40∞C to +85∞C
25
120
±5
± 25
kHz
kHz
mA
mA
FC = Open (ADM660), GND (ADM8660)
FC = V+
FC = Open (ADM660), GND (ADM8660)
FC = V+
94
94
%
%
RL = 1 kW Connected from V+ to OUT
RL = 1 kW Connected from V+ to OUT,
TA = +25∞C
RL = 1 kW Connected from V+ to OUT,
TA = –40∞C to +85∞C
3.5
1.5
2.5
Supply Current
100
Charge-Pump Frequency
OSC Input Current
Power Efficiency (FC = Open) (ADM660)
Power Efficiency (FC = Open) (ADM8660)
90
90
Power Efficiency (FC = Open) (ADM8660)
88.5
Power Efficiency (FC = Open) (ADM660)
Power Efficiency (FC = Open) (ADM8660)
90
90
Power Efficiency (FC = Open) (ADM8660)
88.5
Power Efficiency (FC = Open)
Voltage Conversion Efficiency
99
Shutdown Supply Current, ISHDN
Shutdown Input Voltage, VSHDN
2.4
%
81.5
%
RL = 500 W Connected from OUT to GND
RL = 500 W Connected from OUT to GND,
TA = +25∞C
RL = 500 W Connected from OUT to GND,
TA = –40∞C to +85∞C
IL = 100 mA to GND
99.96
%
No Load
mA
V
V
ms
ADM8660, SHDN = V+
SHDN High = Disabled
SHDN Low = Enabled
IL = 100 mA
93
93
%
%
%
0.3
5
0.8
Shutdown Exit Time
unless
Max
Input Voltage, V+
Output Current
Output Resistance (ADM660)
Output Resistance (ADM8660)
Output Resistance (ADM8660)
MIN to TMAX,
500
*C1 and C2 are low ESR (2000 V
(TA = +25°C, unless otherwise noted.)
Input Voltage (V+ to GND, GND to OUT) . . . . . . . . +7.5 V
LV Input Voltage . . . . . . . . . . (OUT – 0.3 V) to (V+, +0.3 V)
FC and OSC Input Voltage
. . . . . . . . . . . (OUT – 0.3 V) or (V+, –6 V) to (V+, +0.3 V)
OUT, V+ Output Current (Continuous) . . . . . . . . . . . 120 mA
Output Short Circuit Duration to GND . . . . . . . . . . . 10 secs
Power Dissipation, N-8 . . . . . . . . . . . . . . . . . . . . . . . 625 mW
(Derate 8.3 mW/°C above +50°C)
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 120°C/W
Power Dissipation, R-8 . . . . . . . . . . . . . . . . . . . . . . . 450 mW
(Derate 6 mW/°C above +50°C)
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 170°C/W
*This is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM660/ADM8660 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. C
–3–
ADM660/ADM8660
PIN CONNECTIONS
8-Lead
FC 1
CAP+ 2
8 V+
ADM660
FC 1
7 OSC
CAP+ 2
7 SD
TOP VIEW
GND 3 (Not to Scale) 6 LV
TOP VIEW
GND 3 (Not to Scale) 6 LV
CAP– 4
8 V+
ADM8660
5 OUT
5 OUT
CAP– 4
16-Lead
NC 1
16 NC
NC 2
15 NC
FC 3
ADM660
14 V+
GND 5
TOP VIEW 13 OSC
(Not to Scale)
12 LV
CAP– 6
11 OUT
CAP+ 4
NC 7
10 NC
NC 8
9 NC
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
Inverter Configuration
Doubler Configuration (ADM660 Only)
Mnemonic
Function
Mnemonic
Function
FC
Frequency Control Input for Internal Oscillator
and Charge Pump. With FC = Open (ADM660)
or connected to GND (ADM8660), fCP = 25 kHz;
with FC = V+, fCP = 120 kHz.
FC
Frequency Control Input for Internal Oscillator
and Charge Pump. With FC = Open, fCP =
25 kHz; with FC = V+, fCP = 120 kHz.
CAP+
Positive Charge-Pump Capacitor Terminal.
CAP+
Positive Charge-Pump Capacitor Terminal.
GND
Positive Input Supply.
GND
Power Supply Ground.
CAP–
Negative Charge-Pump Capacitor Terminal.
CAP–
Negative Charge-Pump Capacitor Terminal.
OUT
Output, Negative Voltage.
OUT
Ground.
LV
Low Voltage Operation Input. Connect to GND
when input voltage is less than 3.5 V. Above
3.5 V, LV may be connected to GND or left
unconnected.
LV
Low Voltage Operation Input. Connect to OUT.
OSC
Must be left unconnected in this mode.
V+
Doubled Positive Output.
OSC
ADM660: Oscillator Control Input. OSC is
connected to an internal 15 pF capacitor. An
external capacitor may be connected to slow the
oscillator. An external oscillator may also be
used to overdrive OSC. The charge-pump
frequency is equal to 1/2 the oscillator frequency.
SD
ADM8660: Shutdown Control Input. This input, when high, is used to disable the charge
pump thereby reducing the power consumption.
V+
Positive Power Supply Input.
–4–
REV. C
Typical Performance Characteristics–ADM660/ADM8660
100
3.0
IL = 10mA
90
VOLTAGE DOUBLER
LV = OUT
POWER EFFICIENCY – %
SUPPLY CURRENT – mA
2.5
2.0
1.5
1.0
LV = GND
70
60
IL = 50mA
50
IL = 80mA
0.5
40
LV = OPEN
30
0
1.5
3.5 7
5.5
SUPPLY VOLTAGE – Volts
.5
TPC 1. Power Supply Current vs. Voltage
1k
10k
100k
CHARGE-PUMP FREQUENCY – Hz
3.5
3.0
EFFICIENCY
40
–4.2
VOUT
EFFICIENCY – %
60
–3.8
SUPPLY CURRENT – mA
80
–3.4
2.5
2.0
LV = GND
VOLTAGE DOUBLER
1.5
1.0
20
–4.6
0.5
0
20
40
60
LOAD CURRENT – mA
0
0
100
–5.0
80
TPC 2. Output Voltage and Efficiency vs. Load Current
100
10
CHARGE-PUMP FREQUENCY – kHz
1
1000
120
V+ = +6.5V
100
1.2
V+ = +5.5V
V+ = +4.5V
V+ = +3.5V
V+ = +2.5V
EFFICIENCY – %
OUTPUT VOLTAGE DROP
FROM SUPPLY VOLTAGE – Volts
LV = GND
VOLTAGE INVERTER
TPC 5. Power Supply Current vs. Charge-Pump
Frequency
1.6
V+ = +4.5V
0.8
V+ = +1.5V
V+ = +5.5V
80
V+ = +3.5V
60
V+ = +1.5V
V+ = +2.5V
40
0.4
20
0
0
20
40
60
LOAD CURRENT – mA
80
0
100
TPC 3. Output Voltage Drop vs. Load Current
REV. C
1M
TPC 4. Efficiency vs. Charge-Pump Frequency
100
–3.0
OUTPUT VOLTAGE – Volts
IL = 1mA
80
0
20
40
60
LOAD CURRENT – mA
80
100
TPC 6. Power Efficiency vs. Load Current
–5–
ADM660/ADM8660
35
5.0
LOAD = 1mA
CHARGE-PUMP FREQUENCY – kHz
4.5
LOAD = 10mA
OUTPUT VOLTAGE – Volts
4.0
3.5
LOAD = 50mA
3.0
2.5
2.0
LOAD = 80mA
1.5
1.0
30
25
20
LV = GND
FC = OPEN
C1, C2 = 10F
15
10
5
0.5
0
1
10
100
CHARGE-PUMP FREQUENCY – kHz
0
–40
1000
TPC 7. Output Voltage vs. Charge-Pump Frequency
CHARGE-PUMP FREQUENCY – kHz
OUTPUT SOURCE RESISTANCE – ⍀
20
15
10
5
2.5
3.5
4.5
SUPPLY VOLTAGE – Volts
5.5
60
80
FC = V+
LV = GND
100
10
FC = OPEN
LV = GND
1
0.1
1
6.5
TPC 8. Output Source Resistance vs. Supply Voltage
10
100
CAPACITANCE – pF
1k
TPC 11. Charge-Pump Frequency vs. External
Capacitance
30
140
LV = GND
LV = GND
CHARGE-PUMP FREQUENCY – kHz
CHARGE-PUMP FREQUENCY – kHz
20
40
TEMPERATURE – C
1k
25
LV = OPEN
20
FC = OPEN
OSC = OPEN
C1, C2 = 10F
10
0
1.5
0
TPC 10. Charge-Pump Frequency vs. Temperature
30
0
1.5
–20
2.5
3.5
4.5
5.5
SUPPLY VOLTAGE – Volts
120
100
LV = OPEN
80
60
20
0
3
6.5
TPC 9. Charge-Pump Frequency vs. Supply Voltage
FC = V+
OSC = OPEN
C1,C2 = 2.2F
40
3.5
4
4.5
5
5.5
6
SUPPLY VOLTAGE – Volts
6.5
7
TPC 12. Charge-Pump Frequency vs. Supply Voltage
–6–
REV. C
ADM660/ADM8660
160
60
OUTPUT SOURCE RESISTANCE – ⍀
CHARGE-PUMP FREQUENCY – kHz
140
120
100
80
LV = GND
FC = V+
C1, C2 = 2.2F
60
40
20
0
–40
–20
0
20
40
60
TEMPERATURE – C
80
50
40
30
V+ = +1.5V
20
V+ = +3V
10
V+ = +5V
0
–40
100
TPC 13. Charge-Pump Frequency vs. Temperature
–20
0
20
40
60
TEMPERATURE – C
80
100
TPC 14. Output Resistance vs. Temperature
GENERAL INFORMATION
Switched Capacitor Theory of Operation
The ADM660/ADM8660 is a switched capacitor voltage converter that can be used to invert the input supply voltage. The
ADM660 can also be used in a voltage doubling mode. The
voltage conversion task is achieved using a switched capacitor
technique using two external charge storage capacitors. An onboard oscillator and switching network transfers charge between
the charge storage capacitors. The basic principle behind the
voltage conversion scheme is illustrated in Figures 1 and 2.
As already described, the charge pump on the ADM660/ADM8660
uses a switched capacitor technique in order to invert or double
the input supply voltage. Basic switched capacitor theory is
discussed below.
CAP+
S1
V+
A switched capacitor building block is illustrated in Figure 3.
With the switch in position A, capacitor C1 will charge to voltage
V1. The total charge stored on C1 is q1 = C1V1. The switch is
then flipped to position B discharging C1 to voltage V2. The
charge remaining on C1 is q2 = C1V2. The charge transferred
to the output V2 is, therefore, the difference between q1 and
q2, so ∆q = q1–q2 = C1 (V1–V2).
S3
+
C1 S4
S2
+
CAP–
Φ1
OUT = –V+
C2
Φ2
+2
OSCILLATOR
V1
A
B
V2
C2
C1
Figure 1. Voltage Inversion Principle
CAP+
S1
V+
Figure 3. Switched Capacitor Building Block
S3
+
+
C1 S4
S2
VOUT = 2V+
As the switch is toggled between A and B at a frequency f, the
charge transfer per unit time or current is:
C2
V+
CAP–
Φ1
I = f (∆q) = f (C1)(V1 – V 2)
Φ2
+2
OSCILLATOR
Therefore,
I = (V1 – V 2)/(1 / fC1) = (V1 – V 2)/(R EQ )
Figure 2. Voltage Doubling Principle
Figure 1 shows the voltage inverting configuration, while Figure 2
shows the configuration for voltage doubling. An oscillator
generating antiphase signals φ1 and φ2 controls switches S1, S2,
and S3, S4. During φ1, switches S1 and S2 are closed charging
C1 up to the voltage at V+. During φ2, S1 and S2 open and S3
and S4 close. With the voltage inverter configuration during φ2,
the positive terminal of C1 is connected to GND via S3 and the
negative terminal of C1 connects to VOUT via S4. The net result
is voltage inversion at VOUT wrt GND. Charge on C1 is transferred to C2 during φ2. Capacitor C2 maintains this voltage
during φ1. The charge transfer efficiency depends on the onresistance of the switches, the frequency at which they are being
switched, and also on the equivalent series resistance (ESR) of
the external capacitors. The reason for this is explained in the
following section. For maximum efficiency, capacitors with low
ESR are, therefore, recommended.
where REQ = 1/fC1
The switched capacitor may, therefore, be replaced by an equivalent
resistance whose value is dependent on both the capacitor size
and the switching frequency. This explains why lower capacitor
values may be used with higher switching frequencies. It should
be remembered that as the switching frequency is increased the
power consumption will increase due to some charge being lost
at each switching cycle. As a result, at high frequencies, the power
efficiency starts decreasing. Other losses include the resistance
of the internal switches and the equivalent series resistance (ESR)
of the charge storage capacitors.
REQ
V2
V1
C2
RL
REQ = 1/fC1
The voltage doubling configuration reverses some of the connections, but the same principle applies.
REV. C
RL
Figure 4. Switched Capacitor Equivalent Circuit
–7–
ADM660/ADM8660
Inverting Negative Voltage Generator
Table II. ADM8660 Charge-Pump Frequency Selection
Figures 5 and 6 show the ADM660/ADM8660 configured to
generate a negative output voltage. Input supply voltages from
1.5 V up to 7 V are allowable. For supply voltage less than 3 V,
LV must be connected to GND. This bypasses the internal
regulator circuitry and gives best performance in low voltage
applications. With supply voltages greater than 3 V, LV may
be either connected to GND or left open. Leaving it open facilitates direct substitution for the ICL7660.
FC
OSC
Charge Pump
GND
V+
GND or V+
GND
Open
Open
Ext Cap
Ext CLK
25 kHz
10 µF
120 kHz
2.2 µF
See Typical Characteristics
Ext CLK Frequency/2
+1.5V TO +7V
INPUT
+1.5V TO +7V
INPUT
FC
ADM660
FC
V+
GND
OUT
C2
CMOS GATE
V+
LV
CAP–
INVERTED
NEGATIVE
OUTPUT
CLK OSC
OSC
GND
C1
LV
CAP–
ADM660
ADM8660
CAP+
+
OSC
CAP+
C1 +
10F
C1, C2
INVERTED
NEGATIVE
OUTPUT
OUT
+
C2
+10F
Figure 7. ADM660/ADM8660 External Oscillator
Figure 5. ADM660 Voltage Inverter Configuration
Voltage Doubling Configuration
Figure 8 shows the ADM660 configured to generate increased
output voltages. As in the inverting mode, only two external
capacitors are required. The doubling function is achieved by
reversing some connections to the device. The input voltage is
applied to the GND pin and V+ is used as the output. Input
voltages from 2.5 V to 7 V are allowable. In this configuration,
pins LV, OUT must be connected to GND.
+1.5V TO +7V
INPUT
ADM8660
V+
CAP+
C1 +
GND
10F
LV
CAP–
SHUTDOWN
CONTROL
OUT
C2
+10F
SD
INVERTED
NEGATIVE
OUTPUT
The unloaded output voltage in this configuration is 2 (VIN).
Output resistance and ripple are similar to the voltage inverting
configuration.
Figure 6. ADM8660 Voltage Inverter Configuration
OSCILLATOR FREQUENCY
Note that the ADM8660 cannot be used in the voltage
doubling configuration.
The internal charge-pump frequency may be selected to be
either 25 kHz or 120 kHz using the Frequency Control (FC)
input. With FC unconnected (ADM660) or connected to GND
(ADM8660), the internal charge pump runs at 25 kHz while, if
FC is connected to V+, the frequency is increased by a factor of
five. Increasing the frequency allows smaller capacitors to be
used for equivalent performance or, if the capacitor size is unchanged, it results in lower output impedance and ripple.
FC
+2.5V
TO +7V
INPUT
Open
Open
Ext Cap
Ext CLK
25 kHz
10 µF
120 kHz
2.2 µF
See Typical Characteristics
Ext CLK Frequency/2
GND
CAP–
LV
OUT
Capacitor Selection
The optimum capacitor value selection depends the charge-pump
frequency. With 25 kHz selected, 10 µF capacitors are recommended,
while with 120 kHz selected, 2.2 µF capacitors may be used.
Other frequencies allow other capacitor values to be used. For
maximum efficiency in all cases, it is recommended that capacitors with low ESR are used for the charge-pump. Low ESR
capacitors give both the lowest output resistance and lowest
ripple voltage. High output resistance degrades the overall power
efficiency and causes voltage drops, especially at high output
Table I. ADM660 Charge-Pump Frequency Selection
Open
V+
Open or V+
Open
10F
The ADM8660 contains a shutdown input that can be used to
disable the device and thus reduce the power consumption. A
logic high level on the SD input shuts the device down reducing
the quiescent current to 0.3 µA. During shutdown, the output
voltage goes to 0 V. Therefore, ground referenced loads are not
powered during this state. When exiting shutdown, it takes
several cycles (approximately 500 µs) for the charge pump to
reach its final value. If the shutdown function is not being used,
then SD should be hardwired to GND.
Note that overdriving is permitted only in the voltage inverter
configuration.
Charge Pump
10F
DOUBLED
POSITIVE
OUTPUT
Shutdown Input
If an external clock is used to overdrive the oscillator, its levels
should swing to within 100 mV of V+ and GND. A CMOS
driver is, therefore, suitable. When OSC is overdriven, FC has
no effect but LV must be grounded.
OSC
CAP+
V+
OSC
Figure 8. Voltage Doubler Configuration
If a charge-pump frequency other than the two fixed values is
desired, this is made possible by the OSC input, which can
either have a capacitor connected to it or be overdriven by an
external clock. Refer to the Typical Performance Characteristics, which shows the variation in charge-pump frequency versus
capacitor size. The charge-pump frequency is one-half the oscillator frequency applied to the OSC pin.
FC
+
ADM660
+
FC
C1, C2
–8–
REV. C
ADM660/ADM8660
current levels. The ADM660/ADM8660 is tested using low
ESR, 10 µF, capacitors for both C1 and C2. Smaller values of
C1 increase the output resistance, while increasing C1 will
reduce the output resistance. The output resistance is also dependent on the internal switches on resistance as well as the
capacitors ESR, so the effect of increasing C1 becomes negligible
past a certain point.
Capacitor C2
The output capacitor size C2 affects the output ripple. Increasing the capacitor size reduces the peak-to-peak ripple. The ESR
affects both the output impedance and the output ripple.
Reducing the ESR reduces the output impedance and ripple.
For convenience it is recommended that both C1 and C2 be the
same value.
Figure 9 shows how the output resistance varies with oscillator
frequency for three different capacitor values. At low oscillator
frequencies, the output impedance is dominated by the 1/fC
term. This explains why the output impedance is higher for
smaller capacitance values. At high oscillator frequencies, the
1/fC term becomes insignificant and the output impedance is
dominated by the internal switches on resistance. From an output impedance viewpoint, therefore, there is no benefit to be
gained from using excessively large capacitors.
Table III. Capacitor Selection
OUTPUT RESISTANCE – ⍀
400
300
C1 = C2 = 1F
200
C1 = C2 = 10F
10 µF
2.2 µF
Bypass Capacitor
100
The ac impedance of the ADM660/ADM8660 may be reduced
by using a bypass capacitor on the input supply. This capacitor
should be connected between the input supply and GND. It
will provide instantaneous current surges as required. Suitable
capacitors of 0.1 µF or greater may be used.
100
Figure 9. Output Impedance vs. Oscillator Frequency
REV. C
25 kHz
120 kHz
While higher switching frequencies allow smaller capacitors to
be used for equivalent performance, or improved performance
with the same capacitors, there is a trade-off to consider. As the
oscillator frequency is increased, the quiescent current increases.
This happens as a result of a finite charge being lost at each
switching cycle. The charge loss per unit cycle at very high
frequencies can be significant, thereby reducing the power efficiency. Since the power efficiency is also degraded at low oscillator
frequencies due to an increase in output impedance, this means
that there is an optimum frequency band for maximum power
transfer. Refer to the Typical Performance Characteristics section.
C1 = C2 = 2.2F
1
10
OSCILLATOR FREQUENCY – kHz
Capacitor
C1, C2
Power Efficiency and Oscillator Frequency Trade-Off
500
0
0.1
Charge-Pump
Frequency
–9–
ADM660/ADM8660
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
070606-A
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 10. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 11. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
–10–
REV. C
ADM660/ADM8660
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.30
0.19
0.65
BSC
COPLANARITY
0.10
SEATING
PLANE
8°
0°
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 12. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADM660ANZ
ADM660ARZ
ADM660ARZ-REEL
ADM660ARUZ
ADM660ARUZ-REEL
ADM660ARUZ-REEL7
ADM8660ANZ
ADM8660ARZ
ADM8660ARZ-REEL
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
Z = RoHS Compliant Part
REVISION HISTORY
4/11—Rev. B to Rev. C
Changes to Ordering Guide .......................................................... 11
12/02—Rev. A to Rev. B
Renumbered TPCs and Figures ........................................ Universal
Edits to Specifications ...................................................................... 2
Updated Absolute Maximum Ratings ........................................... 3
Updated Outline Dimensions ....................................................... 10
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00082-0-4/11(C)
REV. C
–11–
Package Option
N-8
R-8
R-8
RU-16
RU-16
RU-16
N-8
R-8
R-8
工商网监
湘ICP备2023018690号
