Data Sheet
ADP150
Ultralow Noise, 150 mA, CMOS Linear Regulator
FEATURES
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TYPICAL APPLICATION CIRCUITS
Ultralow noise: 9 µV rms, independent of VOUT
No additional noise bypass capacitor required
Stable with 1 µF ceramic input and output capacitors
Maximum output current: 150 mA
Input voltage range: 2.2 V to 5.5 V
Low quiescent current
► IGND = 10 µA with zero load
Low shutdown current:
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