ADP1876-EVALZ

Evaluation Board User Guide UG-334 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the ADP1876 Step-Down DC-to-DC Controller FEATURES ADP1876 DEVICE DESCRIPTION Input range: 10 V to 20 V Two output voltages: 5 V and 1.8 V Output current: 13 A per channel Switching frequency: 600 kHz Operates in PWM Compact, low cost, and efficient design The ADP1876 is a dual-channel, step-down switching controller with integrated drivers for external N-channel synchronous power MOSFETs. The two PWM outputs are phase shifted 180°, which reduces the input rms ripple current, thus minimizing the required input capacitance. In addition, boost diodes are integrated into the ADP1876, which lowers the overall system cost and component count. The ADP1876 is configured to operate in forced PWM continuous conduction mode. EVALUATION BOARD DESCRIPTION This user guide describes the design, operation, and test results of the ADP1876-EVALZ. The input range for this evaluation board is 10 V to 20 V, and the two regulated output voltages are set to 5 V (VOUT1) and 1.8 V (VOUT2) with a maximum 13 A output current. The power components, such as the MOFSETS, inductors, and bulk input and output capacitors, were chosen to yield a low system cost and good efficiency. The ADP1876 includes externally adjustable soft start, output overvoltage protection, externally adjustable current limit, power good and tracking function for Channel 1. The ADP1876 provides an output voltage accuracy of ±0.85% for a −40°C to +85°C junction temperature and ±1.5% for a −40°C to +125°C junction temperature. This controller can be powered from a 2.75 V to 20 V supply and is available in a 32-lead, 5 mm × 5 mm lead frame chip scale package (LFCSP). ADP1876-EVALZ EVALUATION BOARD GND TERMINAL ADP1876 VOUT1 TERMINAL VOUT2 TERMINAL GND TERMINAL 10272-001 GND TERMINAL VIN TERMINAL Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 16 UG-334 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Output Capacitors .........................................................................3 Evaluation Board Description......................................................... 1 MOSFET Selection ........................................................................3 ADP1876 Device Description ......................................................... 1 Test Results .........................................................................................4 ADP1876-EVALZ Evaluation Board .............................................. 1 Evaluation Board Operating Instructions ......................................6 Revision History ............................................................................... 2 Evaluation Board PCB Layout .........................................................7 Component Design .......................................................................... 3 Evaluation Board Schematics and Artwork ...................................8 Inductor Selection ........................................................................ 3 Ordering Information .................................................................... 12 Input Capacitors ........................................................................... 3 Bill of Materials ........................................................................... 12 REVISION HISTORY 11/11—Revision 0: Initial Version Rev. 0 | Page 2 of 16 Evaluation Board User Guide UG-334 COMPONENT DESIGN OUTPUT CAPACITORS For information about selecting power components and calculating component values, see the ADP1876 data sheet. A combination of POSCAP™ polymer capacitors and MLCCs are selected for the output rails. Polymer capacitors have low ESR and high current ripple rating. Connecting polymer capacitors and MLCCs in parallel is very effective in reducing voltage ripple. Two 330 µF POSCAP capacitors and two 22 µF MLCCs are selected for each output. INDUCTOR SELECTION A 1.8 µH inductor with an 18 A saturation current rating (744325180 from Würth Elektronik) is selected. This is a compact inductor with a ferrite core, which offers high performance in terms of low RDC and low core loss. MOSFET SELECTION INPUT CAPACITORS Because of the very low ESR and high input current rating of multilayer ceramic capacitors (MLCCs), two 10 µF MLCCs in Size 1210 are selected as the input capacitors at the input of each channel. In addition, a 150 µF bulk OS-CON™ (aluminum solid capacitor with conductive polymer) capacitor from SANYO is chosen for filtering out unwanted low frequency noise from the input power supply. For low output or low duty cycle, select a high-side MOSFET with fast rise and fall times and with low input capacitance to minimize charging and switching power loss. For the synchronous rectifier (low-side MOSFET), select a MOSFET with low RDSON because the switching speed is not critical and there is no switching power loss in the low-side MOSFET. The MOSFET IPD050N03L in PG-TO252-3-11 (DPAK) from Infineon is chosen for both the high-side and low-side MOSFETs for a balance between low cost and good efficiency. The RDSON of the IPD050N03L is about 6 mΩ at a VGS of 5 V. Rev. 0 | Page 3 of 16 UG-334 Evaluation Board User Guide TEST RESULTS TA = 25°C. 100 T 90 VOUT1 = 5V 80 VOUT1 RIPPLE AT 10A SW1 VOUT2 = 1.8V 60 1 50 2 40 VOUT2 RIPPLE AT 10A SW2 30 TA = 25°C VIN = 12V 20 3 10 0 2 4 6 8 LOAD (A) 10 12 14 10272-002 4 0 BW BW CH1 20.0mV CH3 20.0mV Figure 2. Efficiency (Measurement Is Made with the Adjacent Channel Disabled) CH2 10.0V CH4 10.0V M1.00µs A CH4 10.2V 10272-005 EFFICIENCY (%) 70 Figure 5. Output Ripple, 10 A Load 0 T –0.005 VOUT2 = 1.8V OUTPUT RESPONSE VOUT2 = 1.8V LINE REGULATION (%) –0.010 –0.015 3 –0.020 VOUT1 = 5V –0.025 –0.030 VOUT2 5A STEP LOAD –0.035 –0.040 TA = 25°C VIN = 12V WITH 5A LOAD 12 14 16 18 20 VIN (V) CH3 20.0mV BW CH4 5.00A Ω M20.0µs A CH4 7.60V 10272-006 –0.050 10 4 10272-003 –0.045 Figure 6. Step Load Transient, VOUT2 Figure 3. Line Regulation 0 T VOUT1 = OUTPUT RESPONSE VOUT2 = 1.8V –0.10 –0.15 3 –0.20 –0.25 VOUT1 = 5V VOUT1 5A STEP LOAD –0.30 TA = 25°C VIN = 12V 4 –0.40 0 2 4 6 8 LOAD (A) 10 12 14 CH3 20.0mV Figure 4. Load Regulation BW CH4 5.00A Ω M20.0µs A CH4 Figure 7. Step Load Transient, VOUT1 Rev. 0 | Page 4 of 16 7.60V 10272-007 –0.35 10272-004 LOAD REGULATION (%) –0.05 Evaluation Board User Guide UG-334 0.035 T TA = 25°C VIN = 12V LINE REGULATION (%) 0.030 0.025 1 STEP LOAD 1mA TO 200mA CINLDO = 1µF, COUTLDO = 4.7µF 0.020 0.015 OUTPUT TRANSIENT 0.010 2 4.0 3.5 4.5 VINLDO (V) 5.0 5.5 6.0 CH1 100mA Ω BW CH2 50.0mV 0 TA = 25°C VIN = 12V –0.06 –0.08 –0.10 VINLDO = 5V –0.12 VINLDO = 3V –0.14 –0.16 –0.18 –0.20 0.025 0.050 0.075 0.100 0.125 VOUTLDO LOAD (A) 0.150 0.175 0.200 10272-009 LOAD REGULATION (%) –0.04 0 A CH1 Figure 10. VOUTLDO Step Load Response Figure 8. VOUTLDO Line Regulation –0.02 M10.0µs Figure 9. VOUTLDO Load Regulation Rev. 0 | Page 5 of 16 118mA 10272-010 0 3.0 10272-008 0.005 UG-334 Evaluation Board User Guide EVALUATION BOARD OPERATING INSTRUCTIONS 1. 2. 3. Connect Jumper J3 (EN1) to the high position to enable Channel 1 of the ADP1876. Connect Jumper J2 (EN2) to the high position to enable Channel 2 of the ADP1876. Connect the positive terminal of the input power supply to the T1 input terminal. The input range is 10 V to 20 V, which powers up the ADP1876 IC. 4. Connect the positive terminal of another input power supply to the T7 input terminal (VINLDO). The input range is 2.7 V to 5.5 V, which powers up the independent LDO. Table 1. Jumper Description Jumper J3 J2 Description EN1 EN2 Default Factory Setting High High Function Connect high to enable Channel 1 of the ADP1876, or connect low to disable the channel. Connect high to enable Channel 2 of the ADP1876, or connect low to disable the channel. Table 2. Performance Summary (TA = 25°C) Parameter VIN fSW VOUT1 IOUT1 VOUT1 Ripple, DC Load VOUT1 Deviation upon Step Load Release VOUT2 IOUT2 VOUT2 Ripple, DC Load VOUT2 Deviation upon Step Load Release Condition 10 V to 20 V Switching frequency, 600 kHz 5V 0 A to 13 A 12 mV at 13 A load 0.8% with a 5 A step load 1.8 V 0 A to 13 A 12 mV at 13 A load 1.4% with a 5 A step load Rev. 0 | Page 6 of 16 Evaluation Board User Guide UG-334 EVALUATION BOARD PCB LAYOUT As seen in Figure 1, the layout of this evaluation board is not optimized for the smallest PCB area. It is laid out in such a way that any of the components can be desoldered and replaced easily with different components with a hand soldering iron so that the user can modify the existing design without acquiring a new PCB layout. The physical size of the compensation components is 0603, which is selected for its ease of hand soldering when reworking the board is needed. The size of these components can be 0402 or even smaller in the final design. Note that there are extra placeholders for input bulk capacitors, output filter capacitors, and MOSFETs. The user can remove, add, or change any of these power components to achieve a particular design objective. The track function, where TRK1 is pulled up to VCCO through a 0 Ω dummy resistor, is not used on this evaluation board. The primary purpose of the TRK1 function is to discharge VOUT1 to GND quickly when EN1 is pulled low and not relying on the feedback resistors for discharging the output. To achieve a fast discharging on the output, put an RC time delay at EN1 and a smaller RC time delay at TRK1. Placeholders for these RC components have been included on the evaluation board (see Figure 11 for details). In addition, dummy 0 Ω resistors are placed at the driver gates, DHx and DLx, for evaluation purposes only and can be removed in the final design. Furthermore, many test points are placed on the evaluation board so that the user can easily evaluate the performances of the ADP1876 with an oscilloscope. See Figure 11, the evaluation board schematic, for more information. Rev. 0 | Page 7 of 16 1 2 3 4 T14 TP-575-4 VDL TP16 VDL 1 T11 TURRET T2 1 T10 TURRET 1 2 3 4 T7 TP-575-4 T13 TP-575-4 VOUTLDO VINLDO VIN open RV5 100nf CVIN 1 1.0uF CV5 VCCO REN2 OPEN VEN1 TP3 1 T1 J2 2 Way Link 3 0 RVCC0 OPEN REN1 1 J3 VDL OPEN 0 3 VIN EN1 1 1.0uF EN1 750k RR2 44.2k FB1 29 73.2k RF11 RF21 20k RF22 10k 330pF 22pF NC AGND VDL VCCO VOUTLDO VINLDO VIN CC21 8 7 6 5 4 3 2 1 U1 120pF CC11 CC22 RC2 VOUTLDO 1uF 12.4k RC1 10pF CC12 750k COMP1 RR1 10K RF12 VEN1 to VEN1 (TP3) VINLDO OPEN RT13 CINLDO TRK1 AGND CDR 4.7uF COUTLDO OPEN RT12 OPEN Ctrk1 2 Way Link CEN1 2 RT11 30 VCCO SS1 CLIM1 100nF CSS2 open TP4 TP15 SW2 0 RDL2 TP14 VCCO 22pF CLIM2 2.1K RILIM21 100nf CBST2 0 RDH2 0 RDL1 0 RDH1 100nf CBST1 TP8 SW1 TP10 2.1K ADP1876-LFCSP 17 18 19 20 21 22 23 24 RPG2 SW2 DH2 PGND2 DL2 DL1 PGND1 DH1 SW1 22pF 100nf RILIM11 TP2 CSS1 TP6 1 26 TP1 1 Vin = 10V to 20V 1 1 1 1 VIN 2 25 BST1 32 TRK1 EN2 9 DH2 DL2 DL1 DH1 RGCS2 22.6k RGCS1 22.6k TP9 TP7 TP13 TP11 TP12 open RPG1 VCCO 1 31 FB1 FB2 10 RAMP1 COMP1 COMP2 11 1 1 28 SS1 SS2 13 RAMP2 12 1 27 PGOOD1 PGOOD2 14 ILIM1 ILIM2 15 BST2 16 1 1 1 1 1 Rev. 0 | Page 8 of 16 1 Figure 11. Evaluation Board Schematic QH3 IPD050N03L QL3 IPD050N03L QL1 OPEN QH1 IPD050N03L QH4 OPEN QL4 OPEN QL2 IPD050N03L 10uF 25V CIN21 10uF/25V 10uF 25V QH2 OPEN Cin11 Cin12 open 10uF/25V CIN22 L2 1.8uH RSNB2 open open CSNB2 CSNB1 L1 1.8uH open RSNB1 VIN VIN + 330uF open + COV4 + COV2 330uF 330uF + COV6 open open 330uF CIN13 open + 22uF + 22uF 1 2 3 4 1 T4 T12 TURRET T3 1 2 3 4 T5 T9 TURRET 1 T6 T8 TURRET 1 1 2 3 4 VOUT2 = 1.8V + COV23 22uF COV22 22uF 1 2 3 4 VOUT1 = 5V CIN23 open + COV12 + COV13 + VOUT2 VOUT1 CIN20 150uF + COV5 + COV3 + COV1 CIN10 open + COV8 open + COV7 + VIN 10272-011 UG-334 Evaluation Board User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK UG-334 10272-012 Evaluation Board User Guide 10272-013 Figure 12. Top Silkscreen Figure 13. Top Layer Rev. 0 | Page 9 of 16 Evaluation Board User Guide 10272-014 UG-334 10272-015 Figure 14. Second Layer (AGND Plane) Figure 15. Third Layer (PGND Layer) Rev. 0 | Page 10 of 16 UG-334 10272-016 Evaluation Board User Guide Figure 16. Bottom Layer (PGND Layer) Rev. 0 | Page 11 of 16 UG-334 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 3. Qty 1 4 2 4 1 4 1 4 2 4 1 1 1 1 1 3 7 2 2 2 1 1 1 1 2 2 5 6 3 Reference Designator U1 QH1, QH3, QL2, QL3 L1, L2 COV1, COV2, COV5, COV6 CIN20 CIN11, CIN12, CIN21, CIN22 CVIN Css1, Css2, Cbst1, Cbst2 Cv5, Cdr COV13, COV23, COV12, COV22 CINLDO COUTLDO Cc11 Cc12 Cc21 Cc22, Clim1, Clim2 Rb0, Rvcco, RDH1, RDH2, RDL1, RDL2, Rt11 Description ADP1876, 32-lead LFCSP, 5 mm × 5 mm N MOSFET, 30 V, 6 mΩ Inductor, 1.8 µH, 3.5 mΩ, IN = 16 A, ISAT = 18 A POSCAP, 330 µF, 6.3 V, 18 mΩ OSCON, 150 µF, 20 V MLCC, 10 µF, X7R, 25 V MLCC, 100 nF, X7R, 25 V MLCC, 100 nF, X7R, 16 V MLCC, 1.0 µF, X5R, 6.3 V MLCC, 22 µF, X5R, 6.3 V Manufacturer Analog Devices Infineon Würth Elektronic SANYO SANYO Murata Murata Murata Murata Murata Part No. ADP1876 IPD050N03L 744325180 6TPE330MFL 20SEP150M GRM32DR71E106KA12 GRM188R71E104KA01D GRM188R71E104KA01 GRM185R60J105KE21 GRM31CR60J226ME19L MLCC, 1 µF,16 V, X7R MLCC, 4.7 µF, 6.3 V, X5R MLCC, 120 pF MLCC, 10 pF MLCC, 330 pF MLCC, 22 pF Resistor, 0 Ω Murata Murata Vishay Vishay Vishay Vishay Vishay GRM188R71C105KA12 GRM188R0J475KE19 VJ0603Y121KXAA VJ0603A100KXAA VJ0603Y331KXAA VJ0603A220KXAA CRCW06030R00F Rgcs1, Rgcs2 RR1, RR2 Rf12, Rf22 Rf11 Rf21 Rc1 Rc2 Rlim11, Rlim21 J2, J3 T8, T9, T10, T11, T12 T1, T2, T3, T4, T5, T6 T7, T13, T14 Resistor, 22.6 kΩ Resistor, 750 kΩ Resistor, 10 kΩ Resistor, 73.2 kΩ Resistor, 20 kΩ Resistor, 124 kΩ Resistor, 44.2 kΩ Resistor, 2.1 kΩ 3-terminal jumpers, 0.1" spacing Test points, turret, 110 mil thru hole Terminals Banana plug Vishay Vishay Vishay Vishay Vishay Vishay Vishay Vishay Any Keystone Electronics Corp. Keystone Electronics Corp. Keystone Electronics Corp. CRCW06032262F CRCW06031873F CRCW06031002F CRCW06037322F CRCW06032002F CRCW06031243F CRCW06034422F CRCW06032101F Rev. 0 | Page 12 of 16 1502-1 8191 575-4 Evaluation Board User Guide UG-334 NOTES Rev. 0 | Page 13 of 16 UG-334 Evaluation Board User Guide NOTES Rev. 0 | Page 14 of 16 Evaluation Board User Guide UG-334 NOTES Rev. 0 | Page 15 of 16 UG-334 Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. 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Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG10272-0-11/11(0) Rev. 0 | Page 16 of 16