ADP2147ACBZ-130-R7

Compact, 800 mA, 3 MHz, Simple DVS, Buck Regulator ADP2147 FEATURES Input voltage: 2.3 V to 5.5 V Peak efficiency: 95% 3 MHz fixed frequency operation Low quiescent current: 23 μA Ultralow shutdown current: 0.2 μA (typical) VSEL pin for simple dynamic voltage scaling (DVS) 100% duty cycle low dropout mode Internal synchronous rectifier, compensation, and soft start Current overload and thermal shutdown protection Small, 6-ball, 1 mm × 1.5 mm WLCSP package GENERAL DESCRIPTION The ADP2147 is a high efficiency, low quiescent current, stepdown (buck) dc-to-dc regulator with an output voltage that can be switched between two different settings under the control of a select pin. The total solution requires only three tiny external components. The buck regulator automatically switches operating modes, depending on the load current level, to maximize efficiency. At high output loads, the buck regulator operates in PWM mode. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light-load efficiency. The ADP2147 runs on input voltages of 2.3 V to 5.5 V, which allows for single lithium or lithium polymer cells, multiple alkaline or NiMH cells, PCMCIA, USB, and other standard power sources. The maximum load current of 800 mA is achievable across the input voltage range. The ADP2147 is available with fixed output voltages from 0.8 V to 3.3 V. All versions include an internal power switch and synchronous rectifier for minimal external part count and high efficiency. The ADP2147 has an internal soft start and is internally compensated. During logic controlled shutdown, the input is disconnected from the output, and the ADP2147 draws less than 0.2 μA (typical) from the power source. Other key features include undervoltage lockout to prevent deep battery discharge and soft start to prevent input current overshoot at startup. The ADP2147 is available in a 6-ball WLCSP. APPLICATIONS PDAs and palmtop computers Wireless handsets Digital audio portable media players Digital cameras, GPS navigation units Low power portable medical equipment TYPICAL APPLICATIONS CIRCUIT 2.3V TO 5.5V 4.7µF 1.0µH VIN SW VOUT 4.7µF ADP2147 ON OFF VOUT_H GND 09885-001 EN VOUT VOUT_L VSEL Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. ADP2147 TABLE OF CONTENTS Features .............................................................................................. 1  Applications....................................................................................... 1  General Description ......................................................................... 1  Typical Applications Circuit............................................................ 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Input and Output Capacitor, Recommended Specifications ................................................................................ 3  Absolute Maximum Ratings............................................................ 4  Thermal Data ................................................................................ 4  Thermal Resistance ...................................................................... 4  ESD Caution.................................................................................. 4  Pin Configuration and Function Descriptions............................. 5  Typical Performance Characteristics ............................................. 6  Theory of Operation ...................................................................... 11  Control Scheme .......................................................................... 11  PWM Mode................................................................................. 11  Power Save Mode........................................................................ 11  Enable/Shutdown ....................................................................... 11  Simple Dynamic Voltage Scaling (DVS) ................................. 12  Short-Circuit Protection............................................................ 12  Undervoltage Lockout ............................................................... 12  Thermal Protection.................................................................... 12  Soft Start ...................................................................................... 12  Current Limit.............................................................................. 12  100% Duty Operation................................................................ 12  Applications Information .............................................................. 13  External Component Selection ................................................ 13  Thermal Considerations............................................................ 14  PCB Layout Guidelines.............................................................. 14  Evaluation Board ............................................................................ 15  Evaluation Board Layout........................................................... 15  Outline Dimensions ....................................................................... 16  Ordering Guide .......................................................................... 16  REVISION HISTORY 5/11—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADP2147 SPECIFICATIONS VIN = 3.6 V, VOUT = 0.8 V to 3.3 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Table 1. Parameter INPUT CHARACTERISTICS Input Voltage Range Undervoltage Lockout Threshold OUTPUT CHARACTERISTICS Output Voltage Accuracy Line Regulation Load Regulation PWM TO POWER SAVE MODE CURRENT THRESHOLD INPUT CURRENT CHARACTERISTICS DC Operating Current Shutdown Current SW CHARACTERISTICS SW On Resistance Current Limit ENABLE/VSEL CHARACTERISTICS Input High Threshold Input Low Threshold Input Leakage Current OSCILLATOR FREQUENCY START-UP TIME THERMAL CHARACTERISTICS Thermal Shutdown Threshold Thermal Shutdown Hysteresis ILOAD = 0 mA, device not switching EN = 0 V, TA = TJ = −40°C to +85°C pFET nFET pFET switch peak current limit Test Conditions/Comments Min 2.3 VIN rising VIN falling PWM mode, VSEL = Low PWM mode, VSEL = High VIN = 2.3 V to 5.5 V, PWM mode ILOAD = 0 mA to 800 mA 2.00 −2 −2.5 0.25 −0.95 100 23 0.2 155 115 1500 30 1.0 240 200 1650 2.15 Typ Max 5.5 2.3 2.25 +2 +2.5 Unit V V V % % %/V %/A mA μA μA mΩ mΩ mA V V μA MHz μs °C °C 1100 1.2 EN = VSEL = 0 V to 3.6 V −1 2.6 0 3.0 250 150 20 0.4 +1 3.4 INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS TA = −40°C to +125°C, unless otherwise specified. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Table 2. Parameter MINIMUM INPUT AND OUTPUT CAPACITANCE CAPACITOR ESR Symbol CMIN RESR Min 4.7 0.001 Typ Max 1 Unit μF Ω Rev. 0 | Page 3 of 16 ADP2147 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VIN, EN, VSEL VOUT, SW to GND Temperature Range Operating Ambient Operating Junction Storage Temperature Lead Temperature Range Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) ESD Model Human Body Charged Device Machine Rating −0.4 V to +6.5 V −1.0 V to (VIN + 0.2 V) −40°C to +85°C −40°C to +125°C −65°C to +150°C −65°C to +150°C 300°C 215°C 220°C ±1500 V ±500 V ±100 V Junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of θJA may vary, depending on PCB material, layout, and environmental conditions. The specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit board. Refer to JEDEC JESD 51-9 for detailed information pertaining to board construction. For additional information, see the AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale Package. ΨJB is the junction-to-board thermal characterization parameter measured in units of °C/W. The package ΨJB is based on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines for Reporting and Using Package Thermal Information, states that thermal characterization parameters are not the same as thermal resistances. ΨJB measures the component power flowing through multiple thermal paths rather than through a single path, which is the procedure for measuring thermal resistance, θJB. Therefore, ΨJB thermal paths include convection from the top of the package as well as radiation from the package, factors that make ΨJB more useful in real-world applications than θJB. Maximum junction temperature (TJ) is calculated from the board temperature (TB) and power dissipation (PD) using the formula: TJ = TB + (PD × ΨJB) Refer to JEDEC JESD51-8 and JESD51-12 for more detailed information about ΨJB. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL DATA Absolute maximum ratings apply individually only, not in combination. The ADP2147 can be damaged if the junction temperature limit is exceeded. Monitoring ambient temperature does not guarantee that the junction temperature (TJ) is within the specified temperature limit. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may need to be derated. In applications with moderate power dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit if the junction temperature is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction-to-ambient thermal resistance of the package (θJA). Maximum junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) using the following formula: TJ = TA + (PD × θJA) THERMAL RESISTANCE θJA and ΨJB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance Package Type 6-Ball WLCSP θJA 170 ΨJB 80 Unit °C/W ESD CAUTION Rev. 0 | Page 4 of 16 ADP2147 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 1 VIN A SW B 2 EN VSEL GND VOUT C ADP2147 TOP VIEW (BALL SIDE DOWN) Not to Scale 09885-002 Figure 2. Pin Configuration (Top View) Table 5. Pin Function Descriptions Pin No. A1 B1 C1 A2 B2 C2 Mnemonic VIN SW GND EN VSEL VOUT Description Power Source Input. VIN is the source of the pFET high-side switch. Bypass VIN to GND with a 4.7 μF or greater capacitor as close to the ADP2147 as possible. Switch Node Output. SW is the drain of the P-channel MOSFET switch and N-channel synchronous rectifier. Connect the output LC filter between SW and the output voltage. Ground. Connect the input and output capacitors to GND. Buck Activation. To turn on the buck, set EN to high. To turn off the buck, set EN to low. Voltage Select Input for Simple Dynamic Voltage Scaling (DVS). Drive VSEL low to switch the VOUT pin to the default voltage setting. Drive VSEL high to switch VOUT to the alternate voltage setting. Output Voltage Sensing Input. Rev. 0 | Page 5 of 16 ADP2147 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.6 V, TA = 25°C, VEN = VIN, unless otherwise noted. 100 90 80 70 EFFICIENCY (%) VOUT (V) 1.825 VIN = 2.3V VIN = 3.6V VIN = 4.2V VIN = 5.5V 1.815 60 50 40 30 20 10 0 0.001 0.01 IOUT (A) 0.1 VIN = 2.3V VIN = 3.6V VIN = 4.2V VIN = 5.5V 09885-003 1.805 1.795 1.785 1 0 0.1 0.2 0.3 0.4 IOUT (A) 0.5 0.6 0.7 0.8 Figure 3. Efficiency vs. Load Current, Across Input Voltage, VOUT = 1.8 V 100 90 80 70 EFFICIENCY (%) VOUT (V) Figure 6. Load Regulation Across Input Voltage, VOUT = 1.8 V 0.815 0.810 0.805 0.800 0.795 0.790 VIN = 2.3V VIN = 3.6V VIN = 4.2V VIN = 5.5V 60 50 40 30 20 10 0 0.001 0.01 IOUT (A) 0.1 VIN = 2.3V VIN = 3.6V VIN = 4.2V VIN = 5.5V 09885-005 0.785 0.780 1 0 0.1 0.2 0.3 0.4 IOUT (A) 0.5 0.6 0.7 0.8 Figure 4. Efficiency vs. Load Current, Across Input Voltage, VOUT = 0.8 V 100 90 80 70 EFFICIENCY (%) VOUT (V) Figure 7. Load Regulation Across Input Voltage, VOUT = 0.8 V 3.378 3.358 3.338 3.318 3.298 3.278 3.258 VIN = 3.9V VIN = 4.2V VIN = 5.5V 60 50 40 30 20 10 0 0.001 0.01 IOUT (A) 0.1 VIN = 3.9V VIN = 4.2V VIN = 5.5V 09885-007 3.238 3.218 1 0 0.1 0.2 0.3 0.4 IOUT (A) 0.5 0.6 0.7 0.8 Figure 5. Efficiency vs. Load Current, Across Input Voltage, VOUT = 3.3 V Figure 8. Load Regulation Across Input Voltage, VOUT = 3.3 V Rev. 0 | Page 6 of 16 09885-009 09885-008 09885-006 1.775 ADP2147 3.5 3.4 3.3 +25°C +85°C +125°C –40°C 350 –40°C +25°C +125°C 300 250 RDSON (mΩ) FREQUENCY (MHz) 3.2 3.1 3.0 2.9 2.8 2.7 2.6 0.2 0.3 0.4 IOUT (A) 0.5 0.6 0.7 09885-010 200 150 100 50 0 2.3 2.8 3.3 3.8 4.3 INPUT VOLTAGE (V) 4.8 5.3 Figure 9. Frequency vs. Output Current, Across Temperature, VOUT = 1.8 V 3.5 3.4 3.3 VIN = 2.3V VIN = 3.6V VIN = 4.2V VIN = 5.5V Figure 12. RDSON PFET vs. Input Voltage, Across Temperature 250 –40°C +25°C +125°C 200 FREQUENCY (MHz) 3.2 3.1 3.0 2.9 2.8 2.7 2.6 0.2 0.3 0.4 IOUT (A) 0.5 0.6 0.7 09885-011 RDSON (mΩ) 150 100 50 2.8 3.3 3.8 4.3 INPUT VOLTAGE (V) 4.8 5.3 Figure 10. Frequency vs. Output Current, Across Supply Voltage, VOUT = 1.8 V 90 80 70 IOUT = 100µA IOUT = 25mA IOUT = 500mA Figure 13. RDSON NFET vs. Input Voltage, Across Temperature T SW OUTPUT VOLTAGE (mV) 4 60 VOUT 50 40 30 20 10 09885-034 1 IOUT 2 2.8 3.3 3.8 4.3 INPUT VOLTAGE (V) 4.8 5.3 T 26.00% Figure 11. Output Voltage Ripple vs. Input Voltage, Across Output Current, VOUT = 1.8 V Figure 14. Response to Load Transient, 150 mA to 500 mA, VOUT = 1.8 V Rev. 0 | Page 7 of 16 09885-014 0 2.3 CH1 100mV CH2 250mA Ω CH4 5.00V M 40.0µs A CH2 215mA 09885-037 2.5 0.1 0 2.3 09885-036 2.5 0.1 ADP2147 T SW T SW 4 VOUT 1 IOUT 4 VOUT 1 IOUT 2 2 09885-015 T 26.00% T 26.00% Figure 15. Response to Load Transient, 50 mA to 200 mA, VOUT = 1.8 V T SW Figure 18. Response to Load Transient, 150 mA to 500 mA, VOUT = 3.3 V T SW 4 VOUT 1 IOUT 4 VOUT 1 IOUT 2 2 09885-016 T 26.00% T 26.00% Figure 16. Response to Load Transient, 150 mA to 500 mA, VOUT = 0.8 V T SW Figure 19. Response to Load Transient, 50 mA to 200 mA, VOUT = 3.3 V T 4 VIN VOUT 1 IOUT VOUT 1 2 3 09885-017 09885-020 CH1 100mV CH2 100mA Ω CH4 5.00V M 40.0µs A CH2 T 26.00% 134mA CH1 20.0mV CH3 1.00V M 40.0µs T A CH3 4.50V –84.0000µs Figure 17. Response to Load Transient, 50 mA to 200 mA, VOUT = 0.8 V Figure 20. Response to Line Transient, VOUT = 3.3 V, VIN = 4.0 V to 4.8 V Rev. 0 | Page 8 of 16 09885-019 CH1 100mV CH2 250mA Ω CH4 5.00V M 40.0µs A CH2 215mA CH1 100mV CH2 100mA Ω CH4 5.00V M 40.0µs A CH2 114mA 09885-018 CH1 100mV CH2 250mA Ω CH4 5.00V M 40.0µs A CH2 215mA CH1 100mV CH2 250mA Ω CH4 5.00V M 40.0µs A CH2 275mA ADP2147 T T SW VIN 4 IIN 2 VOUT VOUT 1 3 09885-021 1 EN 1 3 T –84.0000µs T 10.40% Figure 21. Response to Line Transient, VOUT = 0.8 V, VIN = 4.0 V to 4.8 V T T Figure 24. Startup, VOUT = 0.8 V, IOUT = 10 mA SW VIN 4 IIN 2 VOUT VOUT 1 3 09885-033 1 EN 1 3 T –84.0000µs T 10.40% Figure 22. Response to Line Transient, VOUT = 1.8 V, VIN = 4.0 V to 4.8 V T SW Figure 25. Startup, VOUT = 3.3 V, IOUT = 10 mA SW T 4 IIN 2 VOUT 1 EN 1 3 4 IL 2 VOUT 1 09885-022 CH1 2.00V Ω CH3 5.00V CH2 500mA Ω CH4 5.00V M 40.0µs T 10.40% A CH3 2.50V T 50.00% Figure 23. Startup, VOUT = 1.8 V, IOUT = 10 mA Figure 26. Typical Waveform, VOUT = 1.8 V, PSM Mode, IOUT = 10 mA Rev. 0 | Page 9 of 16 09885-025 CH1 10.0mV Ω CH2 500mA Ω CH4 2.00V M 1.00µs A CH1 3.80mV 09885-024 CH1 20.0mV CH3 1.00V M 40.0µs A CH3 4.50V CH1 5.00V Ω CH3 5.00V CH2 500mA Ω CH4 5.00V M 40.0µs A CH3 2.50V 09885-023 CH1 20.0mV CH3 1.00V M 40.0µs A CH3 4.50V CH1 1.00V Ω CH3 5.00V CH2 500mA Ω CH4 5.00V M 40.0µs A CH3 2.50V ADP2147 SW T T 1 4 IL 2 VOUT 1 2 09885-130 09885-132 09885-131 09885-026 CH1 10.0mV Ω CH2 500mA Ω CH4 2.00V M 40.0µs T 50.00% A CH4 1.32V CH1 100mV CH2 2.00V M 40.0µs A CH2 T 79.64µs 1.72V Figure 27. Typical Waveform, VOUT = 1.8 V, PWM Mode, IOUT = 200 mA 130 120 110 100 VOUT RIPPLE (mV) Figure 30. VSEL Change Triggering VOUT Transition from 1.275 V to 0.981 V, ILOAD = 10 mA T 1.8V, 1.8V, 1.8V, VIN = 5.5V, AUTO VIN = 3.6V, AUTO VIN = 2.3V, AUTO 1 90 80 70 60 50 40 30 20 10 0.01 IOUT (A) 0.1 1 09885-028 2 0 0.001 CH1 100mV CH2 2.00V M 40.0µs T 50.20% A CH2 1.76V Figure 28. VOUT Peak-to-Peak Ripple vs. Output Current, VOUT = 1.8 V Figure 31. VSEL Change Triggering VOUT Transition from 0.981 V to1.275 V, ILOAD = 200 mA T T 1 1 2 09885-129 2 CH1 100mV CH2 2.00V M 40.0µs A CH2 T –1.966µs 1.72V CH1 100mV CH2 2.00V M 40.0µs T 30.00% A CH2 1.76V Figure 29. VSEL Change Triggering VOUT Transition from 0.981 V to 1.275 V, ILOAD = 10 mA Figure 32. VSEL Change Triggering VOUT Transition from1.275 V to 0.981 V, ILOAD = 200 mA Rev. 0 | Page 10 of 16 ADP2147 THEORY OF OPERATION PWM COMP GM ERROR AMP SOFT START ILIMIT PSM COMP PWM/ PSM CONTROL LOW CURRENT VIN VOUT SW OSCILLATOR UNDERVOLTAGE LOCKOUT VSEL DRIVER AND ANTISHOOTTHROUGH GND 09885-027 ADP2147 EN THERMAL SHUTDOWN Figure 33. Functional Block Diagram The ADP2147 is a step-down dc-to-dc regulator that uses a fixed frequency and high speed current-mode architecture. The high switching frequency and tiny 6-ball WLCSP package enable a small step-down dc-to-dc regulator solution. The ADP2147 operates with an input voltage of 2.3 V to 5.5 V and regulates an output voltage down to 0.8 V. POWER SAVE MODE The ADP2147 smoothly transitions to the power save mode of operation when the load current decreases below the power save mode current threshold. When the ADP2147 enters power save mode, an offset is induced in the PWM regulation level, which makes the output voltage rise. When the output voltage reaches a level approximately 1.5% above the PWM regulation level, PWM operation turns off. At this point, both power switches are off, and the ADP2147 enters idle mode. COUT discharges until VOUT falls to the PWM regulation voltage, at which point the device drives the inductor to cause VOUT to rise again to the upper threshold. This process is repeated for as long as the load current is below the power save mode current threshold. CONTROL SCHEME The ADP2147 operates with a fixed frequency, current-mode PWM control architecture at medium to high loads for high efficiency but shifts to a power save mode control scheme at light loads to lower the regulation power losses. When operating in PWM mode, the duty cycle of the integrated switches is adjusted and regulates the output voltage. When operating in power save mode at light loads, the output voltage is controlled in a hysteretic manner, with higher VOUT ripple. During part of this time, the converter is able to stop switching and enters an idle mode, which improves conversion efficiency. Power Save Mode Current Threshold The power save mode current threshold is set to 100 mA. The ADP2147 employs a scheme that ensures that this current is accurately controlled and independent of VIN and VOUT levels. The control scheme also ensures that there is very little hysteresis between the power save mode current threshold and that of the PWM mode. The power save mode current threshold is optimized for excellent efficiency across all load currents. PWM MODE In PWM mode, the ADP2147 operates at a fixed frequency of 3 MHz, set by an internal oscillator. At the start of each oscillator cycle, the pFET switch is turned on, sending a positive voltage across the inductor. Current in the inductor increases until the magnitude of the current sense signal crosses the peak inductor current threshold. This turns off the pFET switch and turns on the nFET synchronous rectifier, which sends a negative voltage across the inductor, causing the inductor current to decrease. The synchronous rectifier stays on for the rest of the cycle. The ADP2147 regulates the output voltage by adjusting the peak inductor current threshold. ENABLE/SHUTDOWN The ADP2147 starts operating with soft start when the EN pin is toggled from logic low to logic high. Pulling the EN pin low forces the device into shutdown mode, reducing the supply current to 0.2 μA (typical). Rev. 0 | Page 11 of 16 ADP2147 SIMPLE DYNAMIC VOLTAGE SCALING (DVS) The ADP2147 has a VSEL pin that allows the user to force the output voltage to change from one level (the default VOUT setting) when VSEL is low and to another level (the alternate VOUT setting) when VSEL is high. Transition between VOUT levels is achieved within 40 μs when VOUT is commanded to go from a lower voltage to a higher voltage. When VOUT is commanded to go from a higher VOUT voltage to a lower one, the transition time depends on the load current present at that time. occurs, the ADP2147 does not return to operation until the onchip temperature drops below 130°C. When coming out of thermal shutdown, a soft start is initiated. SOFT START The ADP2147 has an internal soft start function that ramps the output voltage in a controlled manner upon startup, thereby limiting the inrush current. The soft start minimizes input voltage drop when a battery or a high impedance power source is connected to the regulator’s input. After the EN pin is driven high, internal circuits begin to power up. Start-up time in the ADP2147 is the measure of when the output is in regulation after the EN pin is driven high. Start-up time consists of the power-up time plus the soft start time. SHORT-CIRCUIT PROTECTION The ADP2147 includes frequency foldback to prevent output current runaway on a hard short. When the voltage at the feedback pin falls below half the target output voltage, indicating the possibility of a hard short at the output, the switching frequency is reduced to half the internal oscillator frequency. The reduction in the switching frequency allows more time for the inductor to discharge, preventing a runaway of output current. CURRENT LIMIT The ADP2147 has protection circuitry to limit the amount of positive current flowing through the PFET switch and the synchronous rectifier. The positive current limit on the power switch controls the amount of current that can flow from the power source to the output. The negative current limit prevents the inductor current from reversing direction and flowing out of the load. UNDERVOLTAGE LOCKOUT To protect against battery discharge, undervoltage lockout (UVLO) circuitry is integrated on the ADP2147. If the input voltage drops below the 2.15 V UVLO threshold, the ADP2147 shuts down, and both the power switch and the synchronous rectifier turn off. When the voltage rises above the UVLO threshold, the soft start period is initiated, and the part is enabled. 100% DUTY OPERATION With a drop in VIN or with an increase in ILOAD, the ADP2147 eventually reaches a limit where, even with the pFET switch on 100% of the time, VOUT drops below the desired output voltage. At this limit, the ADP2147 smoothly transitions to a mode where the PFET switch stays on 100% of the time. When the input conditions change again and the required duty cycle falls, the ADP2147 immediately restarts PWM regulation without allowing overshoot on VOUT. THERMAL PROTECTION In the event that the ADP2147 junction temperature rises above 150°C, the thermal shutdown circuit turns off the regulator. Extreme junction temperatures can be the result of high current operation, poor circuit board design, or high ambient temperature. A 20°C hysteresis is included so that when thermal shutdown Rev. 0 | Page 12 of 16 ADP2147 APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION Trade-offs between performance parameters such as efficiency and transient response can be made by varying the choice of external components in the applications circuit, as shown in Figure 1. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended for best performance. Y5V and Z5U dielectrics are not recommended for use with any dc-to-dc regulator because of their poor temperature and dc bias characteristics. The worst-case capacitance, accounting for capacitor variation over temperature, component tolerance, and voltage, is calculated using the following equation: CEFF = COUT × (1 − TEMPCO) × (1 − TOL) where: CEFF is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. In this example, the worst-case temperature coefficient (TEMPCO) over −40°C to +85°C is assumed to be 15% for an X5R dielectric. The tolerance of the capacitor (TOL) is assumed to be 10%, and COUT is 4.0466 μF at 1.8 V, as shown in Figure 34. Substituting these values in the equation yields CEFF = 4.0466 μF × (1 − 0.15) × (1 − 0.1) = 3.0956 μF To guarantee the performance of the ADP2147, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors be evaluated for each application. 6 Inductor The high switching frequency of the ADP2147 allows for the selection of small chip inductors. For best performance, use inductor values between 0.7 μH and 3 μH. Recommended inductors are shown in Table 6. The peak-to-peak inductor current ripple is calculated using the following equation: I RIPPLE V × (VIN − VOUT ) = OUT VIN × f SW × L where: fSW is the switching frequency. L is the inductor value. The minimum dc current rating of the inductor must be greater than the inductor peak current. The inductor peak current is calculated using the following equation: I PEAK = I LOAD ( MAX ) + I RIPPLE 2 CAPACITANCE (µF) Inductor conduction losses are caused by the flow of current through the inductor, which has an associated internal DCR. Larger sized inductors have smaller DCR, which may decrease inductor conduction losses. Inductor core losses are related to the magnetic permeability of the core material. Because the ADP2147 is a high switching frequency dc-to-dc regulator, shielded ferrite core material is recommended for its low core losses and low electromagnetic interference (EMI). Table 6 shows the suggested inductors that can be used for different output current requirements; several inductors are also listed to minimize PCB space for small current applications. Table 6. Suggested 1.0 μH Inductors Vendor Murata Coilcraft® Toko TDK Taiyo Yuden Model LQM2MPN1R0NG0B LQM18PN1R0 EPL2014-102ML 0603LS-102 MDT2520-CN GLFR1608T1R0M-LR CBMF1608T1R0M Dimensions (mm) 2.0 × 1.6 × 0.9 1.6 × 0.8 × 0.33 2.0 × 2.0 × 1.4 1.8 × 1.27 × 1.1 2.5 × 2.0 × 1.2 1.6 × 0.8 × 0.8 1.6 × 0.8 × 0.8 ISAT (mA) 1400 700 900 400 1800 360 290 DCR (mΩ) 85 52 59 81 100 80 90 5 4 3 2 1 0 1 2 3 4 DC BIAS VOLTAGE (V) 5 6 Figure 34. Typical Capacitor Performance The peak-to-peak output voltage ripple for the selected output capacitor and inductor values is calculated using the following equation: V RIPPLE = Output Capacitor Increasing the value of the output capacitor reduces the output voltage ripple and improves load transient response. When choosing the capacitor value, it is also important to account for the loss of capacitance due to dc output voltage bias. Rev. 0 | Page 13 of 16 (2π × f SW ) × 2 × L × C OUT V IN = I RIPPLE 8 × f SW × C OUT 09885-029 0 ADP2147 Capacitors with lower equivalent series resistance (ESR) are preferred to guarantee low output voltage ripple, as shown in the following equation: thermal shutdown. The regulator recovers when the junction temperature falls below 130°C. The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as shown in the following equation: ESRCOUT ≤ VRIPPLE I RIPPLE The effective capacitance needed for stability, which includes temperature and dc bias effects, is 3 μF. Table 7. Suggested 4.7 μF Capacitors Vendor Murata Taiyo Yuden TDK Type X5R X5R X5R Model GRM188R60J475 JMK107BJ475 C1608X5R0J475 Case Size 0603 0603 0603 Voltage Rating (V) 6.3 6.3 6.3 TJ = TA + TR where: TJ is the junction temperature. TA is the ambient temperature. TR is the rise in temperature of the package due to power dissipation. The package’s rise in temperature is directly proportional to the power dissipation in the package. The proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: Input Capacitor Higher value input capacitors help to reduce the input voltage ripple and improve transient response. Maximum input capacitor current is calculated using the following equation: I CIN ≥ I LOAD ( MAX ) VOUT (VIN − VOUT ) VIN TR = θJA × PD where: TR is the rise in temperature of the package. θJA is the thermal resistance from the junction of the die to the ambient temperature of the package. PD is the power dissipation in the package. To minimize supply noise, place the input capacitor as close to the VIN pin of the ADP2147 as possible. As with the output capacitor, a low ESR capacitor is recommended. The list of recommended capacitors is shown in Table 8. Table 8. Suggested 4.7 μF Capacitors Vendor Murata Taiyo Yuden TDK Type X5R X5R X5R Model GRM188R60J475 JMK107BJ475 C1608X5R0J475 Case Size 0603 0603 0603 Voltage Rating (V) 6.3 6.3 6.3 PCB LAYOUT GUIDELINES Poor layout can affect the ADP2147 performance, causing EMI and electromagnetic compatibility problems, ground bounce, and voltage losses. Poor layout can also affect regulation and stability. To implement a good layout, use the following rules: • Place the inductor, input capacitor, and output capacitor close to the IC using short tracks. These components carry high switching frequencies, and large tracks act as antennas. Route the output voltage path away from the inductor and SW node to minimize noise and magnetic interference. Maximize the size of ground metal on the component side to help with thermal dissipation. Use a ground plane with several vias connecting to the component side ground to further reduce noise interference on sensitive circuit nodes. THERMAL CONSIDERATIONS Because of the high efficiency of the ADP2147, only a small amount of power is dissipated inside the ADP2147 package, which reduces thermal constraints of the design. However, in applications with maximum loads at high ambient temperature, low supply voltage, and high duty cycle, the heat dissipated in the package is high enough that it may cause the junction temperature of the die to exceed the 125°C maximum. If the junction temperature exceeds 150°C, the converter enters • • • Rev. 0 | Page 14 of 16 ADP2147 EVALUATION BOARD VIN GND CONN PWR 2-P 2 1 VIN VIN TB1 VIN JP3 3 2 1 3 2 1 J6 A1 CIN 4.7µF C1 A2 B2 ADP2147 VIN GND EN VSEL U1 VOUT C2 SW B1 1 VIN L1 1µH 2 TB3 VOUT EN COUT 4.7µF ENABLE JP2 3 2 1 3 2 1 VSEL GND GND IN GND OUT 09885-030 TB5 TB4 Figure 35. Evaluation Board Schematic EVALUATION BOARD LAYOUT 09885-136 Figure 36. Top Layer Figure 37. Bottom Layer Rev. 0 | Page 15 of 16 09885-137 ADP2147 OUTLINE DIMENSIONS 1.070 1.030 0.990 2 1 A BALL A1 IDENTIFIER 1.545 1.505 1.465 1.00 REF B C TOP VIEW (BALL SIDE DOWN) 0.50 REF 0.370 0.355 0.340 0.50 REF BOTTOM VIEW (BALL SIDE UP) 0.640 0.595 0.550 SIDE VIEW COPLANARITY 0.05 0.340 0.320 0.300 0.270 0.240 0.210 Figure 38. 6-Ball Wafer Level Chip Scale Package [WLCSP] (CB-6-12) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADP2147ACBZ-110-R7 ADP2147ACBZ-130-R7 ADP2147ACBZ-150-R7 ADP2147ACBZ-170-R7 ADP2147CB-110EVALZ ADP2147CB-130EVALZ ADP2147CB-150EVALZ ADP2147CB-170EVALZ 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C VOUT (V) (VSEL = 0) 1.275 0.9 1.2 0.9 VOUT (V) (VSEL = 1) 0.981 1.3 1.0 1.1 12-07-2010-A SEATING PLANE Package Description 6-Ball Wafer Level Chip Scale Package [WLCSP] 6-Ball Wafer Level Chip Scale Package [WLCSP] 6-Ball Wafer Level Chip Scale Package [WLCSP] 6-Ball Wafer Level Chip Scale Package [WLCSP] Evaluation Board Evaluation Board Evaluation Board Evaluation Board Package Option CB-6-12 CB-6-12 CB-6-12 CB-6-12 Branding LLE LLF LLG LLH Z = RoHS Compliant Part. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09885-0-5/11(0) Rev. 0 | Page 16 of 16