FEATURES
APPLICATIONS
Intermediate power rail conversion
DC-to-DC point of load applications
Communications and networking
Industrial and instrumentation
Healthcare and medical
Consumer
TYPICAL APPLICATIONS CIRCUIT
VIN
VIN
BST
ADP2302/
ADP2303
PGOOD
SW
EN
FB
VOUT
08833-001
ON
OFF
GND
Figure 1. Typical Application Circuit
100
90
EFFICIENCY (%)
Wide input voltage range: 3.0 V to 20 V
Maximum load current
2 A for ADP2302
3 A for ADP2303
±1.5% output accuracy over temperature
Output voltage down to 0.8 V
700 kHz switching frequency
Current-mode control architecture
Automatic PFM/PWM mode
Precision enable pin with hysteresis
Integrated high-side MOSFET
Integrated bootstrap diode
Internal compensation and soft start
Power-good output
Undervoltage lockout (UVLO)
Overcurrent protection (OCP)
Thermal shutdown (TSD)
8-lead SOIC package with exposed paddle
Supported by ADIsimPower™ design tool
80
70
60
VOUT = 3.3V
50
INDUCTOR: VLF10040T -4R7N5R4
DIODE: SSB43L
40
0
0.5
1.0
1.5
VOUT = 5.0V
2.0
2.5
OUTPUT CURRENT (A)
3.0
08833-002
Data Sheet
2 A/3 A, 20 V, 700 kHz,
Nonsynchronous Step-Down Regulators
ADP2302/ADP2303
Figure 2. ADP2303 Efficiency vs. Output Current at VIN = 12 V
GENERAL DESCRIPTION
The ADP2302/ADP2303 are fixed frequency, current-mode
control, step-down, dc-to-dc regulators with an integrated
power MOSFET. The ADP2302/ADP2303 can run from an
input voltage of 3.0 V to 20 V, which makes them suitable for a
wide range of applications. The output voltage of the ADP2302/
ADP2303 can be down to 0.8 V for the adjustable version, while
the fixed output version is available in preset output voltage
options of 5.0 V, 3.3 V, and 2.5 V. The 700 kHz operating
frequency allows small inductor and ceramic capacitors to be
used, providing a compact solution. Current mode control
provides fast and stable line and load transient performance.
The ADP2302/ADP2303 have integrated soft start circuitry to
prevent a large inrush current at power-up. The power-good
signal can be used to sequence devices that have an enable input.
The precision enable threshold voltage allows the part to be
easily sequenced from other input/output supplies. Other key
features include undervoltage lockout (UVLO), overvoltage
protection (OVP), thermal shutdown (TSD), and overcurrent
protection (OCP).
The ADP2302/ADP2303 devices are available in the 8-lead,
SOIC package with exposed paddle and are rated for the −40oC
to +125oC junction temperature range.
Rev. A
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Fax: 781.461.3113 ©2010–2012 Analog Devices, Inc. All rights reserved.
ADP2302/ADP2303
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Overvoltage Protection (OVP) ................................................. 15
Applications ....................................................................................... 1
Power Good ................................................................................ 15
Typical Applications Circuit............................................................ 1
Control Loop............................................................................... 15
General Description ......................................................................... 1
Applications Information .............................................................. 16
Revision History ............................................................................... 2
ADIsimPower Design Tool ....................................................... 16
Specifications..................................................................................... 3
Programming Output Voltage .................................................. 16
Absolute Maximum Ratings............................................................ 4
Voltage Conversion Limitations ............................................... 16
Thermal Resistance ...................................................................... 4
Low Input Voltage Considerations .......................................... 17
ESD Caution .................................................................................. 4
Programming the Precision Enable ......................................... 17
Pin Configuration and Function Descriptions ............................. 5
Inductor ....................................................................................... 17
Typical Performance Characteristics ............................................. 6
Catch Diode ................................................................................ 18
Functional Block Diagram ............................................................ 13
Input Capacitor ........................................................................... 19
Theory of Operation ...................................................................... 14
Output Capacitor........................................................................ 19
Basic Operation .......................................................................... 14
Thermal Consideration ............................................................. 19
PWM Mode ................................................................................. 14
Design Example .............................................................................. 20
Power Saving Mode .................................................................... 14
Catch Diode Selection ............................................................... 20
Bootstrap Circuitry .................................................................... 14
Inductor Selection ...................................................................... 20
Precision Enable ......................................................................... 14
Output Capacitor Selection....................................................... 20
Integrated Soft Start ................................................................... 14
Resistive Voltage Divider Selection.......................................... 20
Current Limit .............................................................................. 14
Circuit Board Layout Recommendations ................................... 22
Short-Circuit Protection ............................................................ 14
Typical Application Circuits ......................................................... 23
Undervoltage Lockout (UVLO) ............................................... 15
Outline Dimensions ....................................................................... 26
Thermal Shutdown (TSD)......................................................... 15
Ordering Guide .......................................................................... 26
REVISION HISTORY
6/12—Rev. 0 to Rev. A
Change to Features Section ............................................................. 1
Added ADIsimPower Design Tool Section ................................. 16
Change to Voltage Conversion Limitations Section .................. 16
Updated Outline Dimensions ....................................................... 26
Changes to Ordering Guide .......................................................... 26
7/10—Revision 0: Initial Version
Rev. A | Page 2 of 28
Data Sheet
ADP2302/ADP2303
SPECIFICATIONS
VIN = 3.3 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 1.
Parameters
VIN
Voltage Range
Supply Current
Shutdown Current
Undervoltage Lockout Threshold
FB
Regulation Voltage
Bias Current
SW
On Resistance1
Peak Current Limit
Leakage Current
Minimum On Time
Minimum Off Time
OSCILLATOR FREQUENCY
SOFT START TIME
EN
Input Threshold
Input Hysteresis
Pull-Down Current
BOOTSTRAP VOLTAGE
PGOOD
PGOOD Rising Threshold
PGOOD Hysteresis
PGOOD Deglitch Time2
PGOOD Output Low Voltage
PGOOD Leakage Current
THERMAL SHUTDOWN
Threshold
Hysteresis
1
2
Symbol
VIN
IVIN
ISHDN
UVLO
VFB
IFB
Test Conditions
Min
3.0
No switching, VIN = 12 V
VEN = 0 V, VIN = 12 V
VIN rising
VIN falling
2.2
720
24
2.7
2.4
Max
Unit
20
950
45
2.9
V
μA
μA
V
V
ADP230xARDZ (adjustable)
ADP230xARDZ-2.5
ADP230xARDZ-3.3
ADP230xARDZ-5.0
ADP230xARDZ (adjustable)
0.788
2.463
3.25
4.925
0.8
2.5
3.3
5.0
0.01
0.812
2.538
3.35
5.075
0.1
V
V
V
V
μA
VBST − VSW = 5 V, ISW = 200 mA
ADP2302, VBST − VSW = 5 V
ADP2303, VBST − VSW = 5 V
VEN = VSW = 0 V, VIN = 12 V
80
2.7
4.6
120
3.5
5.5
0.1
126
210
700
2048
160
4.4
6.4
5
170
280
805
mΩ
A
A
μA
ns
ns
kHz
Clock cycles
1.2
100
1.2
5.0
1.28
V
mV
μA
V
87.5
2.5
32
150
0.1
92.5
fSW
595
VEN
1.12
VBOOT
Typ
VIN = 12 V
4.7
82.5
VPGOOD = 5 V
Rising temperature
Pin-to-Pin measurements.
Guaranteed by design.
Rev. A | Page 3 of 28
150
15
5.3
300
1
%
%
Clock cycles
mV
μA
°C
°C
ADP2302/ADP2303
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Parameter
VIN, EN, PGOOD
SW
BST to SW
FB, NC
Operating Junction Temperature Range
Storage Temperature Range
Soldering Conditions
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
MAX Rating
−0.3 V to +24 V
−1.0 V to +24 V
−0.6 V to +6 V
−0.3 V to +6 V
−40°C to +125°C
−65°C to +150°C
JEDEC J-STD-020
Table 3. Thermal Resistance1
Package Type
8-Lead SOIC_N_EP
1
θJA
58.5
Unit
°C/W
JA is measured using natural convection on JEDEC 4-layer board.
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all voltages are
referenced to GND.
Rev. A | Page 4 of 28
Data Sheet
ADP2302/ADP2303
BST 1
VIN 2
EN 3
ADP2302
ADP2303
TOP VIEW
PGOOD 4 (Not to Scale)
8
SW
7
GND
6
NC
5
FB
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD SHOULD BE SOLDERED
TO AN EXTERNAL GROUND PLANE UNDERNEATH
THE IC FOR THERMAL DISSIPATION.
08833-003
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration (Top View)
Table 4. Pin Function Descriptions
Pin No.
1
Mnemonic
BST
2
VIN
3
EN
4
5
PGOOD
FB
6
7
8
9 (EPAD)
NC
GND
SW
Exposed Pad
Description
Bootstrap Supply for the High-Side MOSFET Driver. A 0.1 μF capacitor is connected between SW and BST to
provide a floating driver voltage for the power switch.
Power Input. Connect to the input power source with a ceramic bypass capacitor to GND directly from this
pin.
Output Enable. Pull this pin high to enable the output. Pull this pin low to disable the output. This pin can
also be used as a programmable UVLO input. This pin has an internal 1.2 μA pull-down current to GND.
Power-Good Open-Drain Output.
Feedback Voltage Sense Input. For the adjustable version, connect this pin to a resistive divider from VOUT. For
the fixed output version, connect this pin to VOUT directly.
Used for internal testing. Connect to GND or leave this pin floating to ensure proper operation.
Ground. Connect this pin to the ground plane.
Switch Node Output. Connect an inductor to VOUT and a catch diode to GND from this pin.
The exposed pad should be soldered to an external ground plane underneath the IC for thermal dissipation.
Rev. A | Page 5 of 28
ADP2302/ADP2303
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
90
80
80
70
VOUT = 2.5V
VOUT = 3.3V
VOUT = 5.0V
60
50
0.5
1.0
1.5
60
50
INDUCTOR: VLF10040T-6R8N4R5
DIODE: SSB43L
0
VOUT = 1.5V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 5.0V
2.0
2.5
3.0
OUTPUT CURRENT (A)
40
INDUCTOR: VLF10040T-4R7N5R4
DIODE: SSB43L
0
90
80
80
EFFICIENCY (%)
90
70
VOUT = 1.2V
VOUT = 1.5V
VOUT = 1.8V
VOUT = 2.5V
60
40
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT CURRENT (A)
0
1.0
1.5
2.0
Figure 8. ADP2302 Efficiency, VIN = 18 V
90
90
80
80
EFFICIENCY (%)
100
70
VOUT = 1.5V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 5.0V
50
70
VOUT = 1.2V
VOUT = 1.5V
VOUT = 1.8V
VOUT = 2.5V
60
50
INDUCTOR: VLF10040T-6R8N4R5
DIODE: SSB43L
0
0.5
1.0
OUTPUT CURRENT (A)
INDUCTOR: VLF10040T-3R3N6R2
DIODE: SSB43L
1.5
2.0
08833-006
EFFICIENCY (%)
0.5
OUTPUT CURRENT (A)
100
40
3.0
INDUCTOR: VLF10040T-6R8N4R5
DIODE: SSB43L
Figure 5. ADP2303 Efficiency, VIN = 5 V
60
2.5
VOUT = 2.5V
VOUT = 3.3V
VOUT = 5.0V
50
INDUCTOR: VLF10040T-2R2N7R1
DIODE: SSB43L
0
2.0
70
08833-005
EFFICIENCY (%)
100
40
1.5
Figure 7. ADP2303 Efficiency, VIN = 12 V
100
50
1.0
OUTPUT CURRENT (A)
Figure 4. ADP2303 Efficiency, VIN = 18 V
60
0.5
40
0
0.5
1.0
OUTPUT CURRENT (A)
1.5
Figure 9. ADP2302 Efficiency, VIN = 5 V
Figure 6. ADP2302 Efficiency, VIN = 12 V
Rev. A | Page 6 of 28
2.0
08833-009
40
70
08833-007
90
08833-008
100
EFFICIENCY (%)
100
08833-004
EFFICIENCY (%)
VIN = 3.3 V, TA = 25°C, unless otherwise noted.
ADP2302/ADP2303
0.20
0.20
0.15
0.15
0.10
0.10
LOAD REGULATION (%)
0.05
0
–0.05
–0.10
–0.15
–0.05
–0.10
11
14
17
20
–0.20
VIN (V)
0
Figure 10. ADP2302 Line Regulation, VOUT = 3.3 V, IOUT = 2 A
1.0
OUTPUT CURRENT (A)
1.5
2.0
Figure 13. ADP2302 Load Regulation, VOUT = 3.3V, VIN = 12 V
0.20
0.15
0.15
0.10
0.10
LOAD REGULATION (%)
0.20
0.05
0
–0.05
–0.10
–0.15
0.05
0
–0.05
–0.10
8
11
14
17
08833-011
5
20
VIN (V)
–0.20
0
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT CURRENT (A)
08833-014
–0.15
–0.20
Figure 14. ADP2303 Load Regulation, VOUT = 3.3 V, VIN = 12 V
Figure 11. ADP2303 Line Regulation, VOUT = 3.3 V , IOUT = 3 A
900
50
45
850
QUIESCENT CURRENT (μA)
40
35
30
25
20
15
TJ = –40°C
TJ = +25°C
TJ = +125°C
10
5
800
750
700
650
500
2
4
6
8
10
12
14
16
VIN (V)
18
TJ = –40°C
TJ = +25°C
TJ = +125°C
600
550
20
08833-012
0
0.5
08833-013
8
08833-010
5
LINE REGULATION (%)
0
–0.15
–0.20
SHUTDOWN CURRENT (μA)
0.05
2
4
6
8
10
12
VIN (V)
14
16
Figure 15. Quiescent Current vs. VIN
Figure 12. Shutdown Current vs. VIN
Rev. A | Page 7 of 28
18
20
08833-015
LINE REGULATION (%)
Data Sheet
Data Sheet
810
812
790
810
770
808
750
806
FEEDBACK VOLTAGE (mV)
730
710
690
670
650
630
802
800
798
796
794
792
610
0
20
40
60
80
100
120
TEMPERATURE (°C)
788
–40
4.4
6.4
4.2
6.2
4.0
6.0
PEAK CURRENT LIMIT (A)
PEAK CURRENT LIMIT (A)
20
40
60
80
100
120
120
Figure 19. 0.8 V Feedback Voltage vs. Temperature
3.8
3.6
3.4
3.2
3.0
2.8
5.8
5.6
5.4
5.2
5.0
4.8
0
20
40
60
80
100
120
4.6
–40
08833-017
–20
TEMPERATURE (°C)
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 17. ADP2302 Current-Limit Threshold vs. Temperature, VBST − VSW = 5 V
Figure 20. ADP2303 Current-Limit Threshold vs. Temperature, VBST − VSW = 5 V
1.30
2.8
1.25
ENABLE THRESHOLD (V)
2.9
2.7
RISING
2.6
2.5
2.4
FALLING
RISING
1.20
1.15
FALLING
1.10
1.05
2.3
2.2
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
120
1.00
–40
08833-018
UVLO THRESHOLD (V)
0
TEMPERATURE (°C)
Figure 16. Frequency vs. Temperature
2.6
–40
–20
08833-019
–20
08833-020
790
08833-016
590
–40
804
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 18. UVLO Threshold vs. Temperature
Figure 21. Enable Threshold vs. Temperature
Rev. A | Page 8 of 28
120
08833-021
FREQUENCY (kHz)
ADP2302/ADP2303
Data Sheet
ADP2302/ADP2303
270
150
265
145
260
140
MINIMUM ON TIME (ns)
MINIMUM OFF TIME (ns)
255
250
245
240
235
230
225
220
135
130
125
120
115
110
215
–20
0
20
40
60
80
100
120
TEMPERATURE (°C)
100
–40
08833-022
205
–40
–20
0
20
40
60
80
100
08833-025
105
210
120
TEMPERATURE (°C)
Figure 22. Minimum Off Time vs. Temperature
Figure 25. Minimum On Time vs. Temperature
180
VOUT (AC)
170
1
MOSFET RESISTOR (mΩ)
160
150
140
IL
130
120
SW
110
4
100
VGS = 3V
VGS = 4V
VGS = 5V
90
80
2
–20
0
20
40
60
80
100
120
TEMPERATURE (°C)
CH1 5.00mV
Figure 23. MOSFET RDSON vs. Temperature (Pin-to-Pin Measurement)
B
W
CH2 5.00V
M1.00µs
CH4 2.00A Ω T 30.00%
A CH2
7.50V
08833-026
60
–40
08833-023
70
Figure 26. Continuous Conduction Mode (CCM), VOUT = 3.3 V, VIN = 12 V
VOUT (AC)
1
VOUT (AC)
1
IL
4
IL
4
SW
SW
2
B
W
CH2 5.00V
M1.00µs
CH4 2.00A Ω T 30.00%
A CH2
7.50V
CH1 50.00mV
Figure 24. Discontinuous Conduction Mode (DCM), VOUT = 3.3 V, VIN = 12 V
Rev. A | Page 9 of 28
B
W
CH2 5.00V
CH4 2.00A Ω
M200µs
A CH2
T 30.00%
7.50V
Figure 27. Power Saving Mode, VOUT = 3.3 V, VIN = 12 V
08833-027
CH1 5.00mV
08833-024
2
ADP2302/ADP2303
Data Sheet
VOUT
VOUT
1
1
IL
IL
4
4
EN
EN
SW
2
2
CH1 2.00V BW
CH3 10.0V BW
CH2 10.0V
M1.00ms
CH4 2.00A Ω T 20.20%
A CH3
6.20V
08833-028
3
CH1 2.00V BW
CH3 10.0V BW
Figure 28. Soft Start Without Load, VOUT = 3.3 V, VIN = 12 V
CH2 10.0V
M1.00ms
CH4 2.00A Ω T 20.20%
A CH3
3.60V
08833-031
SW
3
Figure 31. Soft Start with Full Load, VOUT = 3.3 V, VIN = 12 V
VOUT (AC)
VOUT (AC)
1
1
IO
IO
4
B
W
CH4 2.00A Ω
M200µs
T 20.00%
A CH4
1.20A
CH1 200mV
B
W
CH4 2.00A Ω
Figure 29. ADP2303 Load Transient, 0.5 A to 3.0 A, VOUT = 5.0 V, VIN = 12 V,
L = 4.7 μH, COUT = 47 μF
M200µs
T 20.00%
A CH4
1.88A
08833-032
CH1 500mV
08833-029
4
Figure 32. ADP2303 Load Transient, 0.5 A to 3.0 A, VOUT = 3.3 V, VIN = 12 V,
L = 4.7 μH, COUT = 2 × 47 μF
VOUT (AC)
VOUT (AC)
1
1
IO
IO
4
B
W
CH4 1.00A Ω
M200µs
T 20.00%
A CH4
1.20A
Figure 30. ADP2302 Load Transient, 0.5 A to 2.0 A, VOUT = 5.0 V, VIN = 12 V,
L = 6.8 μH, COUT = 2 × 22 μF
CH1 200mV
B
W
CH4 1.00A Ω
M200µs
T 20.00%
A CH4
1.20A
08833-033
CH1 200mV
08833-030
4
Figure 33. ADP2302 Load Transient, 0.5 A to 2.0 A, VOUT = 3.3 V, VIN = 12 V,
L = 6.8 μH, COUT = 2 × 22 μF
Rev. A | Page 10 of 28
Data Sheet
ADP2302/ADP2303
VOUT
VOUT
1
1
IL
IL
SW
4
4
SW
B
W
CH2 10.0V
M40.0µs
CH4 5.00A Ω T 30.00%
A CH1
1.26V
CH1 1.00V
B
W
CH2 10.0V
M400µs
CH4 5.00A Ω T 30.00%
A CH1
1.26V
08833-037
2
CH1 1.00mV
08833-034
2
Figure 37. Output Short Recovery, VOUT = 3.3 V, VIN = 12 V,
L = 4.7 μH, COUT = 2 × 47 μF
Figure 34. Output Short, VOUT = 3.3 V, VIN = 12 V,
L = 4.7 μH, COUT = 2 × 47 μF
VOUT
VOUT
1
VIN
VIN
1
SW
2
M1.00ms A CH3
T 23.40%
11.0V
CH1 20.0mV BW CH2 10.0V BW M1.00ms
CH3 5.00V BW
T 23.40%
A CH3
11.0V
80
180
80
180
64
144
64
144
48
108
48
108
32
72
32
72
16
36
16
36
0
0
0
0
PHASE (Degrees)
–16
–36
–32
–72
–16
–36
–32
–72
–48
–108
–64
–144
–64
–180
–80
1k
10k
100k
FREQUENCY (Hz)
1M
–108
–48
08833-036
–80
CROSS FREQUENCY = 36kHz
PHASE MARGIN = 60°
Figure 36. ADP2302 Bode Plot, VOUT = 2.5 V, VIN = 12 V,
L = 4.7 μH, COUT =3 × 22 μF
–144
CROSS FREQUENCY = 42kHz
PHASE MARGIN = 56°
1k
10k
100k
FREQUENCY (Hz)
1M
Figure 39. ADP2302 Bode Plot, VOUT = 3.3 V, VIN = 12 V,
L = 6.8 μH, COUT = 2 × 22 μF
Rev. A | Page 11 of 28
PHASE (Degrees)
Figure 38. ADP2302 Line Transient, 7 V to 15 V, VOUT = 3.3 V, IOUT = 2 A,
L = 6.8 μH, COUT = 2 × 22 μF
MAGNITUDE (dB)
Figure 35. ADP2303 Line Transient, 7 V to 15 V, VOUT = 3.3 V, IOUT = 3 A,
L = 4.7 μH, COUT = 2 × 47 μF
–180
08833-039
2
08833-038
3
08833-035
3
CH1 20.0mV BW CH2 10.0V BW
CH3 5.00V BW
MAGNITUDE (dB)
SW
180
80
180
64
144
64
144
48
108
48
108
32
72
32
72
16
36
16
36
0
0
0
0
–16
–36
–32
–72
–48
–108
–144
–64
–180
–80
1k
10k
100k
FREQUENCY (Hz)
1M
–32
–72
–48
–108
1k
Figure 40. ADP2302 Bode Plot, VOUT = 5 V, VIN = 12 V,
L = 6.8 μH, COUT = 2 × 22 μF
10k
100k
FREQUENCY (Hz)
1M
–180
Figure 42. ADP2303 Bode Plot, VOUT = 2.5 V, VIN = 12 V,
L = 3.3 μH, COUT = 2 × 47 μF
180
80
180
64
144
64
144
48
108
48
108
32
72
32
72
16
36
16
36
0
0
0
0
PHASE (Degrees)
MAGNITUDE (B/A) (dB)
80
–16
–36
–32
–72
–48
–108
–144
–64
–180
–80
CROSS FREQUENCY = 19kHz
PHASE MARGIN = 59°
–64
–80
1k
10k
100k
FREQUENCY (Hz)
1M
08833-041
MAGNITUDE (dB)
–144
CROSS FREQUENCY = 26kHz
PHASE MARGIN = 65°
–16
–36
–32
–72
–48
–108
Figure 41. ADP2303 Bode Plot, VOUT = 3.3 V, VIN = 12 V,
L = 4.7 μH, COUT = 2 × 47 μF
–144
CROSS FREQUENCY = 28kHz
PHASE MARGIN = 65°
1k
10k
100k
FREQUENCY (Hz)
1M
Figure 43. ADP2303 Bode Plot, VOUT = 5 V, VIN = 12 V,
L = 4.7 μH, COUT = 47 μF
Rev. A | Page 12 of 28
PHASE (B–A) (Degeres)
–80
–36
–180
08833-143
CROSS FREQUENCY = 32kHz
PHASE MARGIN = 59°
–64
–16
08833-142
PHASE (Degrees)
MAGNITUDE (B/A) (dB)
80
PHASE (B–A) (Degeres)
Data Sheet
08833-040
MAGNITUDE (dB)
ADP2302/ADP2303
Data Sheet
ADP2302/ADP2303
FUNCTIONAL BLOCK DIAGRAM
VIN
VIN
2
THERMAL
SHUTDOWN
SHUTDOWN
LOGIC
UVLO
SHUTDOWN IC
1.20V
OFF
CURRENT
SENSE AMPLIFIER
OCP
EN 3
1.2µA
OVP
0.880V
BOOT
REGULATOR
CURRENT
LIMIT
THRESHOLD
R
1
BST
Q
S
VBIAS = 1.1V
PGOOD 4
0.680V
8
RAMP
GENERATOR
SW
VOUT
CLK
GENERATOR
FREQUENCY FOLDBACK
(⅛ fSW, ¼ fSW, ½ fSW, fSW)
NC 6
gm
5
0.8V VOLTAGE
REFERENCE
FB
ADP2302/ADP2303
7
GND
Figure 44. Functional Block Diagram
Rev. A | Page 13 of 28
08833-042
ON
ADP2302/ADP2303
Data Sheet
THEORY OF OPERATION
The ADP2302/ADP2303 are nonsynchronous, step-down,
dc-to-dc regulators, each with an integrated high-side power
MOSFET. The high switching frequency and 8-lead SOIC
package provide a small, step-down, dc-to-dc regulator
solution.
The ADP2302/ADP2303 can operate with an input voltage from
3.0 V to 20 V while regulating an output voltage down to 0.8 V.
The ADP2302 can provide 2 A maximum continuous output
current, and the ADP2303 can provide 3 A maximum
continuous output current.
BASIC OPERATION
The ADP2302/ADP2303 use the fixed-frequency, peak currentmode PWM control architecture from medium to high loads,
but shift to a pulse-skip mode control scheme at light loads to
reduce the switching power losses and improve efficiency. When
these devices operate in fixed-frequency PWM mode, output
regulation is achieved by controlling the duty cycle of the integrated
MOSFET. While the devices are operating in pulse-skip mode at
light loads, the output voltage is controlled in a hysteretic
manner with higher output ripple. In this mode of operation, the
regulator periodically stops switching for a few cycles, thus
keeping the conversion losses minimal to improve efficiency.
PWM MODE
In PWM mode, the ADP2302/ADP2303 operate at a fixed
frequency, set by an internal oscillator. At the start of each
oscillator cycle, the MOSFET switch is turned on, providing a
positive voltage across the inductor. The inductor current
increases until the current-sense signal crosses the peak
inductor current threshold that turns off the MOSFET switch;
this threshold is set by the error amplifier output. During the
MOSFET off time, the inductor current declines through the
external diode until the next oscillator clock pulse comes and a
new cycle starts.
POWER SAVING MODE
To achieve higher efficiency, the ADP2302/ADP2303 smoothly
transition to the pulse-skip mode when the output load decreases
below the pulse-skip current threshold. When the output voltage dips below the regulation, the ADP2302/ADP2303 enter
PWM mode for a few oscillator cycles until the voltage increases
to regulation range. During the idle time between bursts, the
MOSFET switch is turned off, and the output capacitor supplies
all the output current.
Because the pulse-skip mode comparator monitors the internal
compensation node, which represents the peak inductor current
information, the average pulse-skip load current threshold
depends on the input voltage (VIN), the output voltage (VOUT),
the inductor, and the output capacitor.
Because the output voltage occasionally dips below regulation
and then recovers, the output voltage ripple in the power saving
mode is larger than the ripple in the PWM mode of operation.
BOOTSTRAP CIRCUITRY
The ADP2302/ADP2303 each have an integrated boot regulator,
which requires that a 0.1 μF ceramic capacitor (X5R or X7R) be
placed between the BST and SW pins to provide the gate drive
voltage for the high-side MOSFET. There is at least a 1.2 V
difference between the BST and SW pins to turn on the high-side
MOSFET. This voltage should not exceed 5.5 V in case the BST
pin is supplied with the external voltage source through a diode.
The ADP2302/ADP2303 generate a typical 5.0 V bootstrap voltage
for the gate drive circuit by differentially sensing and regulating
the voltage between the BST and SW pins. There is a diode
integrated on the chip that blocks the reverse voltage between the
VIN and BST pins when the MOSFET switch is turned on.
PRECISION ENABLE
The ADP2302/ADP2303 provide a precision enable circuit that
has 1.2 V reference threshold with 100 mV hysteresis. When the
voltage at the EN pin is greater than 1.2 V (typical), the part is
enabled. If the EN voltage falls below 1.1 V (typical), the chip
is disabled. The precision enable threshold voltage allows the
ADP2302/ADP2303 to be easily sequenced from other input/
output supplies. It also can be used as a programmable UVLO
input by using a resistive divider. An internal 1.2 μA pull-down
current prevents errors if the EN pin is left floating.
INTEGRATED SOFT START
The ADP2302/ADP2303 have an internal digital soft start
circuitry to limit the output voltage rise time and reduce
the inrush current at power up. The soft start time is fixed at
2048 clock cycles.
CURRENT LIMIT
The ADP2302/ADP2303 include current-limit protection circuitry
to limit the amount of positive current flowing through the highside MOSFET switch. The positive current limit on the power
switch limits the amount of current that can flow from the input
to the output.
SHORT-CIRCUIT PROTECTION
The ADP2302/ADP2303 include frequency foldback to prevent
output current runaway when there is a hard short on the output.
The switching frequency is reduced when the voltage at the FB pin
drops below a certain value, which allows more time for the
inductor current to decline, but increases the ripple current while
regulating the peak current. This results in a reduction in average
output current and prevents output current runaway. The correlation between the switching frequency and the FB pin voltage
is shown in Table 5.
Rev. A | Page 14 of 28
Data Sheet
ADP2302/ADP2303
Table 5. Correlation Between fSW and VFB
OVERVOLTAGE PROTECTION (OVP)
FB Pin Voltage
VFB ≥ 0.6 V
0.4 V < VFB < 0.6 V
0.2 V < VFB ≤ 0.4 V
VFB ≤ 0.2 V
The ADP2302/ADP2303 provide an overvoltage protection
feature to protect the system against an output short to a higher
voltage supply. If the feedback voltage is above 0.880 V, the
internal high-side MOSFET is turned off, until the voltage at FB
decreases to 0.850 V. At that time, the ADP2302/ADP2303
resume normal operation.
Switching Frequency
fSW
1/2 fSW
1/4 fSW
1/8 fSW
When a hard short (VFB ≤ 0.2 V) is removed, a soft start cycle
is initiated to regulate the output back to its level during normal
operation, which helps to limit the inrush current and prevent
possible overshoot on the output voltage.
UNDERVOLTAGE LOCKOUT (UVLO)
The ADP2302/ADP2303 have fixed, internally set undervoltage
lockout circuitry (UVLO). If the input voltage drops below
2.4 V, the ADP2302/ADP2303 shut down and the MOSFET
switch turns off. After the voltage rises above 2.7 V, the soft
start period is initiated, and the part is enabled.
THERMAL SHUTDOWN (TSD)
If the ADP2302/ADP2303 junction temperature rises above 150C,
the thermal shutdown circuit disables the chip. Extreme junction
temperature can be the result of high current operation, poor
circuit board design, or high ambient temperature. A 15C
hysteresis is included so that when thermal shutdown occurs,
the ADP2302/ADP2303 do not return to operation until the onchip temperature drops below 135C. When the devices recover
from thermal shutdown, a soft start is initiated.
POWER GOOD
The PGOOD pin is an active high, open-drain output and
requires a resistor to pull it up to a voltage (
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