ADP3301AR-33

a High Accuracy anyCAP™* 100 mA Low Dropout Linear Regulator ADP3301 FUNCTIONAL BLOCK DIAGRAM ADP3301 OUT CC R1 IN THERMAL PROTECTION Q2 SD BANDGAP REF GND DRIVER Q1 FEATURES High Accuracy (Over Line and Load Regulations at +25 C): 0.8% Ultralow Dropout Voltage: 100 mV Typical @ 100 mA Requires Only CO = 0.47 F for Stability anyCAP™* = Stable with All Types of Capacitors Current and Thermal Limiting Low Noise Dropout Detector Low Shutdown Current: 1 A Several Fixed Voltage Options 3.0 V to 12 V Supply Range –20 C to +85 C Ambient Temperature Range Thermally Enhanced SO-8 Package Excellent Line and Load Regulations APPLICATIONS Cellular Telephones Notebook, Palmtop Computers Battery Powered Systems Portable Instruments Post Regulator for Switching Supplies Bar Code Scanners GENERAL DESCRIPTION ERR Gm R2 The ADP3301 is a member of the ADP330x family of precision low dropout anyCAP™* voltage regulators. The ADP3301 stands out from the conventional LDOs with a novel architecture, an enhanced process and a new package. Its patented design includes a noninverting wideband driver and a stage that permits the use of an internal “pole splitting” capacitor to stabilize the feedback loop with a single output capacitor as small as 0.47 µF. This device is stable with any type of capacitor regardless of its ESR (Equivalent Serial Resistance) value, including ceramic types (MLCC) for space restricted applications. The ADP3301 achieves exceptional accuracy of ± 0.8% at room temperature and ± 1.4% overall accuracy over temperature, line and load regulations. The dropout voltage of the ADP3301 is only 100 mV (typical) at 100 mA. In addition to the new architecture and process, ADI’s new proprietary thermally enhanced package (Thermal Coastline) can handle 1 W of power dissipation without external heat sink or large copper surface on the PC board. This keeps PC board real estate to a minimum and makes the ADP3301 very attractive for use in portable equipment. *anyCAP is a trademark of Analog Devices Inc. The ADP3301 operates with a wide input voltage range from 3 V to 12 V and delivers a load current in excess of 100 mA. It features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP330x anyCAP™* LDO family offers a wide range of output voltages and output current levels from 50 mA to 300 mA: ADP3300 (50 mA, SOT-23) ADP3302 (100 mA, Dual Output) ADP3304 (100 mA, Dual Output with Separate Grounds) ADP3303 (200 mA) ADP3306 (300 mA) NR 3 ADP3301-5.0 VIN C1 0.47µF ERR 6 5 4 7 8 IN 1 OUT 2 VOUT = +5V R1 330kΩ EOUT C2 0.47µF ON OFF GND Figure 1. Typical Application Circuit R EV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 ADP3301–xx–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ T = –20 C to +85 C, V A IN = 7 V, CIN = 0.47 F, COUT = 0.47 F, unless otherwise noted)1 Min Typ Max Units Parameter OUTPUT VOLTAGE ACCURACY Symbol VOUT Conditions VIN = Nom VOUT +0.3 V to 12 V IL = 0.1 mA to 100 mA TA = +25°C VIN = Nom VOUT +0.3 V to 12 V IL = 0.1 mA to 100 mA VIN = Nom VOUT +0.3 V to 12 V TA = +25°C IL = 0.1 mA to 100 mA TA = +25°C IL = 100 mA IL = 0.1 mA VIN = 2.5 V IL = 0.1 mA VOUT = 98% of VO Nominal IL = 100 mA IL = 10 mA IL = 1 m A ON OFF 0 < VSD < 5 V 5 ≤ VSD ≤ 12 V @ VIN = 12 V VSD = 0, VIN = 12 V TA = +25°C VSD = 0, VIN = 12 V TA = +85°C TA = +25°C @ VIN = 12 V TA = +85°C @ VIN = 12 V VEO = 5 V ISINK = 400 µA VIN = Nom VOUT + 1 V VIN = 12 V, IL = 100 mA T = 10 ms f = 10 Hz–100 kHz CNR = 0 CNR = 10 nF, CL = 10 µF –0.8 –1.4 0.024 0.014 0.85 0.18 0.6 0.1 0.02 0.003 2.0 0.9 0.9 +0.8 +1.4 % % mV/V mV/mA LINE REGULATION LOAD REGULATION GROUND CURRENT GROUND CURRENT IN DROPOUT DROPOUT VOLTAGE ∆VO ∆VIN ∆VO ∆ IL IGND IGND VDROP 2 0.3 1.2 0.2 0.07 0.03 0.3 1 22 1 5 2 4 13 mA mA mA V V V V V µA µA µA µA µA µA µA V mA %/W µV rms µV rms SHUTDOWN THRESHOLD SHUTDOWN PIN INPUT CURRENT GROUND CURRENT IN SHUTDOWN MODE VTHSD ISDIN IQ OUTPUT CURRENT IN SHUTDOWN MODE ERROR PIN OUTPUT LEAKAGE ERROR PIN OUTPUT “LOW” VOLTAGE PEAK LOAD CURRENT THERMAL REGULATION OUTPUT NOISE @ 5 V OUTPUT IOSD IEL VEOL ILDPK ∆VO VO VNOISE 0.13 200 0.015 100 30 0.3 NOTES 1 Ambient temperature of +85 °C corresponds to a typical junction temperature of +125 °C under typical full load test conditions. Specifications subject to change without notice. – 2– REV. 0 ADP3301 ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V Error Flag Output Voltage . . . . . . . . . . . . . . . –0.3 V to +16 V Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . –0.3 V to +5 V Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . –55°C to +125°C Operating Junction Temperature Range . . . –55°C to +125°C θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C *This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Pin 1&2 Mnemonic OUT Function Output of the Regulator, fixed 2.7, 3.0, 3.2, 3.3 or 5 volts output voltage. Bypass to ground with a 0.47 µF or larger capacitor. Pins 1 and 2 must be connected together for proper operation. Noise Reduction Pin. Used for further reduction of the output noise. (See text for details.) No connection if not used. Ground Pin. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this pin should be connected to the input pin. Open Collector Output which goes low to indicate that the output is about to go out of regulation. Regulator Input. Pins 7 and 8 must be connected together for proper operation. 3 NR 4 5 GND SD ORDERING GUIDE 6 Package Option* 7&8 ERR Model ADP3301AR-2.7 ADP3301AR-3 ADP3301AR-3.2 ADP3301AR-3.3 ADP3301AR-5 Voltage Output 2.7 V 3.0 V 3.2 V 3.3 V 5.0 V IN SO-8 SO-8 SO-8 SO-8 SO-8 PIN CONFIGURATION Contact the factory for the availability of other output voltage options. *SO = Small Outline. OUT 1 OUT 2 NR 3 8 IN Other Members of anyCAP™* Family 1 ADP3301 7 IN Model ADP3300 ADP3302 ADP3304 ADP3303 ADP3306 Output Current 50 mA 100 mA 100 mA 200 mA 300 mA Package Option2 SOT-23 SO-8 SO-8 TOP VIEW 6 ERR (Not to Scale) 5 SD GND 4 PIN FOR 5V DEVICE Comments High Accuracy Dual Output Dual Output with Separate Grounds SO-8 High Accuracy SO-8,TSSOP-14 High Accuracy, High Current NOTES 1 See individual data sheets for detailed ordering information. 2 SO = Small Outline, SOT = Surface Mount, TSSOP = Thin Shrink Small Outline. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3301 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. 0 –3– ADP3301–Typical Performance Characteristics 5.0003 5.0000 OUTPUT VOLTAGE – Volts IL = 0mA IL = 10mA OUTPUT VOLTAGE – Volts 5.00075 5.00000 4.99925 4.99850 4.99775 4.99700 4.99625 4.99550 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD – mA VOUT = 5V VIN = 7V GROUND CURRENT – mA 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 1.2 2.4 3.6 4.8 6 7.2 8.4 9.6 10.8 12 INPUT VOLTAGE – Volts VOUT = 5V IL = 0 4.9997 4.9994 4.9991 4.9988 4.9985 VOUT = 5V 4.9982 4.9979 5.2 6 IL = 100mA IL = 50mA 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE – Volts Figure 2. Line Regulation: Output Voltage vs. Input Voltage Figure 3. Output Voltage vs. Load Current Up to 200 mA Figure 4. Quiescent Current vs. Supply Voltage 970 870 0.2 1400 1200 0.1 GROUND CURRENT – µA 770 670 570 470 370 270 170 0 10 20 30 40 50 60 70 80 90 100 OUTPUT LOAD – mA IL = 0 TO 100mA GROUND CURRENT – µA OUTPUT VOLTAGE – % 1000 IL = 100mA 800 600 400 200 0 –45 –25 –15 IL = 0 0.0 IL = 0 –0.1 –0.2 –0.3 –0.4 –45 –25 –5 15 35 55 75 95 115 135 TEMPERATURE – °C 5 25 45 65 85 105 125 TEMPERATURE – °C Figure 5. Quiescent Current vs. Load Current Figure 6. Output Voltage Variation % vs. Temperature Figure 7. Quiescent Current vs. Temperature 200 5 INPUT-OUTPUT VOLTAGE – Volts INPUT-OUTPUT VOLTAGE – Volts VOUT = 3.3V 8.0 VIN 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 1 2 3 4 3 2 INPUT VOLTAGE – Volts 1 0 INPUT-OUTPUT VOLTAGE – mV 160 4 120 3 VOUT SD = VIN OR 3V RL = 33Ω ÷ 3.3kΩ CL = 0.47µF VOUT = 3.3V 0 20 40 60 80 100 120 140 160 180 200 TIME – µs 80 2 RL = 33Ω 1 40 0 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD – mA 0 Figure 8. Dropout Voltage vs. Output Current Figure 9. Power-Up/Power-Down Figure 10. Power-Up Overshoot –4– REV. 0 ADP3301 5.02 VOUT = 5V 5.01 5.00 4.99 Volts 5.02 VOUT = 5V 5.01 Volts VOUT = 5V 0.02 CL = 0.47µF 5.01 5.00 4.99 5.00 50Ω, 0.47µF LOAD 4.99 5kΩ, 0.47µF LOAD 4.98 Volts 4.98 7.5 7.0 VIN mA 7.5 7.0 VIN I(VOUT) 100 1 0 20 40 60 80 100 120 140 160 180 200 TIME – µs 0 40 80 120 160 200 240 280 320 360 400 TIME – µs 0 200 400 600 TIME – µs 800 1000 Figure 11. Line Transient Response Figure 12. Line Transient Response Figure 13. Load Transient for 1 mA to 100 mA Pulse Volts 3.304 CL = 10µF VOUT = 3.3V VOUT = 5V 3.5 0 400 300 mA 3.3V VOUT 8 6 4 CL = 0.47µF, RL = 5kΩ Volts 3.302 3.300 3.298 Volts 5.0V 2 0 5 0 CL = 10µF, RL = 5kΩ IOUT 200 100 0 I(VOUT) 100 mA 10 0 100 200 300 TIME – µs 400 500 0 1 2 3 TIME – sec 4 5 0 40 80 120 TIME – µs 160 200 Figure 14. Load Transient for 10 mA to 100 mA Pulse Figure 15. Short Circuit Current Figure 16. Turn-On VOLTAGE NOISE SPECTRAL DENSITY – µV/ Hz 4 3 C = 0.47µF R = 33Ω ON 3.3V OUTPUT VOUT = 3.3V RIPPLE REJECTION – dB 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 50 10 2 Volts VOUT 1 0 a. 0.47µF, RL = 33kΩ b. 0.47µF, RL = 33Ω c. 10µF, RL = 33kΩ d. 10µF, RL = 33Ω VOUT = 3.3V b 0.47µF BYPASS PIN 7, 8 TO PIN 3 VOUT = 5V, CL = 0.47µF, IL = 1mA, CNR = 0 1 VOUT = 3.3V, CL = 0.47µF, IL = 1mA, CNR = 0 a c d 0.1 bd VOUT = 2.7-5.0V, CL = 10µF, IL = 1mA, CNR = 10nF 5 VSD 0 0 5 10 15 20 25 30 35 40 45 TIME – µs –100 10 ac 100 1k 10k 100k FREQUENCY – Hz 1M 10M 0.01 100 1k 10k FREQUENCY – Hz 100k Figure 17. Turn-Off Figure 18. Power Supply Ripple Rejection Figure 19. Output Noise Density REV. 0 –5– ADP3301 APPLICATION INFORMATION Thermal Overload Protection anyCAP™* The ADP3301 is very easy to use. The only external component required for stability is a small 0.47 µF bypass capacitor on the output. Unlike the conventional LDO designs, the ADP3301 is stable with virtually any type of capacitors (anyCAP™*) independent of the capacitor’s ESR (Effective Series Resistance) value. In a typical application, if the shutdown feature is not used, the shutdown pin (Pin 5) should be tied to the input pin. Pins 7 and 8 must be tied together, as well as Pins 1 and 2, for proper operation. Capacitor Selection The ADP3301 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165°C. Under extreme conditions (i.e., high ambient temperature and high power dissipation) where die temperature starts to rise above 165°C, the output current is reduced until die temperature has dropped to a safe level. Output current is restored when the die temperature is reduced. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125°C. Calculating Junction Temperature Output Capacitors: as with any micropower device, output transient response is a function of the output capacitance. The ADP3301 is stable with a wide range of capacitor values, types and ESR (anyCAP™*). A capacitor as low as 0.47 µF is all that is needed for stability. However, larger capacitors can be used if high output current surges are anticipated. The ADP3301 is stable with extremely low ESR capacitors (ESR ≈ 0), such as multilayer ceramic capacitors (MLCC) or OSCON. Input Bypass Capacitor: an input bypass capacitor is not required; however, for applications where the input source is high impedance or far from the input pins, a bypass capacitor is recommended. Connecting a 0.47 µF capacitor from the input pins (Pins 7 and 8) to ground reduces the circuit’s sensitivity to PC board layout. If a bigger output capacitor is used, the input capacitor should be 1 µF minimum. Low ESR capacitors offer better performance on a noisy supply; however, for less demanding requirements a standard tantalum or aluminum electrolythic capacitor is adequate. Noise Reduction Device power dissipation is calculated as follows : PD = (VIN – VOUT) ILOAD + (VIN) IGND Where ILOAD and IGND are load current and ground current, VIN and VOUT are input and output voltages respectively. Assuming ILOAD = 100 mA, IGND = 2 mA, VIN = 9 V and VOUT = 5.0 V, device power dissipation is: PD = (9 V – 5 V) 100 mA + (9 V ) 2 mA = 418 mW The proprietary package used in ADP3301 has a thermal resistance of 96°C/W, significantly lower than a standard 8-pin SOIC package at 170°C/W. Junction temperature above ambient temperature will be approximately equal to : 0.418 W × 96°C/W = 40.1°C To limit the maximum junction temperature to 125°C, maximum ambient temperature must be lower than: TA(MAX) = 125°C – 40.1°C = 84.9°C Printed Circuit Board Layout Consideration A noise reduction capacitor (CNR) can be used to further reduce the noise by 6 dB–10 dB (Figure 20). Low leakage capacitors in the 10 nF–100 nF range provide the best performance. Since the noise reduction pin (NR) is internally connected to a high impedance node, any connection to this node should be carefully done to avoid noise pickup from external sources. The pad connected to this pin should be as small as possible. Long PC board traces are not recommended. NR 3 All surface mount packages rely on the traces of the PC board to conduct heat away from the package. In standard packages the dominant component of the heat resistance path is the plastic between the die attach pad and the individual leads. In typical thermally enhanced packages, one or more of the leads are fused to the die attach pad, significantly decreasing this component. However, to make the improvement meaningful, a significant copper area on the PCB has to be attached to these fused pins. The ADP3301’s patented thermal coastline lead frame design uniformly minimizes the value of the dominant portion of the thermal resistance. It ensures that heat is conducted away by all pins of the package. This yields a very low 96°C/W thermal resistance for an SO-8 package, without any special board layout requirements, relying on the normal traces connected to the leads. The thermal resistance can be decreased by approximately an additional 10% by attaching a few square cm of copper area to the VIN pin of the ADP3301 package. ADP3301-5.0 7 VIN C1 + 1µF 5 ON OFF SD GND IN 8 ERR 4 1 OUT 2 6 CNR 10nF VOUT = 5V R1 + 330kΩ EOUT C2 10µF Figure 20. Noise Reduction Circuit –6– REV. 0 ADP3301 It is not recommended to use solder mask or silkscreen on the PCB traces adjacent to the ADP3301’s pins since it will increase the junction to ambient thermal resistance of the package. Shutdown Mode VIN = 5.5V TO 12V IN OUT VOUT = 5V/3.3V ADP3301-5.0 OUTPUT SELECT 5V 0V SD GND Applying a TTL high signal to the shutdown pin, or tying it to the input pin, will turn the output ON. Pulling the shutdown pin low, or tying it to ground, will turn the output OFF. In shutdown mode, quiescent current is reduced to less than 1 µA. Error Flag Dropout Detector IN C1 + 1.0µF OUT + C2 0.47µF The ADP3301 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. If, for example, regulation is lost by reducing the supply voltage below the combined regulated output and dropout voltages, the ERRor flag will be activated. The ERR output is an open collector, which will be driven low. Once set, the ERRor flag’s hysteresis will keep the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load. APPLICATION CIRCUITS Crossover Switch VIN = 6V TO 8V C1 47µF ADP3301-3.3 SD GND Figure 21. Crossover Switch MJE253* R1 50Ω VOUT = 5V @ 1A IN The circuit in Figure 21 shows that two ADP3301s can be used to form a mixed supply voltage system. The output switches between two different levels selected by an external digital input. Output voltages can be any combination of voltages from the Ordering Guide. Higher Output Current OUT C2 10µF ADP3301-5 SD GND ERR The ADP3301 can source up to 100 mA without any heatsink or pass transistor. If higher current is needed, an appropriate pass transistor can be used, as in Figure 22, to increase the output current to 1 A. Step-Up/Step-Down Post Regulator *AAVID531002 HEAT SINK IS USED Figure 22. High Output Current Linear Regulator The circuit in Figure 23 provides a high precision, low dropout regulated output voltage. It significantly reduces the ripple from a switching regulator. The ADP3000 used in this circuit is a switching regulator in the step-up configuration. L1 6.8µH VIN = 2.5V TO 3.5V C1 100µF 10V D1 1N5817 ADP3301-3.3 IN OUT GND 3.3V @ 100mA C2 100µF 10V R2 19.6kΩ 1% R1 120Ω ILIM VIN SW1 ADP3000-ADJ GND SW2 FB R3 10kΩ 1% C3 2.2µF Figure 23. Step-Up/Step-Down Post Regulator REV. 0 –7– ADP3301 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Pin Small Outline Package (SO-8) C2985-12-2/97 0.0196 (0.50) x 45° 0.0099 (0.25) 8° 0° 0.0500 (1.27) 0.0160 (0.41) 0.1968 (5.00) 0.1890 (4.80) 8 1 5 4 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC 0.0098 (0.25) 0.0075 (0.19) –8– REV. 0 PRINTED IN U.S.A.