Dual Bootstrapped 12 V MOSFET
Driver with Output Disable
ADP3418
FEATURES
APPLICATIONS
All-in-one synchronous buck driver
Bootstrapped high-side drive
1 PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs to
float output per Intel® VRM 10 specification
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
FUNCTIONAL BLOCK DIAGRAM
VCC
4
The ADP3418 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, the two switches in a
nonisolated, synchronous, buck power converter. Each of the
drivers is capable of driving a 3000 pF load with a 20 ns propagation delay and a 30 ns transition time. One of the drivers
can be bootstrapped, and is designed to handle the high voltage
slew rate associated with floating high-side gate drivers. The
ADP3418 includes overlapping drive protection to prevent
shoot-through current in the external MOSFETs. The OD pin
shuts off both the high-side and the low-side MOSFETs to prevent rapid, output capacitor discharge during system
shutdowns.
BST
1
IN 2
OVERLAP
PROTECTION
CIRCUIT
OD 3
ADP3418
6
PGND
The ADP3418 is specified over the commercial temperature
range of 0°C to 85°C, and is available in an 8-lead SOIC
package.
8
DRVH
7
SW
5
DRVL
03229-0-001
GENERAL DESCRIPTION
Figure 1. Functional Block Diagram
12V
VCC
CVCC
D1
4
ADP3418
BST
1
CBST
IN
DRVH
8
Q1
SW
7
TO INDUCTOR
DELAY
1V
DRVL
5
Q2
PGND
6
OD 3
03229-0-002
1V
Figure 2. General Application Circuit
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
ADP3418
TABLE OF CONTENTS
Specifications..................................................................................... 3
High-Side Driver ...........................................................................9
Absolute Maximum Ratings............................................................ 4
Overlap Protection Circuit...........................................................9
ESD Caution.................................................................................. 4
Application Information................................................................ 10
Pin Configuration and Function Descriptions............................. 5
Supply Capacitor Selection ....................................................... 10
Timing Characteristics..................................................................... 6
Bootstrap Circuit ........................................................................ 10
Typical Performance Characteristics ............................................. 7
PC Board Layout Considerations............................................. 10
Theory of Operation ........................................................................ 9
Outline Dimensions ....................................................................... 12
Low-Side Driver............................................................................ 9
Ordering Guide .......................................................................... 12
REVISION HISTORY
Revision A
4/04—Data Sheet Changed from Rev. 0 to Rev. A
Updated format....................................................................... Universal
Change to General Description ...........................................................1
Change to Figure 14 ..............................................................................8
Change to Ordering Guide.................................................................12
3/03—Revision 0: Initial Version
Rev. A | Page 2 of 12
ADP3418
SPECIFICATIONS
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).
VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted.
Table 1.
Parameter
SUPPLY
Supply Voltage Range
Supply Current
OD INPUT
Input Voltage High
Input Voltage Low
Input Current
Propagation Delay Time1
PWM INPUT
Input Voltage High
Input Voltage Low
Input Current
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
1
Symbol
Conditions
VCC
ISYS
BST = 12 V, IN = 0 V
1
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
1
Propagation Delay ,
1
1
2
2
Typ
Max
Unit
3
13.2
6
V
mA
V
V
µA
ns
4.15
2.8
tpdhOD
See Figure 4
20
0.8
+1
40
tpdlOD
See Figure 4
15
40
ns
0.8
+1
V
V
µA
1.8
1.0
35
3.0
2.5
45
Ω
Ω
ns
–1
3.5
–1
trDRVH
tfDRVH
Propagation Delay , 2
Min
tpdhDRVH
tpdlDRVH
trDRVL
tfDRVL
tpdhDRVL
tpdlDRVL
VBST − VSW = 12 V
VBST − VSW = 12 V
See Figure 5, VBST − VSW = 12 V,
CLOAD = 3 nF
See Figure 5, VBST − VSW = 12 V,
CLOAD = 3 nF
See Figure 5, VBST − VSW = 12 V
VBST − VSW = 12 V
20
30
ns
40
20
65
35
ns
ns
See Figure 5, CLOAD = 3 nF
See Figure 5, CLOAD = 3 nF
See Figure 5
See Figure 5
1.8
1.0
25
21
30
10
3.0
2.5
35
30
60
20
Ω
Ω
ns
ns
ns
ns
AC specifications are guaranteed by characterization, but not production tested.
For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.
Rev. A | Page 3 of 12
ADP3418
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VCC
BST
BST to SW
SW
DC
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