~ ANALOG
W DEVICES
SecondarySide,Off-Line
BatteryChargerControllers
ADP381~DP3811
I
FEATURES
Programmable Charge Current
High Precision Battery Voltage Limit
Precision 2.000 V Reference
Low Voltage Drop Current Sense: 300 mV Full Scale
Full Operation in Shorted and Open Battery Conditions
Drives Diode-Side of Optocoupler
Wide Operating Supply Range: 2.7 V to 16 V
Undervoltage Lockout
SO-8 Package
ADP3810
Internal Precision Voltage Divider for Battery Sense
Four Final Battery Voltage Options Available: 4.2 V,
8.4 V, 12.6 V, 16.8 V
ADP3811
Adjustable Final Battery Voltage
off-line applications, the output directly drives the diode side of
an optocoupler to give isolated feedback control of a primary
side PWM. The circuitry includes two gain (grJ stages, a precision 2.0 V reference, a control input buffer, an Undervoltage
Lock Out (UVLO) comparator, an output buffer and an overvoltage comparator.
The current limit amplifier senses the voltage drop across an
external sense resistor to control the average current for charging a battery. The voltage drop can be adjusted from 25 mV
to 300 mY, giving a charging current limit from 100 mA to
1.2 amps with a 0.25 .Qsense resistor. An external dc voltage
on the VCTRLinput sets the voltage drop. Because this input
is high impedance, a filtered PWM output can be used to set
the voltage.
OBS
APPLICATIONS
Battery Charger Controller for:
Lilon Batteries (ADP3810)
NiCad, NiMH Batteries (ADP3811)
OLE
As the battery voltage approaches its voltage limit, the voltage
sense amplifier takes over to maintain a constant battery voltage. The two amplifiers essentially operate in an "OR" fashion. Either the current is limited, or the voltage is limited.
The ADP3810 has internal thin-film resistors that are trimmed
to provide a precise final voltage for LiIon batteries. Four voltage options are available, corresponding to 1-4 LiIon cells as
follows: 4.2 V, 8.4 V, 12.6 V and 16.8 V.
TE
GENERAL DESCRIPTION
The ADP3810 and ADP3811 combine a programmable current
limit with a battery voltage limit to provide a constant current,
constant voltage battery charger controller. In secondary side,
FUNCTIONAL
GND
1.5MQ
Vcs
The ADP3811 omits these resistors allowing any battery voltage to be programmed with external resistors.
BLOCK DIAGRAM
VCC
VREF VSENSE
80kQ
VREF
UVLO
VCTRL
ADP3810/
ADP3811
CaMP
OUT
REV.O
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
@ Analog Devices, Inc., 1996
ADP381O/ADP3811-SPECIFICATIONS
(-40°&~nA~ +85°&,Vee= 10.0V,unlessotherwise
noted)
Symbol
Min
RL=lkQ
VCTRL
Avcs
-315
-32
0.0
74
V CTRL Pin
IBCTRL
4.2 V Option
8.4 V Option
12.6 V Option
16.8 V Option
RJN
RIN
RIN
RIN
Vos
IB
Parameter
Conditions
CURRENT SENSEI
Full-Scale Current Sense Voltage
V CTRL
Minimum Current Sense Voltage
Current Programming Input Range
Gain (VoUTNcs)
Control Input Bias Current
VOLTAGE SENSE
Accuracy2-ADP381 0
Input Resistance-ADP3810
Input Resistance-ADP3810
Input Resistance-ADP3810
Input Resistance-ADP381 0
Offset Voltage-ADP3811
Bias Current-ADP3811
= 1.2 V
0.0 V VCTRL 0.1 V
REFERENCE
Output Voltage
Accuracy
ADP3810
ADP3811
Load Regulation
Line Regulation
Output Voltage Noise
Load Current (Sourcing)
OUTPUT
Output Current
Saturation Voltage
Gain (VoUTNcOMP)
-300
-25
86
10
AVBAT
RL=lkQ
CL=0.14
=
=
=2.7 V
loUT =4 IDA, VCC-VOUT
Vcc
RL= 1 kQ
mV
mV
V
dB
nA
60
1
74
5
loUT
4
VSAT
AVOUT
2.5
2.65
2.6
POWER SUPPLY
Operating Range
Quiescent Current
Turn-Off Current
Vcc:2:2.7V
Vcc 2.5 V
IQ
1.5
0.5
OVERVOLTAGE COMPARATOR
Threshold
ADP3810
ADP3811
Response Time
Percent Above Full Scales
Percent Above Full Scales
louT from 0 mA to 2 mA
Vov%
Vov%
tr
6
6
8
2.7
+1.0
+1.8
+0.25
0.02
%
%
%
%N
J.l.Vp-p
mA
TE
0.004
35
10
6
0.1
6
mV
nA
dB
V
2.000
eN
IL
%
Q
Q
Q
Q
+2.5
10
-2.5
-1.0
-1.8
-0.25
UNDERVOLTAGELOCKOUT
Trip Point-On
Trip Point-Off
-285
-18
1.2
+1.0
OLE
Vcc 2.7 V to 16 V
0.1 Hz to 10 Hz
Units
210k
420k
630k
840k
VREF
lLOAD 0 mA to 5 mA
Max
40
-1.0
OBS
Gain (VoUTNsENSE)3
ADP3810
Typ
0.4
mA
V
VN
2.7
V
V
16
3
1
V
mA
mA
%
%
J.I.S
NOTES
'20 kQ resistor from current sense voltage to Vcs pin.
'Applies to 4.2 V, 8.4 V, 12.6 V and 16.8 V options. Includes all error from offset voltage, bias current, resistor divider and voltage reference.
'Does not include attenuation of input resistor divider for ADP38 I O.
'0.1 lAPload capacitor required for reference operation.
'Full scale is the programmed final battery voltage: 4.2 V, 8.4 V, 12.6 V or 16.8 V for the ADP38 I 0 or 2.0 V at V SENSE
for the ADP381 I.
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
Specifications subject to change without notice.
-2-
REV.
0
ADP3810/ADP3811
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage,Vee
,.. -0.4Vto18V
VeTRL,Ves Input Range. . . . . . . . . . . . . . . . . . -0.4 V to Vee
VSENSE
Input Range (ADP381l)
-0.4 V to Vee
VSENSE
Input Range (ADP3810)
-0.4 V to 20 V
Maximum Power Dissipation. . . . . . . . . . . . . . . . . . 500 mW
Operating Temperature Range. . . . . . . . . . . -40°C to +85°C
Storage Temperature Range. . . . . . . . . . . . . -65°C to 150°C
Lead Temperature (Soldering, 10 sec) .,
.+300°C
VSENSE!1Ie
OUTI4
PIN DESCRIPTION
ORDERING GUIDE
Mnemonic
Model
Temperature
Range
Package
Option
Battery
Voltage
VSENSE
ADP3810AR-4.2
ADP3810AR-8.4
ADP3810AR-12.6
ADP3810AR-16.8
ADP3811AR
-40°C
-40°C
-40°C
-40°C
-40°C
SO-8
SO-8
SO-8
SO-8
SO-8
4.2 V
8.4 V
12.6 V
16.8 V
Adjustable
VREF
COMP
OUT
OBS
to
to
to
to
to
+85°C
+85°C
+85°C
+85°C
+85°C
IN
CONVERTER
CTRL
GND
I Function
Battery Voltage Sense Input.
Current Sense Input.
Reference Output. Nominally 2.0 V.
External Compensation Pin.
Optocoupler Current Output Drive.
DC Control Input to Set Current Limit, 0 V to 1.2 V.
Positive Supply.
Ground Pin.
Ves
VeTRL
OLE
OUT
DC/DC
V'N
I RETURN
Vee
GND
VBAT
Res
VRCS
R3
VCS
VREF
1.5MQ
BOkQ
UVLO
VCTRL
ADP38101
ADP3811
lOUT
...
OUT
...
COMP
ICc
~/c
Figure 1. Simplified
Battery Charger
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3810/ADP3811
features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
-3-
TE
ICHA~
2.0V
.,
ADP3810
ADP3811
TOP VIEW
(Not to Scale)
~
VCS 2
COMP 3
-::- BATTERY
ADP381
O/ADP3811-Typical
Performance
Characteristics
2.004
250
..
'6 2.002
>
I
W
CJ
> 200
E
I
W
150
~
0
0.14
.'!!
"0
>
I
w 0.12
CJ
>!
Vee+10V
CL=0.1pF
2.000
~z 1.998
1.994
-50
0
-25
75
0
25
50
TEMPERATURE-'C
100
-20
ffi
0.06
II:
3
0
-30I-IL
I
111111111I
Vee +10V
~
=
=10OpA
:;: 2500
c
I
CL=0.1pF
I I
~
1/1 2000
-40
II>
z
W
0
w 1500
1/1
"
I
II: -50
II:
1/1
...
5
z
-70
1k
100
10k
FREQUENCY
100k
1M
- Hz
w 1000
CJ
z
W
II:
~
500
w
II:
01
1
-294
-294
.I =+10V
.!.
Vee
=
>
R3 20kn
7-296
w
CJ
>!
w
1/1
Z
-300
....
z
w
-302
::>
CJ
OLE
=
Vee +1OV
IL=100pA
CL = 0.1pF
I
-304
-25
0
25
50
TEMPERATURE-'C
75
100
Figure 8. Full-Scale Current Sense
Voltage vs. Temperature
0.2
0.4
!z
w 1.0
~ 0.8
::>
CJ
TE
~II: 0.6
;! 0.4
CJ
0.2
10
0
10k
100
1k
FREQUENCY Hz
-
0
CONTROL
0.6
0.8
1.0
VOLTAGE, VeTRL
CeOMP",o.o1pF
TA=+25'C
Vee = +10V
80
60
"
I
Z 40
;;(
CJ
... 20
8
~
Z
W
0
0
45
90
PHASE
135
-40
6
8
10
SUPPLY VOLTAGE, Vee
12
14
- Volts
Figure 9. Full-Scale Current Sense
Voltage vs. VCC
-4-
16
180
~
10
100
i
0>
.!:
I
Ii:
~ -20
4
1.4
100
ID
2
1.2
-Volts
Figure 7. Charge Current vs. Control
Voltage
==
::>
CJ
-304
=
=20kn
00(
I
~
~
R3
Res 0.250
1.4
..
...
E 1.2
0 -298
>
w
1/1
Z
-300
....
z
W
II:
II: -302
--
~
-50
1.6
~
5> -298
100
75
0
25
50
TEMPERATURE- 'C
Figure 4. Reference Dropout Voltage
vs. Temperature
Vee +10V
R3 20kn
>
E
I -296
w
CJ
-25
-
Figure 6. Reference Noise Density
vs. Frequency
Figure 5. Reference PSRR vs.
Frequency
w
"W
II: 0.04
-50
18
6
9
12
15
LOADCURRENT mA
Figure 3. Reference Drop-Out Volt
age (VCC--VREF)
vs. Load Current
3000
I
- l..--l..--
-
~ 0.08
0
w
CJ
OBS
Figure 2. Reference Output Voltage
vs. Temperature for Two Typical Parts
/
§! 0.10
....
::>
0
...
100
0
...
0
II:
0 50
w
II:
w
"II! 1.996
CL=0.1pF-
...J
0
>
>
e=+1I\V
IL=SmA
1k
10k
100k
FREQUENCY Hz
-
225
1M
~
w
~
:c
...
Figure 10. GM1 Open-Loop Gain and
Phase
vs. Frequency
REV. 0
ADP3810/ADP3811
1.0
1.0
I
Vee=+10V
,.
~
0.5
0
0
45
90
~
w
(J)
~
:r
~~.5
w
CJ
c(
~
:J:
0
>
~
135 rJ)
w
180
1k
10k
1OOk
FREQUENCY Hz
-
Figure 11. GM2 Open-Loop Gain and
Phase vs. Frequency
=+10V
0.5
>
E
I
Ii;
If
II.
0
O~.5
N
::!1
CJ
-1.0 I
-1.5
-50
I
I
-25
I
0
25
50
TEMPERATURE-oC
I
I
75
100
T
0
25
50
TEMPERATURE-oC
75
100
2.5
T
0
TE
/"
~
./
J! 0.5
0
= 1:
...
~w 1.0
-1.5
3
6
9
12
15
18
Vee +10V
OLE
18
Figure 15. ADP3811, GM2 Offset
vs. Vcc
120
0
-50
-25
0
25
50
TEMPERATURE-oC
75
100
Figure 16. ADP3811 VSENSEBias
Current vs. Temperature
12
I I J
Vee =+10V
100If- TA=+25°C
'i! 2.0
3
6
9
12
15
SUPPLY VOLTAGE,Vee- Volts
c(
c 2.0
I
IZ
::! 1.5
II:
:::J
0
(J)
II.
O~.5
N
::!1
CJ
=+25JC
0
.I.
SUPPLY VOLTAGE,Vee- Volts
Figure 14. ADP3811 GM2 Offset vs.
Temperature
-r---
2.5
0.5
>
E
I
Ii;
If
i---
Figure 13. ADP3810 Voltage Sense
Accuracy vs. Vcc
=+25JC
-1.0
-25
-1.5
1.0
T
Vee
0
~-1.0
Figure 12. ADP3810 Voltage Sense
Accuracy vs. Temperature
OBS
1.0
gc(
0
>
-1.5 I
-50
225
1M
0.5
w
(J)
z
m~.5
w
CJ
~ -1.0
Q.
100
0
Z'
~0
c(
II:
:::J
~
:::J
..
..
I!!
TA=I+25°C
..
Vee
=+10V
50
75
10
I
IZ
::! 1.5
II:
:::J
0
(J)
:!
ID 1.0
w
0
> 6
~ 60
i=
z
c(
is 40
-
J! 0.5
0
80
1
20
rl
S
0
3
6
9
12
15
SUPPLY VOLTAGE,Vee- Volts
Figure 17. ADP3811
Current vs. Vcc
REV. 0
VSENSEBias
18
0
5.0 5.2 SA 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0
VOV%-%
Figure 18. Overvoltage
Distribution
(VOV%)
-5-
Comparator
4
2
-50
-25
0
25
TEMPERATURE
-
100
°C
Figure 19. Overvoltage
Comparator
Threshold (VOV%)vs. Temperature
ADP3810/ADP3811
0.25
240
I
VC='+10V
I
200 I- TA = +25°C
VCC+10VI
ILOAD
0.20
RL= 1kQ
=SmA
~.. 160
'"
I
I-
"'oj
~ 120
1=
z
-0:
!:i~
"'I-
0.10
I-.J
::>0
0>
580
0.05
r
40
0I
-SO
r-U
0
5.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0
OUTPUT GAIN
Figure 20.
Distribution
Output
(VOUr'VCDMP)
Gain
-
I
-25
VN
(VouTNcOMP)
OBS
.
.
I
I
I
75
100
TE
I
R3
IcHARGE=-x-xVC1RL
Res 80 kQ
=
=
Typical values are Res 0.25 Q and R3 20 kg, which result
in a charge current of 1.0 A for a control voltage of 1.0 V. The
80 kQ resistor is internal to the IC, and it is trimmed to its absolute value. The positive input of GMI is referenced to
ground, forcing the Vcs pin to a virtual ground.
The resistor Res converts the charge current into the voltage at
VRcs, and it is this voltage that GMI is regulating. The voltage
at VRcsis equal to -(R3/80 kQ) VCTRL'When VCTRLequals
1.0 V, VRcsequals -250 mY. IfVRcs falls below its programmed level (i.e., the charge current increases), the negative
input of GMI goes slightly below ground. This causes the output of GMI to source more current and drive the CaMP node
high, which forces the current, lOUT,to increase. A higher loUT
decreases the drive to the dc-dc converter, reducing the charging current and balancing the feedback loop.
As the battery approaches its final charge voltage, the voltage
loop takes over. The system becomes a voltage source, floating
the battery at constant voltage thereby preventing overcharging.
The constant voltage feature also protects the circuitry that is
actually powered by the battery from overvoltage if the battery is
removed. The voltage loop is comprised of RI, R2, GM2 and
the dc-dc converter. The [mal battery voltage is simply set by
the ratio of RI and R2 according to the following equation
.
.
.
age, VCTRL,to provide a high impedance
I
Description of Battery Charging Operation
The IC based system shown in Figure I charges a battery with a
dc current supplied by a dc-dc converter, which is most likely a
switching type supply but could also be a linear supply where
feasible. The value of the charge current is controlled by the
feedback loop comprised of Res, R3, GMI, the external dc-dc
converter and a dc voltage at the VCTRLinput. The actual
charge current is set by the voltage, VCTRL,and is dependent
upon the choice for the values of Res and R3 according to the
formula below:
OLE
The ADP3810 and ADP3811 contain the following blocks
(shown in Figure I):
Two "GM" type error amplifiers control the current loop
(GMI) and the voltage loop (GM2).
A common CaMP node is shared by both GM amplifiers
such that an RC netWork at this node helps compensate both
control loops.
A precision 2.0 V reference is used internally and is available
externally for use by other circuitry. The O.IIIF bypass capacitor shown is required for stability.
A current limited buffer stage (GM3) provides a current output, loUT,to control an external dc-dc converter. This output can directly drive an optocoupler in isolated converter
applications. The dc-dc converter must have a control scheme
such that higher lOUTresults in lower duty cycle. If this is
not the case, a simple, single transistor inverter can be used
for control phase inversion.
An amplifier buffers the charge current programming volt-
I
0
25
50
TEMPERATURE-oC
Figure 22. VSATVS.Temperature
Figure 21. Output Gain (VOUrlVCOMP)
vs. Vcc
APPLICATIONS SECTION
Functional Description
The ADP3810 and ADP3811 are designed for charging NiCad,
NiMH and Lilon batteries. Both parts provide accurate voltage
sense and current sense circuitry to control the charge current
and final battery voltage. Figure I shows a simplified battery
charging circuit with the ADP3810/ADP3811 controlling an
external dc-dc converter. The converter can be one of many
different types such as a Buck converter, Flyback converter or a
linear regulator. In all cases, the ADP38 I0/ADP38 I I maintains
accurate control of the current and voltage loops, enabling the
use of a low cost, industry standard dc-dc converter without
compromising system performance. Detailed realizations of
complete circuits including the dc-dc converter are included
later in this data sheet.
input.
. An UVLO circuit shuts down the GM amplifiers and the
.
I
z~
0'0
1=>
-0:1
II: I- 0.15
::>"
output when the supply voltage (Vcd fallsbelow 2.7 V. This
protects the charging system from indeterminate operation.
A transient overshoot comparator quickly increases loUT
when the voltage on the "+" input of GM2 rises over 120 mV
above VREF'This clamp shuts down the dc-dc converter to
quickly recover from overvoltage transients and protect external circuitry.
(VREF
=2.000
V):
VBAT =2.000VX(;~+I)
If the battery voltage rises above its programmed voltage,
VSENSEis pulled above VREF' This causes GM2 to source more
current, raising the CaMP node voltage and loUT' As with the
-6-
REV. 0
ADP3810/ADP3811
current loop, the higher louT reduces the duty cycle of the dc-dc
converter and causes the battery voltage to fall, balancing the
feedback loop.
program the VCTRLinput to set the charge current. The high
impedance of VCTRLenables the inclusion of an RC filter to integrate a PWM output into a dc control voltage.
Each GM stage is designed to be asymmetrical so that each amplifier can only source current. The outputs are tied together at
the CaMP node and loaded with an internal constant current
sink of approximately 100 IJA. Whichever amplifier sources
more current controls the voltage at the CaMP node and therefore controls the feedback. This scheme is a realization of an
analog "OR" function where GMI or GM2 has control of the
dc-dc converter and the charging circuitry. Whenever the circuit is in full current limiting or full voltage limiting, the respective GM stage sources an identical amount of current to the
fixed current sink. The other GM stage sources zero current
and is out of the loop. In the transition region, both GM stages
source some of the current to comprise the full amount of the
current sink. The high gains of GMI and GM2 ensure a
smooth but sharp transition from current control to voltage control. Figure 24 shows a graph of the transition from current to
voltage mode, that was measured on the circuit in Figure 23 as
detailed below. Notice that the current stays at its full programmed leveluntil the battery is within 200 mV of the final programmed voltage (10 V in this case), which maintains fast
charging through almost all of the battery voltage range. This
improves the speed of charging compared to a scheme that reduces the current at lower battery voltages.
Compensation
The voltage and current loops have significantly different natural and crossover frequencies in a battery charger application, so
the two loops most likely need different pole/zero feedback compensation. Figure I shows a single RC network from the
CaMP node to ground. This is primarily for low frequency
compensation (fc< 100 Hz) of the voltage loop. Since the
CaMP node is shared by both GM stages, this compensation
also affects the current loop. The internal 200 Q resistor does
change the zero location of the compensation for the current
loop with respect to the voltage loop. To provide a separate
higher frequency compensation (fc I kHz-I 0 kHz), a second
series RC may be needed. A detailed calculation of the compensation values is given later in this data sheet.
ADP3810 and ADP3811 Differences
The main difference between the ADP381 0 and the ADP3811
is illustrated in Figure I. The resistors RI and R2 are external
for the ADP3811 and internal for the ADP3810. The ADP3810
is specifically designed for Lilon battery charging, and thus, the
internal resistors are precision thin-film resistors laser trimmed
for Lilon cell voltages. Four different final voltage options are
available in the ADP3810: 4.2 V, 8.4 V, 12.6 V, and 16.8 V.
For slightly different voltages to accommodate different LiIon
chemistries, please contact the factory. The ADP3811 does not include the internal resistors, allowing the designer to choose any
final battery voltage by appropriately selecting the external resistors. Because the ADP381 0 is specifically for Lilon batteries,
the reference is trimmed to a tighter accuracy specification of
:tl % instead of:t2% for the ADP3811.
OBS
-
OLE
The second element in a battery charging system is some form
of a dc-dc converter. To achieve high efficiency, the dc-dc converter can be an isolated off-line switching power supply, or it
can be an isolated or nonisolated Buck or other type of switching power supply. For lower efficiency requirements, a linear
regulator fed from a wall adapter can be used. In the above discussion, the current, loUT,controls the duty cycle of a switching
supply; but in the case of the linear regulator, louT controls the
pass transistor drive. Examples of these topologies are shown
later in this data sheet. If an off-line supply such as a flyback
converter is used, and isolation between the control logic and
the ADP3810/ADP3811 is required, an optocoupler can be inserted between the ADP38 10/ADP38 I I output and the control
input of the primary side PWM.
Charge Termination
If the system is charging a Lilon battery, the main criteria to determine charge termination is the absolute battery voltage. The
ADP3810, with its accurate reference and internal resistors, accomplishes this task. The ADP3810's guaranteed accuracy
specification of :t I % of the final battery voltage ensures that a
Lilon battery will not be overcharged. This is especially important with Lilon batteries because overcharging can lead to catastrophic failure. It is also important to insure that the battery be
charged to a voltage equal to its optimal final voltage (typically
4.2 V per cell). Stopping at less than I % of full-scale results in
a battery that has not been charged to its full mAh capacity,
reducing the battery's run time and the end equipment's operating time.
The ADP3810/ADP3811 does not include circuitry to detect
charge
termination
criteria
such as -!::'v/!:J.t or !:J.T/!:J.t,which
are
common for NiCad and NiMH batteries. If such charge termination schemes are required, a low cost micro controller can be
added to the system to monitor the battery voltage and temperature. A PWM output from the microcontroller can subsequently
REV. 0
TE
VCTRLInput and Charge Current Programming Range
The voltage on the VCTRLinput determines the charge current
level. This input is buffered by an internal single supply amplifier (labeled BUFFER) to allow easy programmability of VCTRL.
For example, for a fixed charge current, VCTRLcan be set by a
resistor divider from the reference output. If a microcontroller
is setting the charge current, a simple RC filter on VCTRL
enables
the voltage to be set by a PWM output from the micro. Of
course, a digital-to-analog converter could also be used, but the
high impedance input makes a PWM output the economical
choice. The bias current of VCTRLis typically 25 nA, which
flows out of the pin.
The guaranteed input voltage range of the buffer is from 0.0 V
to 1.2 V. When VCTRLis in the range of 0.0 V to 0.1 V, the output of the internal amplifier is fixed at 0.1 V. This corresponds
to a charge current of 100 mA for Res 0.25Q, R3 = 20kQ.
The graph of charge current versus VCTRLin Figure 7 shows this
relationship. Figure I shows a diode in series with the buffer's
output and a 1.5 MQ resistor from VREFto this output. The
diode prevents the amplifier from sinking current, so for small
input voltages the buffer has an open output. The 1.5 MQ
resistor forms a divider with the internal 80 kQ resistor to fix the
output at 0.1 V, i.e., about 10% of the maximum current. This
corresponds to the typical trickle charge current level for NiCad
batteries. When VCTRLrises above 0.1 V, the buffer sources
current and the output follows the input. The total range of
VCTRLfrom 0.0 V. to 1.2 V results in a charge current range
from 100 mA to 1.2 A (for Res 0.25 Q, R3 = 20 kQ). Larger
=
=
-7-
DP3810/ADP3811
large current levels can be obtained by either reducing the
Ilue of Res or increasing the value of R3. The main penalty of
Icreasing R3 is lower efficiency due to the larger voltage drop
:ross Res, and the penalty of decreasing Res is lower accuracy
Jut higher efficiency) as discussed below.
'REFOutput
l1e internal band gap reference is not only used internally for
he voltage and current loops, but it is also available externally if
IIIaccurate voltage is needed. The reference employs a pnp
mtput transistor for low dropout operation. Figure 3 shows a
ypical graph of dropout voltage versus load current. The refer~nceis guaranteed to source 5 mA with a dropout voltage of
iOOmV or less. The 0.11lF capacitor on the reference pin is integral in the compensation of the reference and is therefore required for stable operation. If desired, a larger value of capacitance
can also be used for the application, but a smaller value should
not be used. This capacitor should be located close to the VREF
pin. Additional reference performance graphs are shown in Figures 2 through 6.
OBS
the ADP3810 is specified with respect to the final battery voltage. This is tested in a full feedback loop so that the single accuracy specification given in the specification table accounts for
all of the errors mentioned above. For the ADP3811, the resistors are external, so the final voltage accuracy needs to be determined by the designer. Certainly, the tolerance of the resistors
has a large impact on the final voltage accuracy, and I % or better is recommended.
Supply Range
The supply range is specified from 2.7 V to 16 V. However, a
final battery voltage option for the ADP38 I0 is 16.8 V. The
16.8 V is divided down by the thin film resistors to 2.0 V internally. Thus, the input to GM2 never sees much more than 2.0 V,
which is well below the Vcc voltage limit. In fact, Vcc can be
fixed to 2.7 V and the ADP3810 will still control the charging of
a 16.8 V battery stack. The ADP38 I I, with external resistors,
can charge batteries to voltages well in excess of its supply voltage. However, if the final battery voltage is above 16 V, Vcc
cannot be supplied directly from the battery as it is in Figure I.
Alternative circuits must be employed as will be discussed later.
Decoupling capacitors should be located close to the supply pin.
The actual value of the capacitors depends on the application,
but at the very least a 0.11lF capacitor should be used.
OLE
Output Stage
The output stage performs two important functions. It is a
buffer for the compensation node, and as such, it has a high impedance input. It is also a GM stage. The OUT pin is a current
output to enable the direct drive of an optocoupler for isolated
applications. The gain from the COMP node to the OUT pin is
approximately 5 mAN. With a load resistor of I ill, the voltage
gain is equal to five as specified in the data sheet. A different
load resistor results in a gain equal to RLx (5 rnNV). Figures
20 and 21 show how the gain varies from part to part and versus
the supply voltage, respectively. The guaranteed output current
is 5 IDA,which is much more than the typical I mA to 2 mA required in most applications.
TE
OFF-UNE, ISOLATED, FLYBACK BATIERY CHARGER
The ADP3810 and ADP38 I I are ideal for use in isolated chargers. Because the output stage can directly drive an optocoupler,
feedback of the control signal across an isolation barrier is a
simple task. Figure 23 shows a complete flyback battery charger
with isolation provided by the flyback transformer and the
optocoupler. The essential operation of the circuit is not much
different from the simplified circuit described in Figure I. The
GMI loop controls the charge current, and the GM2 loop controls the final battery voltage. The dc-dc converter block is
comprised of a primary side PWM circuit and flyback transformer, and the control signal passes through the optocoupler.
Current Loop Accuracy Considerations
The accuracy of the current loop is dependent on several factors
such as the offset ofGMI, the offset of the VCTRLbuffer, the ratio of the internal 80 k.Qcompared to the external 20 k.Qresistor, and the accuracy of Res. The specification for current loop
accuracy states that the full-scale current sense voltage, VRcs,of
-300 mV is guaranteed to be within IS mV of this value. This
assumes an exact 20 k,Qresistor for R3. Any errors in this resistor will result in further errors in the charge current value. For
example, a 5% error in resistor value will add a 5% error to the
charge current. The same is true for Res, the current sense resistor. Thus, I % or better resistors are recommended.
The circuit in Figure 23 incorporates all of the features necessary to assure long battery life with rapid charging capability.
By using the ADP3810 for charging uIon batteries, or the
ADP38 I I for NiCad and NiMH batteries, component count is
minimized, reducing system cost and complexity. With the circuit as presented or with its many possible variations, designers
no longer need to compromise charging performance and battery life to achieve a cost effective system.
As mentioned above, decreasing the value of Res increases the
charge current. Since it is VRcsthat is specified, the actual
value of Res is not accounted for in the specification.An example
where Res 0.1 .Qillustrates its impact on the accuracy of the
charge current. The range ofVRcs is from -25 mV:t 5 mV to
-300 mV:t 15 mY. This results in a charge current range from
250 mA:t 50 mA to 3 A:t 150 IDA,as opposed to a charge current range of 100 mA:t 20 mA to 1.2 A:t 60 mA for Res
0.25.Q. Thus, not only is the minimum current changed, but
the absolute variation around the set point is increased (although
the percentage variation is the same).
Primary Side Considerations
A typical current-mode flyback PWM controller was chosen for
the primary control circuit for several reasons. First and most
importantly, it is capable of operating from very small duty
cycles to near the maximum designed duty cycle. This makes it
a good choice for a wide input ac supply voltage variation requirement, which is usually between 70 V-270 V ac for world
wide applications. Add to that the additional requirement of
0% to 100% current control, and the PWM duty cycle must
have a wide range. This charger achieves these ranges while
maintaining stable feedback loops.
Voltage Loop Accuracy Considerations
The accuracy of the voltage loop is dependent on the offset of
GM2, the accuracy of the reference voltage, the bias current of
GM2 through Rl and R2, and the ratio of RlIR2. For the demanding application of charging uIon batteries, the accuracy of
The detailed operation and design of the primary side PWM is
widely described in the technical literature and is not detailed
here. However, the following explanation should make clear the
reasons for the primary side component choices. The PWM frequency is set to around 100 kHz as a reasonable compromise
=
=
-8-
REV. 0
ADP3810/ADP3811
10nF
1N4148
100Q
CF2
220llF
3.3V I
CC2
O.2pF
~
.COMP
RF
3.3kQ
CF
1nF
Rc2
3O0Q
0.111F
ISENSE
1.6Q
3845
VCS
VAEF
LpA = 750llH
LSEC=7.5I1H
Figure
,1
VOUT
= +10V
CURRENT
0.1A
TO 1A
0.111F
Vcc
VAEF
VSENSE
ADP3810/ADP3811
OUT
CHARGE
CURRENT
CONTROL
VOLTAGE
VCTAl
GND
COMP
IO"I1F
OLE
23. ADP3810/ADP3811
I
~~~
RC1
10ka
OPTO COUPLER
MOC81 03
TE
Controlling an Off-Line, Flyback Battery Charger
maximum current needed to reduce the duty cycle to zero. The
difference between the 5 mA drive and the 1 mA requirement
leaves ample margin for variations in the optocoupler gain.
between inductive and capacitive component sizes, switching
losses and cost.
The primary PWM-IC circuit derives its starting Vee through a
100 kQ resistor directly from the rectified ac input. After startup, a conventional bootstrapped sourcing circuit from an auxiliary flyback winding wouldn't work, since the flyback voltage
would be reduced below the minimum Vee level specified for
the 3845 under a shorted or discharged battery condition. Therefore, a voltage doubler circuit was developed (as shown in Figure 23) that provides the minimum required Vee for the IC
across the specified ac voltage range even with a shorted battery.
Secondary Side Considerations
For the lowest cost, a current-mode flyback converter topology
is used. Only a single diode is needed for rectification
(MURD320 in Figure 23), and no filter inductor is required.
The diode also prevents the battery from back driving the
charger when input power is disconnected. A 1 mF capacitor
filters the transformer current, providing an average dc current
to charge the battery. The resistor, Res, senses the average current which is controlled via the Ves input. In this case, the
charging current has high ripple due to the flyback architecture,
so a low-pass filter (R3 and Cez) on the current sense signal is
needed. This filter has an extra inverted zero due to Rez to improve the phase margin of the loop. The 1 mF capacitor is connected between VOUTand the 0.25 Q sense resistor. To provide
While the signal from the ADP3810/ADP3811 controls the average charge current, the primary side should have a cycle by
cycle limit of the switching current. This current limit has to be
designed so that, with a failed or malfunctioning secondary circuit or optocoupler, the primary power circuit components (the
FET and transformer) won't be overstressed. In addition, during start-up or for a shorted battery, Vee to the ADP38101
ADP3811 won't be present. Thus, the primary side current
limit is the only control of the charge current. As the secondary
side Vee rises above 2.7 V, the ADP3810/ADP3811 takes over
and controls the average current. The primary side current limit
is set by the 1.6 Q current sense resistor connected between the
power NMOS transistor, IRFBC30, and ground.
additional decoupling
to ground, a 220
~
capacitor is also con-
nected to VOUT' Output ripple voltage is not critical, so the output capacitor was selected for lowest cost instead of lowest
ripple. Most of the ripple current is shunted by the parallel battery, if connected. If needed, high frequency ringing caused by
circuit parasitics can be damped with a small RC snubber across
the rectifier.
The Vee source to the ADP3810/ADP3811 can come from a direct connection to the battery as long as the battery voltage remains below the specified 16 V operating range. If the battery
voltage is less then 2.7 V (e.g., with a shorted battery, or a battery discharged below it's minimum voltage), the ADP38101
ADP3811 will be in Undervoltage Lock Out (UVLO) and will
not drive the optocoupler. In this condition, the primary PWM
circuit will run at its designed current limit. The Vee of the
ADP3810/ADP3811 can be boosted using the circuit shown in
Figure 23. This circuit keeps Vee above 2.7 V as long as the
The current drive of the ADP3810/ADP3811's output stage directly connects to the photo diode of an optocoupler with no additional circuitry. With 5 mA of output current, the output stage
can drive a variety of optocouplers. An MOC8103 is shown as
an example. The current of the photo-transistor flows through
the 3.3 kQ feedback resistor, RFB'setting the voltage at the
3845's COMP pin, thus controlling the PWM duty cycle. The
controlled switching regulator should be designed as shown so
that more LED current from the optocoupler reduces the duty
cycle of the converter. Approximately 1 mA should be the
REV. 0
VOUT
BATTERY
~
OBS
PWM
" 1% TOLERANCE
.. TX1
f = 120kHz
MAXIMUM
CHARGE
VFB
3.3ka
r::
R2
20ka"
RcS
0.25Q"
R3
20ka"
Vcc
R1
80.6ka"
R4
1.2ka
+1 CFT
1mF
100kQ
-9-
ADP3810/ADP3811
battery voltage is at least 1.5 V with a programmed charge current of 0.1 A. For a higher programmed charge current, the
battery voltagecan drop below 1.5 V, and Vee is stilI maintained
above 2.7 V. This is because of the additional energy in the
flyback transformer, which transfers more energy through the
10 nF capacitor to Vee. The 22 ~ bypass capacitor on Vee
stores the energy transferred through the 10 nF capacitor.
The Battery Charge Current vs. Battery Voltage characteristics
for four different charge current settings are given in Figure 24.
The high gain of the internal amplifiers ensures the sharp transition between current mode and voltage mode regardless of the
charge current setting. The fact that the current remains at full
charging until the battery is very close to its final voltage ensures
fast charging times.
Secondary Side Component Calculations
Design Criteria:
Charging a 6 cell NiCad battery.
Max Individual Cell Voltage: VeElLMAX
=1.67 V
Max Battery Stack Voltage:
VOMAX 6 x 1.67 V 10 V
Max Charge Current:
10MAX 1A
Max Control Voltage:
VeTRL 1 V (for IoMAX 1 A)
RsFixedValue:
Rs 20 k.Q
Picka Valuefor Rl:
Rl 80.6 k.Q
The transient performance for various turn-on and turn-off conditions is detailed in Figures 25, 26 and 27. Figure 25 shows
the output voltage when power is applied with no battery connected. As shown, the output voltage quickly rises and overshoots its set voltage. The internal comparator responds to this
and clamps the voltage giving a quick recovery. Without the internal comparator, an external zener would be required to clamp
the voltage to the LED anode. Figure 26 shows the battery current when connecting and disconnecting a battery. The actual
trace shown is the voltage across Res, which is negative for current flowing into the battery. There is an overshoot when the
battery is connected, but the loop quickly takes control and limits the average current to the programmed 0.75 A. When the
battery is removed, the current quickly returns to zero. The
solid band on the scope is due to the current rising and falling
with the switching of the PWM. The time scale is too slow to
show the detail of this. Figure 27 shows the output voltage
when a battery stack charged to 6 V is connected and then disconnected. As expected, when the battery is connected, the
voltage immediately goes to 6 V. When the battery is disconnected, the voltage returns to the programmed float voltage of
10 V. Again, a small overshoot is present that is clamped by the
internal comparator.
=
=
=
=
=
OBS
=
=
The voltage limit of 10 V is approximately 10% above the maximum fully charged voltage when -!:N/l1t termination is used.
This limit gives a second level of protection without interfering
with -I1V/l1tcharge termination.
OLE
Component Value Calculations:
Current Sense Resistor: Res VeTRLI(4 x 10MAx) 1/(4 xl)
0.25 W, 1%, 0.5 W
R2 = VREFXR1/(VOMAX-VREF)
Battery Divider, R2:
R2 2 x 80.6 k.Q/(lOV-2 V)
20.15 kQ, Pick 20.0 k.Q
=
=
=
=
=
The final voltage and charge current accuracy is dependent
upon the resistor tolerances. Choose appropriate tolerances for
the desired accuracy. One percent accuracy is recommended.
Charger Performance Summary
The charger circuit properly executes the charging algorithm exhibiting stable operation regardless of battery conditions, including an open circuit load. The circuit can charge to other battery
voltages by modifying only the battery voltage sense divider. As
would be expected, circuit efficiency is best at high battery voltages. Replacing the output blocking rectifier diode with a
Schottky would improve efficiency if the Schottky's leakage
could be tolerated, and its reverse voltage rating met the application requirement.
!
TA =+25°C
00.... NO BATTERY .... .... .... .... ....
9=; 'V,N=220VAC..
10V
10
o...
.... .... .... .... .... .... .... .... ....
2VIDIV
OV
1.0
VCTRL = 1.0V
TE
O.I..seclDIV
Figure 25. Flyback Charger Output Voltage Transient at
Power Turn On, No Battery Attached
0.9
0.8
0.7
0.6
....
-200mV
I
I =0.25V
.J.
0.4
0.3 -
10
9
.... ....... ........ .... .... ........ ....
II:
-==
II n II
TA=+25°C
VCTRL
VCTRL = O.775V
I
0.2
V,N=220VAC
VCTRL=0.125V
0.1
0.0
O.OV
VCTRL= 0.5V
J 0.5
I
-
2
3
4
0
I
",...
.... .... .... .... .... .... .... .... ....
I
6
7
8
10
O.2V1DD!I
11
20mseclDIV
Your
Figure 26. Charge Current Transient Response to Battery
Connect/Disconnect
Figure 24. Charge Current vs. Battery Voltage at Four Settings for the Flyback Charger in Figure 23
-10-
REV. 0
ADP3810/ADP3811
00""
.... TA=+25'C
V'N 220VAC
=
9!1!!!!!!!!!
!!!!!
10V
!!!! !!!!!
VCTRL
options could be used, or the ADP3811 could be substituted
with external resistors for a user set voltage. Notice the two
grounds in the circuit. One ground is for the high current return to the VINsource and the other ground for the ADP3810
circuitry. Res separates the two grounds, and it is important to
keep them separate as shown.
. .... .... .... ....
=1V
II
II
10
I
0%""
The adjustable version of the ADPI148 is used in this circuit instead of a fixed output version. The output voltage is fed back
into the VFBpin, which is set to regulate at VBAT
MAX+ 0.5 V.
Doing so provides a secondary, higher voltage limit without
interfering with normal circuit operation. The control output of
the ADP3810 is connected through a 560 Q resistor to the
SENSE+ input of the ADP1148. The current, loUT,adjusts the
dc level on the SENSE+ pin, which is added to the current
ramp across RsENSE.Higher lOUTincreases the voltage on
SENSE+ and reduces the duty cycle of the 1148, giving negative feedback.
.... ........ .... ........ ........ ....
2VIDIV
50mseclD..IV
OV
Figure 27. Output Voltage Transient Response to Battery
Connect/Disconnect
OBS
NONISOLATED TOPOLOGIES
Buck Switching Regulators
The ADP3810/ADP3811 and the ADP1148 can be combined
to create a high efficiency buck regulator battery charger as
shown in Figure 28. The ADPI148 is a high efficiency,synchronous, step-down regulator that controls two external MOSFETs
as shown. Similar to the previous flyback circuit, the ADP38 10
controls the average charge current and the final battery voltage,
and the ADPI148 controls the cycle by cycle current. The following discussion explains the functionality of the circuit but
does not go into detail on the ADP1148. For more information,
the ADP1148 data sheet details the operation of the device and
givesformulas for choosing the external components.
The resistor RSENSE
sets the cycle by cycle current limit to 1.5 A,
which is far enough above the 1 A average current of the
ADP3810 loop to avoid interfering but still provides a safe
maximum current to protect the external components. The
ADP3810 uses a 0.25 Q resistor, Res, to sense the battery current. As before, a 20 kQ resistor is needed between Res and the
Ves input of the ADP3810. The RC network from Ves to ground
performs the dual function of filtering and compensation.
The circuit as shown can quickly and safely charge Lilon batteries while maintaining high efficiency. The efficiency of the
ADP1148 is only degraded slightly by the addition of the
ADP3810 and external circuitry. The 1.5 mA of supply current
lowers the overall efficiency by approximately 1%-2% for maximum output current. The 0.25 Q sense resistor further lowers
the efficiency due to the 12x Res power loss at high output currents. See the efficiency discussion in the ADP1148 data sheet
for more information.
OLE
TE
Linear Regulator
A third charging circuit is shown in Figure 29. In this case, the
switching supply is replaced with a linear regulator. The ADP3811
drives the gate of an N-channel MOSFET using an external
2N3904. As before, the ADP3811 senses the charge current
through a 0.25 Q resistor. When the current increases above the
limit, the internal GM amplifier causes the output to go high.
This puts more voltage across R8, increasing the current in Ql.
As the current increases, the gate of Ml is pulled lower, reducing the gate to source voltage and decreasing the charge current
The voltage loop directly senses the battery voltage. Since the
ADP3810 is used in this circuit instead of the ADP3811, VSENSE to complete the feedback loop. Because the ADP3811 has a
current output, an external 1 ill resistor is needed from the
is connected directly to the battery. The internal resistors set the
OUT pin to ground in order to convert the current to a voltage.
battery voltage to 8.4 V in this case. Of course, other voltage
+V'N
+
75kQ
t.L C'N
V,N
;1PF
560Q ;100PF
P DRIVE
L'
62pH
VCC
OV NORMAL
>1.5V=SHUTDOWN
OUT
VREF
VREF
VFB
=
VSENSE
VCTRL
0.1pF
GND
100Q
SENSE+
ADP3810
ADP1148
SENSE-
Vas
VCTRL
(OV TO 1V)
SHUTDOWN
COMP
COIL TRONICS
C,
68pF
I
220PF;
D1
1060040
Rcs
0.25Q
CC1
1pF
CTX-684
KRLSL.1-C1-0R068J
Figure 28. High Efficiency Buck Battery Charger
REV.0
-'N.
N DRIVE
CC2
220nF
20kQ
...
I:
COUT'!:.
RC1
2kQ
\1
1000:F
RC2
560Q
REF & CTRL
RTN
V'N~
RTN
RSENSE'
50 mQ I VBAT
-11-
ADP3810/ADP3811
veAT
IRF7201
+V'N'
0.1pF
'!:L
q
R1
80.61ill
101ill
;1PF
VCC
VSENSE
VREF
OUT
VREF
250>2
ADP3811 vcs
RC2
VCTRL
VCTRL
R2
201ill
0.1pF
GND
560>2
CaMP
VCTRL &
VREF
RTN
CC2
220nF
220pF
~ BATTERY
11ill
R8
11ill
RCI
2000
201ill'
CCI
1pF
0.25>2'
OBS
VeAT=2.0V(!!!+1)
R2
V'N,
RTN
Figure 29. ADP3811 Controlling a Linear Battery Charger
OLE
The trade-off between using a linear regulator as shown versus
using a flyback or buck type of charger is efficiency versus simplicity. The linear charger in Figure 29 is very simple, and it
uses a minimal amount of external components. However, the
efficiency is poor, especially when there is a large delta between
the input output voltages. The power loss in the pass transistor
is equal to (Vrn-VBAT)x IeHARGE.Since the circuit is powered
from a wall adapter, efficiency may not be a big concern, but the
heat dissipated in the pass transistor could be excessive.
An important specification for this circuit is the dropout voltage,
which is the difference between the input and output voltage at
full charge current. There must be enough voltage to keep the
N-channel MOSFET on. In this case, the dropout voltage is
approximately 2.2 V for a 0.5 A output current. Two alternative
2N5058
V'N
VeAT
V'N
VeAT
charger application, the two loops need different inverted zero
feedback loop compensations that can be accomplished by two
series RC networks. One provides the needed low frequency
(typical fe < 100 Hz) compensation to the voltage loop, and the
other provides a separate high frequency (fe 1 kHz-10kHz)
compensation to the current loop. In addition, the current loop
input requires a ripple reduction filter on the Ves pin to filter
out switching noise. Instead of placing both RC networks on the
CaMP pin, the current loop network is placed between Ves and
ground as shown in Figure 23 (Cez and Rcz). Thus, it performs
two functions, ripple reduction and loop compensation.
-
TE
Loop Stability Criteria for Battery Charger Applications
1. The voltage loop has to be stable when the battery is
removed or floating.
2. The current loop has to be stable when the battery is being
charged within its specified charge current range.
3. Both loops have to be stable within the specified input source
voltage range.
ADP3811
VREF
ADP3811
OUT
ADP3811
OUT
a. P-Channel MOSFET
b. NPN Darlington
Figure 30. Alternative Pass Transistor for Linear Regulator
realizations of the pass element are shown in Figure 30. In case
(a), the pass transistor is a P-channel MOSFET. This provides
a lower dropout voltage so that VBATcan be within a few hundred millivolts of VIN. In case (b), a Darlington configuration of
two npn transistors is used. The dropout voltage of this circuit
is approximately 2 V for a 0.5 A charge current.
STABIUZATION OF FEEDBACK LOOPS
The ADP3810/ADP3811 uses two transconductance error amplifiers with "merged" output stages to create a shared compensation point (COMP) for both the current and voltage loops as
explained previously. Since the voltage and current loops have
significantly different natural crossover frequencies in a battery
Flyback Charger Compensation
Figure 31 shows a simplified form of a battery charger system
based on the off-line flyback converter presented in Figure 23.
With some modifications (no optocoupler, for example), this
model can also be used for converters such as a Buck Converter
(Figure 28) or a linear Regulator (Figure 29). GMI and GM2
are the internal GM amplifiers of the ADP3810/ADP3811, and
GM3 is the buffered output stage that drives the optocoupler.
The primary side in Figure 23 is represented here by the "Power
Stage," which is modeled as GM4, a linear voltage controlled
current source model of the flyback transformer and switch.
The "Voltage Error Amplifier" block is the internal error amplifier of the 3845 PWM-IC (RF 3.3 k.Qin Figure 23), and it is
followed by an internal resistor divider. The optocoupler is
modeled as a current controlled current source as shown. Its
output current develops a voltage, Vx, across RF. The gain values of all the blocks are defined below.
=
This linear model makes the calculation of compensation values
a manageable task. It also has the great benefit of allowing the
simulation of the ac response using a circuit simulator, such
as PSpice or MicroCap. For computer modeling, the GM
-12-
REV, 0
ADP3810/ADP3811
....
VeAT
R4
CF1
1nF
POWER
STAGE
1.21ill
Rcs
O.2SQ
R1
8O.61ill
CF2
220pF
R2
20kQ
r,Vc
COMP
GM2
2.1mAN
OBS
+SV
ADP381 01
ADP3811
OUT
-
VOLTAGE ERROR
AMPLIFIER
COMP
OLE
RC1
~CC1
Figure 31. Block Diagram of the Linearized Feedback Model
Max Battery
Stack
Voltage:
Max Charge Current:
Rs Fixed Value:
Pick a value for Rl:
Calculated Current Sense
Resistor:
Calculated Voltage Sense
Divider:
Output Filter Cap:
2nd Filter Cap:
Gain of Each Block
ADP3810/ADP381 I
Ves Input:
ADP3810/ADP3811
VSENSEInput:
ADP3810/ADP3811
Output Buffer:
Optocoupler:
Voltage Error Amplifier:
Power Stage (General):
Power Stage
(Voltage Loop):
VOMAX
IoMAx= 1 A
Rs 20 kQ
Rl =80.6 ill
1.67 V
= 10
V
=
=0.25
Res
R2
Q
The power stage gain equation is linearized based on primary
side current mode control with the flyback transformer operating with discontinuous inductor current. MOMAX
is the maximum change in output current, which is equal to IoMAX-IoMIN'
Since the minimum current is 0.0 A, MoMAX= IoMAX= 1 A. The
maximum change in control voltage is set by internal circuitry
=20 kQ
CFl
CF2
= 1 mF (ESR =0.1 Q)
=200 ~ (ESR =0.2 Q)
GMI
GM2
GM3
=8.3 mA/V
within
=2.1 mAN
=6mA/V
MOMAX
GM4
=(~
GM4
=0.091
GM4
= 1.0 AN
)I
VOMAX
V IoMAx XRWAD
AN
The gains for the ADP3810/ADP381 I GM amplifiers are based
on typical measurements of the IC's open-loop gain, and they
are expressed in units of milliamps per volt. The dc voltage gain
REV. 0
the 3845
to !:N e
= 1 V.
The
load resistor,
RLOAD' is dif-
ferent for the voltage and current loop cases. For the voltage
loop without the battery, the effective load is R4, but for the
current loop, the effective load is Res. In the current loop, the
voltage limit has not been reached, so the maximum output
voltage is equal to the maximum output current times the load
resistor. Thus, the entire expression under the square root reduces to 1.0. Substituting these values into the general equation
for the power stage yields the specific gain values shown for
GM4.
ITXoc = 0.36 mA/mA
AV2= !:NeNx = 0.333
Power Stage
(Current Loop):
=6 x
TE
of these stages is the value of GM times the load resistance. At the
COMP pin, the internal load resistance, RS, is typically400 kQ.
The optocoupler gain is the typical value taken from the
MOC8103 data sheet. The voltage error amplifier gain is due
to the resistor divider internal to the 3845 only. Vx is the output of the internal amplifier, as labeled in Figure 31. The actual
op amp is assumed to have sufficient open-loop gain and bandwidth compared to the system bandwidth; as a result, it can be
considered an ideal transimpedance amplifier. The pole created
by the 1 nF capacitor in parallel with RF is high enough in frequency to not affect the compensation.
amplifiers are represented by voltage controlled current sources,
the optocoupler by a current controlled current source, and the
error amplifier by a voltage controlled voltage source.
Design Criteria
Charging a 6 cell NiCad battery.
I VSENSE
CF
1nF
RF
3.31ill
VFe
2.0V
BOIill
VCTAl
1.0V
-13-
When calculating the loop gain for the voltage loop and the current loop, there are two main differences. First, GM2 applies
only to the voltage loop, and GMI applies only to the current
loop. Use the appropriate GM input stage for the particular
loop calculations. Second, there are three battery conditions to
consider. For the current loop, the battery is present and uncharged. Thus, the battery is modeled as a very large capacitance (greater than 1 Farad). For the voltage loop, the battery is
ADP3810/ADP3811
Step 2. Pick the voltage and current loop crossover frequencies, fev and fe/:
To avoid interference betWeen the voltage loop and the current
loop, use fcv < 1/10 offcl> the current loop crossover. The cur-
either present or absent. If the battery is present, its large capacitance creates a very low frequency dominant pole, giving a
single pole system. The more demanding case is when the battery is removed. Now the output pole is dependent upon the
filter capacitors, CPI and CP2. This pole is higher in frequency,
and more care must be taken to stabilize the loop response. All
three cases are described in detail below.
rent loop crossover
fCI is chosen
to be
-
The following calculations for compensation components help
to realize stable voltage and current loops. In practical designs,
checking the stability using a network analyzer or a Feedback
Loop Analyzer is always recommended. The calculated component values serve as good starting values for a measurementbased optimization. The component values shown in Figure 23
are slightly different from the calculated values based on this
optimization procedure.
OBS
-100 Hz.
1.9 kHz to provide
fast current limiting response time, so pick fcv
a
Step 3. Calculate GMODatfev:
The modulator gain of 46.7 dB is the dc gain. The modulator
pole reduces this gain above fPM.
GMOD(100 Hz)= GMOD(de)-20XIOg,/I+
100
0.11
( )
fpM
2
( )
GMOD (100Hz)=48.3dB-20xlog,/I+
2
fcv
=-10.9dB
To simplify the analysis further, the loop gain is split into two
components: the gain from the battery to the ADP3810/
ADP3811's CaMP pin and the gain from the CaMP pin back
to the battery. Because the compensation of each loop depends
upon the RC netWork on the CaMP pin, it is a convenient
choice for dividing the loop calculations.
Step 4. Calculate gain loss of GEAat fcv:
To have the feedback loop gain cross over 0 dB at fCv 100 Hz,
~ (100 Hz) should be +10.9 dB. Thus, the total gain loss of
~ needed at crossover is:
Definitions:
Modulator Gain:
Step 5. Determine fpneeded to achieve GLosS:
Modulator Zero:
OLE
=
GLOSS
GMOD gain in dB from the CaMP pin to
VBAT.
GEA
gain in dB from VBATto the CaMP pin.
Gwop
GMOD + ~.
fPM,The pole present at the output of the
modulator.
fzM, The zero due to the ESR, Rpl' of the
filter cap, CFI.
=
Error Amplifier:
Loop Gain:
Modulator Pole:
=
Voltage Loop Compensation,
No Battery
Step 1. Calculate the dc loop gain (GwOP),fpM'
GMOD=20xlog[GM3xITXoc
GMOD = 20 x log
fpI
= 48.3
GLOOP
fpM
]
Step 6. Calculate
=
I
2nxRplxCPI
I
2nxO.IQx1.0mF
=37.6
dB
fcv
TE
,
-1. 3Hz
GLOSS
( )-I
10
CCI based upon /po'
Ccl
dB
«PM=180-aretan
=48.5dB
=
I
2nx R5x fPl
",0.3j.LF
fcv
-
fcv
-
fcv
+aretan -
( ) { )
-areta
fpI
fpM
(fZM )"'0°
Step 8. Calculate RcI to stabilize the loop:
The sum of phase losses of the modulator and error amplifier results in a loop phase of 0°, which is unacceptable for loop stability. To stabilize the feedback loop, we have to add a phase
boosting zero to the error amplifier by inserting a resistor (Rei)
in series with the capacitor CCI. If the desired phase margin is
