Advanced Battery Management PMIC with
Inductive Boost LED and Three LDO Regulators
ADP5350
Data Sheet
FEATURES
TYPICAL APPLICATION CIRCUIT
VBUSB
C1
2.2µF
CFL1
ADP5350
SW1A
3MHz
BUCK
PGND1A
ISOS
C11
2.2µF
SCL
INT
PGOOD
I2C
AND
GPIOs
CHARGE
CONTROL
AND
FUEL
GAUGE
ISOB
BSNS
Li-Ion
THR
BATOK
VISOS
C4
+ 10µF
–
RNTC
VIN4
L2
C9
4.7µF
VISOS
C3
10µF
PGND1B
C2
4.7µF
CFL2
SDA
L1
1.5µH
SW1B
4.7µH
SW4
PGND4
VOUT4
HIGH VOLTAGE
BOOST
FB4
150mA LDO
D1
LED1
LED2
D2
LED3
LED4
D3
LED5
LED6
C10
4.7µF
VOUT2
C7
1µF
VOUT3
C8
1µF
(OR LOAD SWITCH)
150mA LDO
(OR LOAD SWITCH)
150mA LDO
D4
D5
(OR LOAD SWITCH)
Rechargeable Li-Ion and Li-Ion polymer battery-powered
devices
Portable consumer devices
Portable medical devices
Portable instrumentation devices
Wearable devices
GENERAL DESCRIPTION
The ADP5350, a power management IC (PMIC), combines one
high performance buck regulator for single Li-Ion/Li-Ion
polymer battery charging, a fuel gauge, a highly programmable
boost regulator for LED backlight illumination, and three 150 mA
LDO regulators.
The ADP5350 operates in trickle charge mode and in constant
current (CC) and constant voltage (CV) fast charge mode. It
features an internal field effect transistor (FET) that permits
battery isolation on the system power side.
The ADP5350 fuel gauge is a space-saving and low current
consuming solution. It is optimal for rechargeable Li-Ion batterypowered devices, and features a voltage-based, battery SOC
measurement function.
14797-001
VOUT1
C6
1µF
PROGRAMMABLE
LED DRIVER
VIN123
C5
2.2µF
AGND
APPLICATIONS
Rev. B
VBUSA
USB 5V
TO MCU
Switching mode USB battery charger
High accuracy and programmable charge terminal voltage
and charge current
3 MHz buck for high efficiency and small footprint
Tolerant input voltage from −0.5 V to +20 V (USB VVBUSx)
Power path control allows system to operate with dead or
missing battery
Compliant with JEITA charge temperature specification
Voltage-based state of charge (SOC) calculation algorithm
Extra low quiescent current in sleep mode
Battery impedance chemistry (Li-Ion) compensation
Battery temperature compensation
No need for external sense resistor
Boost regulator with 5-channel LED driver
Support up to 4 LED in series or in parallel
5 independent programmable LED current sinks
64 programmable LED current levels (up to 20 mA)
Programmable on and off timer for LED blinking
Adaptive headroom control to maximize the efficiency
Three 150 mA linear LDO regulators
Ultralow IQ with zero load at 1 µA typical for LDO1
Optional load-switch full turn-on mode
Full I2C programmability with dedicated interrupt pin
Figure 1.
The ADP5350 boost regulator operates at a 1.5 MHz switching
frequency. It can be operated as a constant voltage regulator or
as a supplemental constant current regulator for multiple LED
backlight drivers.
The ADP5350 LED drivers can support a wide range of LED
backlight configurations, either multiple LEDs in parallel or in
series.
The ADP5350 low dropout (LDO) regulators are optimized to
operate at low shutdown current and quiescent current to extend
battery life. The device also operates as a load switch that can be
fully turned off or on.
The I2C-compatible interface enables the programmability of all
parameters, including status bit readback for operation monitoring
and safety control.
The ADP5350 operates over the −40°C to +125°C junction
temperature range and is available in a 32-lead, 5 mm × 5 mm
LFCSP package and a 32-ball, 3 mm × 3 mm WLCSP package.
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2017–2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADP5350
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Battery Isolation FET ................................................................. 23
Applications ....................................................................................... 1
Battery Detection ....................................................................... 23
General Description ......................................................................... 1
Battery Temperature .................................................................. 24
Typical Application Circuit ............................................................. 1
Battery Charger Operational Flowchart .................................. 26
Revision History ............................................................................... 2
Battery Voltage-Based Fuel Gauge ........................................... 26
Detailed Functional Block Diagram .............................................. 3
Flowchart of SOC Calculation .................................................. 28
Specifications..................................................................................... 4
Boost and White LED Drivers .................................................. 29
Battery Charger Specifications ................................................... 4
Linear Low Dropout (LDO) Regulators .................................. 33
Battery Fuel Gauge Specifications .............................................. 6
Thermal Management ............................................................... 34
Boost and LED Driver Specifications ........................................ 7
I C Interface .................................................................................... 35
LDO Specifications ...................................................................... 8
I2C Addresses .............................................................................. 35
Recommended Input and Output Capacitance and
Inductance Specifications .......................................................... 10
SDA and SCL Pins ...................................................................... 35
I2C-Compatible Interface Timing Specifications ................... 11
Interrupts ..................................................................................... 36
Absolute Maximum Ratings .......................................................... 12
Control Register Map ..................................................................... 37
Thermal Resistance .................................................................... 12
Register Bit Descriptions ........................................................... 39
ESD Caution ................................................................................ 12
Applications Information .............................................................. 58
Pin Configuration and Function Descriptions ........................... 13
External Components ................................................................ 58
Typical Performance Characteristics ........................................... 15
PCB Layout Guidelines.............................................................. 60
Typical Waveforms ..................................................................... 19
Typical Application Circuits ..................................................... 61
Theory of Operation ...................................................................... 21
Factory-Programmable Options .................................................. 62
Battery Charger Overview......................................................... 21
Outline Dimensions ....................................................................... 63
Charger Modes............................................................................ 22
Ordering Guide .......................................................................... 63
2
Default Reset ............................................................................... 35
REVISION HISTORY
5/2018—Rev. A to Rev. B
Changes to Table 1 ............................................................................ 4
Changes to Table 3 ............................................................................ 7
Changes to Table 4 ............................................................................ 8
Change to Battery Pack Thermistor Input Section .................... 24
Change to Shutdown Current, Table 15 ...................................... 27
Changes to Figure 50 ...................................................................... 31
Change to Address 0x0C, Table 18 ............................................... 37
Change to Bits[1:0], Table 23 ........................................................ 41
Change to Bit 4 Mnemonic, Table 70 ........................................... 53
Updated Outline Dimensions ....................................................... 63
Changes to Table 1.............................................................................3
Changes to Table 4.............................................................................8
Changes to Figure 4 Caption and Table 9 Title .......................... 13
Added Figure 5; Renumbered Sequentially ................................ 14
Added Table 10; Renumbered Sequentially ................................ 14
Change to Figure 15 Caption ........................................................ 16
Change to Figure 23 Caption ........................................................ 17
Change to Figure 24 Caption ........................................................ 18
Changes to Figure 59...................................................................... 60
Updated Outline Dimensions ....................................................... 61
Changes to Ordering Guide .......................................................... 61
11/2017—Rev. 0 to Rev. A
Added CB-32-1 .............................................................. Throughout
Change to General Description ...................................................... 1
2/2017—Revision 0: Initial Version
Rev. B | Page 2 of 63
Data Sheet
ADP5350
DETAILED FUNCTIONAL BLOCK DIAGRAM
CFL1
IND_PEAK_INT
ADP5350
PEAK
CURRENT
DETECTION
HIGH VOLTAGE
BLOCKING FET
SW1B
SW1A
VBUSA
VBUSB
PGND1A
CMP
ILIM
BUCK
CONTROL
PGND1B
ISOS
ISOLATION
FET
CFL1
HIGH
VOLTAGE
FET
5.4V
TRICKLE
SOURCE
ISOB
3.9V
SCL
SDA
INT
PGOOD
CHARGE
CONTROL
BATTERY
DETECTION
SINK
I2C INTERFACE,
FUEL GAUGE
ALGORITHM
AND
LOGIC CONTROL
BSNS
12-BIT
ADC
ISOB
ISOS
BATOK
VIN4
FB4
VOUT4
SW4
25kHz
OSC
NTC
CURRENT
CONTROL
THR
0.5V
D1
HV
BOOST
D2
PGND4
VIN123
LDO1
CONTROL
D3
LED
CONTROL
D4
VOUT1
LDO2
CONTROL
D5
VOUT2
REFERENCE
BUFFER
VOUT3
CFL2
AGND
Figure 2. Detailed Functional Block Diagram
Rev. B | Page 3 of 63
14797-022
LDO3
CONTROL
ADP5350
Data Sheet
SPECIFICATIONS
BATTERY CHARGER SPECIFICATIONS
−40°C < TJ < 125°C, VVBUSx = 5.0 V, RNTC = 47 kΩ, VVIN4 = VVIN123 = VISOS= 3.6 V, C1 = 2.2 µF, C2 = 4.7 µF, C3 = 10 µF, C4 = 10 µF, C11 = 2.2 µF,
L1 = 1.5 µH, all registers are at default values, unless otherwise noted.
Table 1.
Parameter
GENERAL PARAMETERS
Undervoltage Lockout
Symbol
VUVLO
Input Current Limit
ILIM
Operation Current
IQ
Shutdown Current
CHARGING PARAMETERS
Fast Charge Current, Constant
Current Mode
Fast Charge Current Accuracy
ISTDN
ICHG
Trickle Charge Current 2
Weak Charge Current
Dead Battery, Trickle to Weak
Charge Threshold2
Weak Battery
Weak to Fast Charge Threshold2
Weak Battery Threshold
Hysteresis1
Battery Termination Voltage2
ITRK_DEAD
ICHG_WEAK
VTRK_DEAD
Battery Overvoltage Threshold
VBAT_OV
Charge Complete Current2
Recharge Voltage Differential2
Battery Node Short Threshold
Voltage2
CHARGER DC-TO-DC REGULATOR
Switching Frequency
Maximum Duty Cycle 3
Peak Inductor Current
Regulated System Voltage
IEND
VRCH
VBAT_SHR
Test Conditions/Comments
TJ = 0°C to 85°C
On BSNS, rising threshold, no VVBUSx
On BSNS, falling threshold, no VVBUSx
Set ILIM[3:0] = 100 mA
Set ILIM[3:0] = 500 mA
All enabled, no load, from VBUSx pin
Only fuel gauge enabled (active), from
ISOB, no VVBUSx
Only fuel gauge enabled (sleep), from
ISOB, no VVBUSx 1
Only boost regulator enabled, all LEDs
enabled, no LED current, from ISOB, no
VVBUS
Only LDO1 enabled, from ISOB, no
VVBUSx
Only LDO2 enabled, from ISOB, no
VVBUSx
Only LDO3 enabled, from ISOB, no
VVBUSx
All disabled, from ISOB and BSNS,
no VVBUSx
Programmable via I2C,
battery voltage > VTRK_DEAD
ICHG = 200 mA
TJ = 25°C, ICHG = 200 mA
Min
2.2
Typ
Max
Unit
2.45
2.3
92
475
4
160
2.6
V
V
mA
mA
mA
µA
100
500
6
230
4
2
2.6
mA
0.8
4
µA
160
230
µA
160
230
µA
0.2
2.8
µA
650
mA
220
+2.5
25
mA
%
mA
mA
V
25
180
−2.5
16
µA
200
20
ICHG + ITRK_DEAD
2.5
When VTRK_DEAD < VBSNS < VWEAK
On BSNS
2.4
VWEAK
ΔVWEAK
On BSNS
2.9
3.0
90
3.15
V
mV
VTRM
On BSNS, TJ = 0°C to 85°C
On BSNS, TJ = 25°C
Relative to CFL1 voltage, BSNS rising,
VCLF1 = 4.0 V
VBSNS = VTRM, TJ = 0°C to 85°C
Relative to VTRM, BSNS falling
4.158
−0.3
VCFL1 − 0.15
4.200
4.242
+0.3
V
%
V
20
35
260
2.4
50
mA
mV
V
fSW_CHG
DMAX
IL1_PK
VISOS_TRK
2.3
2.7
1500
VBSNS < VTRK_DEAD, trickle charge mode
Rev. B | Page 4 of 63
3
96
1750
VTRM + 0.1
2.62
2.52
3.3
2200
MHz
%
mA
V
Data Sheet
Parameter
DC to DC Power
PMOS On Resistance
NMOS On Resistance
SW1x Pin Leakage Current
BATTERY ISOLATION FIELD EFFECT
TRANSISTOR (FET)
LFCSP Package
WLCSP Package
ADP5350
Symbol
RDSON_P
RDSON_N
ISW1x
VISOS_FC
Battery Supplementary Threshold
HIGH VOLTAGE BLOCKING FET
VBUSx Input
High Voltage Blocking FET On
Resistance
Current, Suspend Mode
Input Voltage
Power-Good Threshold
Rising
Falling
Overvoltage Threshold
Overvoltage Threshold
Hysteresis
THERMAL CONTROL
Thermal Early Warning
Temperature1
Thermal Shutdown Temperature1
THERMISTOR CONTROL
Resistance Thresholds by Battery
Temperature4
LFCSP Package
Cool to Cold
Cold to Cool
Typical to Cool 4
Cool to Typical4
Warm to Typical4
Typical to Warm4
Hot to Warm
Warm to Hot
WLCSP Package
Cool to Cold
Cold to Cool
Typical to Cool4
Cool to Typical4
Warm to Typical4
Typical to Warm4
Hot to Warm
Warm to Hot
Test Conditions/Comments
Min
Typ
Max
Unit
220
160
280
210
2
mΩ
mΩ
µA
3.15
202
125
3.3
300
170
3.45
mΩ
mΩ
V
0
5
14
mV
VSW1x = 5.0 V
VTH_ISO
VTRK_DEAD < VBSNS, fast charging constant
current mode
VISOS < VISOB
RDSON_HV
IVBUS = 100 mA, TJ = 0°C to 85°C
330
ISUSPEND
EN_DCDC = low
1.45
1.8
mA
3.9
3.6
5.45
75
4.03
3.73
5.53
V
V
V
mV
VVBUSOK
VVBUSOK_RISE
VVBUSOK_FALL
VVBUS_OV
3.77
3.47
5.38
TSD_W
TSD
TJ rising
TJ falling
mΩ
130
°C
140
110
°C
°C
RNTC = 47 kΩ, BETA_NTC = 3800,
TJ = 0°C to +85°C
RCOOL_COLD
RCOLD_COOL
RTYP_COOL
RCOOL_TPY
RWARM_TYP
RTYP_WARM
RHOT_WARM
RWARM_HOT
131
126
75
72.5
20
19.3
12
11
151.2
145.6
86.5
83.1
23.7
22
13.9
12.7
175
168
99
95
27
24.6
16
14.4
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
RCOOL_COLD
RCOLD_COOL
RTYP_COOL
RCOOL_TPY
RWARM_TYP
RTYP_WARM
RHOT_WARM
RWARM_HOT
140
133
77
75
20
18.5
11.5
10.5
162
156
90
86
23
21
13
12
185
180
102
100
26
24
15
13.5
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
Rev. B | Page 5 of 63
ADP5350
Parameter
BATTERY DETECTION
Sink Current
Source Current
Battery Threshold
Low
High
Battery Detection Timer
TIMERS
Start Charging Delay Timer
Trickle Charge Timer2
Fast Charge Timer2
Charge Complete Timer
Deglitch Timer
Watchdog Timer2
Safety Timer
Battery Node Short Timer2
I2C (SCL AND SDA)
Input Voltage
Low Level
High Level
Low Level Output Voltage
PGOOD AND BATOK
PGOOD Pin
Leakage Current
Output Low Voltage
BATOK Pin
Leakage Current
Output Low Voltage
Data Sheet
Symbol
Min
Typ
Max
Unit
ISINK
ISOURCE
15
7
25
10
35
13
mA
mA
VBATL
VBATH
tBATOK
1.8
3.3
1.9
3.4
333
2.0
3.55
V
V
ms
tSTART
tTRK
tCHG
tEND
tDG
Test Conditions/Comments
VBSNS = VTRM, ICHG < IEND
Applies to VTRM, VRCH, IEND, VWEAK, VTRK_DEAD,
VVBUSOK_FALL, and VVBUSOK_RISE
tWD
tSAFE
tBAT_SHR
VIL
VIH
VOL
Applies to SCL, SDA
Applies to SCL, SDA
Applies to SDA, ISDA_SINK = 2 mA
IPGOOD_LEAK
VPGOOD_LOW
VPGOOD = 5 V
IPGOOD = 1 mA
IBATOK_LEAK
VBATOK_LOW
VBATOK = 5 V
IBATOK = 1 mA
1
60
600
7.5
31
sec
min
min
min
ms
32
40
30
sec
min
sec
0.5
0.4
V
V
V
50
0.5
100
μA
mV
50
0.5
100
μA
mV
1.2
Specification is not production tested, but is supported by characterization data at initial product release.
These values are programmable via the I2C interface. Values are given with default register values.
Guaranteed by design.
4
Typical temperature is the normal operation temperature.
1
2
3
BATTERY FUEL GAUGE SPECIFICATIONS
VVIN4 = VVIN123 = VISOS= 4.2 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications,
unless otherwise noted
Table 2.
Parameter
BATTERY VOLTAGE MONITORING
Battery Monitor Voltage
Range
Resolution
Voltage Reading Accuracy
Test Conditions/Comments
Min
Typ
2.7
Based on 12-bit ADC
TJ = 25°C
TJ = 0°C to +85°C
Rev. B | Page 6 of 63
Max
Unit
4.5
V
mV
mV
mV
1.09
−12.5
−30
+12.5
+30
Data Sheet
ADP5350
BOOST AND LED DRIVER SPECIFICATIONS
VVIN4 = VVIN123 = VISOS= 3.6 V, C9 = 4.7 μF, C10 = 4.7 μF, L2 = 4.7 μH, TJ = −40°C to +125°C for minimum/maximum specifications, and
TA = 25°C for typical specifications, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Input Voltage Range
UNDERVOLTAGE LOCKOUT
OUTPUT CHARACTERISTICS
Output Voltage Range
FB4 Voltage Reference
Symbol
VVIN4
VUVLO_VIN4_RISE
VUVLO_VIN4_FALL
Test Conditions/Comments
Start-Up Time
CURRENT LIMIT
OSCILLATOR CIRCUIT
Switching Frequency
Minimum On Time
LED CURRENT CONTROL
LED Current
Range, 6-Bit
Accuracy
Matching
LED Pin Leakage Current
LED Current Ramp-Up Time
LED Current Ramp-Down Time
LED Source Headroom
LED ON/OFF TIMER
LED Timer Accuracy
1
Typ
Max
Unit
5.5
2.85
V
V
V
16
0.68
+1.5
0.1
V
V
%
%/V
90
5.5
2
2
%
%
ms
ms
2.85
VIN4 rising
VIN4 falling
Standalone operation mode
VVOUT4
VFB4
TJ = 25°C
Line Regulation1
POWER GOOD (PGOOD)
PGOOD Rising Threshold
PGOOD Hysteresis
PGOOD Falling Delay
PGOOD Rising Delay
SW4 CHARACTERISTICS
SW4 On Resistance
Overvoltage Threshold
Min
2.5
VISOS
0.62
−1.5
∆VVOUT4/VVIN4
2.7
2.6
0.65
Standalone operation mode
VPGOOD4_RISE
VPGOOD4_HYS
tPGOOD4_FALL
tPGOO4_RISE
RDSON_NFET
VOVP4
VOVP4_HYS
tSS4
ILIM4
NFET at VVIN4 = 3.6 V
Boost OVP threshold = 18.5 V
Boost OVP threshold = 15 V
Boost OVP threshold = 10 V
Boost OVP threshold = 5.6 V
OVP recovery hysteresis1
BST_IPK = 0
BST_IPK = 1
fSW4
tMIN_ON4
510
1.35
IDx
IDx = 20 mA
IDx = 20 mA
IDx_LEAK
tDx_RISE
tDx_FALL
VDx_HDRM
17.5
14.2
9.5
5.32
460
18.5
15
10
5.6
5
1.0
600
300
1.5
50
0
−10
800
19.5
15.8
10.5
5.9
2.7
690
1.65
MHz
ns
20
+10
0.75
mA
%
%
μA
μs
μs
V
+10
%
2.0
0.5
IDx = 20 mA
IDx = 20 mA
ILEDx[5:0] =11111
Including on timer and off timer
Specification is not production tested, but is supported by characterization data at initial product release.
Rev. B | Page 7 of 63
20
20
0.65
−10
mΩ
V
V
V
V
%
ms
mA
mA
ADP5350
Data Sheet
LDO SPECIFICATIONS
VVBUSx = 5.0 V, VVIN4 = VVIN123 = VISOS= 3.6 V, C5 = C6 = C7 = C8 = 1 µF; TJ = −40°C to +125°C for minimum/maximum specifications,
and TA = 25°C for typical specifications, unless otherwise noted.
Table 4.
Parameter
LDO1 INPUT VOLTAGE RANGE
KEEPALIVE LDO1
UNDERVOLTAGE LOCKOUT
Output Voltage Range
Output Accuracy
Symbol
VVIN123
Test Conditions/Comments
VUVLO_LDO1_RISE
VUVLO_LDO1_FALL
VUVLO_LDO1_HYS
VVOUT1
VIN123 rising
VIN123 falling
Line Regulation
Load Regulation
Dropout Voltage
∆VVOUT1/VIN123
∆VVOUT1/IOUT1
VDROP_OUT1
Current-Limit Threshold
Output Noise 1
Power Supply Rejection Ratio1
ILIM_LDO1
VNOISE_LDO1
PSRR
LDO Start-Up Time
PGOOD Rising Threshold
PGOOD Hysteresis
PGOOD Falling Delay
PGOOD Rising Delay
Load Switch Turn-On Rise Time
Load Switch On Resistance
COUT Discharge Switch On
Resistance
LDO2 INPUT VOLTAGE RANGE
GENERAL-PURPOSE LDO2
Undervoltage Lockout
Output Voltage Range
Output Accuracy
Line Regulation
Load Regulation
Dropout Voltage
LFCSP Package
WFCSP Package
LFCSP Package
WFCSP Package
Current-Limit Threshold
tSS_LDO1
VPGOOD1_RISE
VPGOOD1_HYS
tPGOOD1_Fall
tPGOOD1_RISE
tRISE_SWITCH1
RDSON_SWITCH1
RDIS_LDO1
Min
2.56
Unit
V
2.56
V
V
mV
V
%
%
%/V
%/mA
mV
mV
mA
μV rms
dB
200
Fuse trim or I2C, four bits
IOUT1 = 10 mA, TJ = 25°C
IOUT1 = 10 mA
VVIN123 = (VVOUT1 + 0.5 V) to 5.5 V
IOUT1 = 100 µA to 150 mA
VVOUT1 = 3.3 V, IOUT1 = 10 mA
VVOUT1 = 3.3 V, IOUT1 = 150 mA
1.0
−1
−2.0
−0.1
200
10 Hz to 100 kHz, VVIN123= 3.6 V, VVOUT1 = 3.3 V
100 Hz, VVIN123= 3.6 V, VVOUT1 = 3.3 V, IOUT1 =
10 mA
1 kHz, VVIN123= 3.6 V, VVOUT1 = 3.3 V, IOUT1 = 10 mA
VVOUT1 = 3.3 V, LDO mode
Only effective in LDO mode
VOUT1 = 3.3 V, load switch mode
VVIN123 = 3.6 V
2.85
VUVLO_LDO2_RISE
VUVLO_LDO2_FALL
VUVLO_LDO2_HYS
VVOUT2
VIN4 rising
VIN4 falling
2.5
Fuse trim or I2C, 4 bits
IOUT2 = 10 mA, TJ = 25°C
IOUT2 = 10 mA
VVIN123 = (VVOUT2 + 0.5 V) to 5.5 V
IOUT2 = 100 µA to 150 mA
2.7
2.6
100
1.0
−0.75
−1.5
−0.1
VVOUT2 = 3.3 V, IOUT2 = 10 mA
VVOUT2 = 3.3 V, IOUT2 = 10 mA
VVOUT2 = 3.3 V, IOUT2 = 150 mA
VVOUT2 = 3.3 V, IOUT2 = 150 mA
220
Rev. B | Page 8 of 63
54
150
300
100
40
4.2
+1
+2.0
+0.1
0.015
130
240
440
35
600
90
4.5
120
2
120
700
500
VVIN4 = VVIN123
VDROP_OUT2
VDROP_OUT2
VDROP_OUT2
VDROP_OUT2
ILIM_LDO2
Max
5.5
1.78
VVIN4
(∆VVOUT2)/VVIN123
(∆VVOUT2)/IOUT2
Typ
76
65
100
80
320
dB
μs
%
%
μs
ms
μs
mΩ
Ω
5.5
V
2.85
4.2
+0.75
+1.5
+0.1
0.01
V
V
mV
V
%
%
%/V
%/mA
140
120
180
150
430
mV
mV
mV
mV
mA
Data Sheet
ADP5350
Parameter
Output Noise1
Power Supply Rejection Ratio1
Symbol
VNOISE_LDO2
PSRR
LDO Start-Up Time
Load Switch Turn-On Rise Time
Load Switch On Resistance
LFCSP Package
WFCSP Package
COUT Discharge Switch On
Resistance
LDO3 INPUT VOLTAGE RANGE
GENERAL-PURPOSE LDO3
UNDERVOLTAGE LOCKOUT
tSS_LDO2
tRISE_SWITCH2
Output Voltage Range
Output Accuracy
Line Regulation
Load Regulation
Dropout Voltage
LFCSP Package
WFCSP Package
LFCSP Package
WFCSP Package
Current Limit Threshold
Output Noise1
Power Supply Rejection Ratio1
LDO Start-Up Time
Load Switch Turn-On Rise Time
Load Switch On Resistance
LFCSP Package
WFCSP Package
COUT Discharge Switch On
Resistance
1
Test Conditions/Comments
10 Hz to 100 kHz, VVIN123 = 3.6 V, VVOUT2 = 3.3 V
100 Hz, VIN123 = 3.6 V, VVOUT2 = 3.3V, IOUT2 = 10 mA
1 kHz, VIN123 = 3.6 V, VVOUT2 = 3.3 V, IOUT2 = 10 mA
VVOUT2 = 3.3 V, LDO mode
VVOUT2 = 3.3 V, load switch mode
Min
RDSON_SWITCH2
RDSON_SWITCH2
RDIS_LDO2
VVIN123 = 3.6 V
VVIN4
VVIN4 = VVIN123
2.85
VUVLO_LDO3_RISE
VUVLO_LDO3_FALL
VUVLO_LDO3_HYS
VVOUT3
VVOUT3
VIN4 rising
VIN4 falling
2.5
∆VOUT3/VVIN123
∆VOUT3/IOUT3
VDROP_OUT3
VDROP_OUT3
VDROP_OUT3
VDROP_OUT3
ILIM_LDO3
VNOISE_LDO3
PSRR
tSS_LDO3
tRISE_SWITCH3
RDSON_SWITCH3
RDSON_SWITCH3
RDIS_LDO3
Fuse trim or I2C, four bits
IOUT3 = 10 mA, TJ = +25°C
IOUT3 = 10 mA
VVIN123 = (VVOUT3 + 0.5 V) to 5.5 V
IOUT3 = 100 µA to 150 mA
Typ
120
60
50
80
80
Max
Unit
μV rms
dB
dB
μs
μs
400
300
500
600
500
mΩ
mΩ
Ω
5.5
V
2.85
V
V
mV
V
%
%
%/V
%/mA
2.7
2.6
100
1.0
−0.75
−1.5
−0.1
VVOUT3 = 3.3 V, IOUT3 = 10 mA
VVOUT3 = 3.3 V, IOUT3 = 10 mA
VVOUT3 = 3.3 V, IOUT3 = 150 mA
VVOUT3 = 3.3 V, IOUT3 = 150 mA
4.2
+0.75
+1.5
+0.1
0.01
140
120
180
150
430
10 Hz to 100 kHz, VVIN123 = 3.6 V, VVOUT3 = 3.3 V
100 Hz, VVIN123 = 3.6 V, VVOUT3 = 3.3 V, IOUT3 = 10 mA
1 kHz, VVIN123 = 3.6 V, VVOUT3 = 3.3 V, IOUT3 = 10 mA
VVOUT3 = 3.3 V, LDO mode
VVOUT3 = 3.3 V, load switch mode
76
65
100
80
320
120
60
50
80
80
mV
mV
mV
mV
mA
μV rms
dB
dB
μs
μs
600
500
VIN123 = 3.6 V
400
300
500
mΩ
mΩ
Ω
220
Guaranteed by design.
Rev. B | Page 9 of 63
ADP5350
Data Sheet
RECOMMENDED INPUT AND OUTPUT CAPACITANCE AND INDUCTANCE SPECIFICATIONS
Table 5.
Parameter
EFFECTIVE CAPACITANCE
Charger Capacitance
VBUSx Pin
CFL1 Pin
CFL2 Pin
ISOS Pin
ISOB Pin
LDO Capacitance
VIN123 Pin
LDO1
LDO2
LDO3
Boost Capacitance
VIN4 Pin
VOUT4 Pin
INDUCTANCE
Buck
Boost
Min
Typ
1.0
2.0
1.0
4.0
4.0
2.2
4.7
2.2
10
10
µF
μF
μF
µF
µF
0.7
0.7
0.7
0.7
1
1
1
1
µF
µF
µF
µF
1
0.47
4.7
4.7
µF
µF
0.5
2
1.5
4.7
Rev. B | Page 10 of 63
Max
2.2
10
Unit
µH
µH
Data Sheet
ADP5350
I2C-COMPATIBLE INTERFACE TIMING SPECIFICATIONS
Table 6.
Parameter
I2C-COMPATIBLE INTERFACE
Capacitive Load, Each Bus Line
SCL
Clock Frequency
High Time
Low Time
Data
Setup Time
Hold Time 1
Setup Time for Repeated Start
Hold Time for Start/Repeated Start
Bus Free Time Between a Stop and a Start Condition
Setup Time for Stop Condition
SCL/SDA
Rise Time
Fall Time
Pulse Width of Suppressed Spike
1
Symbol
Min
Typ
CS
fSCL
tHIGH
tLOW
0.6
1.3
tSU,DAT
tHD,DAT
tSU,STA
tHD,STA
tBUF
tSU,STO
100
0
0.6
0.6
1.3
0.6
tR
tF
tSP
Max
Unit
400
pF
400
kHz
µs
µs
ns
µs
µs
µs
µs
µs
0.9
300
300
50
0
ns
ns
ns
A master device must provide a hold time of at least 300 ns for the SDA signal to bridge the undefined region of the falling edge of SCL. See Figure 3, the I2C timing
diagram.
Timing Diagram
SDA
tLOW
tR
tF
tSU,DAT
tF
tHD,STA
tSP
tBUF
tR
SCL
tHIGH
tHD,DAT
tSU,STA
Sr
tSU,STO
P
S
14797-002
S
S = START CONDITION
Sr = REPEATED START CONDITION
P = STOP CONDITION
Figure 3. I2C Timing Diagram
Rev. B | Page 11 of 63
ADP5350
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 7.
Parameter
VBUSA, VBUSB to PGND1
SW4, VOUT4, D1, D2, D3, D4, D5 to PGND4
FB4
CFL2 to AGND
PGND1, PGND4 to AGND
All Other Pins to AGND
Continuous Drain Current, Battery
Supplementary Mode, from ISOB to
ISOS, TJ = 125°C
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.5 V to +20 V
−0.5 V to +20 V
−0.3 V to +6 V
−0.3 V to +3.3 V
−0.3 V to +0.3 V
−0.3 V to +6 V
1.1 A
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment.
Careful attention to PCB thermal design is required. θJA is the
natural convection junction to ambient thermal resistance
measured in a one cubic foot sealed enclosure. θJC is the
junction to case thermal resistance.
Table 8. Thermal Resistance
Package Type
CP-32-121
CB-32-1
1
θJA
42
64
θJC
2.1
0.7
Unit
°C/W
°C/W
Thermal impedance simulated values are based on a JEDEC 2S2P thermal
test board with nine thermal vias. See JEDEC JESD51.
Maximum Power Dissipation
The maximum safe power dissipation in the ADP5350 package
is limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the parametric performance of the ADP5350. Exceeding a junction
temperature of 175°C for an extended period of time can result
in changes in the silicon devices that potentially cause failure.
ESD CAUTION
Rev. B | Page 12 of 63
Data Sheet
ADP5350
32
31
30
29
28
27
26
25
BATOK
SDA
SCL
VOUT1
VOUT2
VIN123
CFL2
VOUT3
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
ADP5350
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
D5
D4
D3
D2
D1
VIN4
FB4
VOUT4
NOTES
1. EXPOSED PAD (ANALOG GROUND). THE EXPOSED
PAD MUST BE CONNECTED AND SOLDERED TO
AN EXTERNAL GROUND PLANE.
14797-003
PGND1A
PGND1B
SW1A
SW1B
VBUSA
VBUSB
SW4
PGND4
9
10
11
12
13
14
15
16
INT
PGOOD
THR
BSNS
ISOB
ISOS
AGND
CFL1
Figure 4. LFCSP Pin Configuration (Top View)
Table 9. LFCSP Pin Function Descriptions
Pin No.
1
Mnemonic
INT
2
3
4
5
6
7
8
PGOOD
THR
BSNS
ISOB
ISOS
AGND
CFL1
9, 10
11, 12
13, 14
15
16
17
18
PGND1A,
PGND1B
SW1A, SW1B
VBUSA, VBUSB
SW4
PGND4
VOUT4
FB4
19
20
21
22
23
24
25
26
27
28
29
30
31
32
VIN4
D1
D2
D3
D4
D5
VOUT3
CFL2
VIN123
VOUT2
VOUT1
SCL
SDA
BATOK
EPAD
Description
Processor Interrupt (Active Low). This pin requires an external pull-up resistor. If this pin is not used, it can be
left floating.
Power-Good Signal Output. This open-drain output is the power-good signal for the selected channels.
Battery Pack Thermistor Connection.
Battery Voltage Sense Pin.
Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
Charger Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
Analog Ground.
Power input to the charger regulator. Connect a ceramic filter capacitor between this pin and either PGND1A
or PGND1B.
Power Ground for the Battery Charger.
Switching Node for the Battery Charger.
Power Connection to USB Bus Voltage.
Switching Node for the Boost Regulator.
Power Ground for the Boost Regulator.
Power Output for the Boost Regulator.
Feedback Sensing Input for the Boost Regulator. In standalone mode, connect this pin to a resistor divider
from VVOUT4. In LED operation mode, connect FB4 to ground.
Input Voltage for the Boost Regulator and LDO Control Block.
LED 1 Sink Channel. Connect this pin to the cathode of the LED.
LED 2 Sink Channel. Connect this pin to the cathode of the LED.
LED 3 Sink Channel. Connect this pin to the cathode of the LED.
LED 4 Sink Channel. Connect this pin to the cathode of the LED.
LED 5 Sink Channel. Connect this pin to the cathode of the LED.
Power Output for LDO3.
Internal Regulator Output for the Fuel Gauge. Connect a ceramic capacitor between this pin and AGND.
Power Input for LDO1, LDO2, and LDO3.
Power Output for LDO2.
Power Output for LDO1.
I2C Serial Clock. This pin requires an external pull-up resistor.
I2C Serial Data. This pin requires an external pull-up resistor.
Battery Status Open-Drain Output Flag (Active High). This pin enables the system when the battery reaches
VWEAK.
Exposed Pad (Analog Ground). The exposed pad must be connected and soldered to an external ground plane.
Rev. B | Page 13 of 63
ADP5350
Data Sheet
1
2
3
A
VOUT3
CFL2
VIN123
B
D4
D5
SDA
C
D2
D3
4
VOUT2
SCL
5
6
VOUT1
PGOOD
BATOK
INT
THR
ISOB
BSNS
ISOS
ADP5350
D1
VIN4
E
VOUT4
FB4
VBUSA
AGND
SW1A
PGND1A
F
PGND4
SW4
VBUSB
CFL1
SW1B
PGND1B
14797-105
TOP VIEW
(Not to Scale)
D
Figure 5. WLCSP Pin Configuration (Top View)
Table 10. WLCSP Pin Function Descriptions
Pin No.
B6
Mnemonic
INT
A6
C5
D5
C6
D6
E4
F4
PGOOD
THR
BSNS
ISOB
ISOS
AGND
CFL1
E6, F6
E5, F5
E3, F3
F2
F1
E1
E2
PGND1A,
PGND1B
SW1A, SW1B
VBUSA, VBUSB
SW4
PGND4
VOUT4
FB4
D2
D1
C1
C2
B1
B2
A1
A2
A3
A4
A5
B4
B3
B5
VIN4
D1
D2
D3
D4
D5
VOUT3
CFL2
VIN123
VOUT2
VOUT1
SCL
SDA
BATOK
Description
Processor Interrupt (Active Low). This pin requires an external pull-up resistor. If this pin is not used, it can be
left floating.
Power-Good Signal Output. This open-drain output is the power-good signal for the selected channels.
Battery Pack Thermistor Connection.
Battery Voltage Sense Pin.
Battery Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
Charger Supply Side Input to Internal Isolation FET/Battery Current Regulation FET.
Analog Ground.
Power input to the charger regulator. Connect a ceramic filter capacitor between this pin and either PGND1A
or PGND1B.
Power Ground for the Battery Charger.
Switching Node for the Battery Charger.
Power Connection to USB Bus Voltage.
Switching Node for the Boost Regulator.
Power Ground for the Boost Regulator.
Power Output for the Boost Regulator.
Feedback Sensing Input for the Boost Regulator. In standalone mode, connect this pin to a resistor divider
from VVOUT4. In LED operation mode, connect FB4 to ground.
Input Voltage for the Boost Regulator and LDO Control Block.
LED 1 Sink Channel. Connect this pin to the cathode of the LED.
LED 2 Sink Channel. Connect this pin to the cathode of the LED.
LED 3 Sink Channel. Connect this pin to the cathode of the LED.
LED 4 Sink Channel. Connect this pin to the cathode of the LED.
LED 5 Sink Channel. Connect this pin to the cathode of the LED.
Power Output for LDO3.
Internal Regulator Output for the Fuel Gauge. Connect a ceramic capacitor between this pin and AGND.
Power Input for LDO1, LDO2, and LDO3.
Power Output for LDO2.
Power Output for LDO1.
I2C Serial Clock. This pin requires an external pull-up resistor.
I2C Serial Data. This pin requires an external pull-up resistor.
Battery Status Open-Drain Output Flag (Active High). This pin enables the system when the battery reaches
VWEAK.
Rev. B | Page 14 of 63
Data Sheet
ADP5350
TYPICAL PERFORMANCE CHARACTERISTICS
VVBUSx = 5.0 V, VVIN4 = VVIN123 = VISOS = 3.6 V, CBUS = 2.2 µF, C3 = 10 µF, C4 = 10 µF, CCFL1 = 4.7 µF, LOUT1 = 1.5 µH, all registers are at default
values, unless otherwise noted.
600
450
430
HVFET ON RESISTANCE (mΩ)
INPUT CURRENT LIMIT (mA)
500
400
300
200
ILIM = 100mA
ILIM = 500mA
100
410
390
370
350
330
310
290
20
80
50
TEMPERATURE (°C)
250
14797-004
–10
0
4.34
4.33
3.8
3.7
3.6
4.32
4.31
4.30
4.29
4.28
3.5
4.27
3.4
4.26
–20
10
40
70
100
130
4.25
–40
–10
20
50
80
TEMPERATURE (°C)
Figure 7. VVBUSOK Threshold vs. Temperature
14797-008
SYSTEM VOLTAGE (V)
3.9
14797-005
Figure 10. System Voltage vs. Temperature
100
5
VISOB = 2.7V
VISOB = 3.6V
VISOB = 4.2V
90
VOUT = 3.6V
VOUT = 4.3V
VOUT = 4.5V
80
EFFICIENCY (%)
70
3
2
60
50
40
30
20
1
10
–20
0
20
40
60
TEMPERATURE (°C)
Figure 8. Shutdown Current vs. Temperature
80
0
0.001
14797-006
0
–40
0.01
0.1
IOUT (A)
1
14797-111
VVBUSOK THRESHOLD (V)
4.0
TEMPERATURE (°C)
SHUTDOWN CURRENT (µA)
80
4.35
RISING
FALLING
4.1
4
60
Figure 9. High Voltage FET (HVFET) On Resistance vs. Temperature
4.3
3.3
–50
40
TEMPERATURE (°C)
Figure 6. Input Current Limit vs. Temperature
4.2
20
14797-109
270
0
–40
Figure 11. Efficiency vs. Ouptut Current (IOUT), Buck Regulator Efficiency
Rev. B | Page 15 of 63
ADP5350
Data Sheet
350
3080
300
3040
3020
3000
2980
2960
250
200
150
2940
VISOB = 2.6V
VISOB = 3.0V
VISOB = 3.6V
VISOB = 4.2V
2920
–10
20
50
80
TEMPERATURE (°C)
100
14797-010
2900
–40
Figure 12. Buck Switching Frequency vs. Temperature
20
0
40
60
80
TEMPERATURE (°C)
14797-115
3060
ISOFET RESISTANCE (mΩ)
BUCK SWITCHING FREQUENCY (kHz)
3100
Figure 15. Isolation FET (ISOFET) Resistance vs. Temperature at Various
Battery Voltage Levels, LFCSP Package
600
1.0
0.8
400
300
200
ICHG = 100mA
ICHG = 500mA
100
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
VISOB = 2.7V
VISOB = 3.6V
VISOB = 4.2V
–0.8
–10
20
80
50
TEMPERATURE (°C)
–1.0
14797-011
0
–40
60
80
Figure 16. ADC Voltage Accuracy vs. Temperature
1600
ICHG = 200mA, RBAT = 1Ω
ICHG = 500mA, RBAT = 0.4Ω
1580
BOOST SW FREQUENCY (kHz)
500
400
300
200
100
1560
1540
1520
1500
1480
1460
1440
0
4.3
4.5
4.7
4.9
5.1
VBUSx VOLTAGE (V)
5.3
Figure 14. Charge Current vs. VBUSx Voltage
1400
–40
–10
20
50
80
110
TEMPERATURE (°C)
Figure 17. Boost Switching Frequency vs. Temperature
Rev. B | Page 16 of 63
14797-015
1420
14797-012
CHARGE CURRENT (mA)
40
TEMPERATURE (°C)
Figure 13. Charge Current vs. Temperature
600
20
0
14797-116
ADC VOLTAGE ACCURACY (%)
CHARGE CURRENT (mA)
500
Data Sheet
ADP5350
25
ILIM = 300mA
ILIM = 600mA
20
LED CURRENT ACCURACY (%)
700
600
500
400
300
200
ILED = 1mA
ILED = 10mA
ILED = 20mA
15
10
5
0
–40
–10
20
50
80
110
0
–50
TEMPERATURE (°C)
40
70
100
130
Figure 21. LED Current Accuracy vs. Temperature
100
11.0
90
10.8
80
10.6
70
10.4
60
10.2
ILED (mA)
50
40
10.0
9.8
9.6
D1
D2
D3
D4
D5
9.4
20
VOUT = 5V
VOUT = 9V
VOUT = 15V
0
0.001
9.2
0.1
0.01
IOUT (A)
9.0
3.6
14797-119
10
3.8
4.0
4.2
4.4
4.6
VVIN4 (V)
14797-020
30
Figure 22. LED Channel Current (ILED) vs. VVIN4
Figure 19. Boost Efficiency vs. Output Current (IOUT)
250
2.0
VOUT = 3.3V
VOUT = 2.5V
LDO1 DROPOUT VOLTAGE (mV)
1.5
1.0
0.5
0
–0.5
–1.0
200
150
100
50
–2.0
–40
–10
20
50
80
110
TEMPERATURE (°C)
14797-120
–1.5
0
1
10
100
1000
LOAD CURRENT (mA)
Figure 23. LDO1 Dropout Voltage vs. Load Current, LFCSP Package
Figure 20. Boost Output Accuracy vs. Temperature, VVOUT4 = 5 V
Rev. B | Page 17 of 63
14797-021
EFFICIENCY (%)
10
TEMPERATURE (°C)
Figure 18. Boost Input Current Limit vs. Temperature
BOOST OUTPUT ACCURACY (V)
–20
14797-019
100
14797-016
BOOST INPUT CURRENT LIMIT (mA)
800
ADP5350
0
VOUT2 = 3.3V
–10
120
LDO2 PSRR (dB)
90
60
–30
–40
–50
–60
30
1
10
100
1000
LOAD CURRENT (mA)
–80
10
100k
1M
10M
Figure 26. LDO2 Power Supply Rejection Ratio (PSRR) vs. Frequency,
VVOUT2 = 3.3 V, VIN123 = 3.6 V
0
100µA
1mA
10mA
100mA
–10
–20
100µA
1mA
10mA
100mA
–20
LDO3 PSRR (dB)
–30
–40
–50
–60
–30
–40
–50
–60
–70
–70
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
14797-125
–80
–90
10
10k
Figure 25. LDO1 PSRR vs. Frequency, VVOUT1 = 3.3 V, VVIN123 = 3.6 V
–80
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 27. LDO3 PSRR vs. Frequency, VVOUT3 = 3.3 V, VIN123 = 3.6 V
Rev. B | Page 18 of 63
14797-127
–10
1k
FREQUENCY (Hz)
Figure 24. LDO2/LDO3 Dropout Voltage vs. Load Current, LFCSP Package
0
100
14797-126
–70
0
LDO1 PSRR (dB)
100µA
1mA
10mA
100mA
–20
14797-124
LDO2/LDO3 DROPOUT VOLTAGE (mV)
150
Data Sheet
Data Sheet
ADP5350
TYPICAL WAVEFORMS
T
T
VISOB
VISOB
VISOS
VISOS
VVBUSx
3
VVBUSx
1
2
2
1
3
IVBUS
IVBUS
CH2 2.00V
CH4 500mA Ω
M4.0ms
A CH1
T
15.9320ms
3.08V
14797-128
CH1 2.00V BW
CH3 2.00V
CH1 2.00V BW
CH3 2.00V BW
Figure 28. VBUSx Connected to USB Power
CH2 2.00V
CH4 200mA Ω
M200µs
A CH4
T
552.400µs
92.0mA
14797-131
4
4
Figure 31. Charger Stop with EN_CHG Set Low, ILIM = 500 mA, ICHG = 200 mA,
VVBUSx = 5 V
T
VISOB
VISOS
1
VISOS
SW1
VVBUSx
3
2
1
3
IL1
IVBUS
CH2 2.00V
CH4 500mA Ω
M100ms
A CH1
3.08V
14797-129
CH1 2.00V BW
CH3 2.00V
CH1 10.0mV BW
CH3 2.00V BW CH4 200mA Ω
Figure 29. VBUSx Disconnected from USB Power
M400ns
A CH3
T
400.000ns
1.68V
14797-132
4
4
Figure 32. Fast Charger Status, ICHG = 200 mA, VVBUSx = 5 V
T
T
VISOB
VISOS
VISOS
1
VVBUSx
1
2
IISOS
3
IVBUS
4
CH2 2.00V
CH4 200mA Ω
M200µs
A CH4
T
552.400µs
92.0mA
CH1 10.0mV
B
W
CH4 500mA Ω
Figure 30. Charger Start with EN_CHG Set High, ILIM = 500 mA, ICHG = 150 mA,
VVBUSx = 5 V
M200µs
A CH4
–531.600µs
T
400mA
14797-133
CH1 2.00V BW
CH3 2.00V BW
14797-130
4
Figure 33. VISOS Voltage Load Transient Response, VISOS = 4.3 V, VVBUSx = 5 V,
Rev. B | Page 19 of 63
ADP5350
Data Sheet
T
T
VISOS
VVOUT4
VVOUT1
2
1
SW4
1
ILDO1
3
CH1 5.00V BW
CH3 5.00V BW
CH2 2.00V
CH4 200mA Ω
M400µs
A CH1
T
560.000µs
6.40V
4
14797-134
4
B
CH1 100mV
M2.00ms A CH4
T
5.56000ms
W
CH4 100mA Ω
114mA
14797-137
IL4
Figure 37. LDO1 Output Load Transient Response
Figure 34. Boost Voltage Soft Start, LED Mode; ILED1 = ILED2 = ILED3 = 10 mA
T
T
VISOS
VVIN123
VVOUT4
2
VVOUT2
SW4
2
1
3
IL4
CH1 5.00V BW
CH3 5.00V BW
CH2 2.00V
CH4 200mA Ω
M1.00µs
A CH3
T
120.000ns
6.60V
CH1 1.00V
B
W
A CH1
M100µs
190.000µs
T
CH2 2.00V
1.54V
14797-138
4
14797-135
1
Figure 38. LDO2 Output Soft Start, RLDO1 = 330 Ω
Figure 35. Boost Operation, LED Mode; ILED1 = ILED2 = ILED3 = 10 mA
T
T
VVIN123
VVOUT2
1
2
VVOUT1
ILDO2
CH2 2.00V
M400µs
A CH1
T
814.000µs
1.54V
4
14797-136
CH1 1.00V BW
CH1 50.00mV
B
W
CH4 100mA Ω
M200µs
A CH4
T
498.000µs
114mA
Figure 39. LDO2 Output Load Transient Response
Figure 36. LDO1 Output Soft Start, RLDO1 = 330 Ω
Rev. B | Page 20 of 63
14797-139
1
Data Sheet
ADP5350
THEORY OF OPERATION
BATTERY CHARGER OVERVIEW
The ADP5350 integrates a fully I C-programmable charger for
single-cell Li-Ion or Li-Ion polymer batteries suitable for a wide
range of portable applications.
2
Figure 40 shows the complete charge cycle of the ADP5350
when VBUSx is connected. The ISOS pin voltage remains at
VISOS_TRK when the device is not charging or when it is in trickle
charge mode. When the device begins a fast charge, the VISOS
voltage follows the battery voltage until the charge is complete.
The charge current keeps constant in CC mode and reduces to
IEND in CV mode. When the battery voltage, VISOB, drops to VTRM
− VRCH, the charger resumes to charge until the charge
completes.
The highly efficient switch dc-to-dc architecture enables higher
charging currents as well as a lower temperature charging
operation that results in faster charging times.
The charger of the ADP5350 operates from an input voltage
from 4 V to 5.4 V but is tolerant of voltages of up to 20 V. This
tolerance alleviates concerns about USB bus spiking during
disconnection or connection.
The ADP5350 features an internal FET between the dc-to-dc
charger output and the battery. This FET permits battery
isolation and, therefore, system powering in a dead battery or
no battery scenario, which allows immediate system function
upon connection to a USB power supply.
VISOS_TRK
The charger of the ADP5350 is fully compliant with the USB 3.0
specification and enables charging via the mini USB VBUSx pin
from a wall charger, car charger, or USB host port. Based on the
type of USB source, which is detected by an external USB
detection device, the ADP5350 can be set to apply the correct
current limit for optimal charging and USB compliance. The USB
charger permits correct operation under all USB compliant
sources, such as wall chargers, host chargers, hub chargers, and
standard hosts and hubs.
A processor is able to control the USB charger using the I2C to
program the charging current and numerous other parameters,
including
•
•
•
•
•
•
•
•
•
•
Trickle charge current level and voltage threshold
Fast charge (CC) current level
Fast charge (CV) voltage level
Fast charge safety timer period
Watchdog safety timer parameters
Weak battery threshold detection
End of charge current level for charge complete
Recharge threshold
VBUSx input current limit
Charge enable and disable
VISOS
VTRM
VRCH
ICHG
VISOS_FC
VTRK_DEAD
VISOB
IEND
IISOB
TRICKLE
CHARGE
FAST CHARGE CC
FAST CHARGE CV
Figure 40. ADP5350 Battery Charging Profile
Rev. B | Page 21 of 63
CHARGE
COMPLETE
RECHARGE
CHARGE
COMPLETE
14797-023
CHARGE
DISABLE
ITRK_DEAD
ADP5350
Data Sheet
CHARGER MODES
Weak Charge Mode (Constant Current)
Input Current Limit
When the battery voltage exceeds VTRK_DEAD but is less than VWEAK,
the charger switches to weak charge mode and the ISOS node is
regulated to VISOS_FC by turning on the battery isolation FET.
The ADP5350 features a programmable input current limit,
from 100 mA to 1500 mA, via the ILIM[3:0] I2C bits, which
ensures compatibility with the USB limits requirements listed in
Table 11. The current limit defaults to 100 mA to allow
compatibility with a USB host or hub that is not configured.
This input current limit resets to the 100 mA default value
during every power cycle on VBUSx to protect the USB port.
When the input current limit feature is used, the available input
current may be too low for the charger to meet the programmed
charging current, ICHG, and the rate of charge is reduced. In this
case, the VBUS_ILIM flag is set.
When connecting an improper voltage level to VBUSx, the dcto-dc regulator shuts down, the ISOFET turns on, and the high
voltage blocking part is in a state wherein it draws only 1.3 mA
(typical) of current until VVBUSx reaches the VVBUS_OV_FALL level.
The ADP5350 always monitors the VVBUSx voltage when there is
a proper USB power connection. The VBUSOK bit, Bit 3 in
Register 0x36, indicates whether the VVBUSx voltage is within
VVBUS_OV and VVBUSOK, which can be programmed to be masked
to the PGOOD pin via the VBUSOK_MASK bit in Register 0x37.
The default setting of the VBUSOK_MASK is programmed via a
factory fuse trim.
Trickle Charge Mode
A deeply discharged Li-Ion cell may exhibit a very low cell
voltage, making it unsafe to charge the cell at high current rates.
The ADP5350 charger uses a trickle charge mode to reset the
battery pack protection circuit and lift the cell voltage to a safe level
for fast charging. A cell with a voltage below VTRK_DEAD is
charged with the trickle mode current, ITRK_DEAD. During trickle
charge mode, the CHARGER_STATUS[3:0] bits are set.
During trickle charging, the ISOS node is regulated to VISOS_TRK
by the dc-to-dc regulator and the battery isolation FET is off,
which means the battery is isolated from the system power supply.
The enable of the trickle charging function is controlled via the
I2C EN_TRK bit.
Trickle Charge Mode Timer
The duration of trickle charge mode is monitored to ensure the
battery is revived from its deeply discharged state. If trickle
charge mode runs for longer than 60 minutes without the cell
voltage reaching VTRK_DEAD, a fault condition is assumed and the
charging stops. The battery isolation FET turns on and the dcto-dc regulator stops working. The fault condition is asserted in
the CHARGER_STATUS register, allowing the user to initiate
the fault recovery procedure specified in the Fault Recovery
section.
In weak charge mode, the battery charges with the programmed
ICHG current from the ISOS node through the isolation FET and
trickle charge current, ITRK_DEAD. Due to the VBUSx input current
limit, the real ICHG charge current from the ISOS node may be less
than the programmed value. The system load can also share the
current from the ISOS node. However, the trickle charge current,
ITRK_DEAD, remains on to charge the battery in weak charge mode.
Fast Charge Mode (Constant Current)
When the battery voltage exceeds VTRK_DEAD and VWEAK, the
charger switches to fast charge mode, charging the battery with
the constant current, ICHG. During fast charge mode (CC), the
CHARGER_STATUS[3:0] bits are set.
During CC mode, other features may prevent the current, ICHG,
from reaching its full programmed value. Isothermal charging
mode or input current limiting for USB compatibility may affect
the value of ICHG under certain operating conditions. The
voltage on ISOS is regulated to stay at VISOS_FC by the battery
isolation FET when VISOB < VISOS_FC.
Fast Charge Mode (Constant Voltage)
As the battery charges, its voltage rises and approaches the termination voltage, VTRM. The ADP5350 charger monitors the voltage
on the BSNS pin to determine when charging ends. However,
the internal ESR of the battery pack combined with PCB and
other parasitic series resistances creates a voltage drop between
the sense point at the BSNS pin and the cell terminal itself. To
compensate for this and ensure a fully charged cell, the ADP5350
enters a constant voltage charge mode when the BSNS voltage
reaches the termination voltage. The ADP5350 reduces charge
current gradually as the cell continues to charge, maintaining a
voltage of VTRM on the BSNS pin. During fast charge mode
(constant voltage), the CHARGER_STATUS[3:0] bits are set.
Fast Charge Mode Timer
The duration of fast charge mode is monitored to ensure that
the battery is charging correctly. If the fast charge mode runs for
longer than tCHG without the voltage at the BSNS pin reaching
VTRM, a fault condition is assumed and charging stops. The battery
isolation FET remains on, and the dc-to-dc regulator shuts down.
The fault condition is asserted on the CHARGER_STATUS register, allowing the user to initiate the fault recovery procedure
specified in the Fault Recovery section.
If the fast charge mode runs for longer than tCHG, and VTRM is
reached on the BSNS pin but the charge current is not yet below
IEND, charging stops by turning the battery isolation FET off, but
the system voltage is maintained at VISOS_TRK by the dc-to-dc
regulator. No fault condition is asserted in this circumstance,
and the ADP5350 transitions to charge complete status.
Rev. B | Page 22 of 63
Data Sheet
ADP5350
Table 11. Input Current Compatibility with Standard USB Limits
Mode
USB 2.0
USB 3.0
Dedicated Charger
Standard USB Limit
100 mA limit for standard USB host or hub
500 mA limit for standard USB host or hub
150 mA limit for super speed USB 3.0 host or hub
900 mA limit for super speed, high speed USB host or hub
charger
1500 mA limit for dedicated charger or low/full speed USB
host or hub charger
Watchdog Timer
The ADP5350 charger features a programmable watchdog timer
function to ensure charging is under the control of the processor.
The watchdog timer starts running when the ADP5350 charger
determines that the processor is operational, that is, when the
processor sets the RESET_WD bit for the first time or when the
battery voltage is greater than the weak battery threshold,
VWEAK. When the watchdog timer triggers, it must be reset
regularly within the watchdog timer period, tWD.
If the watchdog timer expires without being reset while in
charger mode, the ADP5350 charger assumes there is a software
problem and triggers the safety timer, tSAFE. For more information, see the Safety Timer section. Meanwhile, the ILIM
current limit resets to the default value.
Safety Timer
If the watchdog timer (see the Watchdog Timer section for
more information) expires while in charger mode, the ADP5350
charger initiates the safety timer, tSAFE. Charging continues for a
period of tSAFE, and then stops. The battery isolation FET remains
on while the dc-to-dc regulator shuts down. The CHARGER_
STATUS[3:0] bits are then set. Resetting the charger requires
VBUSx to be powered down and powered up.
Charge Complete
The ADP5350 charger monitors the charging current while in
CV fast charge mode. If the current falls below IEND and remains
below IEND for tEND, the charger is stopped by turning the battery
isolation FET off, but the system voltage is maintained at VISOS_TRK
by the dc-to-dc regulator and the CHDONE flag is set. If the
charging current falls below IEND for less than tEND and then rises
above IEND again, the tEND timer resets.
Recharge
After the detection of a complete charge, and the isolated FET
turns off, the ADP5350 charger continues to monitor the BSNS
pin. If the BSNS pin voltage falls below VTRM − VRCH, the charger
reactivates charging. Under most circumstances, triggering the
recharge threshold results in the charger entering fast charge
constant current mode.
Battery Charging Enable/Disable
The ADP5350 charging function can be disabled by setting the
I2C EN_CHG bit to low. If the I2C EN_CHG bit is low, the
dc-to-dc regulator is still on and regulates the ISOS voltage to
ADP5350 Function
100 mA input current limit or I2C programmed value
500 mA input current limit or I2C programmed value
150 mA input current limit or I2C programmed value
900 mA input current limit or I2C programmed value
1500 mA input current limit or I2C programmed value
VISOS_TRK, the battery isolation FET turns off, and the dc-to-dc
regulator provides the power for the system.
BATTERY ISOLATION FET
The ADP5350 charger features an integrated battery isolation
FET for power path control. The battery isolation FET isolates a
deeply discharged Li-Ion cell from the system power supply in
trickle charge mode and when charging is complete, thereby
allowing the system to be powered from the VBUSx node.
When the VVBUSx voltage is below VVBUSOK_FALL, the battery
isolation FET is in full conduction mode.
The battery isolation FET is off during trickle charge mode.
When the battery voltage exceeds VTRK_DEAD, the battery
isolation FET switches to the system voltage regulation mode
and the battery isolation FET maintains the VISOS_FC voltage on
the ISOS pin. When the battery voltage exceeds VISOS_FC, the
battery isolation FET is in full conduction mode.
The battery isolation FET supplements the battery to support
high current functions on the system power supply.
When the voltage on ISOS drops below ISOB, the battery
isolation FET enters full conduction mode.
When the voltage on ISOS rises above ISOB, the isolation FET
enters regulating mode or full conduction mode, depending on the
Li-Ion cell voltage and the dc-to-dc charger mode.
BATTERY DETECTION
Battery Level Detection
The ADP5350 charger features a battery detection mechanism to
detect an absent battery. The charger actively sinks and sources
current into the ISOB/BSNS node when the enable charger and
VVBUSx have reached the VVBUSOK_RISE level, and voltage vs. time is
detected. The sink phase is used to detect a charged battery,
whereas the source phase is used to detect a discharged battery.
The sink phase (see Figure 41) sinks ISINK current from the ISOB
and BSNS pin for a time, tBATOK. If the BSNS pin is below VBATL
when the tBATOK timer expires, the charger assumes no battery is
present or battery is shorted, and starts the source phase. If the
BSNS exceeds the VBATL voltage when the tBATOK timer expires,
the charger assumes the battery is present and begins a new
charge cycle.
The source phase sources ISOURCE current to ISOB or the BSNS
pin for a time, tBATOK. If the BSNS pin exceeds VBATH before the
Rev. B | Page 23 of 63
ADP5350
Data Sheet
tBATOK timer expires, the charger assumes that no battery is
present. If the BSNS does not exceed the VBATH voltage when the
tBATOK timer expires, the charger assumes that a battery is present,
and begins a new charge cycle.
The battery pack temperature sensing can be controlled by I2C
using the conditions shown in Table 12. Note that the I2C register
default setting for EN_THR (Register 0x07) is 0 = temperature
sensing off.
When the ADP5350 battery monitor is enabled and detects that
the battery voltage is higher than VWEAK, Bit 2 in Register 0x36,
BATOK, asserts high. The PGOOD pin can be programmed to
mask BATOK, which indicates whether the battery voltage is
higher than VWEAK.
Table 12. THR Input Function
Conditions
VBUSx
Open or VBUS = 0 V to 4.0 V
Open or VBUS = 0 V to 4.0 V
VBUS = 4.0 V to 5.5 V
Battery (ISOB) Short Detection
A battery short occurs under a damaged battery condition or
when the battery protection circuitry is enabled.
THR Function
Off
Controlled by I2C
Always on
If the battery pack thermistor is not connected directly to the
ADP5350 THR pin, connect a 47 kΩ (tolerance ±20%) dummy
resistor between THR and AGND. Leaving the THR pin open
results in a false detection of the battery temperature of
