Charge Pump Driven 9-Channel LED Driver with
Automated LED Lighting Effects
ADP8866
Data Sheet
FEATURES
APPLICATIONS
Charge pump with automatic gain selection of 1×, 1.5×, and
2× for maximum efficiency
92% peak efficiency
9 independent and programmable LED drivers
Each driver is capable of 25 mA (full scale)
Each driver has 7 bits (128 levels) of nonlinear current
settings
Standby mode for VOUT(START)
0
WAIT
100µs (TYP)
G=1
MIN (VD1:D9) < VHR(UP)
1
G = 1.5
1
WAIT
100µs (TYP)
MIN (VD1:D9) < VHR(UP)
1
0
0
MIN (VD1:D9) > VDMAX
0
1
WAIT
100µs (TYP)
MIN (VD1:D9) < VDMAX
NOTES
1. VDMAX IS THE CALCULATED GAIN DOWN TRANSITION POINT.
Figure 28. State Diagram for Automatic Gain Selection
Rev. B | Page 12 of 52
09478-029
G=2
Data Sheet
ADP8866
low for more than 100 μs (maximum). When standby is exited,
a soft start sequence is performed.
Note that the gain selection criteria applies only to active
current sources. If a current source has been deactivated
through an I2C command (that is, only five LEDs are used for
an application), the voltages on the deactivated current sources
are ignored.
Shutdown Mode
Shutdown mode disables all circuitry, including the I2C receivers.
Shutdown occurs when VIN is below the undervoltage thresholds.
When VIN rises above VIN(START) (2.0 V typical), all registers are
reset and the part is placed into standby mode.
Soft Start Feature
At startup (either from UVLO activation or fault/standby
recovery), the output is first charged by ISS (7.0 mA typical)
until it reaches about 92% of VIN. This soft start feature reduces
the inrush current that is otherwise present when the output
capacitance is initially charged to VIN. When this point is
reached, the controller enters 1× mode. If the output voltage is
not sufficient, the automatic gain selection determines the
optimal point as defined in the Automatic Gain Selection section.
Reset Mode
In reset mode, all registers are set to their default values and the
part is placed into standby. There are two ways to reset the part:
power on reset (POR) and the nRST pin. POR is activated anytime that the part exits shutdown mode. After a POR sequence
is complete, the part automatically enters standby mode.
After startup, the part can be reset by pulling the nRST pin low.
As long as the nRST pin is low, the part is held in a standby state
but no I2C commands are acknowledged (all registers are kept
at their default values). After releasing the nRST pin, all registers
remain at their default values, and the part remains in standby;
however, the part does accept I2C commands.
OPERATING MODES
There are four different operating modes: active, standby,
shutdown, and reset.
Active Mode
In active mode, all circuits are powered up and in a fully
operational state. This mode is entered when nSTBY (in
Register MDCR) is set to 1.
The nRST pin has a 50 μs (typical) noise filter to prevent inadvertent activation of the reset function. The nRST pin must be
held low for this entire time to activate reset.
Standby Mode
The operating modes function according to the timing diagram
in Figure 29.
Standby mode disables all circuitry except for the I2C receivers.
Current consumption is reduced to less than 1 μA. This mode is
entered when nSTBY is set to 0 or when the nRST pin is held
SHUTDOWN
VIN CROSSES ~2.0V AND TRIGGERS POWER ON RESET
VIN
nRST MUST BE HIGH FOR 20µs (MAX)
BEFORE SENDING I2C COMMANDS
BIT nSTBY IN REGISTER
MDCR GOES HIGH
~100µs DELAY BETWEEN POWER UP AND
WHEN I2C COMMANDS CAN BE RECEIVED
nSTBY
nRST IS LOW, WHICH FORCES nSTBY LOW
AND RESETS ALL I2C REGISTERS
25µs TO 100µs NOISE FILTER
nRST
VIN
~7.0mA CHARGES
VOUT TO VIN LEVEL
SOFT START
1.5×
2×
1×
GAIN CHANGES ONLY OCCUR WHEN NECESSARY
BUT HAVE A MINIMUM TIME BEFORE
CHANGING
10µs 100µs
Figure 29. Typical Timing Diagram
Rev. B | Page 13 of 52
SOFT START
09478-030
VOUT
ADP8866
Data Sheet
25
LED GROUPS
15
10
5
0
20
40
60
80
100
120
OUTPUT CURRENT CODE (0 TO 127)
OUTPUT CURRENT SETTINGS
The current setting is determined by a 7-bit code programmed
by the user into diode current control registers (Register 0x13
for the backlight and Register 0x23 to Register 0x2B for the
independent sinks). The 7-bit resolution allows the user to set
the backlight to one of 128 different levels between 0 mA and
25 mA. The ADP8866 implements a square law algorithm to
achieve a nonlinear relationship between input code and
backlight current. The LED output current (in milliamperes) is
determined by the following equation:
2
(2)
Figure 30. Output Code Effect on Various LEVEL_SET Ranges
The LEDs that receive this alternate current range are determined
by the DxLVL bits in Register 0x07 and Register 0x08.
PWM DIMMING
Setting the LEVEL_SET code to 111111 (binary) allows the
ADP8866 to dim its LEDs based on a PWM signal applied to the
nINT pin. The LED output current is pulse width modulated with
the signal applied to the nINT pin. The typical waveform and
timing are shown in Figure 29. Due to the inherent delays and
rise/fall times of this system, the best accuracy of the average output
current is obtained with PWM frequencies below 1 kHz.
nTNT PIN
(INPUT)
where:
Code is the input code programmed by the user.
Full-Scale Current is the maximum sink current allowed
per LED.
The default maximum current range of each sink of the
ADP8866 is 25.0 mA (typical). However, the ADP8866 also
allows the user to select an alternative maximum current range
to be applied to one or more LEDs. This alternate current range
still has 128 codes for its current setting. This provides
improved resolution when operating at reduced maximum
currents. One of up to 60 alternate current ranges can be
selected. An example of some of the available current ranges is
shown below. For the complete list, see Table 23.
Table 5. Example Current Range Options in Register 0x07
Range
25.00 mA
12.50 mA
8.33 mA
6.25 mA
5.00 mA
LED OUTPUT
CURRENT
OUTPUT CURRENT RANGE SELECTION
TIME
09478-032
Full Scale Current
LED_Current(mA) Code
127
LEVEL_SET Code
000010
001100
010110
100000
101010
0
09478-031
Each group has its own fade-in and fade-out times (Register
0x12 for backlight and Register 0x22 for ISCs). Each group also
has its own master enable located in Register 0x01. However,
this master enable is overwritten if any of the SCx_EN bits
(Register 0x1A and Register 0x1B) in a group are set high. This
allows complete independent control of each LED channel in
both groups.
25.00mA
12.50mA
8.33mA
6.25mA
5.00mA
20
OUTPUT CURRENT (mA)
The nine LED channels can be separated into two groups: backlight
(BL) and independent sinks (ISC). The group select is done in
Register 0x09 and Register 0x0A, with the default being that all
LEDs are part of the backlight.
Figure 31. PWM Input Waveform and Resultant LED Current
In this mode, the nINT pin functions as an input. It no longer
provides notification of the INT_STAT register.
AUTOMATED FADE-IN AND FADE-OUT
The LED drivers are easily configured for automated fade-in
and fade-out. Sixteen fade-in and fade-out rates can be selected
via the I2C interface. Fade-in and fade-out rates range from
0.0 sec to 1.75 sec (per full-scale current). Separate fade times are
assigned to the backlight LEDs and the ISC LEDs (see the LED
Groups section). The BLOFF_INT bit in Register 0x02 can be used
to flag the interrupt pin when an automated backlight fade-out has
occurred.
Rev. B | Page 14 of 52
Data Sheet
ADP8866
The fade profile is based on the transfer law selected (square,
Cubic 10, or Cubic 11) and the delta between the actual current
and the target current. Smaller changes in current reduce the
fade time. For square law fades, the fade time is given by
Fade Time = Fade Rate × (Code/127)
(4)
where the Fade Rate is shown in Table 6.
In this mode, the backlight fades in when BL_EN and nSTBY in
Register 0x01 are set high, and it fades out when BL_EN or
nSTBY is set low. However, after the fade-in is complete, any
changes to the BLMX register result in near instantaneous
changes to the backlight current. The situation is illustrated in
Figure 33.
Table 6. Available Fade-In and Fade-Out Times
Fade Rate (Seconds per 128 Codes)
0.0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.75
1.0
1.25
1.50
1.75
CABCFADE = 0 (DEFAULT)
BACKLIGHT CURRENT
TIME
Figure 33. Effect of the CABCFADE Bit
INDEPENDENT SINK CONTROL (ISC)
Each of the nine LEDs can be configured (in Register 0x10 and
Register 0x11) to operate as either part of the backlight or an
independent sink current (ISC). Each ISC can be enabled
independently and has its own current level. All ISCs share the
same fade-in rates, fade-out rates, and fade law.
30
The ISCs have additional timers to facilitate blinking functions.
A shared on timer (SCON), used in conjunction with the off
timers of each ISC (SC1OFF, SC2OFF, SC3OFF, SC4OFF,
SC5OFF, SC6OFF, and SC7OFF; see Register 0x1C through
Register 0x21) allow the LED current sinks to be configured in
various blinking modes. The on and off times are listed in the
Register Descriptions section. Blink mode is activated by setting
the off timers to any setting other than disabled.
25
20
15
SQUARE
10
SCx
CURRENT
CUBIC 11
5
ON TIME
CUBIC 10
FADE-IN
0.25
0.50
0.75
09478-033
0
0
BL EN = 0
09478-034
CHANGE
BL SETTING
CHANGE
BL SETTING
BL EN = 1
The Cubic 10 and Cubic 11 laws also use the square backlight
currents in Equation 3; however, the time between each step is
varied to produce a steeper slope at higher currents and a
shallower slope at lighter currents (see Figure 32).
CURRENT (mA)
CABCFADE = 1
FADE IN
COMPLETE
Code
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
brightness control) operation, the BLMX register is updated as
often as 60 times per second. And the changes to BLMX must
be implemented as soon as possible. Therefore, the ADP8866
has a unique mode that allows the backlight to have very fast
changes after the initial ramp in and ramp out. This mode is
entered when CABCFADE in Register 0x10 is set high.
1.00
UNIT FADE TIME
ON TIME
FADE-OUT FADE-IN
FADE-OUT
MAX
Figure 32. Comparison of the Dimming Transfers Law 25 mA Scale Shown
The fade settings applied to the backlight in Register 0x12 are
also used when the BLMX (Register 0x13) current is changed.
This provides a smooth transition to new backlight current
levels.
However, in some modes of operation, this feature is not
desired. For example, during cABC (content adjustable
OFF
TIME
SCx_EN
SET BY USER
Figure 34. LEDx Blink Mode with Fading
Rev. B | Page 15 of 52
OFF
TIME
09478-035
CABC FADE DISABLE
ADP8866
Data Sheet
Program all fade-in and fade-out timers before enabling any of
the LED current sinks. If ISCx is on during a blink cycle and
SCx_EN in Register 0x1B is cleared, it turns off (or fades to off
if fade-out is enabled). If ISCx is off during a blink cycle and
SCx_EN is cleared, it stays off.
•
Additional off time selections: D6 to D9 off times that
range from 0 sec to 12.5 sec in 100 ms increments (Register
0x1E to Register 0x21). The off times can also be set to off,
which turns the channel off at the completion of the blink
cycle. The LED turns on again when the enable signal is
toggled.
•
Heartbeat mode: This mode allows a double pulse to be
issued in a fully automated and customizable loop. Register
0x2C through Register 0x35 control the heartbeat effect.
Up to four channels (D6 to D9) can be configured to
operate in the heartbeat mode. The approximate shape of
the heartbeat is shown in Figure 35:
ADVANCED BLINKING CONTROLS
Diode D1 to Diode D5 have basic blinking controls, while
Channel D6 to Channel D9 have much more advanced
capabilities. These advanced features include
Programmable delays: Register 0x3C to Register 0x3F set
the individual delays for D6 to D9. Delays are activated
when the individual diode is enabled. Delay times range
from 0 sec to 1.270 sec in 10 ms increments.
SCON_HB
0 TO 750ms
ISCx_HB CURRENT
SCON
0 TO 750ms
ISCx CURRENT
SCFI
EN
SCFO
SCFI
SCFO
OFFTIMERx
0 TO 126 SEC
ODD PULSE
OFFTIMERx_HB
0 TO 126 SEC
EVEN PULSE
ODD PULSE
Figure 35. Customizable Heartbeat Pulse
Rev. B | Page 16 of 52
EVEN PULSE
09478-036
CURRENT (mA)
•
Data Sheet
ADP8866
SHORT-CIRCUIT PROTECTION (SCP) MODE
The ADP8866 can protect against short circuits on the output
(VOUT). Short-circuit protection (SCP) is activated at the point
when VOUT < 55% of VIN. Note that this SCP sensing is disabled
during startup and restart attempts (fault recovery). SCP
sensing is reenabled 4 ms (typical) after activation. During a
short-circuit fault, the device enters a low current consumption
state and an interrupt flag is set. The device can be restarted at
any time after receiving a short-circuit fault by simply rewriting
nSTBY = 1 in Register 0x01. It then repeats another complete
soft start sequence. Note that the value of the output
capacitance (COUT) should be small enough to allow VOUT to
reach approximately 55% (typical) of VIN within the 4 ms
(typical) time. If COUT is too large, the device inadvertently
enters short-circuit protection.
OVERVOLTAGE PROTECTION (OVP)
Overvoltage protection is implemented on the VOUT pin.
There are two types of overvoltage events: normal (no fault) and
abnormal.
Normal (No Fault) Overvoltage
In this case, the VOUT pin voltage approaches VOUT(REG) (4.9 V
typical) during normal operation. This is not caused by a fault
or load change but is simply a consequence of the input voltage
times the gain reaching the clamped output voltage VOUT(REG). To
prevent this, the ADP8866 detects when the output voltage rises
to VOUT(REG). It then increases the effective ROUT of the gain stage
to reduce the voltage that is delivered. This effectively regulates
VOUT to VOUT(REG); however, there is a limit to the effect that this
system can have on regulating VOUT. It is designed only for
normal operation and is not intended to protect against faults or
sudden load changes. During this mode, no interrupt is set, and
the operation is transparent to the LEDs and overall application.
The automatic gain selection equations take into account the
additional drop within ROUT to maintain optimum efficiency.
Abnormal (Fault/Sudden Load Change) Overvoltage
Because of the open loop behavior of the charge pump, as well
as how the gain transitions are computed, a sudden load change
or fault can abnormally force VOUT beyond 6 V. If the event
happens slowly enough, the system first tries to regulate the
output to 4.9 V as in a normal overvoltage scenario. However, if
this is not sufficient, or if the event happens too quickly, the
ADP8866 enters overvoltage protection mode when VOUT
exceeds the OVP threshold (typically 5.7 V). In this mode, only
the charge pump is disabled to prevent VOUT from rising too
high. The current sources and all other device functionality
remain intact. When the output voltage falls by about 500 mV
(to 5.2 V typical), the charge pump resumes operation. If the
fault or load step recurs, the process may repeat. An interrupt
flag is set at each OVP instance.
THERMAL SHUTDOWN
(TSD)/OVERTEMPERATURE PROTECTION
If the die temperature of the ADP8866 rises above a safety limit
(150°C typical), the controllers enter TSD protection mode. In
this mode, most of the internal functions are shut down, the
part enters standby, and the TSD_INT interrupt is set (see
Register 0x02). When the die temperature decreases below
~130°C, the part is allowed to be restarted. To restart the part,
simply remove it from standby. No interrupt is generated when
the die temperature falls below 130°C. However, if the software
clears the pending TSD_INT interrupt and the temperature
remains above 130°C, another interrupt is generated.
The complete state machine for these faults (SCP, OVP, and
TSD) is shown in Figure 36.
Rev. B | Page 17 of 52
ADP8866
Data Sheet
STANDBY
0
EXIT STANDBY
1
TSD FAULT
DIE TEMP > TSD
EXIT STANDBY
0
1
STARTUP:
CHARGE
VIN TO VOUT
DIE TEMP <
TSD – TSD(HYS)
SCP FAULT
0
VOUT > VOUT(START)
1
0
EXIT
STARTUP
VOUT < VOUT(SC)
0
WAIT
100µs (TYP)
1
G=1
1
0
VOUT < VOVP –
VOVP (HYS)
0
G = 1.5
MIN (VD1:D9 )
< VHR(UP)
1
WAIT
100µs (TYP)
MIN (VD1:D9 )
< VHR(UP)
0
0
MIN (VD1:D9 )
> VDMAX
VOUT > VOUT(REG)
1
1
1
0
OVP FAULT
TRY TO
REGULATE
VOUT TO
VOUT(REG)
1
VOUT > VOVP
0
1
VOUT < VOVP –
VOVP (HYS)
0
0
1
WAIT
100µs (TYP)
MIN (VD1:D9)
> VDMAX
VOUT > VOUT(REG)
1
0
OVP FAULT
G=2
TRY TO
REGULATE
VOUT TO
VOUT(REG)
NOTES
1. VDMAX IS THE CALCULATED GAIN DOWN TRANSITION POINT.
09478-037
VOUT > VOVP
Figure 36. Fault State Machine
Rev. B | Page 18 of 52
Data Sheet
ADP8866
INTERRUPTS
BACKLIGHT OFF INTERRUPT
There are four interrupt sources available on the ADP8866.
The backlight off interrupt (BLOFF_INT) is set when the
backlight completes a fade-out. This feature is useful to
synchronize the backlight turn off with the LCD display driver.
FADE-IN
FADE-IN
OFF-TO-MAX
FADE-OUT
MAX-TO-OFF
MAX
09478-038
BL_EN = 1
BLOFF_INT SET
BL_EN = 0
Figure 37. Backlight Off Interrupt Timing Diagram
INDEPENDENT SINK OFF INTERRUPT
The independent sink off interrupt (ISCOFF_INT) is generated
when all the independent sinks assigned in Register 0x04 and
Register 0x05 have faded to off. This can happen during a
blinking profile (where SCxOFF does not equal disabled) or
when an ISC is disabled. Note that even with fade-out set to 0,
an ISCOFF_INT is still set.
FADE-OUT
SCON
ISCOFF_INT SET
SCxOFF
SCx_EN = 1
Figure 38. Independent Sink Off Interrupt Timing Diagram
Rev. B | Page 19 of 52
ISCOFF_INT SET
09478-039
ISC CURRENT
Independent sink off: when all independent sinks that are
assigned with the DxOFFINT bits high in Register 0x04
and Register 0x05 have faded to off, this interrupt
(ISCOFF_INT, Register 0x02) is set.
Backlight off: at the end of each automated backlight fadeout, this interrupt (BLOFF_INT, Register 0x02) is set.
Overvoltage protection: OVP_INT (see Register 0x02) is
generated when the output voltage exceeds 5.7 V (typical).
Thermal shutdown circuit: an interrupt (TSD_INT,
Register 0x02) is generated when entering
overtemperature protection.
Short-circuit detection: SHORT_INT (see Register 0x02) is
generated when the device enters short-circuit protection
mode.
The interrupt (if any) that appears on the nINT pin is
determined by the bits mapped in Register INT_EN, 0x03. To
clear an interrupt, write a 1 to the interrupt in the INT_STAT
register, 0x02, or reset the part.
BACKLIGHT CURRENT
ADP8866
Data Sheet
APPLICATIONS INFORMATION
The ADP8866 allows the charge pump to operate efficiently
with a minimum of external components. Specifically, the user
must select an input capacitor (CIN), output capacitor (COUT),
and two charge pump fly capacitors (C1 and C2). CIN should be
1 μF or greater. The value must be high enough to produce a
stable input voltage signal at the minimum input voltage and
maximum output load. A 1 μF capacitor for COUT is recommended.
Larger values are permissible, but care must be exercised to ensure
that VOUT charges above 55% (typical) of VIN within 4 ms
(typical). See the Short-Circuit Protection (SCP) Mode section
for more detail.
For best practice, it is recommended that the two charge pump
fly capacitors be 1 μF; larger values are not recommended and
smaller values may reduce the ability of the charge pump to
deliver maximum current. For optimal efficiency, the charge
pump fly capacitors should have low equivalent series resistance
(ESR). Low ESR X5R or X7R capacitors are recommended for
all four components. Minimum voltage ratings should adhere to
the guidelines in Table 7:
Table 7. Capacitor Stress in Each Charge Pump Gain State
Capacitor
CIN (Input Capacitor)
COUT (Output
Capacitor)
Gain = 1×
VIN
VIN
None
Gain = 1.5×
VIN
VIN × 1.5
(Max of 5.5 V)
VIN ÷ 2
Gain = 2×
VIN
VIN × 2.0
(Max of 5.5 V)
VIN
C1 (Charge Pump
Capacitor)
C2 (Charge Pump
Capacitor)
None
VIN ÷ 2
VIN
Any color LED can be used provided that the Vf (forward
voltage) is less than 4.3 V. However, using lower Vf LEDs
reduces the input power consumption by allowing the charge
pump to operate at lower gain states.
switches). Typical ROUT values are given in Table 1 and Figure 14
and Figure 16.
VOUT is also equal to the largest Vf of the LEDs used plus the
voltage drop across the regulating current source. This gives
VOUT = Vf(MAX) + VDX
Combining Equation 6 and Equation 7 gives
VIN = (Vf(MAX) + VDX + IOUT × ROUT(G))/G
Determining the Transition Point of the Charge Pump
Consider the following design example where:
Vf(MAX) = 3.7 V
IOUT = 140 mA (7 LEDs at 20 mA each)
ROUT(G = 1.5×) = 3 Ω (obtained from Figure 12)
At the point of a gain transition, VDX = VHR(UP). Table 1 gives the
typical value of VHR(UP) as 0.2 V. Therefore, the input voltage
level when the gain transitions from 1.5× to 2× is
VIN = (3.7 V + 0.2 V + 140 mA × 3 Ω)/1.5 = 2.88 V
LAYOUT GUIDELINES
VOUT
COUT
VDX
09478-040
G × VIN
IOUT
Figure 39. Charge Pump Equivalent Circuit Model
The input voltage is multiplied by the gain (G) and delivered to
the output through an effective charge pump resistance (ROUT).
The output current flows through ROUT and produces an IR
drop, which yields
VOUT = G × VIN − IOUT × ROUT(G)
(8)
This equation is useful for calculating approximate bounds for
the charge pump design.
The equivalent model for a charge pump is shown in Figure 39.
ROUT
(7)
(6)
The ROUT term is a combination of the RDSON resistance for the
switches used in the charge pump and a small resistance that
accounts for the effective dynamic charge pump resistance. The
ROUT level changes based upon the gain (the configuration of the
Rev. B | Page 20 of 52
For optimal noise immunity, place the CIN and COUT
capacitors as close to their respective pins as possible.
These capacitors should share a short ground trace. If the
LEDs are a significant distance from the VOUT pin,
another capacitor on VOUT, placed closer to the LEDs, is
advisable.
For optimal efficiency, place the charge pump fly capacitors
as close to the part as possible.
The ground pin should be connected at the ground for the
input and output capacitors. The LFCSP exposed pad must
be soldered at the board to the GND pin.
Unused diode pins [D1:D9] can be connected to ground or
VOUT or remain floating. However, the unused diode
current sinks must be removed from the charge pump gain
calculation by setting the appropriate DxPWR bits high in
Register 0x09 and Register 0x0A.
If the interrupt pin (nINT) is not used, connect it to
ground or leave it floating. Never connect it to a voltage
supply, except through a ≥1 kΩ series resistor.
The ADP8866 has an integrated noise filter on the nRST
pin. Under normal conditions, it is not necessary to filter
the reset line. However, if exposed to an unusually noisy
signal, it is beneficial to add a small RC filter or bypass
capacitor on this pin. If the nRST pin is not used, it must
be pulled well above the VIH(MAX) level (see Table 1). Do not
allow the nRST pin to float.
Data Sheet
ADP8866
I2C PROGRAMMING AND DIGITAL CONTROL
• All registers are read/write unless otherwise specified
• Unused bits are read-as-zero.
Table 8 through Table 103 provide register and bit descriptions.
The reset value for all bits in the bit map tables is all 0s, except
in Table 9 (see Table 9 for its unique reset value). Wherever the
acronym N/A appears in the tables, it means not applicable.
The ADP8866 provides full software programmability to
facilitate its adoption in various product architectures. The I2C
address is 0100111x (x = 0 during write, x = 1 during read).
Therefore, the write address is 0x4E, and the read address is
0x4F.
Notes on the general behavior of registers:
All registers are set to default values on reset or in case of a
UVLO event.
REGISTER VALUE
ACK
SELECT REGISTER TO WRITE
8-BIT VALUE TO WRITE IN THE
ADDRESSED REGISTER
ACK
ST
09478-041
DEVICE ID
FOR WRITE
OPERATION
B0
B7
B0
REGISTER ADDRESS
STOP
R/W ACK
FROM ADP8866
1
FROM ADP8866
1
FROM ADP8866
1
WRITE = 0
0
0
1
START
0
B7
B0
B7
ST
SLAVE TO MASTER
MASTER TO SLAVE
Figure 40. I2C Write Sequence
SELECT REGISTER TO WRITE
B7
B0
1
0
0
1
DEVICE ID
FOR READ
OPERATION
SLAVE TO MASTER
MASTER TO SLAVE
Figure 41. I2C Read Sequence
Rev. B | Page 21 of 52
1
1 R/W ACK
B0
REGISTER VALUE
8-BIT VALUE TO WRITE IN THE
ADDRESSED REGISTER
ACK ST
09478-042
B7
ACK RS 0
STOP
B0
REGISTER ADDRESS
FROM MASTER
B7
1 R/W ACK
FROM ADP8866
DEVICE ID
FOR WRITE
OPERATION
1
READ = 1
1
FROM ADP8866
0
FROM ADP8866
0
REPEATED START
B0
1
WRITE = 0
B7
ST 0
START
•
ADP8866
Data Sheet
REGISTER DESCRIPTIONS
Table 8. Register Map
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B to 0x0F
0x10
0x11
0x12
0x13
0x14 to 0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36 to 0x3B
0x3C
0x3D
0x3E
0x3F
Name
MFDVID
MDCR
INT_STAT
INT_EN
ISCOFF_SEL1
ISCOFF_SEL2
GAIN_SEL
LVL_SEL1
LVL_SEL2
PWR_SEL1
PWR_SEL2
Reserved
CFGR
BLSEL
BLFR
BLMX
Reserved
ISCC1
ISCC2
ISCT1
ISCT2
OFFTIMER6
OFFTIMER7
OFFTIMER8
OFFTIMER9
ISCF
ISC1
ISC2
ISC3
ISC4
ISC5
ISC6
ISC7
ISC8
ISC9
HB_SEL
ISC6_HB
ISC7_HB
ISC8_HB
ISC9_HB
OFFTIMER6_HB
OFFTIMER7_HB
OFFTIMER8_HB
OFFTIMER9_HB
ISCT_HB
Reserved
DELAY6
DELAY7
DELAY8
DELAY9
Bit 7
Reserved
Reserved
Reserved
Bit 6
Bit 5
Manufacture ID
INT_CFG
NSTBY
ISCOFF_INT
BLOFF_INT
ISCOFF_IEN
BLOFF_IEN
D8OFFINT
D7OFFINT
D6OFFINT
Reserved
Reserved
D8LVL
D9LVL
D7LVL
D6LVL
D8PWR
D7PWR
D6PWR
D8SEL
Reserved
D7SEL
D6SEL
Bit 4
Bit 3
ALT_GSEL
SHORT_INT
SHORT_IEN
Reserved
D5OFFINT
GDWN_DIS
TSD_INT
TSD_IEN
D3OFFINT
1.5X_LIMIT
LEVEL_SET
D4LVL
D3LVL
BL_FO
SC8_EN
Bit 1
Device ID
SIS_EN
Reserved
OVP_INT
Reserved
OVP_IEN
Reserved
D4OFFINT
D5LVL
Reserved
D5PWR
D4PWR
Reserved
D9SEL
CABCFADE
D5SEL
D4SEL
Reserved
Bit 2
D3PWR
Bit 0
BL_EN
Reserved
Reserved
D9OFFINT
D2OFFINT
D1OFFINT
G_FORCE
D2LVL
D2PWR
BL_LAW
D3SEL
D2SEL
BL_FI
D1LVL
D9PWR
D1PWR
Reserved
D1SEL
BL_MC
Reserved
Reserved
SC6_EN
SC7_EN
SC5_EN
SCON
SC4OFF
Reserved
Reserved
Reserved
Reserved
SC3OFF
SC9_EN
SC4_EN
SC3_EN
Reserved
SC2OFF
SC6OFF
SC7OFF
SC8OFF
SC9OFF
SCFO
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SCFI
SCD1
SCD2
SCD3
SCD4
SCD5
SCD6
SCD7
SCD8
SCD9
D9HB_EN
SCD6_HB
SCD7_HB
SCD8_HB
SCD9_HB
SC6OFF_HB
SC7OFF_HB
SC8OFF_HB
SC9OFF_HB
Reserved
Rev. B | Page 22 of 52
D8HB_EN
D7HB_EN
SCON_HB
Reserved
DELAY6
DELAY7
DELAY8
DELAY9
Reserved
Reserved
Reserved
Reserved
SC_LAW
SC2_EN
SC1_EN
SC5OFF
SC1OFF
D6HB_EN
Data Sheet
ADP8866
Manufacturer and Device ID (MFDVID)—Register 0x00
Multiple device revisions are tracked by the device ID field. This is a read-only register.
Table 9. MFDVID Manufacturer and Device ID Bit Map
Bit 7
Bit 6
0
Bit 5
Manufacture ID
1
Bit 4
0
Bit 3
1
Bit 2
0
Bit 1
Device ID
0
Bit 0
1
1
Mode Control Register (MDCR)—Register 0x01
Table 10. MDCR Bit Map
Bit 7
Reserved
Bit 6
INT_CFG
Bit 5
NSTBY
Bit 4
ALT_GSEL
Bit 3
GDWN_DIS
Bit 2
SIS_EN
Bit 1
Reserved
Bit 0
BL_EN
Table 11.
Bit Name
N/A
INT_CFG
Bit No.
7
6
NSTBY
5
ALT_GSEL
4
GDWN_DIS
3
SIS_EN
2
N/A
BL_EN
1
0
Description
Reserved.
Interrupt configuration.
1 = processor interrupt deasserts for 50 μs and reasserts with pending events.
0 = processor interrupt remains asserted if the host tries to clear the interrupt while there is a pending event.
1 = device is in normal mode.
0 = device is in standby, only I2C is enabled.
1 = charge pump gain is automatically set to 1× every time that the BLMX (Register 0x13) is written to.
0 = writing to BLMX (Register 13) has no unique effect on the charge pump gain.
1 = the charge pump does not switch down in gain until all LEDs are off. The charge pump switches up in gain
as needed. This feature is useful if the ADP8866 charge pump is used to drive an external load.
0 = the charge pump automatically switches up and down in gain. This provides optimal efficiency but is not
suitable for driving external loads (other than those connected to the ADP8866 diode drivers).
Master enable for independent sinks.
1 = enables all LED current sinks designated as independent sinks. This bit has no effect if any of the SCx_EN
bits that are part of the independent sinks group in Register 0x1A and Register 0x1B are set.
0 = disables all sinks designated as independent sinks. This bit has no effect if any of the SCx_EN bits that are
part of the independent sinks group in Register 0x1A and Register 0x1B are set.
Reserved.
Master enable for backlight sinks.
1 = enables all LED current sinks designated as backlight.
0 = disables all sinks designated as backlight.
Rev. B | Page 23 of 52
ADP8866
Data Sheet
Interrupt Status Register (INT_STAT)—Register 0x02
Table 12. INT_STAT Bit Map
Bit 7
Reserved
Bit 6
ISCOFF_INT
Bit 5
BLOFF_INT
Bit 4
SHORT_INT
Bit 3
TSD_INT
Bit 2
OVP_INT
Bit 1
Bit 0
Reserved
Table 13.
Bit Name
N/A
ISCOFF_INT
Bit No.
7
6
BLOFF_INT
5
SHORT_INT
4
TSD_INT
3
OVP_INT
2
N/A
[1:0]
1
Description 1
Reserved.
Independent sink off.
1 = indicates that the controller has ramped all the independent sinks designated in Register 0x04 and
Register 0x05 to off.
0 = the controller has not ramped all designated independent sinks to off.
Backlight off.
1 = indicates that the controller has faded the backlight sinks to off.
0 = the controller has not completed fading the backlight sinks to off.
Short-circuit error.
1 = a short-circuit or overload condition on VOUT or current sinks was detected.
0 = no short-circuit or overload condition was detected.
Thermal shutdown.
1 = device temperature is too high and has been shut down.
0 = no overtemperature condition was detected.
Overvoltage interrupt.
1 = charge-pump output voltage has exceeded VOVP.
0 = charge-pump output voltage has not exceeded VOVP.
Reserved.
Interrupt bits are cleared by writing a 1 to the flag; writing a 0 or reading the flag has no effect.
Interrupt Enable (INT_EN)—Register 0x03
Table 14. INT_EN Bit Map
Bit 7
Reserved
Bit 6
ISCOFF_IEN
Bit 5
BLOFF_IEN
Bit 4
SHORT_IEN
Bit 3
TSD_IEN
Bit 2
OVP_IEN
Bit 1
Bit 0
Reserved
Table 15.
Bit Name
N/A
ISCOFF_IEN
Bit No.
7
6
BLOFF_IEN
5
SHORT_IEN
4
TSD_IEN
3
Description
Reserved.
Automated ISC off indicator.
1 = the automated independent sink off indicator is enabled.
0 = the automated independent sink off indicator is disabled.
Automated backlight off indicator.
1 = the automated backlight off indicator is enabled.
0 = the automated backlight off indicator is disabled.
When this bit is set, an INT is generated anytime that a backlight fade-out is over. This occurs after an automated
fade-out or after the completion of a backlight dimming profile. This is useful to synchronize the complete turn off
for the backlights with other devices in the application.
Short-circuit interrupt enabled. When the SHORT_INT status bit is set after an error condition, an interrupt is raised
to the host if the SHORT_IEN flag is enabled.
1 = the short-circuit interrupt is enabled.
0 = the short-circuit interrupt is disabled (SHORT_INT flag is still asserted).
Thermal shutdown interrupt enabled. When the TSD_INT status bit is set after an error condition, an interrupt is
raised to the host if the TSD_IEN flag is enabled.
1 = the thermal shutdown interrupt is enabled.
0 = the thermal shutdown interrupt is disabled (TSD_INT flag is still asserted).
Rev. B | Page 24 of 52
Data Sheet
ADP8866
Bit Name
OVP_IEN
Bit No.
2
N/A
[1:0]
Description
Overvoltage interrupt enabled. When the OVP_INT status bit is set after an error condition, an interrupt is raised to
the host if the OVP_IEN flag is enabled.
1 = the overvoltage interrupt is enabled.
0 = the overvoltage interrupt is disabled (OVP_INT flag is still asserted).
Reserved.
Independent Sink Interrupt Selection 1 (ISCOFF_SEL1)—Register 0x04
Table 16. ISCOFF_SEL1 Bit Map
Bit 7
Bit 6
Bit 5
Bit 4
Reserved
Bit 3
Bit 2
Bit 1
Bit 0
D9OFFINT
Table 17.
Bit Name
N/A
D9OFFINT
Bit No.
[7:1]
0
Description
Reserved.
Include Diode 9 in the ISCOFF_INT flag.
1 = Diode 9 is in the group which triggers an ISCOFF_INT. When Diode 9 and all other LEDs with
DxOFFINT are set high and go from on to off, ISCOFF_INT is set.
0 = Diode 9 is not in the group which triggers an ISCOFF_INT when all diodes in that group are off.
Independent Sink Interrupt Selection 2 (ISCOFF_SEL2)—Register 0x05
Table 18. ISCOFF_SEL2 Bit Map
Bit 7
D8OFFINT
Bit 6
D7OFFINT
Bit 5
D6OFFINT
Bit 4
D5OFFINT
Bit 3
D4OFFINT
Bit 2
D3OFFINT
Bit 1
D2OFFINT
Bit 0
D1OFFINT
Table 19.
Bit Name
D8OFFINT
Bit No.
7
D7OFFINT
6
D6OFFINT
5
D5OFFINT
4
D4OFFINT
3
D3OFFINT
2
Description
Include Diode 8 in the ISCOFF_INT flag.
1 = Diode 8 is in the group that triggers an ISCOFF_INT. When Diode 8 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 8 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Include Diode 7 in the ISCOFF_INT flag.
1 = Diode 7 is in the group that triggers an ISCOFF_INT. When Diode 7 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 7 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Include Diode 6 in the ISCOFF_INT flag.
1 = Diode 6 is in the group that triggers an ISCOFF_INT. When Diode 6 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 6 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Include Diode 5 in the ISCOFF_INT flag.
1 = Diode 5 is in the group that triggers an ISCOFF_INT. When Diode 5 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 5 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Include Diode 4 in the ISCOFF_INT flag.
1 = Diode 4 is in the group that triggers an ISCOFF_INT. When Diode 4 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 4 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Include Diode 3 in the ISCOFF_INT flag.
1 = Diode 3 is in the group that triggers an ISCOFF_INT. When Diode 3 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 3 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Rev. B | Page 25 of 52
ADP8866
Data Sheet
Bit Name
D2OFFINT
Bit No.
1
D1OFFINT
0
Description
Include Diode 2 in the ISCOFF_INT flag.
1 = Diode 2 is in the group that triggers an ISCOFF_INT. When Diode 2 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 2 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Include Diode 1 in the ISCOFF_INT flag.
1 = Diode 1 is in the group that triggers an ISCOFF_INT. When Diode 1 and all other LEDs with
DxOFFINT are set high and goes from on to off, ISCOFF_INT is set.
0 = Diode 1 is not in the group that triggers an ISCOFF_INT when all diodes in that group are off.
Charge Pump Gain Selection (GAIN_SEL)—Register 0x06
Table 20. GAIN_SEL Bit Map
Bit 7
Bit 6
Bit 5
Reserved
Bit 4
Bit 3
Bit 2
1.5X_LIMIT
Bit 1
Bit 0
G_FORCE
Table 21.
Bit Name
N/A
1.5X_LIMIT
Bit No.
7:3
2
G_FORCE
[1:0]
Description
Reserved.
1 = gain is allowed to transition up from 1× to 1.5×. The gain is never allowed to enter 2× mode.
0 = gain is allowed to transition up from 1× to 1.5× to 2× as needed.
Selects desired gain state.
00 = auto gain select.
01 = gain is locked into 1× mode.
10 = gain is locked into 1.5× mode.
11 = gain is locked into 2× mode (if 1.5X_LIMIT = 1, gain is locked into 1.5×)
Output Level Selection 1 (LVL_SEL1)—Register 0x07
Table 22. LVL_SEL1 Bit Map
Bit 7
Reserved
Bit 6
D9LVL
Bit 5
Bit 4
Bit 3
Bit 2
LEVEL_SET
Bit 1
Bit 0
Table 23.
Bit Name
N/A
D9LVL
Bit No.
7
6
LEVEL_SET
[5:0]
Description
Reserved.
Diode 9 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Output level selection. Sets the mode of operation for all DxLVL bits that are set high.
Code
N
Maximum Current Range
000000 0.8
25 mA ÷ N = 31.3 mA
000001 0.9
25 mA ÷ N = 27.8 mA
000010 1.0
25 mA ÷ N = 25.0 mA
000011 1.1
25 mA ÷ N = 22.7 mA
…
…
…
111110 7.0
25 mA ÷ N = 3.6 mA
111111 1.0
PWM current. In this mode, the INT pin functions as a PWM input and directly drives
the selected outputs.
Rev. B | Page 26 of 52
Data Sheet
ADP8866
Table 24.
Code
000000
000001
000010
000011
000100
000101
000110
000111
001000
001001
001010
001011
001100
001101
001110
001111
010000
010001
010010
010011
010100
010101
010110
010111
011000
011001
011010
011011
011100
011101
011110
011111
N
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Maximum Current Range (mA)
31.3
27.8
25.0
22.7
20.8
19.2
17.9
16.7
15.6
14.7
13.9
13.2
12.5
11.9
11.4
10.9
10.4
10.0
9.62
9.26
8.93
8.62
8.33
8.06
7.81
7.58
7.35
7.14
6.94
6.76
6.58
6.41
Code
100000
100001
100010
100011
100100
100101
100110
100111
101000
101001
101010
101011
101100
101101
101110
101111
110000
110001
110010
110011
110100
110101
110110
110111
111000
111001
111010
111011
111100
111101
111110
111111
N
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7.0
1.0
Maximum Current Range (mA)
6.25
6.10
5.95
5.81
5.68
5.56
5.43
5.32
5.21
5.10
5.00
4.90
4.81
4.72
4.63
4.55
4.46
4.39
4.31
4.24
4.17
4.10
4.03
3.97
3.91
3.85
3.79
3.73
3.68
3.62
3.57
PWM current
Output Level Selection 2 (LVL_SEL2)—Register 0x08
Table 25. LVL_SEL2 Bit Map
Bit 7
D8LVL
Bit 6
D7LVL
Bit 5
D6LVL
Bit 4
D5LVL
Bit 3
D4LVL
Table 26.
Bit Name
D8LVL
Bit No.
7
D7LVL
6
D6LVL
5
Description
Diode 8 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Diode 7 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Diode 6 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Rev. B | Page 27 of 52
Bit 2
D3LVL
Bit 1
D2LVL
Bit 0
D1LVL
ADP8866
Data Sheet
Bit Name
D5LVL
Bit No.
4
D4LVL
3
D3LVL
2
D2LVL
1
D1LVL
0
Description
Diode 5 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Diode 4 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Diode 3 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Diode 2 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
Diode 1 level select.
1 = control with the LEVEL_SET bits.
0 = normal mode (25 mA full-scale current).
LED Power Source Selection 1 (PWR_SEL1)—Register 0x09
Table 27. PWR_SEL1 Bit Map
Bit 7
Bit 6
Bit 5
Bit 4
Reserved
Bit 3
Bit 2
Bit 1
Bit 0
D9PWR
Table 28.
Bit Name
N/A
D9PWR
Bit No.
[7:1]
0
Description
Reserved.
Diode 9 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
LED Power Source Selection 2 (PWR_SEL2)—Register 0x0A
Table 29. PWR_SEL2 Bit Map
Bit 7
D8PWR
Bit 6
D7PWR
Bit 5
D6PWR
Bit 4
D5PWR
Bit 3
D4PWR
Bit 2
D3PWR
Table 30.
Bit Name
D8PWR
Bit No.
7
D7PWR
6
D6PWR
5
D5PWR
4
D4PWR
3
Description
Diode 8 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Diode 7 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Diode 6 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Diode 5 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Diode 4 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Rev. B | Page 28 of 52
Bit 1
D2PWR
Bit 0
D1PWR
Data Sheet
ADP8866
Bit Name
D3PWR
Bit No.
2
D2PWR
1
D1PWR
0
Description
Diode 3 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Diode 2 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
Diode 1 LED power source select.
1 = the LED is powered from the battery or other power source.
0 = the LED is powered from the charge pump.
BACKLIGHT REGISTER DESCRIPTIONS
Configuration Register (CFGR)—Register 0x10
Table 31. CFGR Bit Map
Bit 7
Bit 6
Reserved
Bit 5
Bit 4
D9SEL
Bit 3
CABCFADE
Bit 2
Bit 1
BL_LAW
Bit 0
Reserved
Table 32.
Bit Name
N/A
D9SEL
Bit No.
[7:5]
4
CABCFADE
3
BL_LAW
[2:1]
N/A
0
Description
Reserved.
Diode 9 backlight select.
1 = selects LED9 as part of the independent sinks group.
0 = selects LED9 as part of the backlight group.
Selects how the backlight current responds to changes in its I2C setpoint after the backlight is enabled and the fadein is complete.
1 = any changes to the backlight current setting (Register 0x13) result in a near instant transition to the new current
level. This is useful when rapid changes to the backlight current are required, such as during cABC control.
0 = any changes to the backlight current setting (Register 0x13) result in a fade to the new current level. The fade
time is determined by the fade rate (set in Register 0x12) and the delta between the old and new current level.
Backlight transfer law.
00 = square law DAC, linear time steps.
01 = square law DAC, linear time steps.
10 = square law DAC, nonlinear time steps (Cubic 10).
11 = square law DAC, nonlinear time steps (Cubic 11).
Reserved.
Backlight Select (BLSEL)—Register 0x11
Table 33. BLSEL Bit Map
Bit 7
D8SEL
Bit 6
D7SEL
Bit 5
D6SEL
Bit 4
D5SEL
Bit 3
D4SEL
Bit 2
D3SEL
Table 34.
Bit Name
D8SEL
Bit No.
7
D7SEL
6
D6SEL
5
Description
Diode 8 backlight select.
1 = selects LED8 as part of the independent sinks group.
0 = selects LED8 as part of the backlight group.
Diode 7 backlight select.
1 = selects LED7 as part of the independent sinks group.
0 = selects LED7 as part of the backlight group.
Diode 6 backlight select.
1 = selects LED6 as part of the independent sinks group.
0 = selects LED6 as part of the backlight group.
Rev. B | Page 29 of 52
Bit 1
D2SEL
Bit 0
D1SEL
ADP8866
Data Sheet
Bit Name
D5SEL
Bit No.
4
D4SEL
3
D3SEL
2
D2SEL
1
D1SEL
0
Description
Diode 5 backlight select.
1 = selects LED5 as part of the independent sinks group.
0 = selects LED5 as part of the backlight group.
Diode 4 backlight select.
1 = selects LED4 as part of the independent sinks group.
0 = selects LED4 as part of the backlight group.
Diode 3 backlight select.
1 = selects LED3 as part of the independent sinks group.
0 = selects LED3 as part of the backlight group.
Diode 2 backlight select.
1 = selects LED2 as part of the independent sinks group.
0 = selects LED2 as part of the backlight group.
Diode 1 backlight select.
1 = selects LED1 as part of the independent sinks group.
0 = selects LED1 as part of the backlight group.
Backlight Fade (BLFR)—Register 0x12
Table 35. BLFR Bit Map
Bit 7
Bit 6
Bit 5
BL_FO
Bit 4
Bit 3
Bit 2
Bit 1
BL_FI
Bit 0
Table 36.
Bit Name
BL_FO
Bit No.
[7:4]
BL_FI
[3:0]
Description
Backlight fade-out rate. The backlight fades from its current value to the off value. The times listed for BL_FO
are for a full-scale fade-out. Fades between closer current values reduce the fade time. See the Automated
Fade-in and Fade-Out section for more information.
0000 = 0.0 sec (fade-out disabled).
0001 = 0.05 sec.
0010 = 0.10 sec.
0011 = 0.15 sec.
0100 = 0.20 sec.
0101 = 0.25 sec.
0110 = 0.30 sec.
0111 = 0.35 sec.
1000 = 0.40 sec.
1001 = 0.45 sec.
1010 = 0.50 sec.
1011 = 0.75 sec.
1100 = 1.00 sec.
1101 = 1.25 sec.
1110 = 1.50 sec.
1111 = 1.75 sec.
Backlight fade-in rate. The backlight fades from 0 to its programmed value when the backlight is turned on.
The times listed for BL_FI are for a full-scale fade-in. Fades between closer current values reduce the fade time.
See the Automated Fade-in and Fade-Out section for more information.
0000 = 0.0 sec (fade-in disabled).
0001 = 0.05 sec.
0010 = 0.10 sec.
0011 = 0.15 sec.
…
1111 = 1.75 sec.
Rev. B | Page 30 of 52
Data Sheet
ADP8866
Backlight Maximum Current Register (BLMX)—Register 0x13
Table 37. BLMX Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
BL_MC
Bit 2
Bit 1
Bit 0
Table 38.
Bit Name
N/A
BL_MC
Bit No.
7
[6:0]
Description
Reserved.
Backlight maximum current. The backlight maximum current can be set according to the square law function. All
values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
5.0 mA)
DAC
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
Code
000010
001100
010110
100000
101010
0x00
0.0
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0.0003
0x02
0.0062
0.0031
0.0021
0.0016
0.0012
0x03
0.014
0.0070
0.0047
0.0035
0.0028
…
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
5.0
Table 39. Diode Output Currents per DAC Code
DAC Code
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
Current (mA)
(Full Scale = 25 mA)
LEVEL_SET = 000010
0.0
0.0016
0.0062
0.014
0.025
0.039
0.056
0.076
0.099
0.126
0.155
0.188
0.223
0.262
0.304
0.349
0.397
0.448
0.502
0.560
0.620
0.684
0.750
0.820
0.893
0.969
1.05
1.13
1.22
Current (mA)
(Full Scale = 12.5 mA)
LEVEL_SET = 001100
0.0
0.0008
0.0031
0.0070
0.012
0.019
0.028
0.038
0.050
0.063
0.078
0.094
0.112
0.131
0.152
0.174
0.198
0.224
0.251
0.280
0.310
0.342
0.375
0.410
0.446
0.484
0.524
0.565
0.608
Current (mA)
(Full Scale = 8.25 mA)
LEVEL_SET = 010110
0.0
0.0005
0.0021
0.0047
0.0083
0.013
0.019
0.025
0.033
0.042
0.052
0.063
0.074
0.087
0.101
0.116
0.132
0.149
0.167
0.187
0.207
0.228
0.250
0.273
0.298
0.323
0.349
0.377
0.405
Rev. B | Page 31 of 52
Current (mA)
(Full Scale = 6.25 mA)
LEVEL_SET = 100000
0.0
0.0004
0.0016
0.0035
0.0062
0.010
0.014
0.019
0.025
0.031
0.039
0.047
0.056
0.065
0.076
0.087
0.099
0.112
0.126
0.140
0.155
0.171
0.188
0.205
0.223
0.242
0.262
0.282
0.304
Current (mA)
(Full Scale = 5.0 mA)
LEVEL_SET = 101010
0.0
0.0003
0.0012
0.0028
0.0050
0.0078
0.011
0.015
0.020
0.025
0.031
0.038
0.045
0.052
0.061
0.070
0.079
0.090
0.100
0.112
0.124
0.137
0.150
0.164
0.179
0.194
0.210
0.226
0.243
ADP8866
DAC Code
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
Data Sheet
Current (mA)
(Full Scale = 25 mA)
LEVEL_SET = 000010
1.30
1.40
1.49
1.59
1.69
1.79
1.90
2.01
2.12
2.24
2.36
2.48
2.61
2.73
2.87
3.00
3.14
3.28
3.42
3.57
3.72
3.88
4.03
4.19
4.35
4.52
4.69
4.86
5.04
5.21
5.40
5.58
5.77
5.96
6.15
6.35
6.55
6.75
6.96
7.17
7.38
7.60
7.81
8.04
8.26
8.49
8.72
8.95
9.19
9.43
9.67
Current (mA)
(Full Scale = 12.5 mA)
LEVEL_SET = 001100
0.652
0.698
0.745
0.794
0.844
0.896
0.949
1.00
1.06
1.12
1.18
1.24
1.30
1.37
1.43
1.50
1.57
1.64
1.71
1.79
1.86
1.94
2.02
2.10
2.18
2.26
2.34
2.43
2.52
2.61
2.70
2.79
2.88
2.98
3.08
3.17
3.27
3.38
3.48
3.58
3.69
3.80
3.91
4.02
4.13
4.24
4.36
4.48
4.59
4.72
4.84
Current (mA)
(Full Scale = 8.25 mA)
LEVEL_SET = 010110
0.435
0.465
0.497
0.529
0.563
0.597
0.633
0.670
0.707
0.746
0.786
0.827
0.869
0.911
0.955
1.00
1.05
1.09
1.14
1.19
1.24
1.29
1.34
1.40
1.45
1.51
1.56
1.62
1.68
1.74
1.80
1.86
1.92
1.99
2.05
2.12
2.18
2.25
2.32
2.39
2.46
2.53
2.60
2.68
2.75
2.83
2.91
2.98
3.06
3.14
3.22
Rev. B | Page 32 of 52
Current (mA)
(Full Scale = 6.25 mA)
LEVEL_SET = 100000
0.326
0.349
0.372
0.397
0.422
0.448
0.475
0.502
0.530
0.560
0.589
0.620
0.651
0.684
0.716
0.750
0.785
0.820
0.856
0.893
0.930
0.969
1.01
1.05
1.09
1.13
1.17
1.22
1.26
1.30
1.35
1.40
1.44
1.49
1.54
1.59
1.64
1.69
1.74
1.79
1.84
1.90
1.95
2.01
2.06
2.12
2.18
2.24
2.30
2.36
2.42
Current (mA)
(Full Scale = 5.0 mA)
LEVEL_SET = 101010
0.261
0.279
0.298
0.317
0.338
0.358
0.380
0.402
0.424
0.448
0.472
0.496
0.521
0.547
0.573
0.600
0.628
0.656
0.685
0.714
0.744
0.775
0.806
0.838
0.871
0.904
0.938
0.972
1.01
1.04
1.08
1.12
1.15
1.19
1.23
1.27
1.31
1.35
1.39
1.43
1.48
1.52
1.56
1.61
1.65
1.70
1.74
1.79
1.84
1.89
1.93
Data Sheet
DAC Code
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
Current (mA)
(Full Scale = 25 mA)
LEVEL_SET = 000010
9.92
10.2
10.4
10.7
10.9
11.2
11.5
11.7
12.0
12.3
12.6
12.8
13.1
13.4
13.7
14.0
14.3
14.6
14.9
15.2
15.5
15.8
16.1
16.4
16.8
17.1
17.4
17.7
18.1
18.4
18.8
19.1
19.4
19.8
20.1
20.5
20.9
21.2
21.6
21.9
22.3
22.7
23.1
23.4
23.8
24.2
24.6
25.0
ADP8866
Current (mA)
(Full Scale = 12.5 mA)
LEVEL_SET = 001100
4.96
5.08
5.21
5.34
5.47
5.60
5.73
5.87
6.00
6.14
6.28
6.42
6.56
6.70
6.85
6.99
7.14
7.29
7.44
7.60
7.75
7.91
8.06
8.22
8.38
8.54
8.71
8.87
9.04
9.21
9.38
9.55
9.72
9.90
10.1
10.2
10.4
10.6
10.8
11.0
11.2
11.3
11.5
11.7
11.9
12.1
12.3
12.5
Current (mA)
(Full Scale = 8.25 mA)
LEVEL_SET = 010110
3.31
3.39
3.47
3.56
3.65
3.73
3.82
3.91
4.00
4.09
4.19
4.28
4.37
4.47
4.57
4.66
4.76
4.86
4.96
5.06
5.17
5.27
5.38
5.48
5.59
5.70
5.81
5.92
6.03
6.14
6.25
6.37
6.48
6.60
6.71
6.83
6.95
7.07
7.19
7.32
7.44
7.56
7.69
7.82
7.94
8.07
8.20
8.33
Rev. B | Page 33 of 52
Current (mA)
(Full Scale = 6.25 mA)
LEVEL_SET = 100000
2.48
2.54
2.61
2.67
2.73
2.80
2.87
2.93
3.00
3.07
3.14
3.21
3.28
3.35
3.42
3.50
3.57
3.65
3.72
3.80
3.88
3.95
4.03
4.11
4.19
4.27
4.35
4.44
4.52
4.60
4.69
4.77
4.86
4.95
5.04
5.12
5.21
5.30
5.40
5.49
5.58
5.67
5.77
5.86
5.96
6.05
6.15
6.25
Current (mA)
(Full Scale = 5.0 mA)
LEVEL_SET = 101010
1.98
2.03
2.08
2.14
2.19
2.24
2.29
2.35
2.40
2.46
2.51
2.57
2.62
2.68
2.74
2.80
2.86
2.92
2.98
3.04
3.10
3.16
3.23
3.29
3.35
3.42
3.48
3.55
3.62
3.68
3.75
3.82
3.89
3.96
4.03
4.10
4.17
4.24
4.32
4.39
4.46
4.54
4.61
4.69
4.77
4.84
4.92
5.00
ADP8866
Data Sheet
INDEPENDENT SINK REGISTER DESCRIPTIONS
Independent Sink Current Control Register 1 (ISCC1)—Register 0x1A
Table 40. ISCLAW Bit Map
Bit 7
Bit 6
Bit 5
Reserved
Bit 4
Bit 3
Bit 2
SC9_EN
Bit 1
Bit 0
SC_LAW
Table 41.
Bit Name
N/A
SC9_EN
Bit No.
7:3
2
SC_LAW
1:0
Description
Reserved.
This enable acts on LED9.
1 = SC9 is turned on.
0 = SC9 is turned off.
SC fade transfer law.
00 = square law DAC, linear time steps.
01 = square law DAC, linear time steps.
10 = square law DAC, nonlinear time steps (Cubic 10).
11 = square law DAC, nonlinear time steps (Cubic 11).
Independent Sink Current Control Register 2 (ISCC2)—Register 0x1B
Table 42. ISCC Bit Map
Bit 7
SC8_EN
Bit 6
SC7_EN
Bit 5
SC6_EN
Bit 4
SC5_EN
Bit 3
SC4_EN
Table 43.
Bit Name
SC8_EN
Bit No.
7
SC7_EN
6
SC6_EN
5
SC5_EN
4
SC4_EN
3
SC3_EN
2
SC2_EN
1
SC1_EN
0
Description
This enable acts on LED8.
1 = SC8 is turned on.
0 = SC8 is turned off.
This enable acts on LED7.
1 = SC7 is turned on.
0 = SC7 is turned off.
This enable acts on LED6.
1 = SC6 is turned on.
0 = SC6 is turned off.
This enable acts on LED5.
1 = SC5 is turned on.
0 = SC5 is turned off.
This enable acts on LED4.
1 = SC4 is turned on.
0 = SC4 is turned off.
This enable acts on LED3.
1 = SC3 is turned on.
0 = SC3 is turned off.
This enable acts on LED2.
1 = SC2 is turned on.
0 = SC2 is turned off.
This enable acts on LED1.
1 = SC1 is turned on.
0 = SC1 is turned off.
Rev. B | Page 34 of 52
Bit 2
SC3_EN
Bit 1
SC2_EN
Bit 0
SC1_EN
Data Sheet
ADP8866
Independent Sink Current Time (ISCT1)—Register 0x1C
Table 44. ISCT1 Bit Map
Bit 7
Bit 6
Bit 5
SCON
Bit 4
Bit 3
Bit 2
Bit 1
Reserved
Bit 0
SC5OFF
Table 45.
Bit Name
SCON
Bit No.
[7:4]
Description
SC on time. If the SCxOFF time is not disabled, then when the independent current sink is enabled (Register 0x1A
and Register 0x1B), it remains on for the on time selected (per the following list) and then turns off.
0000 = 0.00 sec 1.
0001 = 0.05 sec.
0010 = 0.10 sec.
0011 = 0.15 sec.
0100 = 0.20 sec.
0101 = 0.25 sec.
0110 = 0.30 sec.
0111 = 0.35 sec.
1000 = 0.40 sec.
1001 = 0.45 sec.
1010 = 0.50 sec.
1011 = 0.55 sec.
1100 = 0.60 sec.
1101 = 0.65 sec.
1110 = 0.70 sec.
N/A
SC5OFF
1
2
[3:2]
[1:0]
1111 = 0.75 sec.
Reserved.
SC5 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to any
other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the
SCON setting.
00 = off time disabled 2.
01 = 0.6 sec.
10 = 1.2 sec.
11 = 1.8 sec.
If SCON is set to 0 sec, then after the ISC completes a ramp up, it immediately starts to ramp back down again (if SCxOFF is not disabled). SCON should not be set to 0 if
the fade-in time is also 0 seconds.
An independent sink remains on continuously when it is enabled and SCxOFF is disabled.
Independent Sink Current Time (ISCT2)—Register 0x1D
Table 46. ISCT2 Bit Map
Bit 7
Bit 6
SC4OFF
Bit 5
Bit 4
SC3OFF
Bit 3
Rev. B | Page 35 of 52
Bit 2
SC2OFF
Bit 1
Bit 0
SC1OFF
ADP8866
Data Sheet
Table 47.
Designation
SC4OFF
Bit
[7:6]
SC3OFF
[5:4]
SC2OFF
[3:2]
SC1OFF
[1:0]
1
Description 1
SC4 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to any
other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the
SCON setting.
00 = off time disabled.
01 = 0.6 sec.
10 = 1.2 sec.
11 = 1.8 sec.
SC3 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to any
other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the
SCON setting.
00 = off time disabled.
01 = 0.6 sec.
10 = 1.2 sec.
11 = 1.8 sec.
SC2 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to any
other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the
SCON setting.
00 = off time disabled.
01 = 0.6 sec.
10 = 1.2 sec.
11 = 1.8 sec.
SC1 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to any
other value, the ISC turns off for the off time (per the following listed times) and then turns on according to the
SCON setting.
00 = off time disabled.
01 = 0.6 sec.
10 = 1.2 sec.
11 = 1.8 sec.
An independent sink remains on continuously when it is enabled and SCxOFF is 00 (disabled).
Independent Sink 6 Off Timer (OFFTIMER6)—Register 0x1E
Table 48. OFFTIMER6 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC6OFF
Bit 2
Bit 1
Bit 0
Table 49.
Bit Name
N/A
SC6OFF
1
2
3
Bit No.
7
[6:0]
Description
Reserved.
SC6 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to
any other value, the ISC turns off for the off time (per the following listed times) and then turns on according to
the SCON setting.
0000 = disabled 1.
0000001 = 0.0 sec 2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off 3.
An independent sink remains on continuously when it is enabled and SCxOFF is 00 (disabled).
Setting SCxOFF to 0 seconds is not recommended if the SCFO fade-out time is also set to 0 seconds.
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
Rev. B | Page 36 of 52
Data Sheet
ADP8866
Independent Sink 7 Off Timer (OFFTIMER7)—Register 0x1F
Table 50. OFFTIMER7 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC7OFF
Bit 2
Bit 1
Bit 0
Table 51.
Bit Name
N/A
SC7OFF
1
2
3
Bit No.
7
[6:0]
Description
Reserved.
SC7 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to
any other value, the ISC turns off for the off time (per the following listed times) and then turns on according to
the SCON setting.
0000 = disabled1.
0000001 = 0.0 sec2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off3.
An independent sink remains on continuously when it is enabled and SCxOFF is 00 (disabled).
Setting SCxOFF to 0 seconds is not recommended if the SCFO fade-out time is also set to 0 seconds.
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
Independent Sink 8 Off Timer (OFFTIMER8)—Register 0x20
Table 52. OFFTIMER8 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC8OFF
Bit 2
Bit 1
Bit 0
Table 53.
Bit Name
N/A
SC8OFF
1
2
3
Bit No.
7
[6:0]
Description
Reserved
SC8 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to
any other value, the ISC turns off for the off time (per the following listed times) and then turns on according to
the SCON setting.
0000 = disabled1.
0000001 = 0.0 sec2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off3.
An independent sink remains on continuously when it is enabled and SCxOFF is 00 (disabled).
Setting SCxOFF to 0 seconds is not recommended if the SCFO fade-out time is also set to 0 seconds.
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
Rev. B | Page 37 of 52
ADP8866
Data Sheet
Independent Sink 9 Off Timer (OFFTIMER9)—Register 0x21
Table 54. OFFTIMER9 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC9OFF
Bit 2
Bit 1
Bit 0
Table 55.
Bit Name
N/A
SC9OFF
1
2
3
Bit No.
7
[6:0]
Description
Reserved.
SC9 off time. When the SC off time is disabled, the SC remains on while enabled. When the SC off time is set to
any other value, the ISC turns off for the off time (per the following listed times) and then turns on according to
the SCON setting.
0000 = disabled 1.
0000001 = 0.0 sec 2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off 3.
An independent sink remains on continuously when it is enabled and SCxOFF is 00 (disabled).
Setting SCxOFF to 0 seconds is not recommended if the SCFO fade-out time is also set to 0 seconds.
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
Independent Sink Current Fade (ISCF)—Register 0x22
Table 56. ISCF Bit Map
Bit 7
Bit 6
Bit 5
SCFO
Bit 4
Bit 3
Bit 2
Bit 1
SCFI
Bit 0
Table 57.
Bit Name
SCFO
Bit No.
[7:4]
Description
Sink current fade-out time. Note that the fade time given is from full scale to zero (the actual full-scale value is
affected by the LEVEL_SET bits). Binary code fade-out times are as follows:
0000 = disabled.
0001 = 0.05 sec.
0010 = 0.10 sec.
0011 = 0.15 sec.
0100 = 0.20 sec.
0101 = 0.25 sec.
0110 = 0.30 sec.
0111 = 0.35 sec.
1000 = 0.40 sec.
1001 = 0.45 sec.
1010 = 0.50 sec.
1011 = 0.75 sec.
1100 = 1.00 sec.
1101 = 1.25 sec.
1110 = 1.50 sec.
1111 = 1.75 sec.
Rev. B | Page 38 of 52
Data Sheet
Bit Name
SCFI
Bit No.
[3:0]
ADP8866
Description
Sink current fade-in time. Note that the fade time given is from zero to full scale (the actual full-scale value is affected
by the LEVEL_SET bits). Binary code fade-out times are as follows:
0000 = disabled.
0001 = 0.05 sec.
0010 = 0.10 sec.
0011 = 0.15 sec.
0100 = 0.20 sec.
…
1111 = 1.75 sec.
Sink Current Register LED1(ISC1)—Register 0x23
Table 58. ISC1 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD1
Bit 2
Bit 1
Bit 0
Table 59.
Bit Name
N/A
SCD1
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale = 25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
DAC
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
Code 000010
001100
010110
100000
0.0
0.0
0.0
0.0
0x00
0.0016
0.0008
0.0005
0.0004
0x01
0.0062
0.0031
0.0021
0.0016
0x02
0.014
0.0070
0.0047
0.0035
0x03
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
0x7F
…
5.0
…
25.0
…
12.5
…
8.33
…
6.25
Sink Current Register LED2 (ISC2)—Register 0x24
Table 60. ISC2 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD2
Bit 2
Bit 1
Bit 0
Table 61.
Bit Name
N/A
SCD2
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
25 mA)
(Full Scale =
(Full Scale =
(Full Scale =
12.5 mA)
8.25 mA)
6.25 mA)
LEVEL_SET =
DAC Code
000010
LEVEL_SET=001100 LEVEL_SET=010110 LEVEL_SET=100000
0x00
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0x02
0.0062
0.0031
0.0021
0.0016
0x03
0.014
0.0070
0.0047
0.0035
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
Rev. B | Page 39 of 52
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
ADP8866
Data Sheet
Sink Current Register LED3 (ISC3)—Register 0x25
Table 62. ISC3 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD3
Bit 2
Bit 1
Bit 0
Table 63.
Bit Name
N/A
SCD3
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
000010
001100
010110
100000
DAC Code
0x00
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0x02
0.0062
0.0031
0.0021
0.0016
0x03
0.014
0.0070
0.0047
0.0035
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
Sink Current Register LED4 (ISC4)—Register 0x26
Table 64. ISC4 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD4
Bit 2
Bit 1
Bit 0
Table 65.
Bit Name
N/A
SCD4
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
000010
001100
010110
100000
DAC Code
0x00
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0x02
0.0062
0.0031
0.0021
0.0016
0x03
0.014
0.0070
0.0047
0.0035
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
Sink Current Register LED5 (ISC5)—Register 0x27
Table 66. ISC5 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD5
Rev. B | Page 40 of 52
Bit 2
Bit 1
Bit 0
Data Sheet
ADP8866
Table 67.
Bit Name
N/A
SCD5
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
DAC
Code
0x00
0x01
0x02
0x03
…
0x7F
Current (mA)
(Full Scale = 25 mA)
LEVEL_SET = 000010
0.0
0.0016
0.0062
0.014
…
25.0
Current (mA)
(Full Scale =
12.5 mA)
LEVEL_SET = 001100
0.0
0.0008
0.0031
0.0070
…
12.5
Current (mA)
(Full Scale =
8.25 mA)
LEVEL_SET = 010110
0.0
0.0005
0.0021
0.0047
…
8.33
Current (mA)
(Full Scale =
6.25 mA)
LEVEL_SET = 100000
0.0
0.0004
0.0016
0.0035
…
6.25
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
Sink Current Register LED6 (ISC6)—Register 0x28
Table 68. ISC6 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD6
Bit 2
Bit 1
Bit 0
Table 69.
Bit Name
N/A
SCD6
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
DAC
Code
0x00
0x01
0x02
0x03
…
0x7F
Current (mA)
(Full Scale = 25 mA)
LEVEL_SET = 000010
0.0
0.0016
0.0062
0.014
…
25.0
Current (mA)
(Full Scale =
12.5 mA)
LEVEL_SET = 001100
0.0
0.0008
0.0031
0.0070
…
12.5
Current (mA)
(Full Scale =
8.25 mA)
LEVEL_SET = 010110
0.0
0.0005
0.0021
0.0047
…
8.33
Current (mA)
(Full Scale =
6.25 mA)
LEVEL_SET = 100000
0.0
0.0004
0.0016
0.0035
…
6.25
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
Sink Current Register LED7 (ISC7)—Register 0x29
Table 70. ISC7 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD7
Rev. B | Page 41 of 52
Bit 2
Bit 1
Bit 0
ADP8866
Data Sheet
Table 71.
Bit Name
N/A
SCD7
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale = 25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
DAC
Code LEVEL_SET = 000010 LEVEL_SET = 001100 LEVEL_SET = 010110 LEVEL_SET = 100000
0x00
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0x02
0.0062
0.0031
0.0021
0.0016
0x03
0.014
0.0070
0.0047
0.0035
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
Current (mA)
(Full Scale = 5.0 mA)
LEVEL_SET = 101010
0.0
0.0003
0.0012
0.0028
…
5.0
Sink Current Register LED8 (ISC8)—Register 0x2A
Table 72. ISC8 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD8
Bit 2
Bit 1
Bit 0
Table 73.
Bit Name
N/A
SCD8
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale = 25 mA) 12.5 mA)
8.25 mA)
6.25 mA)
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
001100
010110
100000
DAC Code 000010
0x00
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0x02
0.0062
0.0031
0.0021
0.0016
0x03
0.014
0.0070
0.0047
0.0035
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
Sink Current Register LED9 (ISC9)—Register 0x2B
Table 74. ISC9 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD9
Bit 2
Bit 1
Bit 0
Table 75.
Bit Name
N/A
SCD9
Bit No.
7
[6:0]
Description
Reserved.
Sink current. All values scale with the setting of LEVEL_SET. See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale = 25 mA) 12.5 mA)
8.25 mA)
6.25 mA)
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
001100
010110
100000
DAC Code 000010
0x00
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0x02
0.0062
0.0031
0.0021
0.0016
0x03
0.014
0.0070
0.0047
0.0035
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
Rev. B | Page 42 of 52
Current (mA)
(Full Scale =
5.0 mA)
LEVEL_SET =
101010
0.0
0.0003
0.0012
0.0028
…
5.0
Data Sheet
ADP8866
Heartbeat Enable Selection (HB_SEL)—Register 0x2C
Table 76. HB_SEL Bit Map
Bit 7
Bit 6
Bit 5
Reserved
Bit 4
Bit 3
D9HB_EN
Bit 2
D8HB_EN
Bit 1
D7HB_EN
Bit 0
D6HB_EN
Table 77.
Bit Name
N/A
D9HB_EN
Bit No.
[7:4]
3
D8HB_EN
2
D7HB_EN
1
D6HB_EN
0
Description
Reserved.
Diode 9 heartbeat enable.
1 = heartbeat for this channel is enabled (all HB registers apply to every even numbered pulse).
0 = heartbeat for this channel is disabled (all HB registers are ignored).
Diode 8 heartbeat enable.
1 = heartbeat for this channel is enabled (all HB registers apply to every even numbered pulse).
0 = heartbeat for this channel is disabled (all HB registers are ignored).
Diode 7 heartbeat enable.
1 = heartbeat for this channel is enabled (all HB registers apply to every even numbered pulse).
0 = heartbeat for this channel is disabled (all HB registers are ignored).
Diode 6 heartbeat enable.
1 = heartbeat for this channel is enabled (all HB registers apply to every even numbered pulse).
0 = heartbeat for this channel is disabled (all HB registers are ignored).
Independent Sink Current LED6—Even Heartbeat Pulses (ISC6_HB)—Register 0x2D
Table 78. ISC6_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD6_HB
Bit 2
Bit 1
Bit 0
Table 79.
Bit Name
N/A
SCD6_HB
Bit No.
7
[6:0]
Description
Reserved.
Sink current for the even numbered pulses when heartbeat mode for this channel is enabled. Use the following DAC code schedule.
See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
5.0 mA)
DAC
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
Code 000010
001100
010110
100000
101010
0x00
0.0
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0.0003
0x02
0.0062
0.0031
0.0021
0.0016
0.0012
0x03
0.014
0.0070
0.0047
0.0035
0.0028
…
0x7F
…
25.0
…
12.5
…
8.33
…
6.25
…
5.0
Independent Sink Current LED7—Even Heartbeat Pulses (ISC7_HB)—Register 0x2E
Table 80. ISC7_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD7_HB
Rev. B | Page 43 of 52
Bit 2
Bit 1
Bit 0
ADP8866
Data Sheet
Table 81.
Bit Name
N/A
SCD7_HB
Bit No.
7
[6:0]
Description
Reserved.
Sink current for the even numbered pulses when heartbeat mode for this channel is enabled. Use the following DAC code schedule.
See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale =
(Full Scale = 25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
5.0 mA)
DAC
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
LEVEL_SET =
Code
000010
001100
010110
100000
101010
0x00
0.0
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0.0003
0x02
0.0062
0.0031
0.0021
0.0016
0.0012
0x03
0.014
0.0070
0.0047
0.0035
0.0028
…
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
5.0
Independent Sink Current LED8—Even Heartbeat Pulses (ISC8_HB)—Register 0x2F
Table 82. ISC8_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD8_HB
Bit 2
Bit 1
Bit 0
Table 83.
Bit Name
N/A
SCD8_HB
Bit No.
7
[6:0]
Description
Reserved.
Sink current for the even numbered pulses when heartbeat mode for this channel is enabled. Use the following DAC code schedule.
See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
5.0 mA)
(Full Scale = 25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
DAC
LEVEL_SET =
Code
LEVEL_SET = 000010 LEVEL_SET = 001100 LEVEL_SET = 010110 LEVEL_SET = 100000 101010
0x00
0.0
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0.0003
0x02
0.0062
0.0031
0.0021
0.0016
0.0012
0x03
0.014
0.0070
0.0047
0.0035
0.0028
…
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
5.0
Independent Sink Current LED9—Even Heartbeat Pulses (ISC9_HB)—Register 0x30
Table 84. ISC9_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SCD9_HB
Rev. B | Page 44 of 52
Bit 2
Bit 1
Bit 0
Data Sheet
ADP8866
Table 85.
Bit Name
N/A
SCD9_HB
Bit No.
7
[6:0]
Description
Reserved.
Sink current for the even numbered pulses when heartbeat mode for this channel is enabled. Use the following DAC code schedule.
See Table 39 for a complete list of values.
Current (mA)
Current (mA)
Current (mA)
Current (mA)
(Full Scale =
Current (mA)
(Full Scale =
(Full Scale =
(Full Scale =
5.0 mA)
(Full Scale = 25 mA)
12.5 mA)
8.25 mA)
6.25 mA)
DAC
LEVEL_SET =
Code
LEVEL_SET = 000010 LEVEL_SET = 001100 LEVEL_SET = 010110 LEVEL_SET = 100000 101010
0x00
0.0
0.0
0.0
0.0
0.0
0x01
0.0016
0.0008
0.0005
0.0004
0.0003
0x02
0.0062
0.0031
0.0021
0.0016
0.0012
0x03
0.014
0.0070
0.0047
0.0035
0.0028
…
…
…
…
…
…
0x7F
25.0
12.5
8.33
6.25
5.0
Independent Sink 6 Off Timer—Even Heartbeat Pulses (OFFTIMER6_HB)—Register 0x31
Table 86. OFFTIMER6_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC6OFF_HB
Bit 2
Bit 1
Bit 0
Table 87.
Bit Name
N/A
SC6OFF_HB
Bit No.
7
[6:0]
Description
Reserved.
SC6 off time for the even numbered pulses when heartbeat mode for this channel is enabled. When the
SC6OFF_HB time is disabled, SC6 goes immediately from the even numbered on time to the odd numbered on
time. When the SC off time is set to any other value, the ISC turns off for the off time (per the following listed
times) and then turns on according to the SCON6_HB setting.
0000 = disabled 1.
0000001 = 0.0 sec 2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off 3.
A disabled setting leaves the LED on. This is useful for setting up a blink sequence that runs once and then stays on.
Setting SCxOFF_HB to 0 seconds is not recommended if the SCFO_HB fade-out time is also set to 0 seconds.
3
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
1
2
Independent Sink 7 Off Timer—Even Heartbeat Pulses (OFFTIMER7_HB)—Register 0x32
Table 88. OFFTIMER7_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC7OFF_HB
Rev. B | Page 45 of 52
Bit 2
Bit 1
Bit 0
ADP8866
Data Sheet
Table 89.
Bit Name
N/A
SC7OFF_HB
1
2
3
Bit No.
7
[6:0]
Description
Reserved.
SC7 off time for the even numbered pulses when heartbeat mode for this channel is enabled. When the
SC7OFF_HB time is disabled, SC7 goes immediately from the even numbered on time to the odd numbered on
time. When the SC off time is set to any other value, the ISC turns off for the off time (per the following listed
times) and then turns on according to the SCON7_HB setting.
0000 = disabled 1.
0000001 = 0.0 sec 2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off 3.
A disabled setting leaves the LED on. This is useful for setting up a blink sequence that runs once and then stays on.
Setting SCxOFF_HB to 0 seconds is not recommended if the SCFO_HB fade-out time is also set to 0 seconds.
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
Independent Sink 8 Off Timer—Even Heartbeat Pulses (OFFTIMER8_HB)—Register 0x33
Table 90. OFFTIMER8_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC8OFF_HB
Bit 2
Bit 1
Bit 0
Table 91.
Bit Name
N/A
SC8OFF_HB
Bit No.
7
[6:0]
Description
Reserved.
SC8 off time for the even numbered pulses when heartbeat mode for this channel is enabled. When the
SC8OFF_HB time is disabled, SC8 goes immediately from the even numbered on time to the odd numbered on
time. When the SC off time is set to any other value, the ISC turns off for the off time (per the following listed
times) and then turns on according to the SCON8_HB setting.
0000 = disabled 1.
0000001 = 0.0 sec 2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off 3.
A disabled setting leaves the LED on. This is useful for setting up a blink sequence that runs once and then stays on.
Setting SCxOFF_HB to 0 seconds is not recommended if the SCFO_HB fade-out time is also set to 0 seconds.
3
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
1
2
Independent Sink 9 Off Timer—Even Heartbeat Pulses (OFFTIMER9_HB)—Register 0x34
Table 92. OFFTIMER9_HB Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
SC9OFF_HB
Rev. B | Page 46 of 52
Bit 2
Bit 1
Bit 0
Data Sheet
ADP8866
Table 93.
Bit Name
N/A
SC9OFF_HB
1
2
3
Bit No.
7
[6:0]
Description
Reserved.
SC9 off time for the even numbered pulses when heartbeat mode for this channel is enabled. When the
SC9OFF_HB time is disabled, SC9 goes immediately from the even numbered on time to the odd numbered on
time. When the SC off time is set to any other value, the ISC turns off for the off time (per the following listed
times) and then turns on according to the SCON9_HB setting.
0000 = disabled 1.
0000001 = 0.0 sec 2.
0000010 = 0.1 sec.
0000011 = 0.2 sec.
…
1111110 = 12.5 sec.
1111111 = off 3.
A disabled setting leaves the LED on. This is useful for setting up a blink sequence that runs once and then stays on.
Setting SCxOFF_HB to 0 seconds is not recommended if the SCFO_HB fade-out time is also set to 0 seconds.
Setting SCxOFF to off causes the LED to be held off indefinitely. This is useful for setting up a blink sequence that runs once and then goes to off.
Heartbeat On Time (ISCT_HB)—Register 0x35
Table 94. ISCTHB1 Bit Map
Bit 7
Bit 6
Bit 5
Reserved
Bit 4
Bit 3
Bit 2
Bit 1
SCON_HB
Bit No.
[7:4]
[3:0]
Description
Reserved.
On time for D6 to D9 even numbered pulses, when heartbeat is enabled for those channels.
0000 = 0.00 sec.
0001 = 0.05 sec.
0010 = 0.10 sec.
0011 = 0.15 sec.
0100 = 0.20 sec.
0101 = 0.25 sec.
0110 = 0.30 sec.
0111 = 0.35 sec.
1000 = 0.40 sec.
1001 = 0.45 sec.
1010 = 0.50 sec.
1011 = 0.55 sec.
1100 = 0.60 sec.
1101 = 0.65 sec.
1110 = 0.70 sec.
1111 = 0.75 sec.
Bit 0
Table 95.
Bit Name
N/A
SCON_HB
Enable Delay Time for SC6 (DELAY6)—Register 0x3C
Table 96. DELAY6 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
DELAY6
Rev. B | Page 47 of 52
Bit 2
Bit 1
Bit 0
ADP8866
Data Sheet
Table 97.
Bit Name
N/A
DELAY6
Bit No.
7
[6:0]
Description
Reserved.
Enable delay time for SC6. When SC6 is enabled, the ADP8866 automatically waits the specified time before starting
the SC6 fade-in.
0000 = 0 ms (no delay when SC6 enable is exercised).
0000001 = 10 ms.
0000010 = 20 ms.
0000011 = 30 ms.
…
1111111 = 1270 ms.
Enable Delay Time for SC7 (DELAY7)—Register 0x3D
Table 98. DELAY7 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
DELAY7
Bit 2
Bit 1
Bit 0
Table 99.
Bit Name
N/A
DELAY7
Bit No.
7
[6:0]
Description
Reserved.
Enable delay time for SC7. When SC7 is enabled, the ADP8866 automatically waits the specified time before starting
the SC7 fade-in.
0000 = 0 ms (no delay when SC7 enable is exercised).
0000001 = 10 ms.
0000010 = 20 ms.
0000011 = 30 ms.
…
1111111 = 1270 ms.
Enable DelayTime for SC8 (DELAY8)—Register 0x3E
Table 100. DELAY8 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
DELAY8
Bit 2
Bit 1
Bit 0
Table 101.
Bit Name
N/A
DELAY8
Bit No.
7
[6:0]
Description
Reserved.
Enable delay time for SC8. When SC8 is enabled, the ADP8866 automatically waits the specified time before starting
the SC8 fade-in.
0000 = 0 ms (no delay when SC8 enable is exercised).
0000001 = 10 ms.
0000010 = 20 ms.
0000011 = 30 ms.
…
1111111 = 1270 ms.
Enable Delay Time for SC9 (DELAY9)—Register 0x3F
Table 102. DELAY9 Bit Map
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
Bit 3
DELAY9
Rev. B | Page 48 of 52
Bit 2
Bit 1
Bit 0
Data Sheet
ADP8866
Table 103.
Bit Name
N/A
DELAY9
Bit No.
7
[6:0]
Description
Reserved.
Enable delay time for SC9. When SC9 is enabled, the ADP8866 automatically waits the specified time before starting
the SC9 fade-in.
0000 = 0 ms (no delay when SC9 enable is exercised).
0000001 = 10 ms.
0000010 = 20 ms.
0000011 = 30 ms.
…
1111111 = 1270 ms.
Rev. B | Page 49 of 52
ADP8866
Data Sheet
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
0.30
0.25
0.18
0.50
BSC
16
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
20
1
15
2.75
2.60 SQ
2.35
EXPOSED
PAD
5
11
TOP VIEW
0.80
0.75
0.70
SIDE VIEW
PKG-003502
SEATING
PLANE
0.50
0.40
0.30
10
6
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
0.20 MIN
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
10-12-2017-C
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-11.
DIRECTION OF FEED
09478-043
Figure 42. 20 Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.75 mm Package Height
(CP-20-8)
Dimensions shown in millimeters
Figure 43. Tape and Reel Orientation for LFCSP Units
ORDERING GUIDE
Model1
ADP8866ACPZ-R7
1
Temperature Range
−40°C to +105°C
Package Description
20-Lead LFCSP, 7“ Tape and Reel
Z = RoHS Compliant Part.
Rev. B | Page 50 of 52
Package Option
CP-20-8
Data Sheet
ADP8866
NOTES
Rev. B | Page 51 of 52
ADP8866
Data Sheet
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2011–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09478-0-11/17(B)
Rev. B | Page 52 of 52
工商网监
湘ICP备2023018690号
