ADPD188BI-ACEZR7

Data Sheet Integrated Optical Module for Smoke Detection ADPD188BI FEATURES GENERAL DESCRIPTION 3.8 mm × 5.0 mm × 0.9 mm module with integrated optical components 1 blue LED, 1 IR LED, and 2 photodiodes 2 external inputs for other sensors (for example, carbon monoxide (CO) and temperature) Three 370 mA LED drivers 20-bit burst accumulator enabling 20 bits per sample period On-board sample to sample accumulator enabling up to 27 bits per data read Optimized SNR for signal limited cases I2C or SPI communications The ADPD188BI is a complete photometric system for smoke detection using optical dual wavelength technology. The module integrates a highly efficient photometric front end, two light emitting diodes (LEDs), and two photodiodes (PDs). These items are housed in a custom package that prevents light from going directly from the LED to the photodiode without first entering the smoke detection chamber. The front end of the application specific integrated circuit (ASIC) consists of a control block, a 14-bit analog-to-digital converter (ADC) with a 20-bit burst accumulator, and three flexible, independently configurable LED drivers. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonly caused by ambient light. The data output and functional configuration occur over a 1.8 V I2C interface or serial peripheral interface (SPI) port. APPLICATIONS Smoke detection FUNCTIONAL BLOCK DIAGRAM VDD1 VDD2 PDC ADPD188BI PD1 EXT_IN1 CH1 BPF ±1 INTEGRATOR TIA_VREF VREF PD2 EXT_IN2 CH2 BPF 1µF ±1 INTEGRATOR TIA_VREF PDET1 PD3 CH3 BPF CS ±1 INTEGRATOR TIME SLOT A DATA TIA_VREF PDET2 14-BIT ADC PD4 CH4 VLED1 BPF ±1 INTEGRATOR TIA_VREF VLED3 IR AFE CONFIGURATION, TIME SLOT B BLUE LED1/DNC LED1 DRIVER TIME SLOT B DATA DIGITAL INTERFACE AND CONTROL MOSI MISO SDA SCL GPIO0 GPIO1 LED3 DRIVER LED3/DNC LED2 AFE CONFIGURATION, TIME SLOT A SCLK LED2 DRIVER LGND NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN WHEN USING INTERNAL LEDs. AGND DGND 16385-001 PDC Figure 1. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2018–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADPD188BI Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Connection Diagram ................................................... 24 Applications ...................................................................................... 1 Land Pattern ............................................................................... 24 General Description ......................................................................... 1 Recommended Start-Up Sequence .......................................... 24 Functional Block Diagram .............................................................. 1 Reading Data............................................................................... 25 Revision History ............................................................................... 2 Clocks and Timing Calibration ................................................ 26 Specifications .................................................................................... 4 Optional Timing Signals Available on GPIO0 and GPIO1 . 27 Analog Specifications................................................................... 6 LED Driver Pins and LED Supply Voltage ............................. 28 Digital Specifications ................................................................... 7 LED Driver Operation ............................................................... 28 Timing Specifications .................................................................. 8 Determining the Average Current........................................... 29 Absolute Maximum Ratings ......................................................... 10 Determining CVLED ..................................................................... 29 Thermal Resistance .................................................................... 10 Using External LEDs ................................................................. 30 Recommended Soldering Profile ............................................. 10 Calculating Current Consumption.......................................... 30 ESD Caution................................................................................ 10 Optimizing SNR ......................................................................... 30 Pin Configuration and Function Descriptions .......................... 11 TIA ADC Mode .......................................................................... 33 Typical Performance Characteristics ........................................... 12 Float Mode .................................................................................. 35 Theory of Operation ...................................................................... 15 Introduction ................................................................................ 15 Recommended Configuration for Smoke Detector Application.................................................................................. 42 Optical Components .................................................................. 15 Using a Smoke Chamber with the ADPD188BI .................... 42 Dual Time Slot Operation ......................................................... 16 Register Details ............................................................................... 43 Time Slot Switch ......................................................................... 17 LED Control Registers ............................................................... 47 Adjustable Sampling Frequency............................................... 18 AFE Configuration Registers.................................................... 49 External Synchronization for Sampling .................................. 18 Float Mode Registers ................................................................. 53 State Machine Operation .......................................................... 18 System Registers ......................................................................... 55 Normal Mode Operation and Data Flow................................ 19 ADC Registers ............................................................................ 60 Communications Interface ........................................................... 21 Data Registers ............................................................................. 61 I2C Interface ................................................................................ 21 Outline Dimensions ....................................................................... 62 SPI Port ........................................................................................ 22 Ordering Guide .......................................................................... 62 Applications Information.............................................................. 24 REVISION HISTORY 9/2020—Rev. A to Rev. B Changes to Typical Performance Characteristics Section ........ 12 Deleted Figure 18; Renumbered Sequentially ............................ 14 Changes to Figure 18 and Figure 19 ............................................ 14 11/2019—Rev. 0 to Rev. A Changes to Table 1 ........................................................................... 5 Added Endnote 1, Table 2; Renumbered Sequentially ............... 6 Changed Output Voltage Level Parameter to SDA Output Voltage Level Parameter, Table 3 ................................................... 7 Added Endnote 1, Table 6 ............................................................. 10 Changes to Thermal Resistance Section...................................... 10 Changes to Figure 10 and Figure 11 ............................................ 12 Changes to Figure 12 and Figure 13 ............................................ 13 Added Figure 19 and Figure 20; Renumbered Sequentially..... 14 Changes to Figure 21 ..................................................................... 15 Changes to Dual Time Slot Operation Section and Table 11 .. 16 Changes to Time Slot Switch Section .......................................... 17 Changes to Adjustable Sampling Frequency Section ................ 18 Changes to Averaging Section ...................................................... 20 Changes to I2C Interface Section.................................................. 21 Changes to Reading Data Using the FIFO Section.................... 25 Changes to Calibrating the 32 kHz Clock Section..................... 27 Deleted Optimizing SNR per Watt in a Signal Limited System Section .............................................................................................. 29 Change to Determining the Average Current Section .............. 29 Rev. B | Page 2 of 62 Data Sheet ADPD188BI Added Optimizing SNR Section and Setting Optimal TIA Gain and LED Current Section ...............................................................30 Deleted Measuring PCB Parasitic Input Resistance Section and Measuring TIA Input Shunt Resistance Section.........................31 Changes to Tuning the Pulse Count Section ..............................31 Added Improving SNR Using Integrator Chopping Section ...31 Added Figure 39 and Table 18; Renumbered Sequentially .......32 Changes to Protecting Against TIA Saturation in Normal Operation Section ...........................................................................33 Changes to Using the EXT_IN1 and EXT_IN2 Inputs with a Voltage Source Section and Table 19 ...........................................34 Change to Float Mode Section and Table 19 ..............................35 Changes to Float Mode Limitations Section ...............................37 Changes to Float Mode for Synchronous LED Measurements Section...............................................................................................38 Added Recommended Configuration for Smoke Detector Application Section, Table 26, Using a Smoke Chamber with the ADPD188BI Section, and Figure 46 ...................................... 42 Changed Register Listing Section to Register Details Section ..... 43 Changes to Register Details Section and Table 27 ..................... 43 Changes to Table 28........................................................................ 47 Changes to Table 29........................................................................ 49 Changes to Table 30........................................................................ 51 Changes to Table 31........................................................................ 52 Changes to Table 33........................................................................ 55 Changes to Table 34........................................................................ 60 Changes to Ordering Guide .......................................................... 62 6/2018—Revision 0: Initial Version Rev. B | Page 3 of 62 ADPD188BI Data Sheet SPECIFICATIONS The voltage applied at the VDD1 and VDD2 pins (VDD) = 1.8 V, and TA = full operating temperature range, unless otherwise noted. Table 1. Parameter CURRENT CONSUMPTION Peak VDD Supply Current VDD Standby Current Average VDD Supply Current 1 Pulse 16 Pulses Average VLED 1 Supply Current 1 Pulse 16 Pulses SATURATION ILLUMINANCE2 Direct Illumination DATA ACQUISITION ADC Resolution Per Sample Per Data Read LED PERIOD Sampling Frequency 5 CATHODE PIN (PDC) VOLTAGE During All Sampling Periods During Time Slot A Sampling During Time Slot B Sampling Test Conditions/Comments See the Calculating Current Consumption section for the relevant equations Single-channel (Register 0x3C, Bits[8:3] = 0x38) Min Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x3 8 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x06 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x1 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x2 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x38 Rev. B | Page 4 of 62 Unit mA µA 0.8 0.7 1.0 1.9 1.8 3.3 µA µA µA µA µA µA 0.2 3.2 µA µA 13.0 6.5 3.25 1.63 kLux kLux kLux kLux 14 20 27 19 17 2000 Bits Bits Bits µs µs Hz 0.122 1600 Hz 0.122 1600 Hz 0.122 1000 Hz Blackbody color temperature (T = 5500 K) 3, Photodetector 1 (PDET1) and Photodetector 2 (PDET2) multiplexed in a single channel (1.2 mm2 active area) Transimpedance amplifier (TIA) gain = 25 kΩ TIA gain = 50 kΩ TIA gain = 100 kΩ TIA gain = 200 kΩ Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 1 6 Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 0 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x06 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x1 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x2 Max 4.5 0.3 1 Hz data rate; LED offset = 25 µs; LED pulse period (tLED_PERIOD) = 15 µs; LED peak current = 100 mA Time Slot A only Time Slot B only Both Time Slot A and Time Slot B Time Slot A only Time Slot B only Both Time Slot A and Time Slot B 1 Hz data rate; LED peak current = 100 mA and 2 µs LED pulse Single pulse 64 pulses to 255 pulses 64 pulses to 255 pulses; 128 samples averaged AFE width = 4 µs 4 AFE width = 3 µs Time Slot A or Time Slot B; normal mode; 1 pulse; SLOTA_LED_OFFSET = 23 µs; SLOTA_PERIOD = 19 µs Both time slots; normal mode; 1 pulse; SLOTA_LED_OFFSET = 23 µs; SLOTA_PERIOD = 19 µs Time Slot A or Time Slot B; normal mode; 8 pulses; SLOTA_LED_OFFSET = 23 µs; SLOTA_PERIOD = 19 µs Both time slots; normal mode; 8 pulses; SLOTA_LED_OFFSET = 23 µs; SLOTA_PERIOD = 19 µs Typ 13 11 0.122 1.8 1.3 1.8 1.3 TIA_VREF 7 + 0.25 0 1.8 1.3 TIA_VREF7 + 0.25 0 V V V V V V V V V V Data Sheet Parameter During Sleep Periods ADPD188BI Test Conditions/Comments Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 1 Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 0 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x0 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x1 Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x2 Min Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x3 LEDs LED Peak Current Setting Dominant Wavelength 9 LED1, Blue LED LED3, Infrared (IR) LED Radiant Flux PHOTODIODE Responsivity Active Area Photodiode 1 Photodiode 2 LOOP RESPONSE DRIFT Blue Channel IR Channel POWER SUPPLY VOLTAGES VDD VLED12, 10 VLED32, 10 DC Power Supply Rejection Ratio (PSRR) TEMPERATURE RANGE Operating Adjustable via the Register 0x22 through Register 0x25 settings IF = 20 mA IF = 100 mA λ = 470 nm, IF = 20 mA at 25°C λ = 850 nm, IF = 100 mA at 25°C 12 Max 370 29 33 At 75% of full-scale input signal −40 mA nm 36 mW mW 0.2 0.4 A/W A/W 0.4 0.8 mm2 mm2 −8 −15 −9 −5 1.7 Unit V V V V V V 470 850 Wavelength, λ = 470 nm Wavelength, λ = 850 nm Temperature drift of the full transmitter and receiver loop response, Register 0x39 and Register 0x3B = 0x22F0, Register 0x30 and Register 0x35 = 0x0320 25°C to 50°C, LED1 drive ≥ 50 mA +25°C to −20°C, LED1 drive ≥ 50 mA 25°C to 50°C, LED3 drive ≥ 50 mA +25°C to −20°C, LED3 drive ≥ 50 mA The ADPD188BI does not require a specific power-up sequence Applied at the VDD1 and VDD2 pins Typ 1.8 1.3 1.8 1.3 TIA_VREF7 + 0.25 0 1.8 5.0 3.3 24 0 +15 +1 +14 % % % % 1.9 6.0 4.0 V V V dB +85 °C See Figure 9 for the current limitation at the minimum VLED supply voltage, VLEDx. Saturation illuminance refers to the amount of ambient light that saturates the ADPD188BI signal. Actual results may vary by factors of up to 2× from typical specifications. As a point of reference, Air Mass 1.5 (AM1.5) sunlight (brightest sunlight) produces 100 kLux. 3 Blackbody color temperature (T = 5800 K) closely matches the light produced by solar radiation (sunlight). 4 Minimum LED period = (2 × AFE width) + 5 µs. 5 The maximum values in this specification are the internal ADC sampling rates in normal mode. The I2C read rates in some configurations may limit the output data rate. 6 This mode may induce additional noise and is not recommended unless necessary. The 1.8 V setting uses VDD, which contains greater amounts of differential voltage noise with respect to the anode voltage. A differential voltage between the anode and cathode injects a differential current across the capacitance of the photodiode of the magnitude of C × dV/dt, where C is the capacitance. 7 TIA_VREF is an internal reference voltage generated by the ADPD188BI. 8 This setting is not recommended for photodiodes because it causes a 1.3 V forward bias of the photodiode. 9 IF is the forward current of the diode. 10 Set VLEDx so that the maximum desired LED current is achievable with the turn on voltage of the LEDs that are wired to the LEDx/DNC pins. The LEDx/DNC pins are connected to the LEDx driver, which can be modeled as current sinks (see Figure 1). When an appropriate VLEDx is used, the voltage at the LEDx/DNC pins adjusts automatically to accommodate the LED turn on voltage and the LED current. 1 2 Rev. B | Page 5 of 62 ADPD188BI Data Sheet ANALOG SPECIFICATIONS VDD1 = VDD2 = 1.8 V, and TA = full operating temperature range, unless otherwise noted. Table 2. Parameter EXT_INx 1 SERIES RESISTANCE (R_IN) 2 PULSED SIGNAL CONVERSIONS, 3 μs WIDE LED PULSE 3 ADC Resolution 4 ADC Saturation Level Ambient Signal Headroom on Pulsed Signal PULSED SIGNAL CONVERSIONS, 2 μs WIDE LED PULSE3 ADC Resolution4 ADC Saturation Level Ambient Signal Headroom on Pulsed Signal FULL SIGNAL CONVERSIONS 5 TIA Saturation Level Pulsed Signal and Ambient Level TIA Linear Range Test Conditions/Comments Measured from −3 µA to +3 µA 4 μs wide AFE integration; normal operation, Register 0x43 and Register 0x45 = 0xADA5 TIA feedback resistor 25 kΩ 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor 25 kΩ 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor Min Typ 6.5 Max Unit kΩ 3.27 1.64 0.82 0.41 nA/LSB nA/LSB nA/LSB nA/LSB 26.8 13.4 6.7 3.35 μA μA μA μA 25 kΩ 50 kΩ 100 kΩ 200 kΩ 3 μs wide AFE integration; normal operation, Register 0x43 and Register 0x45 = 0xADA5 TIA feedback resistor 25 kΩ 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor 25 kΩ 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor 23.6 11.8 5.9 2.95 μA μA μA μA 4.62 2.31 1.15 0.58 nA/LSB nA/LSB nA/LSB nA/LSB 37.84 18.92 9.46 4.73 μA μA μA μA 25 kΩ 50 kΩ 100 kΩ 200 kΩ 12.56 6.28 3.14 1.57 μA μA μA μA 50.4 25.2 12.6 6.3 μA μA μA μA 42.8 21.4 10.7 5.4 μA μA μA μA TIA feedback resistor 25 kΩ 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor 25 kΩ 50 kΩ 100 kΩ 200 kΩ Rev. B | Page 6 of 62 Data Sheet ADPD188BI Parameter SYSTEM PERFORMANCE Total Output Noise Floor Test Conditions/Comments Min Normal mode; per pulse; per channel; no LED; photodiode capacitance (CPD) = 25 pF 25 kΩ; referred to ADC input 25 kΩ; referred to peak input signal for 2 µs LED pulse 25 kΩ; referred to peak input signal for 3 µs LED pulse 25 kΩ; saturation signal-to-noise ratio (SNR) per pulse per channel 6 50 kΩ; referred to ADC input 50 kΩ; referred to peak input signal for 2 µs LED pulse 50 kΩ; referred to peak input signal for 3 µs LED pulse 50 kΩ; saturation SNR per pulse per channel6 100 kΩ; referred to ADC input 100 kΩ; referred to peak input signal for 2 µs LED pulse 100 kΩ; referred to peak input signal for 3 µs LED pulse 100 kΩ; saturation SNR per pulse per channel6 200 kΩ; referred to ADC input 200 kΩ; referred to peak input signal for 2 µs LED pulse 200 kΩ; referred to peak input signal for 3 µs LED pulse 200 kΩ; saturation SNR per pulse per channel6 Typ Max Unit 1.0 4.6 3.3 78.3 LSB rms nA rms nA rms dB 1.1 2.5 1.8 77.4 1.2 1.4 0.98 76.7 1.4 0.81 0.57 75.3 LSB rms nA rms nA rms dB LSB rms nA rms nA rms dB LSB rms nA rms nA rms dB Where x is either 1 or 2. The R_IN value can be ignored for current source inputs or for PD inputs. This value is important for calculating correct voltages for voltage inputs through a resistor. 3 This saturation level only applies to the ADC and, therefore, only includes the pulsed signal. Any nonpulsatile signal is removed before the ADC stage. 4 ADC resolution is listed per pulse. If using multiple pulses, divide by the number of pulses. 5 This saturation level applies to the full signal path and, therefore, includes both the ambient signal and the pulsed signal. 6 The noise term of the saturation SNR value only refers to the receive noise and does not include photon shot noise or any noise on the LED signal itself. 1 2 DIGITAL SPECIFICATIONS VDD1 = VDD2 = 1.7 V to 1.9 V, unless otherwise noted. Table 3. Parameter LOGIC INPUTS Input Voltage Level High High Low Input Current Level High Low Input Capacitance LOGIC OUTPUTS Output Voltage Level High Low SDA Output Voltage Level Low Output Current Level Low Symbol Test Conditions/Comments Min VIH VIH VIL GPIOx, SCLK, MOSI, CS SCL, SDA 0.7 × VDDx 0.7 × VDDx IIH IIL CIN VOH VOL VOL1 IOL Typ −10 −10 Max Unit VDDx 3.6 0.3 × VDDx V +10 +10 µA µA pF 10 GPIOx, MISO 2 mA high level output current 2 mA low level output current SDA 2 mA low level output current SDA VOL1 = 0.6 V Rev. B | Page 7 of 62 VDDx − 0.5 6 V 0.5 V V 0.2 × VDDx V mA ADPD188BI Data Sheet TIMING SPECIFICATIONS I2C Timing Specifications Table 4. Parameter SCL Frequency Minimum Pulse Width High Low START CONDITION Hold Time Setup Time SDA SETUP TIME SCL AND SDA Rise Time Fall Time STOP CONDITION Setup Time Symbol Min Typ Max Unit 1 Mbps t1 t2 370 530 ns ns t3 t4 t5 260 260 50 ns ns ns t6 t7 120 120 t8 ns ns 260 t5 t3 ns t3 SDA t6 t1 t2 t7 t4 t8 Test Conditions/Comments Min 16385-002 SCL Figure 2. I C Timing Diagram 2 SPI Timing Specifications Table 5. Parameter SCLK Frequency Minimum Pulse Width High Low CS Setup Time Symbol fSCLK tSCLKPWH tSCLKPWL Typ Max Unit 10 MHz 20 20 ns ns tCSS CS setup to SCLK rising edge 10 ns Hold Time tCSH CS hold from SCLK rising edge 10 ns Pulse Width High tCSPWH CS pulse width high 10 ns MOSI Setup Time Hold Time MISO OUTPUT DELAY tMOSIS tMOSIH tMISOD MOSI setup to SCLK rising edge MOSI hold from SCLK rising edge MISO valid output delay from SCLK falling edge 10 10 Rev. B | Page 8 of 62 ns ns 21 ns Data Sheet ADPD188BI tCSH tCSS tSCLKPWH CS tCSPWH tSCLKPWL SCLK MOSI tMOSIH MISO tMISOD Figure 3. SPI Timing Diagram Rev. B | Page 9 of 62 16385-003 tMOSIS ADPD188BI Data Sheet ABSOLUTE MAXIMUM RATINGS RECOMMENDED SOLDERING PROFILE Table 6. 1 2 Rating −0.3 V to +2.2 V −0.3 V to +2.2 V −0.3 V to +2.2V −0.3 V to +2.2 V −0.3 V to +2.2 V −0.3 V to +3.6 V −0.3 V to +3.6 V −0.3 V to +6.0 V −0.3 V to +4.0 V Figure 4 and Table 8 provide details about the recommended soldering profile. TSMIN tS 3000 V 1250 V RAMP-DOWN t25°C TO PEAK TIME Figure 4. Recommended Soldering Profile 260 (+0/−5)°C