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ADR3433ARJZ-R2

ADR3433ARJZ-R2

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOT23-6

  • 描述:

    IC VREF SERIES 0.1% SOT23-6

  • 数据手册
  • 价格&库存
ADR3433ARJZ-R2 数据手册
Micropower, High Accuracy Voltage References ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 FEATURES PIN CONFIGURATION Initial accuracy: ±0.1% (maximum) Maximum temperature coefficient: 8 ppm/°C Operating temperature range: −40°C to +125°C Output current: +10 mA source/−3 mA sink Low quiescent current: 100 μA (maximum) Low dropout voltage: 250 mV at 2 mA Output noise (0.1 Hz to 10 Hz): VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE < 0.7 V IL = 0 mA, −40°C ≤ TA ≤ +125°C IL = 2 mA, −40°C ≤ TA ≤ +125°C 1 1 0 VIN × 0.85 en ENABLE = VIN, −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz 0.85 8 28 0.6 ΔVOUT_HYS RRR ΔVOUT_LTD tR TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 70 −60 30 100 Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 3 of 22 85 100 5 1.1 1.15 μA μA μA V V 0.7 VIN 3 V V μA μV p-p μV rms μV/√Hz ppm dB ppm μs ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ADR3420 ELECTRICAL CHARACTERISTICS VIN = 2.3 V to 5.5 V, TA = 25°C, ILOAD = 0 mA, unless otherwise noted. Table 4. Parameter OUTPUT VOLTAGE INITIAL ACCURACY Symbol VOUT VOERR Conditions TEMPERATURE COEFFICIENT LINE REGULATION TCVOUT ΔVO/ΔVIN −40°C ≤ TA ≤ +125°C VIN = 2.3 V to 5.5 V VIN = 2.3 V to 5.5 V, −40°C ≤ TA ≤ +125°C LOAD REGULATION Sourcing ΔVO/ΔIL VIN = 2.8 V to 5.5 V VIN = 2.8 V to 5.5 V ENABLE PIN Shutdown Voltage ENABLE Voltage ENABLE Pin Leakage Current OUTPUT VOLTAGE NOISE VL VH IEN en p-p 2 Unit V % mV ppm/°C ppm/V ppm/V 12 30 ppm/mA 7 50 ppm/mA 10 −3 mA mA IQ VDO 1 Max 2.0500 ±0.1 ±2.048 8 50 160 IL Shutdown DROPOUT VOLTAGE1 OUTPUT VOLTAGE NOISE DENSITY OUTPUT VOLTAGE HYSTERESIS2 RIPPLE REJECTION RATIO LONG-TERM STABILITY TURN-ON SETTLING TIME Typ 2.0480 7 IL = 0 mA to 10 mA, VIN = 2.8 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to −3 mA, VIN = 2.8 V, −40°C ≤ TA ≤ +125°C Sinking OUTPUT CURRENT CAPACITY Sourcing Sinking QUIESCENT CURRENT Normal Operation Min 2.0459 ENABLE > VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE < 0.7 V IL = 0 mA, −40°C ≤ TA ≤ +125°C IL = 2 mA, −40°C ≤ TA ≤ +125°C 100 150 0 VIN × 0.85 en ENABLE = VIN, −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz 0.85 15 38 0.9 ΔVOUT_HYS RRR ΔVOUT_LTD tR TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 70 −60 30 400 Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 4 of 22 85 100 5 250 300 μA μA μA mV mV 0.7 VIN 3 V V μA μV p-p μV rms μV/√Hz ppm dB ppm μs ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ADR3425 ELECTRICAL CHARACTERISTICS VIN = 2.7 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 5. Parameter OUTPUT VOLTAGE INITIAL ACCURACY Symbol VOUT VOERR Conditions TEMPERATURE COEFFICIENT LINE REGULATION TCVOUT ΔVO/ΔVIN −40°C ≤ TA ≤ +125°C VIN = 2.7 V to 5.5 V VIN = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +125°C 2.5 5 LOAD REGULATION Sourcing ΔVO/ΔIL IL = 0 mA to 10 mA, VIN = 3.0 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to −3 mA, VIN = 3.0 V, −40°C ≤ TA ≤ +125°C Sinking OUTPUT CURRENT CAPACITY Sourcing Sinking QUIESCENT CURRENT Normal Operation VIN = 3.0 V to 5.5 V VIN = 3.0 V to 5.5 V ENABLE PIN Shutdown Voltage ENABLE Voltage ENABLE Pin Leakage Current OUTPUT VOLTAGE NOISE VL VH IEN en p-p 2 Max 2.5025 ±0.1 ±2.5 8 50 120 Unit V % mV ppm/°C ppm/V ppm/V 10 30 ppm/mA 10 50 ppm/mA 10 −3 mA mA IQ VDO 1 Typ 2.500 IL Shutdown DROPOUT VOLTAGE1 OUTPUT VOLTAGE NOISE DENSITY OUTPUT VOLTAGE HYSTERESIS2 RIPPLE REJECTION RATIO LONG-TERM STABILITY TURN-ON SETTLING TIME Min 2.4975 ENABLE ≥ VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE ≤ 0.7 V IL = 0 mA, TA = −40°C ≤ TA ≤ +125°C IL = 2 mA, TA = −40°C ≤ TA ≤ +125°C 50 75 0 VIN × 0.85 en ENABLE = VIN, TA = −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz 1 18 42 1 ΔVOUT_HYS RRR ΔVOUT_LTD tR TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 70 −60 30 600 Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 5 of 22 85 100 5 200 250 μA μA μA mV mV 0.7 VIN 3 V V μA μV p-p μV rms µV/√Hz ppm dB ppm μs ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ADR3430 ELECTRICAL CHARACTERISTICS VIN = 3.2 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 6. Parameter OUTPUT VOLTAGE INITIAL ACCURACY Symbol VOUT VOERR Conditions TEMPERATURE COEFFICIENT LINE REGULATION TCVOUT ΔVO/ΔVIN −40°C ≤ TA ≤ +125°C VIN = 3.2 V to 5.5 V VIN = 3.2 V to 5.5 V, −40°C ≤ TA ≤ +125°C 2.5 5 LOAD REGULATION Sourcing ΔVO/ΔIL IL = 0 mA to 10 mA, VIN = 3.5 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to −3 mA, VIN = 3.5 V, −40°C ≤ TA ≤ +125°C Sinking OUTPUT CURRENT CAPACITY Sourcing Sinking QUIESCENT CURRENT Normal Operation VIN = 3.5 V to 5.5 V VIN = 3.5 V to 5.5 V Max 3.0030 ±0.1 ±3.0 8 50 120 Unit V % mV ppm/°C ppm/V ppm/V 9 30 ppm/mA 10 50 ppm/mA 10 −3 mA mA IQ VDO ENABLE PIN Shutdown Voltage ENABLE Voltage ENABLE Pin Leakage Current OUTPUT VOLTAGE NOISE VL VH IEN en p-p OUTPUT VOLTAGE NOISE DENSITY OUTPUT VOLTAGE HYSTERESIS2 RIPPLE REJECTION RATIO LONG-TERM STABILITY TURN-ON SETTLING TIME en ΔVOUT_HYS RRR ΔVOUT_LTD tR 2 Typ 3.0000 IL Shutdown DROPOUT VOLTAGE1 1 Min 2.9970 ENABLE ≥ VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE ≤ 0.7 V IL = 0 mA, TA = −40°C ≤ TA ≤ +125°C IL = 2 mA, TA = −40°C ≤ TA ≤ +125°C 50 75 0 VIN × 0.85 ENABLE = VIN, TA = −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 0.85 22 45 1.1 70 −60 30 700 Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 6 of 22 85 100 5 200 250 μA μA μA mV mV 0.7 VIN 3 V V μA μV p-p μV rms µV/√Hz ppm dB ppm μs ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ADR3433 ELECTRICAL CHARACTERISTICS VIN = 3.5 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 7. Parameter OUTPUT VOLTAGE INITIAL ACCURACY Symbol VOUT VOERR TEMPERATURE COEFFICIENT LINE REGULATION TCVOUT ΔVO/ΔVIN LOAD REGULATION Sourcing Typ 3.30 Max 3.3033 ±0.1 ±3.3 8 50 120 Unit V % mV ppm/°C ppm/V ppm/V 9 30 ppm/mA 10 50 ppm/mA 5 IL VIN = 3.8 V to 5.5 V VIN = 3.8 V to 5.5 V 10 −3 mA mA IQ VDO ENABLE PIN Shutdown Voltage ENABLE Voltage ENABLE Pin Leakage Current OUTPUT VOLTAGE NOISE VL VH IEN en p-p OUTPUT VOLTAGE NOISE DENSITY OUTPUT VOLTAGE HYSTERESIS2 RIPPLE REJECTION RATIO LONG-TERM STABILITY TURN-ON SETTLING TIME en ΔVOUT_HYS RRR ΔVOUT_LTD tR 2 −40°C ≤ TA ≤ +125°C VIN = 3.5 V to 5.5 V VIN = 3.5 V to 5.5 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to 10 mA, VIN = 3.8 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to −3 mA, VIN = 3.8 V, −40°C ≤ TA ≤ +125°C Shutdown DROPOUT VOLTAGE1 1 Min 3.2967 ΔVO/ΔIL Sinking OUTPUT CURRENT CAPACITY Sourcing Sinking QUIESCENT CURRENT Normal Operation Conditions ENABLE > VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE < 0.7 V IL = 0 mA, −40°C ≤ TA ≤ +125°C IL = 2 mA, −40°C ≤ TA ≤ +125°C 50 75 0 VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 0.85 25 46 1.2 70 -60 30 750 Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 7 of 22 85 100 5 200 250 μA μA μA mV mV 0.7 VIN 3 V V μA μV p-p μV rms μV/√Hz ppm dB ppm μs ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ADR3440 ELECTRICAL CHARACTERISTICS VIN = 4.3 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 8. Parameter OUTPUT VOLTAGE INITIAL ACCURACY Symbol VOUT VOERR Conditions TEMPERATURE COEFFICIENT LINE REGULATION TCVOUT ΔVO/ΔVIN −40°C ≤ TA ≤ +125°C VIN = 4.3 V to 5.5 V VIN = 4.3 V to 5.5 V, −40°C ≤ TA ≤ +125°C 2.5 3 LOAD REGULATION Sourcing ΔVO/ΔIL IL = 0 mA to 10 mA, VIN = 4.6 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to −3 mA, VIN = 4.6 V, −40°C ≤ TA ≤ +125°C Sinking OUTPUT CURRENT CAPACITY Sourcing Sinking QUIESCENT CURRENT Normal Operation VIN = 4.6 V to 5.5 V VIN = 4.6 V to 5.5 V ENABLE PIN Shutdown Voltage ENABLE Voltage ENABLE Pin Leakage Current OUTPUT VOLTAGE NOISE VL VH IEN en p-p 2 Max 4.1000 ±0.1 ±4.096 8 50 120 Unit V % mV ppm/°C ppm/V ppm/V 6 30 ppm/mA 15 50 ppm/mA 10 −3 mA mA IQ VDO 1 Typ 4.0960 IL Shutdown DROPOUT VOLTAGE1 OUTPUT VOLTAGE NOISE DENSITY OUTPUT VOLTAGE HYSTERESIS2 RIPPLE REJECTION RATIO LONG-TERM STABILITY TURN-ON SETTLING TIME Min 4.0919 ENABLE ≥ VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE ≤ 0.7 V IL = 0 mA, TA = −40°C ≤ TA ≤ +125°C IL = 2 mA, TA = −40°C ≤ TA ≤ +125°C 50 75 0 VIN × 0.85 85 100 5 200 250 μA μA μA mV mV 0.7 VIN 3 en ENABLE = VIN, TA = −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz 29 53 1.4 V V μA μV p-p μV rms µV/√Hz ΔVOUT_HYS RRR ΔVOUT_LTD tR TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 70 −60 30 800 ppm dB ppm μs Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 8 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ADR3450 ELECTRICAL CHARACTERISTICS VIN = 5.2 V to 5.5 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 9. Parameter OUTPUT VOLTAGE INITIAL ACCURACY Symbol VOUT VOERR Conditions TEMPERATURE COEFFICIENT LINE REGULATION TCVOUT ΔVO/ΔVIN −40°C ≤ TA ≤ +125°C VIN = 5.2 V to 5.5 V VIN = 5.2 V to 5.5 V, −40°C ≤ TA ≤ +125°C 2.5 3 LOAD REGULATION Sourcing ΔVO/ΔIL IL = 0 mA to 10 mA, VIN = 5.5 V, −40°C ≤ TA ≤ +125°C IL = 0 mA to −3 mA, VIN = 5.5 V, −40°C ≤ TA ≤ +125°C Sinking OUTPUT CURRENT CAPACITY Sourcing Sinking QUIESCENT CURRENT Normal Operation VIN = 5.5 V VIN = 5.5 V ENABLE PIN Shutdown Voltage ENABLE Voltage ENABLE Pin Leakage Current OUTPUT VOLTAGE NOISE VL VH IEN en p-p 2 Max 5.0050 ±0.1 ±5.0 8 50 120 Unit V % mV ppm/°C ppm/V ppm/V 3 30 ppm/mA 19 50 ppm/mA 10 −3 mA mA IQ VDO 1 Typ 5.0000 IL Shutdown DROPOUT VOLTAGE1 OUTPUT VOLTAGE NOISE DENSITY OUTPUT VOLTAGE HYSTERESIS2 RIPPLE REJECTION RATIO LONG-TERM STABILITY TURN-ON SETTLING TIME Min 4.9950 ENABLE ≥ VIN × 0.85 ENABLE = VIN, −40°C ≤ TA ≤ +125°C ENABLE ≤ 0.7 V IL = 0 mA, TA = −40°C ≤ TA ≤ +125°C IL = 2 mA, TA = −40°C ≤ TA ≤ +125°C 50 75 0 VIN × 0.85 en ENABLE = VIN, TA = −40°C ≤ TA ≤ +125°C f = 0.1 Hz to 10 Hz f = 10 Hz to 10 kHz f = 1 kHz 1 35 60 1.5 ΔVOUT_HYS RRR ΔVOUT_LTD tR TA = +25°C to −40°C to +125°C to +25°C fIN = 60 Hz 1000 hours at 50°C CIN = 0.1 μF, CL = 0.1 μF, RLoad = 1 kΩ 70 −58 30 900 Refers to the minimum difference between VIN and VOUT such that VOUT maintains a minimum accuracy of 0.1%. See the Terminology section. See the Terminology section. The part is placed through the temperature cycle in the order of temperatures shown. Rev. C | Page 9 of 22 85 100 5 200 250 μA μA μA mV mV 0.7 VIN 3 V V μA μV p-p μV rms µV/√Hz ppm dB ppm µs ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ABSOLUTE MAXIMUM RATINGS AND MINIMUM OPERATING CONDITION TA = 25°C, unless otherwise noted. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 10. Parameter Supply Voltage ENABLE to GND SENSE Voltage VIN Minimum Slew Rate Operating Temperature Range Storage Temperature Range Junction Temperature Range Rating 6V VIN 0.1 V/ms −40°C to +125°C −65°C to +125°C −65°C to +150°C Table 11. Thermal Resistance Package Type 6-Lead SOT-23 (RJ-6) ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. C | Page 10 of 22 θJA 230 θJC 92 Unit °C/W ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 GND FORCE 1 6 VOUT FORCE 5 VOUT SENSE ADR34xx GND SENSE 2 TOP VIEW ENABLE 3 (Not to Scale) 4 VIN 08440-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. Pin Configuration Table 12. Pin Function Descriptions Pin No. 1 2 3 4 5 6 1 Mnemonic GND FORCE GND SENSE ENABLE VIN VOUT SENSE VOUT FORCE Description Ground Force Connection.1 Ground Voltage Sense Connection. Connect directly to the point of lowest potential in the application.1 Enable Connection. Enables or disables the device. Input Voltage Connection. Reference Voltage Output Sensing Connection. Connect directly to the voltage input of the load devices.1 Reference Voltage Output.1 See the Applications Information section for more information on force/sense connections. Rev. C | Page 11 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 2.5010 5.0025 VIN = 5.5V 2.5008 2.5000 2.4998 2.4996 5.0010 5.0005 5.0000 4.9995 4.9990 4.9985 2.4992 4.9980 2.4990 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (ºC) 08440-003 2.4994 4.9975 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (ºC) Figure 3. ADR3425 Output Voltage vs. Temperature Figure 6. ADR3450 Output Voltage vs. Temperature 40 45 35 40 35 NUMBER OF DEVICES 30 25 20 15 10 30 25 20 15 10 5 5 1 2 3 4 5 6 7 8 9 TEMPERATURE COEFFICIENT (ppm/°C) 10 11 0 0 1 2 3 4 5 6 7 8 9 08440-006 0 08440-005 0 10 MORE TEMPERATURE COEFFICIENT (ppm/°C) Figure 4. ADR3425 Temperature Coefficient Distribution Figure 7. ADR3450 Temperature Coefficient Distribution 24 35 ADR3412 ADR3420 ADR3425 ADR3430 ADR3433 ADR3440 ADR3450 20 18 16 IL = 0mA TO +10mA SOURCING ADR3412 ADR3420 ADR3425 ADR3430 ADR3433 ADR3440 ADR3450 30 LOAD REGULATION (ppm/mA) 22 14 12 10 8 6 4 25 IL = 0mA TO –3mA SINKING 20 15 0 –40 –25 –10 5 20 35 50 65 TEMPERATURE (°C) 80 95 110 5 –40 125 Figure 5. Load Regulation vs. Temperature (Sourcing) 08440-054 08440-053 10 2 –25 –10 5 20 35 50 65 TEMPERATURE (°C) 80 95 110 Figure 8. Load Regulation vs. Temperature (Sinking) Rev. C | Page 12 of 22 125 08440-004 OUTPUT VOLTAGE (V) 2.5002 NUMBER OF DEVICES OUTPUT VOLTAGE (V) 5.0015 2.5004 LOAD REGULATION (ppm/mA) VIN = 5.5V 5.0020 2.5006 1.20 400 1.15 350 DIFFERENTIAL VOLTAGE (mV) 1.05 1.00 0.95 0.90 0.80 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 250 200 150 100 50 08440-056 0.85 300 0 –3 10 –2 –1 0 1 3 4 5 6 7 8 9 10 10 125 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 9. ADR3412 Dropout Voltage vs. Load Current Figure 12. ADR3425 Dropout Voltage vs. Load Current 450 350 –40°C +25°C +125°C 400 300 300 DIFFERENTIAL VOLTAGE (mV) 350 DIFFERENTIAL VOLTAGE (mV) 2 08440-015 TA = –40°C TA = +25°C TA = +125°C 08440-016 1.10 –40°C +25°C +125°C 08440-052 DIFFERENTIAL VOLTAGE (V) ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 TA = –40°C TA = +25°C TA = +125°C 250 200 150 100 0 –50 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 200 150 100 50 08440-057 50 250 0 –3 10 –2 –1 0 1 LOAD CURRENT (mA) 2 3 4 5 6 7 8 9 LOAD CURRENT (mA) Figure 13. ADR3450 Dropout Voltage vs. Load Current Figure 10. ADR3420 Dropout Voltage vs. Load Current 140 FREQUENCY GEN = 1Hz LINE REGULATION (ppm/V) 120 VIN = 2V/DIV CIN = COUT = 0.1µF RL = 1kΩ 2 VOUT = 500mV/DIV 100 ADR3412 ADR3420 ADR3425 ADR3430 ADR3433 ADR3440 ADR3450 80 60 40 20 08440-055 1 CH1 500mV CH2 2.00V M100µs A CH2 0 –40 –25 2.36V –10 5 20 35 50 65 80 95 TEMPERATURE (°C) Figure 14. Line Regulation vs. Temperature Figure 11. ADR3412 Start-Up (Turn-On Settle) Time Rev. C | Page 13 of 22 110 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 1 08440-028 10µV/DIV TIME = 1s/DIV CH1 pk-pk = 18µV CL = 1.1µF CIN = 0.1µF –10 –20 –30 –40 –50 –60 –70 –80 –90 10 CH1 RMS = 3.14µV 100 1k 10k 100k FREQUENCY (Hz) Figure 15. ADR3425 Output Voltage Noise (0.1 Hz to 10 Hz) Figure 18. ADR3425 Ripple Rejection Ratio vs. Frequency CIN = CL = 0.1µF RL = ∞ 1 VIN = 2V/DIV 1 100µV/DIV TIME = 200µs/DIV CH1 pk-pk = 300µV 08440-030 2 08440-029 TIME = 1s/DIV VOUT = 1V/DIV CH1 RMS = 42.0µV Figure 19. ADR3425 Start-Up Response Figure 16. ADR3425 Output Voltage Noise (10 Hz to 10 kHz) 10k VENABLE = 1V/DIV VIN = 3.0v CIN = CL = 0.1µF RL = ∞ 1 1k VOUT = 1V/DIV TIME = 200µs/DIV 100 0.1 1 10 100 1k FREQUENCY (Hz) 10k 08440-031 2 08440-023 NOISE DENSITY (nV/√Hz) ENABLE Figure 20. ADR3425 Restart Response from Shutdown Figure 17. ADR3425 Output Noise Spectral Density Rev. C | Page 14 of 22 08440-025 RIPPLE REJECTION RATIO (dB VOUT/VIN) 0 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 1 08440-032 10µV/DIV CH1 pk-pk = 33.4µV CL = 1.1µF CIN = 0.1µF –10 –20 –30 –40 –50 –60 –70 –80 –90 CH1 RMS = 5.68µV 10 100 1k 10k 100k FREQUENCY (Hz) Figure 21. ADR3450 Output Voltage Noise (0.1 Hz to 10 Hz) Figure 24. ADR3450 Ripple Rejection Ratio vs. Frequency CIN = 0µF CL = 0.1µF RL = ∞ VIN 2V/DIV 1 1 VOUT 2V/DIV 100µV/DIV 08440-034 08440-033 CH1 pk-pk = 446µV TIME = 200µs/DIV 2 CH1 RMS = 60.3µV Figure 25. ADR3450 Start-Up Response Figure 22. ADR3450 Output Voltage Noise (10 Hz to 10 kHz) 10k NOISE DENSITY (nV/√Hz) ENABLE 1 VENABLE = 2V/DIV VIN = 5.5V CIN = CL = 0.1µF RL = ∞ VOUT = 2V/DIV TIME = 200µs/DIV 1 10 100 1k FREQUENCY (Hz) 10k 08440-024 1k 0.1 08440-035 2 Figure 26. ADR3450 Restart Response from Shutdown Figure 23. ADR3450 Output Noise Spectral Density Rev. C | Page 15 of 22 08440-026 RIPPLE REJECTION RATIO (dB VOUT/VIN) 0 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 ENABLE 1V/DIV ENABLE 2V/DIV CIN = CL = 0.1µF VIN = 5V RL = 1kΩ CIN = CL = 0.1µF VIN = 3V RL = 1kΩ 1 TIME = 200µs/DIV VOUT = 2V/DIV 2 TIME = 200µs/DIV Figure 30. ADR3450 Shutdown Response Figure 27. ADR3425 Shutdown Response VIN = 100mV/DIV 3.2V 5.5V CIN = CL = 0.1µF 1 2.7V 500mV/DIV 08440-039 VOUT = 1V/DIV 08440-036 2 1 CIN = CL = 0.1µF 5.2V 2 VOUT = 10mV/DIV 2 TIME = 1ms/DIV 1 TIME = 1ms/DIV Figure 31. ADR3450 Line Transient Response Figure 28. ADR3425 Line Transient Response IL SOURCING IL 08440-040 08440-037 VOUT = 5mV/DIV SINKING SINKING +10mA +10mA SOURCING –3mA SINKING SINKING –3mA CIN = 0.1µF CL = 0.1µF RL = 500Ω CIN = 0.1µF CL = 0.1µF RL = 250Ω 5.0V 2.5V 08440-038 TIME = 1ms/DIV TIME = 1ms/DIV Figure 32. ADR3450 Load Transient Response Figure 29. ADR3425 Load Transient Response Rev. C | Page 16 of 22 08440-041 VOUT = 20mV/DIV VOUT = 20mV/DIV ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 7 100 VIN = 5.5 V 90 6 NUMBER OF DEVICES SUPPLY CURRENT (µA) 80 70 60 50 40 30 5 4 3 2 20 –10 5 20 35 50 65 80 95 110 0 125 TEMPERATURE (°C) 08440-043 –25 –0.050 –0.045 –0.040 –0.035 –0.030 –0.025 –0.020 –0.015 –0.010 –0.005 0 0.005 0.010 0.015 0.020 0.025 0.030 0.035 0.040 0.045 0.050 0.055 0 –40 1 08440-042 10 RELATIVE SHIFT IN VOUT (%) Figure 36. Output Voltage Shift Distribution After Reflow (SHR Drift) Figure 33. Supply Current vs. Temperature 2.0 8 –40°C +25°C +125°C 1.8 6 NUMBER OF DEVICES SUPPLY CURRENT (mA) 1.6 TA = +25°C → +150°C → –50°C → +25°C 7 1.4 1.2 1.0 0.8 0.6 5 4 3 2 0.4 40 30 20 0 10 –10 –20 –30 OUTPUT VOLTAGE HYSTERESIS (ppm) Figure 37. ADR3450 Thermally Induced Output Voltage Hysteresis Distribution Figure 34. Supply Current vs. ENABLE Pin Voltage 80 CL = 0.1µF CL = 1.1µF 1 0.1 60 40 20 0 –20 –40 –60 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 08440-027 –80 0.01 08440-045 LONG-TERM OUTPUT VOLTAGE DRIFT (ppm) 10 OUTPUT IMPEDANCE (Ω) –40 ENABLE VOLTAGE (% of VIN) 0 –50 100 –60 90 –70 80 –90 70 –80 60 –110 50 –100 40 –120 30 –130 20 –140 10 –150 0 08440-008 0 08440-044 1 0.2 0 200 400 600 800 1000 ELAPSED TIME (Hours) Figure 38. ADR3450 Typical Long-Term Output Voltage Drift (Four Devices, 1000 Hours) Figure 35. ADR3450 Output Impedance vs. Frequency Rev. C | Page 17 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 TERMINOLOGY Dropout Voltage (VDO) Dropout voltage, sometimes referred to as supply voltage headroom or supply-output voltage differential, is defined as the minimum voltage differential between the input and output such that the output voltage is maintained to within 0.1% accuracy. VDO = (VIN − VOUT)min | IL = constant Because the dropout voltage depends upon the current passing through the device, it is always specified for a given load current. In series-mode devices, dropout voltage typically increases proportionally to load current (see Figure 8 and Figure 14). Temperature Coefficient (TCVOUT) The temperature coefficient relates the change in output voltage to the change in ambient temperature of the device, as normalized by the output voltage at 25°C. This parameter is expressed in ppm/°C and can be determined by the following equation: TCVOUT max {VOUT (T1 ,T2 ,T3 )} − min {VOUT (T1 ,T2 ,T3 )} VOUT (T2 ) × (T3 − T1 ) ∆VOUT _= VOUT (25°C) − VOUT _ TC [V] HYS = ∆VOUT _ HYS where: VOUT(25°C) is the output voltage at 25°C. VOUT_TC is the output voltage after temperature cycling. Long-Term Stability (ΔVOUT_LTD) Long-term stability refers to the shift in output voltage at 50°C after 1000 hours of operation in a 50°C environment. Ambient temperature is kept at 50°C to ensure that the temperature chamber does not switch randomly between heating and cooling, which can cause instability over the 1000 hour measurement. This is also expressed as either a shift in voltage or a difference in ppm from the nominal output. ∆VOUT _ LTD = VOUT ( t1 ) − VOUT ( t 0 ) [V] × 10 [ ppm/°C ] 6 (1) where: VOUT(T) is the output voltage at Temperature T. T1 = −40°C. T2 = +25°C. T3 = +125°C. VOUT (25°C) − VOUT _ TC × 106 [ppm] VOUT (25°C) ∆= VOUT _ LTD VOUT ( t1 ) − VOUT ( t 0 ) × 106 [ppm] VOUT ( t 0 ) where: VOUT(t0) is the VOUT at 50°C at Time 0. VOUT(t1) is the VOUT at 50°C after 1000 hours of operation at 50°C. Line Regulation Line regulation refers to the change in output voltage in response to a given change in input voltage and is expressed in percent per volt, ppm per volt, or μV per volt change in input voltage. This parameter accounts for the effects of self-heating. This three-point method ensures that TCVOUT accurately portrays the maximum difference between any of the three temperatures at which the output voltage of the part is measured. The TCVOUT for the ADR3412/ADR3425/ADR3430/ADR3433/ ADR3440/ADR3450 is guaranteed via statistical means. This is accomplished by recording output voltage data for a large number of units over temperature, computing TCVOUT for each individual device via Equation 1, then defining the maximum TCVOUT limits as the mean TCVOUT for all devices extended by six standard deviations (6σ). Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS) Thermally induced output voltage hysteresis represents the change in output voltage after the device is exposed to a specified temperature cycle. This is expressed as either a shift in voltage or a difference in ppm from the nominal output. Load Regulation Load regulation refers to the change in output voltage in response to a given change in load current and is expressed in μV per mA, ppm per mA, or ohms of dc output resistance. This parameter accounts for the effects of self-heating. Solder Heat Resistance (SHR) Drift SHR drift refers to the permanent shift in output voltage induced by exposure to reflow soldering, expressed in units of ppm. This is caused by changes in the stress exhibited upon the die by the package materials when exposed to high temperatures. This effect is more pronounced in lead-free soldering processes due to higher reflow temperatures. Rev. C | Page 18 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 THEORY OF OPERATION LONG-TERM STABILITY VIN ENABLE BAND GAP VOLTAGE REFERENCE VBG VOUT FORCE VOUT SENSE RFB1 GND FORCE GND SENSE 08440-046 RFB2 Figure 39. Block Diagram The ADR3412/ADR3425/ADR3430/ADR3433/ADR3440/ ADR3450 use a proprietary voltage reference architecture to achieve high accuracy, low temperature coefficient (TC), and low noise in a CMOS process. Like all band gap references, the references combine two voltages of opposite TCs to create an output voltage that is nearly independent of ambient temperature. However, unlike traditional band gap voltage references, the temperature-independent voltage of the references is arranged to be the base-emitter voltage, VBE, of a bipolar transistor at room temperature rather than the VBE extrapolated to 0 K (the VBE of bipolar transistor at 0 K is approximately VG0, the band gap voltage of silicon). A corresponding positive-TC voltage is then added to the VBE voltage to compensate for its negative TC. The key benefit of this technique is that the trimming of the initial accuracy and TC can be performed without interfering with one another, thereby increasing overall accuracy across temperature. Curvature correction techniques further reduce the temperature variation. The band gap voltage (VBG) is then buffered and amplified to produce stable output voltages of 2.5 V and 5.0 V. The output buffer can source up to 10 mA and sink up to −3 mA of load current. The ADR34xx family leverages Analog Devices proprietary DigiTrim technology to achieve high initial accuracy and low TC, and precision layout techniques lead to very low long-term drift and thermal hysteresis. One of the key parameters of the ADR34xx references is longterm stability. Regardless of output voltage, internal testing during development showed a typical drift of approximately 30 ppm after 1000 hours of continuous, nonloaded operation in a 50°C environment. It is important to understand that long-term stability is not guaranteed by design and that the output from the device may shift beyond the typical 30 ppm specification at any time, especially during the first 200 hours of operation. For systems that require highly stable output voltages over long periods of time, the designer should consider burning in the devices prior to use to minimize the amount of output drift exhibited by the reference over time. See the AN-713 Application Note, The Effect of Long-Term Drift on Voltage References, at www.analog.com for more information regarding the effects of long-term drift and how it can be minimized. POWER DISSIPATION The ADR34xx voltage references are capable of sourcing up to 10 mA of load current at room temperature across the rated input voltage range. However, when used in applications subject to high ambient temperatures, the input voltage and load current should be carefully monitored to ensure that the device does not exceeded its maximum power dissipation rating. The maximum power dissipation of the device can be calculated via the following equation: PD = TJ − TA [W ] θ JA where: PD is the device power dissipation. TJ is the device junction temperature. TA is the ambient temperature. θJA is the package (junction-to-air) thermal resistance. Because of this relationship, acceptable load current in high temperature conditions may be less than the maximum currentsourcing capability of the device. In no case should the part be operated outside of its maximum power rating because doing so can result in premature failure or permanent damage to the device. Rev. C | Page 19 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 APPLICATIONS INFORMATION BASIC VOLTAGE REFERENCE CONNECTION 1µF 0.1µF 4 VIN VOUT FORCE 6 3 ENABLE VOUT SENSE 5 ADR34xx VOUT 2.5V 0.1µF 08440-047 GND SENSE 2 GND FORCE 1 voltages can be sensed accurately. These voltages are fed back into the internal amplifier and used to automatically correct for the voltage drop across the current-carrying output and ground lines, resulting in a highly accurate output voltage across the load. To achieve the best performance, the sense connections should be connected directly to the point in the load where the output voltage should be the most accurate. See Figure 41 for an example application. OUTPUT CAPACITOR(S) SHOULD BE MOUNTED AS CLOSE TO VOUT FORCE PIN AS POSSIBLE. Figure 40. Basic Reference Connection The circuit shown in Figure 40 illustrates the basic configuration for the ADR34xx references. Bypass capacitors should be connected according to the following guidelines. 0.1µF VIN INPUT AND OUTPUT CAPACITORS A 1 μF to 10 μF electrolytic or ceramic capacitor can be connected to the input to improve transient response in applications where the supply voltage may fluctuate. An additional 0.1 μF ceramic capacitor should be connected in parallel to reduce high frequency supply noise. 1µF 0.1µF 4 VIN VOUT FORCE 6 3 ENABLE VOUT SENSE 5 ADR34xx LOAD SENSE CONNECTIONS SHOULD CONNECT AS CLOSE TO LOAD DEVICE AS POSSIBLE. GND SENSE 2 GND FORCE 1 A ceramic capacitor of at least a 0.1 μF must be connected to the output to improve stability and help filter out high frequency noise. An additional 1 μF to 10 μF electrolytic or ceramic capacitor can be added in parallel to improve transient performance in response to sudden changes in load current; however, the designer should keep in mind that doing so increases the turn-on time of the device. 08440-048 VIN 2.7V TO 5.5V Figure 41. Application Showing Kelvin Connection It is always advantageous to use Kelvin connections whenever possible. However, in applications where the IR drop is negligible or an extra set of traces cannot be routed to the load, the force and sense pins for both VOUT and GND can simply be tied together, and the device can be used in the same fashion as a normal 3-terminal reference (as shown in Figure 40). Best performance and stability is attained with low ESR (for example, less than 1 Ω), low inductance ceramic chip-type output capacitors (X5R, X7R, or similar). If using an electrolytic capacitor on the output, a 0.1 µF ceramic capacitor should be placed in parallel to reduce overall ESR on the output. VIN SLEW RATE CONSIDERATIONS 4-WIRE KELVIN CONNECTIONS To avoid such conditions, ensure that the input voltage waveform has both a rising and falling slew rate of at least 0.1 V/ms. Current flowing through a PCB trace produces an IR voltage drop, and with longer traces, this drop can reach several millivolts or more, introducing a considerable error into the output voltage of the reference. A 1 inch long, 5 mm wide trace of 1 ounce copper has a resistance of approximately 100 mΩ at room temperature; at a load current of 10 mA, this can introduce a full millivolt of error. In an ideal board layout, the reference should be mounted as close to the load as possible to minimize the length of the output traces, and, therefore, the error introduced by voltage drop. However, in applications where this is not possible or convenient, force and sense connections (sometimes referred to as Kelvin sensing connections) are provided as a means of minimizing the IR drop and improving accuracy. Kelvin connections work by providing a set of high impedance voltage-sensing lines to the output and ground nodes. Because very little current flows through these connections, the IR drop across their traces is negligible, and the output and ground In applications with slow-rising input voltage signals, the reference exhibits overshoot or other transient anomalies that appear on the output. These phenomena also appear during shutdown as the internal circuitry loses power. SHUTDOWN/ENABLE FEATURE The ADR34xx references can be switched to a low power shutdown mode when a voltage of 0.7 V or lower is input to the ENABLE pin. Likewise, the reference becomes operational for ENABLE voltages of 0.85 × VIN or higher. During shutdown, the supply current drops to less than 5 μA, useful in applications that are sensitive to power consumption. If using the shutdown feature, ensure that the ENABLE pin voltage does not fall between 0.7 V and 0.85 × VIN because this causes a large increase in the supply current of the device and may keep the reference from starting up correctly (see Figure 34). If not using the shutdown feature, however, the ENABLE pin can simply be tied to the VIN pin, and the reference remains operational continuously. Rev. C | Page 20 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 VIN 4 V IN Negative Reference Figure 42 shows how to connect the ADR3450 and a standard CMOS op amp, such as the AD8663, to provide a negative reference voltage. This configuration provides two main advantages: first, it only requires two devices and, therefore, does not require excessive board space; second, and more importantly, it does not require any external resistors, meaning that the performance of this circuit does not rely on choosing expensive parts with low temperature coefficients to ensure accuracy. +5V VOUT FORCE 6 R1 10kΩ 3 ENABLE V 5 OUT SENSE 1µF 0.1µF ADR3450 0.1µF R2 10kΩ GND SENSE 2 GND FORCE 1 +15V –5V ADA4000-1 R3 5kΩ –15V +VDD Figure 43. ADR3450 Bipolar Output Reference 4 VIN 3 ENABLE VOUT SENSE 5 AD8663 VOUT FORCE 6 ADR3450 GND SENSE 2 –5V 0.1µF –VDD GND FORCE 1 0.1µF Figure 42. ADR3450 Negative Reference In this configuration, the VOUT pins of the reference sit at virtual ground, and the negative reference voltage and load current are taken directly from the output of the operational amplifier. Note that in applications where the negative supply voltage is close to the reference output voltage, a dual-supply, low offset, rail-torail output amplifier must be used to ensure an accurate output voltage. The operational amplifier must also be able to source or sink an appropriate amount of current for the application. Boosted Output Current Reference Figure 44 shows a configuration for obtaining higher current drive capability from the ADR34xx references without sacrificing accuracy. The op amp regulates the current flow through the MOSFET until VOUT equals the output voltage of the reference; current is then drawn directly from VIN instead of from the reference itself, allowing increased current drive capability. VIN +16V U6 4 3 VIN VOUT FORCE 6 ENABLE VOUT SENSE 5 1µF 0.1µF ADR34xx 2N7002 AD8663 VOUT 0.1µF Bipolar Output Reference Figure 43 shows a bipolar reference configuration. By connecting the output of the ADR3450 to the inverting terminal of an operational amplifier, it is possible to obtain both positive and negative reference voltages. R1 and R2 must be matched as closely as possible to ensure minimal difference between the negative and positive outputs. Resistors with low temperature coefficients must also be used if the circuit is used in environments with large temperature swings; otherwise, a voltage difference develops between the two outputs as the ambient temperature changes. R1 100Ω RL 200Ω CL 0.1µF GND SENSE 2 GND FORCE 1 08440-051 0.1µF 08440-049 1µF 08440-050 SAMPLE APPLICATIONS Figure 44. Boosted Output Current Reference Because the current-sourcing capability of this circuit depends only on the ID rating of the MOSFET, the output drive capability can be adjusted to the application simply by choosing an appropriate MOSFET. In all cases, the VOUT SENSE pin should be tied directly to the load device to maintain maximum output voltage accuracy. Rev. C | Page 21 of 22 ADR3412/ADR3420/ADR3425/ADR3430/ADR3433/ADR3440/ADR3450 OUTLINE DIMENSIONS 3.00 2.90 2.80 1.70 1.60 1.50 6 5 4 1 2 3 3.00 2.80 2.60 PIN 1 INDICATOR 0.95 BSC 1.90 BSC 1.45 MAX 0.95 MIN 0.15 MAX 0.05 MIN 0.50 MAX 0.30 MIN 0.20 MAX 0.08 MIN SEATING PLANE 10° 4° 0° 0.60 BSC COMPLIANT TO JEDEC STANDARDS MO-178-AB 0.55 0.45 0.35 12-16-2008-A 1.30 1.15 0.90 Figure 45. 6-Lead Small Outline Transistor Package (SOT-23) (RJ-6) Dimensions shown in millimeters ORDERING GUIDE Model1 ADR3412ARJZ-R2 ADR3412ARJZ-R7 ADR3420ARJZ-R2 ADR3420ARJZ-R7 ADR3425ARJZ-R2 ADR3425ARJZ-R7 ADR3430ARJZ-R2 ADR3430ARJZ-R7 ADR3433ARJZ-R2 ADR3433ARJZ-R7 ADR3440ARJZ-R2 ADR3440ARJZ-R7 ADR3450ARJZ-R2 ADR3450ARJZ-R7 1 Output Voltage (V) 1.200 1.200 2.048 2.048 2.500 2.500 3.000 3.000 3.300 3.300 4.096 4.096 5.000 5.000 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 6-Lead SOT-23 Z = RoHS Compliant Part. ©2010–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08440-0-6/18(C) Rev. C | Page 22 of 22 Package Option RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 RJ-6 Ordering Quantity 250 3,000 250 3,000 250 3,000 250 3,000 250 3,000 250 3,000 250 3,000 Marking Code R2R R2R R2V R2V R2X R2X R2Z R2Z R31 R31 R33 R33 R34 R34
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ADR3433ARJZ-R2
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