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ADR423ARM

ADR423ARM

  • 厂商:

    AD(亚德诺)

  • 封装:

    TSSOP8

  • 描述:

    IC VREF 3V 8MSOP

  • 数据手册
  • 价格&库存
ADR423ARM 数据手册
Ultraprecision, Low Noise, 2.048 V/2.500 V/ 3.00 V/5.00 V XFET® Voltage References ADR420/ADR421/ADR423/ADR425 FEATURES PIN CONFIGURATION Low noise (0.1 Hz to 10 Hz) ADR420: 1.75 μV p-p ADR421: 1.75 μV p-p ADR423: 2.0 μV p-p ADR425: 3.4 μV p-p Low temperature coefficient: 3 ppm/°C Long-term stability: 50 ppm/1000 hours Load regulation: 70 ppm/mA Line regulation: 35 ppm/V Low hysteresis: 40 ppm typical Wide operating range ADR420: 4 V to 18 V ADR421: 4.5 V to 18 V ADR423: 5 V to 18 V ADR425: 7 V to 18 V Quiescent current: 0.5 mA maximum High output current: 10 mA Wide temperature range: −40°C to +125°C TP 1 VIN 2 ADR420/ ADR421/ ADR423/ ADR425 8 TP 7 NIC VOUT TOP VIEW GND 4 (Not to Scale) 5 TRIM 6 NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) 02432-001 NIC 3 Figure 1. 8-Lead SOIC, 8-Lead MSOP GENERAL DESCRIPTION The ADR42x are a series of ultraprecision, second generation eXtra implanted junction FET (XFET) voltage references featuring low noise, high accuracy, and excellent long-term stability in SOIC and MSOP footprints. Patented temperature drift curvature correction technique and XFET technology minimize nonlinearity of the voltage change with temperature. The XFET architecture offers superior accuracy and thermal hysteresis to the band gap references. It also operates at lower power and lower supply headroom than the buried Zener references. APPLICATIONS Precision data acquisition systems High resolution converters Battery-powered instrumentation Portable medical instruments Industrial process control systems Precision instruments Optical network control circuits The superb noise and the stable and accurate characteristics of the ADR42x make them ideal for precision conversion applications such as optical networks and medical equipment. The ADR42x trim terminal can also be used to adjust the output voltage over a ±0.5% range without compromising any other performance. The ADR42x series voltage references offer two electrical grades and are specified over the extended industrial temperature range of −40°C to +125°C. Devices have 8-lead SOIC or 30% smaller, 8-lead MSOP packages. ADR42x PRODUCTS Table 1. Model ADR420 ADR421 ADR423 ADR425 Output Voltage, VOUT (V) 2.048 2.50 3.00 5.00 mV 1, 3 1, 3 1.5, 4 2, 6 Initial Accuracy % 0.05, 0.15 0.04, 0.12 0.04, 0.13 0.04, 0.12 Temperature Coefficient (ppm/°C) 3, 10 3, 10 3, 10 3, 10 Rev. H Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2001–2007 Analog Devices, Inc. All rights reserved. ADR420/ADR421/ADR423/ADR425 TABLE OF CONTENTS Features .............................................................................................. 1 Basic Voltage Reference Connections ..................................... 16 Applications....................................................................................... 1 Noise Performance..................................................................... 16 Pin Configuration............................................................................. 1 Turn-On Time ............................................................................ 16 General Description ......................................................................... 1 Applications..................................................................................... 17 ADR42x Products............................................................................. 1 Output Adjustment .................................................................... 17 Revision History ............................................................................... 2 Reference for Converters in Optical Network Control Circuits......................................................................................... 17 Specifications..................................................................................... 3 ADR420 Electrical Specifications............................................... 3 ADR421 Electrical Specifications............................................... 4 ADR423 Electrical Specifications............................................... 5 ADR425 Electrical Specifications............................................... 6 Absolute Maximum Ratings............................................................ 7 Thermal Resistance ...................................................................... 7 ESD Caution.................................................................................. 7 Pin Configurations and Function Descriptions ........................... 8 Typical Performance Characteristics ............................................. 9 Terminology .................................................................................... 15 Theory of Operation ...................................................................... 16 A Negative Precision Reference Without Precision Resistors ....................................................................................................... 17 High Voltage Floating Current Source .................................... 18 Kelvin Connections.................................................................... 18 Dual-Polarity References........................................................... 18 Programmable Current Source ................................................ 19 Programmable DAC Reference Voltage .................................. 19 Precision Voltage Reference for Data Converters.................. 20 Precision Boosted Output Regulator ....................................... 20 Outline Dimensions ....................................................................... 21 Ordering Guide .......................................................................... 22 Device Power Dissipation Considerations.............................. 16 REVISION HISTORY 6/07—Rev. G to Rev. H Changes to Table 2............................................................................ 3 Changes to Table 3............................................................................ 4 Changes to Table 4............................................................................ 5 Changes to Table 5............................................................................ 6 Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 22 6/05—Rev. F to Rev. G Changes to Table 1............................................................................ 1 Changes to Ordering Guide .......................................................... 22 2/05—Rev. E to Rev. F Updated Format..................................................................Universal Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 22 7/04—Rev. D to Rev. E Changes to Ordering Guide ............................................................ 5 1/03—Rev. B to Rev. C Changed Mini_SOIC to MSOP ........................................Universal Changes to Ordering Guide .............................................................4 Corrections to Y-axis labels in TPCs 21 and 24 ............................9 Enhancement to Figure 13 ............................................................ 15 Updated Outline Dimensions....................................................... 16 3/02—Rev. A to Rev. B Edits to Ordering Guide ...................................................................4 Deletion of Precision Voltage Regulator section........................ 15 Addition of Precision Boosted Output Regulator section ....... 15 Addition of Figure 13..................................................................... 15 10/01—Rev. 0 to Rev. A Addition of ADR423 and ADR425 to ADR420/ADR421...............................................................Universal 5/01—Revision 0: Initial Version 3/04—Rev. C to Rev. D Changes to Table I ............................................................................ 1 Changes to Ordering Guide ............................................................ 4 Updated Outline Dimensions ....................................................... 16 Rev. H | Page 2 of 24 ADR420/ADR421/ADR423/ADR425 SPECIFICATIONS ADR420 ELECTRICAL SPECIFICATIONS VIN = 5.0 V to 15.0 V, TA = 25°C, unless otherwise noted. Table 2. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY A Grade Symbol VOUT Conditions Min Typ Max Unit 2.045 2.047 2.048 2.048 2.051 2.049 V V +3 +0.15 +1 +0.05 mV % mV % 2 1 10 3 10 35 ppm°C ppm/°C V ppm/V 70 ppm/mA 500 600 μA μA μV p-p nV/√Hz μs ppm ppm dB mA VOUTERR −3 −0.15 −1 −0.05 B Grade TEMPERATURE COEFFICIENT A Grade B Grade SUPPLY VOLTAGE HEADROOM LINE REGULATION TCVOUT −40°C < TA < +125°C VIN − VOUT ∆VOUT/∆VIN LOAD REGULATION ∆VOUT/∆IL IL = 0 mA to 10 mA, −40°C < TA < +125°C QUIESCENT CURRENT IIN VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND eN p-p eN tR ∆VOUT VOUT_HYS RRR ISC No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 2 VIN = 5 V to 18 V, −40°C < TA < +125°C 1000 hours fIN = 1 kHz Rev. H | Page 3 of 24 390 1.75 60 10 50 40 −75 27 ADR420/ADR421/ADR423/ADR425 ADR421 ELECTRICAL SPECIFICATIONS VIN = 5.0 V to 15.0 V, TA = 25°C, unless otherwise noted. Table 3. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY A Grade Symbol VOUT Conditions Min Typ Max Unit 2.497 2.499 2.500 2.500 2.503 2.501 V V +3 +0.12 +1 +0.04 mV % mV % 2 1 10 3 10 35 ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 μA μA μV p-p nV/√Hz μs ppm ppm dB mA VOUTERR −3 −0.12 −1 −0.04 B Grade TEMPERATURE COEFFICIENT A Grade B Grade SUPPLY VOLTAGE HEADROOM LINE REGULATION TCVOUT VIN − VOUT ∆VOUT/∆VIN LOAD REGULATION ∆VOUT/∆IL QUIESCENT CURRENT IIN VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND eN p-p eN tR ∆VOUT VOUT_HYS RRR ISC −40°C < TA < +125°C 2 VIN = 5 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, −40°C < TA < +125°C No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 1000 hours fIN = 1 kHz Rev. H | Page 4 of 24 390 1.75 80 10 50 40 −75 27 ADR420/ADR421/ADR423/ADR425 ADR423 ELECTRICAL SPECIFICATIONS VIN = 5.0 V to 15.0 V, TA = 25°C, unless otherwise noted. Table 4. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY A Grade Symbol VOUT Conditions Min Typ Max Unit 2.996 2.9985 3.000 3.000 3.004 3.0015 V V +4 +0.13 +1.5 +0.04 mV % mV % 2 1 10 3 10 35 ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 μA μA μV p-p nV/√Hz μs ppm ppm dB mA VOUTERR −4 −0.13 −1.5 −0.04 B Grade TEMPERATURE COEFFICIENT A Grade B Grade SUPPLY VOLTAGE HEADROOM LINE REGULATION TCVOUT VIN − VOUT ∆VOUT/∆VIN LOAD REGULATION ∆VOUT/∆IL QUIESCENT CURRENT IIN VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND eN p-p eN tR ∆VOUT VOUT_HYS RRR ISC −40°C < TA < +125°C 2 VIN = 5 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, −40°C < TA < +125°C No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 1000 hours fIN = 1 kHz Rev. H | Page 5 of 24 390 2 90 10 50 40 −75 27 ADR420/ADR421/ADR423/ADR425 ADR425 ELECTRICAL SPECIFICATIONS VIN = 7.0 V to 15.0 V, TA = 25°C, unless otherwise noted. Table 5. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY A Grade Symbol VOUT Conditions Min Typ Max Unit 4.994 4.998 5.000 5.000 5.006 5.002 V V +6 +0.12 +2 +0.04 mV % mV % 2 1 10 3 10 35 ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 μA μA μV p-p nV/√Hz μs ppm ppm dB mA VOUTERR −6 −0.12 −2 −0.04 B Grade TEMPERATURE COEFFICIENT A Grade B Grade SUPPLY VOLTAGE HEADROOM LINE REGULATION TCVOUT VIN − VO ∆VO/∆VIN LOAD REGULATION ∆VO/∆IL QUIESCENT CURRENT IIN VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND eN p-p eN tR ∆VO VO_HYS RRR ISC −40°C < TA < +125°C 2 VIN = 7 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, −40°C < TA < +125°C No load −40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 1000 hours fIN = 1 kHz Rev. H | Page 6 of 24 390 3.4 110 10 50 40 −75 27 ADR420/ADR421/ADR423/ADR425 ABSOLUTE MAXIMUM RATINGS These ratings apply at 25°C, unless otherwise noted. THERMAL RESISTANCE Table 6. θJA is specified for the worst-case conditions, that is, θJA is specified for devices soldered in the circuit board for surfacemount packages. Parameter Supply Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) Rating 18 V Indefinite −65°C to +150°C −40°C to +125°C −65°C to +150°C 300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 7. Package Type 8-Lead MSOP (RM) 8-Lead SOIC (R) ESD CAUTION Rev. H | Page 7 of 24 θJA 190 130 Unit °C/W °C/W ADR420/ADR421/ADR423/ADR425 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TP 1 VIN 2 ADR420/ ADR421/ ADR423/ ADR425 8 TP 7 NIC VOUT TOP VIEW GND 4 (Not to Scale) 5 TRIM NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) 02432-002 NIC 3 6 Figure 2. 8-Lead SOIC, 8-Lead MSOP Pin Configuration Table 8. Pin Function Descriptions Pin No. 1, 8 Mnemonic TP 2 3, 7 4 5 VIN NIC GND TRIM 6 VOUT Description Test Pin. There are actual connections in TP pins, but they are reserved for factory testing purposes. Users should not connect anything to TP pins; otherwise, the device may not function properly. Input Voltage. No Internal Connect. NICs have no internal connections. Ground Pin = 0 V. Trim Terminal. It can be used to adjust the output voltage over a ±0.5% range without affecting the temperature coefficient. Output Voltage. Rev. H | Page 8 of 24 ADR420/ADR421/ADR423/ADR425 5.0025 2.0493 5.0023 2.0491 5.0021 2.0489 5.0019 2.0487 5.0017 2.0485 2.0483 5.0015 5.0013 2.0481 5.0011 2.0479 5.0009 2.0477 2.0475 –40 –10 20 50 80 110 125 02432-007 VOUT (V) 2.0495 02432-004 VOUT (V) TYPICAL PERFORMANCE CHARACTERISTICS 5.0007 5.0005 –40 –10 TEMPERATURE (°C) 20 50 80 110 125 TEMPERATURE (°C) Figure 3. ADR420 Typical Output Voltage vs. Temperature Figure 6. ADR425 Typical Output Voltage vs. Temperature 0.55 2.5015 2.5013 0.50 SUPPLY CURRENT (mA) 2.5011 2.5007 2.5005 2.5003 2.5001 2.4999 +25°C 0.40 –40°C 0.35 02432-005 0.30 2.4997 2.4995 –40 +125°C 0.45 –10 20 50 80 110 0.25 125 02432-008 VOUT (V) 2.5009 4 6 8 TEMPERATURE (°C) 10 12 14 15 INPUT VOLTAGE (V) Figure 4. ADR421 Typical Output Voltage vs. Temperature Figure 7. ADR420 Supply Current vs. Input Voltage 0.55 3.0010 3.0008 0.50 SUPPLY CURRENT (mA) 3.0006 3.0002 3.0000 2.9998 2.9996 2.9994 +125°C 0.40 +25°C 0.35 –40°C –10 20 50 80 110 125 TEMPERATURE (°C) 0.25 02432-009 2.9992 2.9990 –40 0.45 0.30 02432-006 VOUT (V) 3.0004 4 6 8 10 12 14 INPUT VOLTAGE (V) Figure 5. ADR423 Typical Output Voltage vs. Temperature Figure 8. ADR421 Supply Current vs. Input Voltage Rev. G | Page 9 of 24 15 ADR420/ADR421/ADR423/ADR425 0.55 70 IL = 0mA TO 5mA 60 LOAD REGULATION (ppm/mA) 0.50 0.40 +25°C 0.35 –40°C 0.30 4 6 8 10 12 14 VIN = 5V 40 30 VIN = 6.5V 20 10 02432-010 0.25 50 0 –40 15 02432-013 SUPPLY CURRENT (mA) +125°C 0.45 –10 INPUT VOLTAGE (V) 20 50 80 110 125 TEMPERATURE (°C) Figure 9. ADR423 Supply Current vs. Input Voltage Figure 12. ADR421 Load Regulation vs. Temperature 0.55 70 IL = 0mA TO 10mA 60 LOAD REGULATION (ppm/mA) +125°C 0.45 0.40 +25°C 0.35 –40°C 0.30 6 8 10 12 14 VIN = 7V 40 30 VIN = 15V 20 10 02432-011 0.25 50 0 –40 15 02432-014 SUPPLY CURRENT (mA) 0.50 –10 INPUT VOLTAGE (V) Figure 10. ADR425 Supply Current vs. Input Voltage 35 LOAD REGULATION (ppm/mA) 30 50 40 VIN = 4.5V 20 –10 20 50 110 125 80 110 25 20 15 10 5 0 –40 125 TEMPERATURE (°C) 02432-015 10 02432-012 LOAD REGULATION (ppm/mA) 60 0 –40 80 VIN = 15V IL = 0mA TO 10mA IL = 0mA TO 5mA VIN = 6V 50 Figure 13. ADR423 Load Regulation vs. Temperature 70 30 20 TEMPERATURE (°C) –10 20 50 80 110 125 TEMPERATURE (°C) Figure 11. ADR420 Load Regulation vs. Temperature Figure 14. ADR425 Load Regulation vs. Temperature Rev. H | Page 10 of 24 ADR420/ADR421/ADR423/ADR425 6 14 VIN = 4.5V TO 15V VIN = 7.5V TO 15V 12 LINE REGULATION (ppm/V) 4 3 2 1 –10 20 50 80 8 6 4 2 02432-016 0 –40 10 02432-019 LINE REGULATION (ppm/V) 5 0 –40 110 125 –10 TEMPERATURE (°C) 20 50 80 110 125 TEMPERATURE (°C) Figure 15. ADR420 Line Regulation vs. Temperature Figure 18. ADR425 Line Regulation vs. Temperature 6 2.5 VIN = 5V TO 15V 4 3 2 0 –40 02432-017 1 –10 20 50 80 110 2.0 –40°C +85°C 1.0 0.5 0 125 +25°C 1.5 02432-020 DIFFERENTIAL VOLTAGE (V) LINE REGULATION (ppm/V) 5 0 1 TEMPERATURE (°C) 2 3 4 5 LOAD CURRENT (mA) Figure 16. ADR421 Line Regulation vs. Temperature Figure 19. ADR420 Minimum Input/Output Voltage Differential vs. Load Current 9 2.5 VIN = 5V TO 15V 6 5 4 3 2 1 0 –40 –10 20 50 80 2.0 –40°C +125°C 1.0 0.5 0 110 TEMPERATURE (°C) +25°C 1.5 02432-021 DIFFERENTIAL VOLTAGE (V) 7 02432-018 LINE REGULATION (ppm/V) 8 0 1 2 3 4 LOAD CURRENT (mA) Figure 17. ADR423 Line Regulation vs. Temperature Figure 20. ADR421 Minimum Input/Output Voltage Differential vs. Load Current Rev. H | Page 11 of 24 5 ADR420/ADR421/ADR423/ADR425 2.0 –40°C 1.5 1µV/DIV +25°C +125°C 1.0 0 02432-025 0.5 02432-022 DIFFERENTIAL VOLTAGE (V) 2.5 0 1 2 3 4 TIME (1s/DIV) 5 LOAD CURRENT (mA) Figure 24. ADR421 Typical Noise Voltage 0.1 Hz to 10 Hz Figure 21. ADR423 Minimum Input/Output Voltage Differential vs. Load Current 2.0 –40°C 1.5 50µV/DIV +25°C +125°C 1.0 0 02432-026 0.5 02432-023 DIFFERENTIAL VOLTAGE (V) 2.5 0 1 2 3 4 TIME (1s/DIV) 5 LOAD CURRENT (mA) Figure 25. Typical Noise Voltage 10 Hz to 10 kHz Figure 22. ADR425 Minimum Input/Output Voltage Differential vs. Load Current 1k 15 10 ADR423 100 ADR420 10 10 40 50 60 70 80 90 100 110 120 130 MORE –40 –30 –20 –10 0 10 20 30 0 02432-024 5 ADR425 ADR421 02432-027 SAMPLE SIZE – 160 20 –100 –90 –80 –70 –60 –50 NUMBER OF PARTS 25 TEMPERATURE +25°C –40°C +125°C +25°C VOLTAGE NOISE DENSITY (nV/ Hz) 30 100 1k FREQUENCY (Hz) DEVIATION (ppm) Figure 26. Voltage Noise Density vs. Frequency Figure 23. ADR421 Typical Hysteresis Rev. H | Page 12 of 24 10k ADR420/ADR421/ADR423/ADR425 CBYPASS = 0µF CL = 100nF LINE INTERRUPTION 1mA LOAD VOUT VIN 1V/DIV 500mV/DIV LOAD OFF VOUT 500mV/DIV 2V/DIV 02432-028 02432-031 LOAD ON TIME (100µs/DIV) TIME (100µs/DIV) Figure 27. ADR421 Line Transient Response, no CBYPASS CBYPASS = 0.1µF Figure 30. ADR421 Load Transient Response, CL = 100 nF CIN = 0.01µF NO LOAD LINE INTERRUPTION VOUT VIN 2V/DIV 500mV/DIV VIN VOUT 500mV/DIV 02432-029 02432-032 2V/DIV TIME (4µs/DIV) TIME (100µs/DIV) Figure 28. ADR421 Line Transient Response, CBYPASS = 0.1 μF CL = 0µF Figure 31. ADR421 Turn-Off Response CIN = 0.01µF NO LOAD 1mA LOAD 2V/DIV VOUT 1V/DIV VOUT LOAD OFF 2V/DIV 2V/DIV LOAD ON 02432-030 02432-033 VIN TIME (4µs/DIV) TIME (100µs/DIV) Figure 32. ADR421 Turn-On Response Figure 29. ADR421 Load Transient Response, no CL Rev. H | Page 13 of 24 ADR420/ADR421/ADR423/ADR425 50 CL = 0.01µF NO INPUT CAP 45 VOUT 40 OUTPUT IMPEDANCE (Ω) 2V/DIV VIN 2V/DIV 35 30 ADR425 25 ADR423 20 ADR421 15 5 0 10 TIME (4µs/DIV) ADR420 100 1k 10k 02432-037 02432-034 10 100k FREQUENCY (Hz) Figure 33. ADR421 Turn-Off Response Figure 36. Output Impedance vs. Frequency 0 CL = 0.01µF NO INPUT CAP –10 2V/DIV RIPPLE REJECTION (dB) –20 VOUT 2V/DIV –30 –40 –50 –60 –70 02432-035 02432-038 –80 VIN –90 –100 10 TIME (4µs/DIV) 100 1k 10k 100k FREQUENCY (Hz) Figure 34. ADR421 Turn-On Response Figure 37. Ripple Rejection vs. Frequency CBYPASS = 0.1µF RL = 500Ω CL = 0 5V/DIV VIN 2V/DIV 02432-036 VOUT TIME (100µs/DIV) Figure 35. ADR421 Turn-On/Turn-Off Response Rev. H | Page 14 of 24 1M ADR420/ADR421/ADR423/ADR425 TERMINOLOGY Temperature Coefficient The change of output voltage over the operating temperature range is normalized by the output voltage at 25°C, and expressed in ppm/°C as TCVOUT ( ppm / °C ) = VOUT (T2 ) − VOUT (T1 ) VOUT ( 25°C ) × (T2 − T1 ) × 10 6 VOUT _ HYS = VOUT ( 25°C ) − VOUT _ TC VOUT _ HYS ( ppm) = where: VOUT (25°C) = VOUT at 25°C. VOUT (T1) = VOUT at Temperature 1. VOUT (T2) = VOUT at Temperature 2. Line Regulation The change in output voltage due to a specified change in input voltage. It includes the effects of self-heating. Line regulation is expressed in either percent per volt, parts per million per volt, or microvolts per volt change in input voltage. Load Regulation The change in output voltage due to a specified change in load current. It includes the effects of self-heating. Load regulation is expressed in either microvolts per milliampere, parts per million per milliampere, or ohms of dc output resistance. Long-Term Stability Typical shift of output voltage at 25°C on a sample of parts subjected to operation life test of 1000 hours at 125°C. ΔVOUT = VOUT (t 0 ) − VOUT (t 1 ) ΔVOUT ( ppm) = VOUT (t 0 ) − VOUT (t 1 ) VOUT (t 0 ) Thermal Hysteresis The change of output voltage after the device is cycled through temperatures from +25°C to −40°C to +125°C and back to +25°C. This is a typical value from a sample of parts put through such a cycle. × 10 6 where: VOUT (t0) = VOUT at 25°C at Time 0. VOUT (t1) = VOUT at 25°C after 1000 hours operation at 125°C. VOUT ( 25°C ) − VOUT _ TC VOUT ( 25°C ) × 10 6 where: VOUT (25°C) = VOUT at 25°C. VOUT_TC = VOUT at 25 °C after temperature cycle at +25°C to −40°C to +125°C and back to +25°C. Input Capacitor Input capacitors are not required on the ADR42x. There is no limit for the value of the capacitor used on the input, but a 1 μF to 10 μF capacitor on the input improves transient response in applications where the supply suddenly changes. An additional 0.1 μF capacitor in parallel also helps to reduce noise from the supply. Output Capacitor The ADR42x do not need output capacitors for stability under any load condition. An output capacitor, typically 0.1 μF, filters out any low level noise voltage and does not affect the operation of the part. On the other hand, the load transient response can be improved with an additional 1 μF to 10 μF output capacitor in parallel. A capacitor here acts as a source of stored energy for sudden increase in load current. The only parameter that degrades by adding an output capacitor is the turn-on time, which depends on the size of the selected capacitor. Rev. H | Page 15 of 24 ADR420/ADR421/ADR423/ADR425 THEORY OF OPERATION The intrinsic reference voltage is about 0.5 V with a negative temperature coefficient of about −120 ppm/°C. This slope is essentially constant to the dielectric constant of silicon and can be closely compensated by adding a correction term generated in the same fashion as the proportional-to-temperature (PTAT) term used to compensate band gap references. The primary advantage over a band gap reference is that the intrinsic temperature coefficient is approximately 30 times lower (therefore requiring less correction). This results in much lower noise because most of the noise of a band gap reference comes from the temperature compensation circuitry. DEVICE POWER DISSIPATION CONSIDERATIONS The ADR42x family of references is guaranteed to deliver load currents to 10 mA with an input voltage that ranges from 4.5 V to 18 V. When these devices are used in applications at higher currents, the following equation should be used to account for the temperature effects due to power dissipation increases: TJ = PD × θJA + TA where: TJ and TA are the junction temperature and the ambient temperature, respectively. PD is the device power dissipation. θJA is the device package thermal resistance. BASIC VOLTAGE REFERENCE CONNECTIONS Voltage references, in general, require a bypass capacitor connected from VOUT to GND. The circuit in Figure 39 illustrates the basic configuration for the ADR42x family of references. Other than a 0.1 μF capacitor at the output to help improve noise suppression, a large output capacitor at the output is not required for circuit stability. Figure 38 shows the basic topology of the ADR42x series. The temperature correction term is provided by a current source with a value designed to be proportional to absolute temperature. The general equation is VOUT = G × (ΔVP − R1 × IPTAT) Each ADR42x device is created by on-chip adjustment of R2 and R3 to achieve the specified reference output. I1 VIN I1 ADR420/ADR421/ ADR423/ADR425 IPTAT VOUT R2 10µF + 2 0.1µF *EXTRA CHANNEL IMPLANT VOUT = G(ΔVP – R1 × IPTAT) Figure 38. Simplified Schematic R3 GND 02432-039 R1 NIC 3 4 ADR420/ ADR421/ ADR423/ ADR425 8 TP 7 NIC OUTPUT 6 TOP VIEW (Not to Scale) 5 TRIM 0.1µF NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) Figure 39. Basic Voltage Reference Configuration NOISE PERFORMANCE The noise generated by ADR42x references is typically less than 2 μV p-p over the 0.1 Hz to 10 Hz band for the ADR420, ADR421, and ADR423. Figure 24 shows the 0.1 Hz to 10 Hz noise of the ADR421, which is only 1.75 μV p-p. The noise measurement is made with a band-pass filter made of a 2-pole high-pass filter with a corner frequency at 0.1 Hz and a 2-pole low-pass filter with a corner frequency at 10 Hz. TURN-ON TIME * ΔVP TP 1 VIN (1) where: G is the gain of the reciprocal of the divider ratio. ΔVP is the difference in pinch-off voltage between the two JFETs. IPTAT is the positive temperature coefficient correction current. (2) 02432-040 The ADR42x series of references uses a reference generation technique known as XFET (eXtra implanted junction FET). This technique yields a reference with low supply current, good thermal hysteresis, and exceptionally low noise. The core of the XFET reference consists of two junction field-effect transistors (JFET), one having an extra channel implant to raise its pinchoff voltage. By running the two JFETs at the same drain current, the difference in pinch-off voltage can be amplified and used to form a highly stable voltage reference. At power-up (cold start), the time required for the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. Two components typically associated with this are the time for the active circuits to settle and the time for the thermal gradients on the chip to stabilize. Figure 31 to Figure 35 show the turn-on settling time for the ADR421. Rev. H | Page 16 of 24 ADR420/ADR421/ADR423/ADR425 APPLICATIONS SOURCE FIBER OUTPUT ADJUSTMENT GIMBAL + SENSOR The ADR42x trim terminal can be used to adjust the output voltage over a ±0.5% range. This feature allows the system designer to trim system errors out by setting the reference to a voltage other than the nominal. This is also helpful if the part is used in a system at temperature to trim out any error. Adjustment of the output has a negligible effect on the temperature performance of the device. To avoid degrading temperature coefficients, both the trimming potentiometer and the two resistors need to be low temperature coefficient types, preferably
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