Data Sheet
ADRF5022
Silicon SPDT Switch, Nonreflective, 100 MHz to 45 GHz
FEATURES
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FUNCTIONAL BLOCK DIAGRAM
Ultra-wideband frequency range: 100 MHz to 45 GHz
Nonreflective design
Low insertion loss
► 1.2 dB typical to 18 GHz
► 1.9 dB typical to 40 GHz
► 2.3 dB typical to 45 GHz
High Isolation: 43 dB typical to 45 GHz
High input linearity
► 0.1 dB power compression (P0.1dB): 31 dBm
► Third-order intercept (IP3): 55 dBm
High power handling at TCASE = 85°C
► 30 dBm through path
► 24 dBm terminated path
► 30 dBm hot switching (RFC port)
RF settling time (0.1 dB final RF output): 30 ns
No low-frequency spurious signals
All off-state control
Positive control interface: CMOS-/LVTTL-compatible
20-terminal, 3.0 mm × 3.0 mm LGA package
Pin-compatible with ADRF5023, low-frequency cutoff version
APPLICATIONS
Test and instrumentation
Cellular infrastructure: 5G millimeter wave
► Military radios, radars, and electronic countermeasures (ECMs)
► Microwave radios and very small aperture terminals (VSATs)
► Industrial scanners
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Figure 1. Functional Block Diagram
GENERAL DESCRIPTION
The ADRF5022 is a nonreflective, single-pole double-throw (SPDT)
switch manufactured in the silicon process.
The ADRF5022 operates from 100 MHz to 45 GHz with a typical
insertion loss of 2.3 dB and isolation of 43 dB. The device has an
RF input-power handling capability of 30 dBm for the through path,
24 dBm for the terminated path, and 30 dBm for the hot switching at
the RF common port.
The ADRF5022 requires a positive supply of +3.3 V and a negative
supply of −3.3 V. The device employs complementary metal-oxide
semiconductor (CMOS)-/low-voltage transistor to transistor logic
(LVTTL)-compatible controls.
The ADRF5022 can also operate with a single positive supply
voltage (VDD) applied while the negative supply voltage (VSS) is
connected to ground. In this operating condition, the small signal
performance is maintained while the switching characteristics, linearity, and power handling performance is derated. For more details,
see Table 2.
TheADRF5022 is pin-compatible with the ADRF5023, low-frequency cutoff version, which operates from 9 kHz to 45 GHz.
The ADRF5022 comes in a 20-terminal, 3.0 mm × 3.0 mm, RoHScompliant, land grid array (LGA) package and can operate from
−40°C to +105°C.
Rev. 0
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Data Sheet
ADRF5022
TABLE OF CONTENTS
Features................................................................ 1
Applications .......................................................... 1
Functional Block Diagram......................................1
General Description...............................................1
Specifications........................................................ 3
Single-Supply Operation.................................... 4
Absolute Maximum Ratings...................................5
Thermal Resistance .......................................... 5
Power Derating Curves...................................... 5
Electrostatic Discharge (ESD) Ratings...............6
ESD Caution.......................................................6
Pin Configuration and Function Descriptions........ 7
Interface Schematics..........................................7
Typical Performance Characteristics..................... 8
Insertion Loss, Return Loss, And Isolation.........8
Input Power Compression and Third-Order
Intercept........................................................... 9
Theory of Operation.............................................10
Power Supply................................................... 10
RF Input and Output.........................................10
Applications Information ..................................... 11
Recommendations for PCB Design..................11
Outline Dimensions............................................. 12
Ordering Guide.................................................12
Evaluation Boards............................................ 12
REVISION HISTORY
9/2023—Revision 0: Initial Version
analog.com
Rev. 0 | 2 of 12
Data Sheet
ADRF5022
SPECIFICATIONS
VDD = 3.3 V, VSS = −3.3 V, CTRL voltage (VCTRL)/EN voltage (VEN) = 0 V or VDD, and TCASE = 25°C, 50 Ω system, unless otherwise noted.
Table 1. Electrical Specifications
Parameter
Symbol
FREQUENCY RANGE
INSERTION LOSS
Between RFC and RF1 and RF2 (On)
f
RETURN LOSS
RFC and RF1 and RF2 (On)
RF1 and RF2 (Off)
ISOLATION
Between RFC and RF1 and RF2 (Off)
Between RF1 and RF2
SWITCHING CHARACTERISTICS
Rise Time and Fall Time
On Time and Off Time
0.1 dB RF Settling Time
INPUT LINEARITY1
0.1 dB Power Compression
Input Third-Order Intercept
SUPPLY CURRENT
Positive Supply Current
Negative Supply Current
DIGITAL CONTROL INPUTS
Voltage
Low
High
Current
Low
High
analog.com
tRISE, tFALL
tON, tOFF
P0.1dB
IIP3
Test Conditions/Comments
Min
Max
Unit
45,000
MHz
100 MHz to 18 GHz
18 GHz to 26 GHz
26 GHz to 35 GHz
35 GHz to 40 GHz
40 GHz to 45 GHz
1.2
1.4
1.6
1.9
2.3
dB
dB
dB
dB
dB
100 MHz to 18 GHz
18 GHz to 26 GHz
26 GHz to 35 GHz
35 GHz to 40 GHz
40 GHz to 45 GHz
100 MHz to 18 GHz
18 GHz to 26 GHz
26 GHz to 35 GHz
35 GHz to 40 GHz
40 GHz to 45 GHz
20
20
20
20
20
19
19
17
14
13
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
100 MHz to 18 GHz
18 GHz to 26 GHz
26 GHz to 35 GHz
35 GHz to 40 GHz
40 GHz to 45 GHz
100 MHz to 18 GHz
18 GHz to 26 GHz
26 GHz to 35 GHz
35 GHz to 40 GHz
40 GHz to 45 GHz
55
55
55
50
47
60
58
50
47
43
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
10% to 90% of RF output (RFOUT)
50% VCTRL to 90% of RFOUT
50% VCTRL to 0.1 dB of final RFOUT
f = 100 MHz to 40 GHz
3
20
30
ns
ns
ns
31
55
dBm
dBm
140
510
µA
µA
Two-tone input power = 14 dBm each tone, Δf = 1
MHz
VDD and VSS pins
IDD
ISS
VINL
VINH
IINL
IINH
Typ
100
0
1.2
CTRL
0.8
3.3
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