GND
CPOUT
REFIN
MUXOUT
IFOUT+
IFOUT–
VCC11
46
45 44
48
47
43
42
39
38
41 40 37
GND
LDO3
2
DNC
LDO4
FUNCTIONAL BLOCK DIAGRAM
GND 1
PLL REF BUFFER
PFD/CP
FRACTIONAL DIVIDER
GND 6
VCO
VCO
÷1 TO
32
EXTVCOIN+ 4
EXTVCOIN– 5
16
17
18
19
22
23
VCC10
33
VCC9
32
VCC8
36
RFBCT1
35
RFIN1
31
VCC7
30
LDO2
26
25
RFIN2
RFBCT2
29
VCC6
28
VCC5
27
VCC4
20 21 24
GND
15
VCC3
DNC
14
IFOUT2–
Multiband/multistandard cellular base station diversity
receivers
Wideband radio link diversity downconverters
Multimode cellular extenders and picocells
13
SCLK
APPLICATIONS
SPI
CONTROL
SDIO
DIV
3.3V
LDO
VCC2
DECL5 12
SPI
2.5V
LDO
LDO1
DECL4 11
VCO
LDO
LOOUT–
DECL3 10
ADRF6612
PLL
3.3V
LDO
LOOUT+
DECL1 8
DECL2 9
CS
VCC1 7
34
Figure 1.
GENERAL DESCRIPTION
The ADRF6612 is a dual radio frequency (RF) mixer and
intermediate frequency (IF) amplifier with an integrated phaselocked loop (PLL) and voltage controlled oscillators (VCOs). The
ADRF6612 uses revolutionary broadband square wave limiting
local oscillator (LO) amplifiers to achieve an unprecedented RF
bandwidth of 700 MHz to 3000 MHz. Unlike narrow-band sine
wave LO amplifier solutions, the LO can be applied above or
below the RF input over an extremely wide bandwidth. Energy
storage elements are not utilized in the LO amplifier, thus dc
current consumption also decreases with decreasing LO
frequency.
The ADRF6612 utilizes highly linear, doubly balanced passive
mixer cores with integrated RF and LO balancing circuits to
allow single-ended operation. Integrated RF baluns allow optimal
performance over the 700 MHz to 3000 MHz RF input frequency.
The balanced passive mixer arrangement provides outstanding
LO to RF and LO to IF leakages, excellent RF to IF isolation,
and excellent intermodulation performance over the full RF
bandwidth.
The balanced mixer cores provide extremely high input
linearity, allowing the device to be used in demanding
Rev. A
wideband applications where in band blocking signals may
otherwise result in the degradation of dynamic range. Noise
performance under blocking is comparable to narrow-band
passive mixer designs. High linearity IF buffer amplifiers follow the
passive mixer cores, yielding typical power conversion gains of
9 dB, and can be matched to a wide range of output impedances.
The PLL architecture supports both integer-N and fractional-N
operation and can generate the entire LO frequency range of
200 MHz to 2700 MHz using an external reference input
frequency anywhere in the range of 12 MHz to 320 MHz. An
external loop filter provides flexibility in trading off phase noise
vs. acquisition time. To reduce fractional spurs in fractional-N
mode, a sigma-delta (Σ-Δ) modulator controls the post-VCO
programmable divider. The VCO consists of multiple VCO cores.
All features of the ADRF6612 are controlled via a 3-wire SPI
resulting in optimum performance and minimum external
components.
The ADRF6612 is fabricated using a BiCMOS, high performance
IC process. The device is available in a 7 mm × 7 mm, 48-lead
LFCSP package and operates over a −40°C to +85°C temperature
range. An evaluation board is available.
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
12199-001
VCO
IFOUT2+
GND 3
MUX
RF frequency: 700 MHz to 3000 MHz, continuous
LO input frequency: 200 MHz to 2700 MHz, high-side or lowside injection
IF range: 40 MHz to 500 MHz
Power conversion gain of 9.0 dB
Single sideband (SSB) noise figure of 11.3 dB
Input IP3 of 30 dBm
Input P1dB of 10.6 dBm
Typical LO input drive of 0 dBm
Single-ended, 50 Ω RF port
Single-ended or balanced LO input port
Serial port interface (SPI) control on all functions
Exposed pad, 7 mm × 7 mm, 48-lead LFCSP
VCC12
FEATURES
VCOVTUNE
Data Sheet
700 MHz to 3000 MHz Dual Passive
Receive Mixer with Integrated PLL and VCO
ADRF6612
ADRF6612
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Spurious Performance ............................................................... 29
Applications ....................................................................................... 1
Circuit Description......................................................................... 31
Functional Block Diagram .............................................................. 1
RF Subsystem .............................................................................. 31
General Description ......................................................................... 1
External LO Generation ............................................................ 31
Revision History ............................................................................... 2
Internal LO Generation ............................................................. 31
Specifications..................................................................................... 3
Applications Information .............................................................. 35
RF Specifications .......................................................................... 3
Basic Connections Pin Description ............................................. 36
Synthesizer/PLL Specifications ................................................... 4
Mixer Optimization ....................................................................... 37
VCO Specifications, Open-Loop................................................ 7
RF Input Balun Insertion Loss Optimization ......................... 37
Logic Input and Power Specifications ....................................... 8
IIP3 Optimization ...................................................................... 37
Digital Logic Specifications ......................................................... 9
VGS Programming ..................................................................... 38
Absolute Maximum Ratings.......................................................... 10
Low-Pass Filter Programming .................................................. 38
Thermal Resistance .................................................................... 10
Register Summary .......................................................................... 40
ESD Caution ................................................................................ 10
Register Details ............................................................................... 41
Pin Configuration and Function Descriptions ........................... 11
Evaluation Board ............................................................................ 52
Typical Performance Characteristics ........................................... 13
Outline Dimensions ....................................................................... 57
Mixer, High Performance Mode............................................... 13
Ordering Guide .......................................................................... 57
Mixer, High Efficiency Mode.................................................... 22
Synthesizer................................................................................... 23
REVISION HISTORY
5/2016—Rev. 0 to Rev. A
Changes to Table 19 ........................................................................ 32
Changes to Address: 0x22, Reset: 0x000A, Name: VCO_CTRL1
Section and Table 34....................................................................... 45
Updated Outline Dimensions ....................................................... 57
Changes to Ordering Guide .......................................................... 57
12/2014—Revision 0: Initial Version
Rev. A | Page 2 of 57
Data Sheet
ADRF6612
SPECIFICATIONS
RF SPECIFICATIONS
TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, frequency of the reference (fREF) = 122.88 MHz, fREF power = 4 dBm, fPFD =
1.536 MHz, low-side LO injection, optimum RF balun (RFB) and low-pass filter (LPF) settings, unless otherwise noted.
Table 1. High Performance Mode
Parameter
RF INTERFACE
Return Loss
Input Impedance
RF Frequency Range (fRF)
IF OUTPUT INTERFACE
Output Impedance
IF Frequency Range
DC Bias Voltage 1
EXTERNAL LO INPUT
External LO Power Input
Return Loss
Input Impedance
External VCO Input Frequency
LO Frequency Range
DYNAMIC PERFORMANCE
Power Conversion Gain
Voltage Conversion Gain
SSB Noise Figure
IF Output Phase Noise Under Blocking
Input Third-Order Intercept (IIP3)
Input Second-Order Intercept (IIP2)
Input 1 dB Compression Point (P1dB)
LO to IF Output Leakage
LO to RF Input Leakage
RF to IF Output Isolation
IF/2 Spurious
IF/3 Spurious
POWER INTERFACE
VCC12, VCC7, VCC2, VCC1
Supply Voltage
Quiescent Current
VCC3, VCC4, VCC5, VCC6, VCC8, VCC9,
VCC10, VCC11, IFOUT1+, IFOUT1−,
IFOUT2+, IFOUT2−
Supply Voltage
Quiescent Current
LO OUTPUT (LOOUT+, LOOUT−)
Frequency Range
Output Level
Output Impedance
1
Test Conditions/Comments
Min
Tunable to >20 dB broadband via serial port
Typ
Differential impedance, f = 200 MHz
Externally generated
0
−11
50
250
250
4:1 IF port transformer and printed circuit board (PCB) loss
removed
ZSOURCE = 50 Ω, differential ZLOAD = 200 Ω
10 dBm blocker present 10 MHz above desired RF input, fRF =
1900 MHz, fBLOCK = 1910 MHz, fLO = 1697 MHz, IF = 203 MHz,
IFBLOCKER = 213 MHz
fRF1 = 1900 MHz, fRF2 = 1901 MHz, fLO = 1697 MHz, each RF
tone at −10 dBm
fRF1 = 1900 MHz, fRF2 = 1950 MHz, fLO = 1697 MHz, each RF
tone at −10 dBm
Unfiltered IF output
−10 dBm input power
−10 dBm input power
Rev. A | Page 3 of 57
500
IFOUTx±
−5
Supply voltage must be applied from the external circuit through choke inductors.
3000
dB
Ω
MHz
300||1.5
40
Adjustable via SPI in four steps, in 50 Ω balanced load
Balanced
Unit
17.9
50
700
External VCO input supports divide by 1, 2, 4, 8, 16, and 32
Low-side or high-side LO, internally or externally
generated
Max
+5
5700
2850
Ω||pF
MHz
V
dBm
dB
Ω
MHz
MHz
9.0
dB
15.0
11.3
−153
dB
dB
dBc/Hz
30
dBm
60
dBm
10.6
−35
−45
−22
−72
−69
dBm
dBm
dBm
dB
dBc
dBc
3.55
3.7
260
3.85
V
mA
3.55
5
214
5.25
V
mA
2700
+7
MHz
dBm
Ω
200
−5
50
ADRF6612
Data Sheet
TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection,
optimum RFB and LPF settings, unless otherwise noted.
Table 2. High Efficiency Mode
Parameter
DYNAMIC PERFORMANCE
Power Conversion Gain
Voltage Conversion Gain
SSB Noise Figure
Input Third-Order Intercept (IIP3)
Test Conditions/Comments
Min
Typ
4:1 IF port transformer and PCB loss removed
ZSOURCE = 50 Ω, differential ZLOAD = 200 Ω
fRF1 = 1900 MHz, fRF2 = 1901 MHz, fLO = 1697 MHz, each
RF tone at −10 dBm
fRF1 = 1900 MHz, fRF2 = 1950 MHz, fLO = 1697 MHz, each
RF tone at −10 dBm
Input Second-Order Intercept (IIP2)
Input 1 dB Compression Point (P1dB)
LO to IF Output Leakage
LO to RF Input Leakage
RF to IF Output Isolation
IF/2 Spurious
IF/3 Spurious
POWER INTERFACE
VCC12, VCC7, VCC2, VCC1
Supply Voltage
Quiescent Current
VCC3, VCC4, VCC5, VCC6, VCC8, VCC9,
VCC10, VCC11, IFOUT1+, IFOUT1−,
IFOUT2+, IFOUT2−
Supply Voltage
Quiescent Current
Unfiltered IF output
−10 dBm input power
−10 dBm input power
Max
Unit
8.7
14.7
10.7
20.5
dB
dB
dB
dBm
53
dBm
8.2
−45.0
−52.0
−22.8
−58
−58
dBm
dBm
dBm
dB
dBc
dBc
3.55
3.7
260
3.85
V
mA
3.55
3.7
210
5.25
V
mA
SYNTHESIZER/PLL SPECIFICATIONS
High performance mode, TA = 25°C, measured on LO output, fLO = 1700 MHz, ZO = 50 Ω, fREF =122.88 MHz, fPFD = 1.536 MHz, fREF power =
4 dBm, CSCALE = 8 mA, bleed = 0 µA, ABLDLY = 0.9 ns, integer mode loop filter, unless otherwise noted.
Table 3. Integer Mode
Parameter
SYNTHESIZER SPECIFICATIONS
Frequency Range
Figure of Merit (FOM) 1
Phase and Frequency Detector (PFD)
Frequency (fPFD)
Reference Spurs
CHARGE PUMP
Pump Current
Output Compliance Range
REFERENCE CHARACTERISTICS
REFIN Input Frequency
REFIN Input Capacitance
Reference Divider Value
MUXOUT Output Level
MUXOUT Duty Cycle
Test Conditions/Comments
Synthesizer specifications referenced to 1 × LO
Internally generated LO
PREFIN = 6.5 dBm
Min
Typ
200
Max
Unit
2700
MHz
dBc/Hz/Hz
MHz
−223
0.8
fPFD = 1.536 MHz
1 × fPFD
4 × fPFD
>4 × fPFD
70
−105
−105
−90
Programmable to 250 µA, 500 µA, …, 8 mA
8
0.7
dBc
dBc
dBc
8.75
2.5
mA
V
320
MHz
pF
REFIN, MUXOUT pins
12
4
Programmable to 0.5, 1, 2, 3, …, 2047
VOL (lock detect output selected)
VOH (lock detect output selected)
Reference output selected
Rev. A | Page 4 of 57
0.5
2047
0.25
2.7
50
V
V
%
Data Sheet
Parameter
VCO_0
Phase Noise, Locked
Integrated Phase Noise
VCO_1
Phase Noise, Locked
Integrated Phase Noise
VCO_2
Phase Noise, Locked
Integrated Phase Noise
VCO_3
Phase Noise, Locked
Integrated Phase Noise
1
ADRF6612
Test Conditions/Comments
Min
Typ
Max
Unit
fLO = 5.1 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
−87
−94.9
−103.3
−132.9
−154.1
−155.2
0.87
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
fLO = 4.45 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
−90
−98.4
−106.5
−136.1
−154.8
−155.5
0.63
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
fLO = 3.8 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
−90
−98.1
−109.8
−137.1
−155.7
−156.2
0.61
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
fLO = 3.2 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
−89
−97.2
−107
−136.2
−155.7
−157.3
0.64
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
The FOM is computed as phase noise (dBc/Hz) − 10Log10(fPFD) − 20Log10(fLO/fPFD). The FOM was measured across the full LO range, with fREF = 122.88 MHz and fREF
power = 6.5 dBm with a 1.536 MHz fPFD. The FOM was computed at 50 kHz offset.
Rev. A | Page 5 of 57
ADRF6612
Data Sheet
High performance mode, TA = 25°C, measured on LO output, fLO = 1700 MHz, ZO = 50 Ω, fREF =122.88 MHz, fPFD = 30.72 MHz, fREF power =
4 dBm, CSCALE = 250 µA, bleed = 93.75 µA, ABLDLY = 0 ns, fractional mode loop filter, unless otherwise noted.
Table 4. Fractional Mode
Parameter
SYNTHESIZER SPECIFICATIONS
FOM 1
REFERENCE CHARACTERISTICS
VCO_0
Phase Noise, Locked
Integrated Phase Noise
VCO_1
Phase Noise, Locked
Integrated Phase Noise
VCO_2
Phase Noise, Locked
Integrated Phase Noise
VCO_3
Phase Noise, Locked
1
Test Conditions/Comments
Synthesizer specifications referenced to 1 × LO
PREFIN = 6.5 dBm
REFIN, MUXOUT pins
fLO = 2.55 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
Min
Typ
Max
Unit
219
dBc/Hz/Hz
−92.5
−97.4
−109.7
−137.6
−153.6
−155.5
0.36
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
fLO = 2.22 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
fLO = 1.9 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
−93.6
−101.8
−112.5
−140.5
−154.3
−155.3
0.32
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
−94.2
−101.7
−112.4
−141.3
−155.8
−156.8
0.32
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
fLO = 1.6 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
1 kHz to 40 MHz integration bandwidth
−93.1
−99.8
−110.9
−140.2
−155.7
−157.2
0.33
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
The FOM is computed as phase noise (dBc/Hz) − 10Log10(fPFD) − 20Log10(fLO/fPFD). The FOM was measured across the full LO range, with fREF = 122.88 MHz and fREF
power = 6.5 dBm with a 30.72 MHz fPFD. The FOM was computed at 45 kHz offset.
Rev. A | Page 6 of 57
Data Sheet
ADRF6612
VCO SPECIFICATIONS, OPEN-LOOP
High performance mode, TA = 25°C, measured on LO output, unless otherwise noted.
Table 5.
Parameter
VCO_0 PHASE NOISE
VCO_1 PHASE NOISE
VCO_2 PHASE NOISE
VCO_3 PHASE NOISE
Test Conditions/Comments
fVCO = 5.15 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
fVCO = 4.3 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
fVCO = 3.8 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
fVCO = 3.2 GHz
1 kHz offset
50 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
40 MHz offset
Rev. A | Page 7 of 57
Min
Typ
Max
Unit
−50
−104.4
−112.6
−137.7
−154
−155.1
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
−54
−106.1
−115
−138.9
−155.8
−155.2
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
−53.6
−106.6
−114.6
−140.8
−155.4
−156.3
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
−48.5
−106
−115.3
−140.2
−157.7
−156.3
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ADRF6612
Data Sheet
LOGIC INPUT AND POWER SPECIFICATIONS
TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection,
optimum RFB and LPF settings, unless otherwise noted.
Table 6.
Parameter
LOGIC INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current, IINH/IINL
POWER SUPPLIES
High Performance Mode
Voltage Range
VCC3, VCC4, VCC5, VCC6, VCC8,
VCC9, VCC10, VCC11, IFOUT1+,
IFOUT1−, IFOUT2+, IFOUT2−
VCC12, VCC7, VCC2, VCC1
Power Dissipation
High Efficiency Mode
Voltage Range
VCC1, VCC2, VCC3, VCC4, VCC5,
VCC6, VCC7, VCC8, VCC9, VCC10,
VCC11,VCC12, IFOUT1+, IFOUT1−,
IFOUT2+, IFOUT2−
Power Dissipation
Test Conditions/Comments
SCLK, SDIO, CS
Min
Typ
1.4
0
Max
Unit
3.3
0.7
V
V
µA
0.1
4.75
5
5.25
V
3.55
3.7
5.25
V
Internal LO mode (internal PLL)
External LO output enabled
External LO output disabled
2.7
2.5
3.55
Internal LO mode (internal PLL)
External LO output enabled
External LO output disabled
Rev. A | Page 8 of 57
3.7
2.0
1.8
W
W
3.85
V
W
W
Data Sheet
ADRF6612
DIGITAL LOGIC SPECIFICATIONS
Table 7.
Parameter
Input Voltage High
Input Voltage Low
Output Voltage High
Output Voltage Low
Serial Clock Period
Setup Time Between Data and Rising Edge of SCLK
Hold Time Between Data and Rising Edge of SCLK
Setup Time Between Falling Edge of CS and SCLK
Hold Time Between Rising Edge of CS and SCLK
Minimum Period for SCLK to Be in a Logic High State
Minimum Period for SCLK to Be in a Logic Low State
Maximum Delay Between Falling Edge of SCLK and
Output Data Valid for a Read Operation
Maximum Delay Between CS Deactivation and SDIO
Bus Return to High Impedance
Test Conditions/Comments
Min
1.4
IOH = −100 µA
IOL = 100 µA
2.3
Typ
Max
5
ns
0.2
38
8
8
10
10
10
10
tH
tCLK
tACCESS
tLOW
tDH
231
Units
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
0.70
tZ
tHIGH
tDS
tS
Symbol
VIH
VIL
VOH
VOL
tCLK
tDS
tDH
tS
tH
tHIGH
tLOW
tACCESS
CS
DON'T CARE
DON'T CARE
tZ
SDIO
DON'T CARE
A6
A5
A4
A3
A2
A1
A0
R/W
D15
D14
D13
Figure 2. Setup and Hold Timing Measurements
Rev. A | Page 9 of 57
D3
D2
D1
D0
DON'T CARE
12199-002
SCLK
ADRF6612
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 8.
Parameter
Supply Voltage (VCC1, VCC2, VCC3,
VCC4, VCC5, VCC6, VCC7, VCC8, VCC9,
VCC10, VCC11,VCC12, IFOUT1+,
IFOUT1−, IFOUT2+, IFOUT2−)
Digital Input/Output (SCLK, SDIO, CS)
RFINx
EXTVCOIN+, EXTVCOIN−
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
θJC is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Rating
−0.5 V to +5.5 V
Table 9. Thermal Resistance
Package Type
48-Lead LFCSP
−0.3 V to +3.6 V
20 dBm
13 dBm
150°C
−40°C to +85°C
−65°C to +150°C
ESD CAUTION
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond the
maximum operating conditions for extended periods may affect
product reliability.
Rev. A | Page 10 of 57
θJC
1.62
Unit
°C/W
Data Sheet
ADRF6612
48
47
46
45
44
43
42
41
40
39
38
37
GND
CPOUT
VCC12
LDO4
LDO3
REFIN
MUXOUT
VCC11
DNC
IFOUT1+
IFOUT1–
GND
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADRF6612
TOP VIEW
(Not to Scale)
36
35
34
33
32
31
30
29
28
27
26
25
RFBCT1
RFIN1
VCC10
VCC9
VCC8
VCC7
LDO2
VCC6
VCC5
VCC4
RFIN2
RFBCT2
NOTES
1. DNC = DO NOT CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO A GROUND
PLANE WITH LOW THERMAL IMPEDANCE.
12199-003
LOOUT+
LOOUT–
LDO1
VCC2
SDIO
SCLK
CS
VCC3
DNC
IFOUT2+
IFOUT2–
GND
13
14
15
16
17
18
19
20
21
22
23
24
GND 1
VCOVTUNE 2
GND 3
EXTVCOIN+ 4
EXTVCOIN– 5
GND 6
VCC1 7
DECL1 8
DECL2 9
DECL3 10
DECL4 11
DECL5 12
Figure 3. Pin Configuration
Table 10. Pin Function Descriptions
Pin No.
1
2
3, 6
4, 5
7
8, 9
10, 11
12
13, 14
15
16
17
18
19
20, 41
21, 40
22, 23
24, 37
25
26
27, 28, 29
30
31
32, 33, 34
35
36
38, 39
42
Mnemonic
GND
VCOVTUNE
GND
EXTVCOIN+, EXTVCOIN−
VCC1
DECL1, DECL2
DECL3, DECL4
DECL5
LOOUT+, LOOUT−
LDO1
VCC2
SDIO
SCLK
CS
VCC3, VCC11
DNC
IFOUT2+, IFOUT2−
GND, GND
RFBCT2
RFIN2
VCC4, VCC5, VCC6
LDO2
VCC7
VCC8, VCC9, VCC10
RFIN1
RFBCT1
IFOUT1−, IFOUT1+
MUXOUT
Description
Common Ground Connection for External Loop Filter.
Control Voltage for Internal VCO.
Common Ground for External VCO.
Inputs from External VCO to Internal Divider.
3.7 V VCO Supply.
LDO Output Decouplers for VCO.
External Decouplers for VCO Buffer.
External Decoupler for VCO Circuitry.
Differential Outputs of Internally Generated LO.
External Decoupling for Internal 2.5 V SPI Port LDO.
3.7 V Supply for Programmable SPI Port.
Serial Data Input/Output for Programmable SPI Port.
Clock for Programmable SPI Port.
SPI Chip Select, Asserted Low.
5 V Biases for Channel 1 and Channel 2 IF.
Do Not Connect. Do not connect this pin externally.
Channel 2 Differential IF Outputs.
Ground Connections for Channel 1 and Channel 2 IF Stage.
Balun Center Tap Connection for Channel 2 RF Input.
Channel 2 RF Input.
5 V Supplies for Mixer LO Amplifiers.
External Decoupling for Internal 3.3 V PLL/Divider LDO.
3.7 V Supply for Mixer LO Divider Chain.
5 V Supplies for Mixer LO Amplifiers.
Channel 1 RF Input.
Balun Center Tap Connection for Channel 1 RF Input.
Channel 1 Differential IF Outputs.
Internal Multiplexer Output.
Rev. A | Page 11 of 57
ADRF6612
Pin No.
43
44
45
46
47
48
Mnemonic
REFIN
LDO3
LDO4
VCC12
CPOUT
GND
EPAD
Data Sheet
Description
Reference Input for Internal PLL (Single-Ended, CMOS).
External Decoupling for Internal 2.5 V PLL LDO.
External Decoupling for Internal 3.3 V PLL LDO.
3.7 V Supply for Internal PLL.
Charge Pump Output.
Common Ground for External Charge Pump.
Exposed Pad. The exposed pad must be connected to a ground plane with low thermal impedance.
Rev. A | Page 12 of 57
Data Sheet
ADRF6612
TYPICAL PERFORMANCE CHARACTERISTICS
MIXER, HIGH PERFORMANCE MODE
TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, low-side LO injection, optimum RFB and
LPF settings, unless otherwise noted. For integer mode: fPFD = 1.536 MHz, CSCALE = 8 mA, bleed = 0 µA, ABLDLY = 0.9 ns. For
fractional mode: fPFD = 30.72 MHz, CSCALE = 250 µA, bleed = 93.75 µA, ABLDLY = 0.0 ns.
2.8
2.4
85
80
75
2.2
2.0
1.8
1.6
70
65
60
55
50
45
1.4
30
700
12199-004
35
1.0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 4. Power Dissipation vs. RF Frequency over Three Temperatures
Figure 7. Input IP2 vs. RF Frequency over Three Temperatures
11.0
15
10.5
10.0
13
INPUT P1dB (dBm)
9.0
8.0
7.5
7.0
6.5
5.5
5.0
4.5
TA
TA
TA
TA
TA
TA
= –40°C, HIGH-SIDE LO
= +25°C, HIGH-SIDE LO
= +85°C, HIGH-SIDE LO
= –40°C, LOW-SIDE LO
= +25°C, LOW-SIDE LO
= +85°C, LOW-SIDE LO
4.0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
Figure 8. Input P1dB vs. RF Frequency over Three Temperatures
18
38
17
36
16
SSB NOISE FIGURE (dB)
34
32
30
28
26
24
22
20
12
TA
TA
TA
TA
TA
TA
= –40°C, HIGH-SIDE LO
= +25°C, HIGH-SIDE LO
= +85°C, HIGH-SIDE LO
= –40°C, LOW-SIDE LO
= +25°C, LOW-SIDE LO
= +85°C, LOW-SIDE LO
10
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 6. Input IP3 vs. RF Frequency over Three Temperatures
–40°C LOCKED
–40°C EXTERNAL LO
+25°C LOCKED
+25°C EXTERNAL LO
+85°C LOCKED
+85°C EXTERNAL LO
15
14
13
12
11
10
9
8
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
12199-006
14
9
5
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
40
16
11
7
Figure 5. Power Conversion Gain vs. RF Frequency over Three Temperatures,
IF Balun and Board Loss Removed
18
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
12199-008
6.0
12199-305
CONVERSION GAIN (dB)
9.5
8.5
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
12199-007
40
1.2
RF FREQUENCY (MHz)
INPUT IP3 (dBm)
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
RF FREQUENCY (MHz)
12199-109
POWER DISSIPATION (W)
2.6
90
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
INPUT IP2 (dBm)
3.0
Figure 9. SSB Noise Figure vs. RF Frequency over Three Temperatures
Rev. A | Page 13 of 57
ADRF6612
Data Sheet
70
2.7
68
66
64
62
2.1
1.9
1.7
RF
RF
RF
RF
RF
RF
0
10
20
9.0
40
50
60
70
80
8.0
50
RF
RF
RF
RF
RF
RF
40
–40 –30 –20 –10
0
10
20
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2500MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2500MHz, HIGH-SIDE LO
30
40
50
60
70
80
TEMPERATURE (°C)
Figure 13. Input IP2 vs. Temperature for Three RF Frequencies
15
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2500MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2500MHz, HIGH-SIDE LO
14
13
INPUT P1dB (dBm)
CONVERSION GAIN (dB)
8.5
52
42
30
RF
RF
RF
RF
RF
RF
54
44
Figure 10. Power Dissipation vs. Temperature for Three RF Frequencies
9.5
56
46
TEMPERATURE (°C)
10.0
58
48
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2500MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2500MHz, HIGH-SIDE LO
1.5
–40 –30 –20 –10
60
12199-013
INPUT IP2 (dBm)
2.3
12199-010
POWER DISSIPATION (W)
2.5
7.5
7.0
6.5
6.0
5.5
RF
RF
RF
RF
RF
RF
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2700MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2700MHz, HIGH-SIDE LO
12
11
10
9
5.0
8
4.5
7
4.0
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
5
–40 –30 –20 –10
12199-011
3.0
–40 –30 –20 –10
18
34
17
33
32
SSB NOISE FIGURE (dB)
29
28
27
26
25
40
50
60
70
80
RF = 900MHz
RF = 1900MHz
RF = 2500MHz
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2500MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2500MHz, HIGH-SIDE LO
20
–40 –30 –20 –10
0
10
20
15
14
13
12
11
10
9
30
40
50
60
70
80
TEMPERATURE (°C)
Figure 12. Input IP3 vs. Temperature for Three RF Frequencies
8
–40
–20
0
20
40
TEMPERATURE (°C)
60
80
12199-115
RF
RF
RF
RF
RF
RF
12199-012
INPUT IP3 (dBm)
30
21
30
16
31
22
20
Figure 14. Input P1dB vs. Temperature for Three RF Frequencies
35
23
10
TEMPERATURE (°C)
Figure 11. Power Conversion Gain vs. Temperature for Three RF Frequencies
24
0
12199-314
6
3.5
Figure 15. SSB Noise Figure vs. Temperature for Three RF Frequencies
Rev. A | Page 14 of 57
ADRF6612
2.55
85
2.50
80
75
RF = 2500MHz, HIGH-SIDE LO
RF = 2500MHz, LOW-SIDE LO
2.45
70
2.40
RF = 1900MHz, HIGH-SIDE LO
RF = 1900MHz, LOW-SIDE LO
2.30
2.25
50
RF
RF
RF
RF
RF
RF
35
30
12199-016
120 160 200 240 280 320 360 400 440 480
80
IF FREQUENCY (MHz)
10.0
RF
RF
RF
RF
RF
RF
9.5
9.0
8.5
15
900MHz, LOW-SIDE LO
1900MHz, LOW-SIDE LO
2500MHz, LOW-SIDE LO
900MHz, HIGH-SIDE LO
1900MHz, HIGH-SIDE LO
2500MHz, HIGH-SIDE LO
14
13
7.5
7.0
6.5
6.0
5.5
80
120 160 200 240 280 320 360 400 440 480
Figure 19. Input IP2 vs. IF Frequency for Three RF Frequencies
INPUT P1dB (dBm)
8.0
=
=
=
=
=
=
40
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2500MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2500MHz, HIGH-SIDE LO
IF FREQUENCY (MHz)
Figure 16. Power Dissipation vs. IF Frequency for Three RF Frequencies
CONVERSION GAIN (dB)
55
40
2.15
2.10
40
60
45
RF = 900MHz, HIGH-SIDE LO
RF = 900MHz, LOW-SIDE LO
2.20
65
12199-019
2.35
INPUT IP2 (dBm)
POWER DISSIPATION (W)
Data Sheet
RF
RF
RF
RF
RF
RF
= 900MHz, LOW-SIDE LO
= 1900MHz, LOW-SIDE LO
= 2500MHz, LOW-SIDE LO
= 900MHz, HIGH-SIDE LO
= 1900MHz, HIGH-SIDE LO
= 2500MHz, HIGH-SIDE LO
12
11
10
9
5.0
8
4.5
7
4.0
120 160 200 240 280 320 360 400 440 480
IF FREQUENCY (MHz)
5
40
12199-017
Figure 20. Input P1dB vs. IF Frequency for Three RF Frequencies
18
36
34
17
32
16
SSB NOISE FIGURE (dB)
26
24
22
20
18
16
14
12
10
40
RF
RF
RF
RF
RF
RF
80
=
=
=
=
=
=
900MHz, LOW-SIDE LO
1900MHz, LOW-SIDE LO
2500MHz, LOW-SIDE LO
900MHz, HIGH-SIDE LO
1900MHz, HIGH-SIDE LO
2500MHz, HIGH-SIDE LO
120
160
200
240
280
–40°C, LOW SIDE LO
+25°C, LOW SIDE LO
+85°C, LOW SIDE LO
–40°C, HIGH-SIDE LO
+25°C, HIGH-SIDE LO
+85°C, HIGH-SIDE LO
15
14
13
12
11
10
9
320
360
400
440
480
IF FREQUENCY (MHz)
Figure 18. Input IP3 vs. IF Frequency for Three RF Frequencies
8
50
12199-018
INPUT IP3 (dBm)
28
120 160 200 240 280 320 360 400 440 480
IF FREQUENCY (MHz)
Figure 17. Power Conversion Gain vs. IF Frequency for Three RF Frequencies
30
80
100
150
200
250
300
IF FREQUENCY (MHz)
350
400
450
12199-121
80
12199-020
6
3.5
3.0
40
Figure 21. SSB Noise Figure vs. IF Frequency for Three RF Frequencies
Rev. A | Page 15 of 57
Data Sheet
–8
–24
–28
–32
–36
–40
LO FREQUENCY (MHz)
12199-025
300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700
TA = –40°C
TA = +25°C
TA = +85°C
300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700
LO FREQUENCY (MHz)
Figure 26. LO to RF Leakage vs. LO Frequency over Three Temperatures
12199–024
2 × LO LEAKAGE (dBm)
Figure 23. IF/3 Spurious vs. RF Frequency over Three Temperatures
0
–4
–8
–12
–16
–20
–24
–28
–32
–36
–40
–44
–48
–52
–56
–60
–64
–68
12199-026
LO TO RF LEAKAGE (dBm)
Figure 25. LO to IF Leakage vs. LO Frequency over Three Temperatures
12199-123
IF/3 SPURIOUS (dB)
–20
–52
RF FREQUENCY (MHz)
RF TO IF ISOLATION (dBc)
–16
–48
–50
TA = –40°C, HIGH-SIDE LO
–52
TA = +25°C, HIGH-SIDE LO
–54
TA = +85°C, HIGH-SIDE LO
–56
TA = –40°C, LOW-SIDE LO
–58
TA = +25°C, LOW-SIDE LO
–60
TA = +85°C, LOW-SIDE LO
–62
–64
–66
–68
–70
–72
–74
–76
–78
–80
–82
–84
–86
–88
–90
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
–12
–44
Figure 22. IF/2 Spurious vs. RF Frequency over Three Temperatures
0
TA = –40°C, HIGH-SIDE LO
–2
TA = +25°C, HIGH-SIDE LO
–4
TA = +85°C, HIGH-SIDE LO
–6
–8
TA = –40°C, LOW-SIDE LO
–10
TA = +25°C, LOW-SIDE LO
–12
TA = +85°C, LOW-SIDE LO
–14
–16
–18
–20
–22
–24
–26
–28
–30
–32
–34
–36
–38
–40
–42
–44
–46
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
TA = –40°C
TA = +25°C
TA = +85°C
0
–4
–8
–12
–16
–20
–24
–28
–32
–36
–40
–44
–48
–52
–56
–60
–64
TA = –40°C
TA = +25°C
TA = +85°C
2 × LO TO RF
2 × LO TO IF
300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700
LO FREQUENCY (MHz)
Figure 24. RF to IF Isolation vs. RF Frequency over Three Temperatures
12199-027
RF FREQUENCY (MHz)
0
–4
LO TO IF LEAKAGE (dBm)
–50
TA = –40°C, HIGH-SIDE LO
–52
TA = +25°C, HIGH-SIDE LO
–54
TA = +85°C, HIGH-SIDE LO
–56
TA = –40°C, LOW-SIDE LO
–58
TA = +25°C, LOW-SIDE LO
–60
TA = +85°C, LOW-SIDE LO
–62
–64
–66
–68
–70
–72
–74
–76
–78
–80
–82
–84
–86
–88
–90
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
12199-022
IF/2 SPURIOUS (dB)
ADRF6612
Figure 27. 2 × LO Leakage vs. LO Frequency (2 × LO to RF and 2 × LO to IF)
Rev. A | Page 16 of 57
0
–4
–8
–12
–16
–20
–24
–28
–32
–36
–40
–44
–48
–52
–56
–60
–64
ADRF6612
100
TA = –40°C
TA = +25°C
TA = +85°C
MEAN: 7.94
SD: 0.07%
PERCENT (%)
80
3 × LO TO RF
60
40
3 × LO TO IF
300 500 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700
LO FREQUENCY (MHz)
0
7.70
7.75
7.80
7.85
7.90
7.95
8.00
8.05
8.10
34
35
CONVERSION GAIN (dB)
Figure 28. 3 × LO Leakage vs. LO Frequency
(3 × LO to RF and 3 × LO to IF)
12199-131
20
12199-028
3 × LO LEAKAGE (dBm)
Data Sheet
Figure 31. Conversion Gain Distribution
100
0
HIGH-SIDE LO
LOW-SIDE LO
MEAN: 31.23
SD: 0.34%
–5
PERCENT (%)
RETURN LOSS (dBm)
80
–10
–15
–20
60
40
–25
20
1000
2000
1500
2500
RF FREQUENCY (MHz)
3000
0
27
12199-129
–35
500
28
30
31
32
33
INPUT IP3 (dBm)
Figure 29. RF Port Return Loss, Fixed IF LO Return Loss
Figure 32. Input IP3 Distribution
100
0
–5
MEAN: 10.59
SD: 0.39%
80
PERCENT (%)
–10
–15
60
40
–20
–30
100
600
1100
1600
2100
FREQUENCY (MHz)
2600
Figure 30. LO Return Loss
0
10.0
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
INPUT P1dB (dBm)
Figure 33. Input P1dB Distribution
Rev. A | Page 17 of 57
10.9
11.0
12199-133
20
–25
12199-130
RETURN LOSS (dB)
29
12199-132
–30
ADRF6612
Data Sheet
80
8
900
6
700
600
500
4
CIN1 (pF)
400
300
2
200
100
0
50
100
150
200
250
300
350
400
450
0
500
65
60
55
50
45
40
35
30
25
20
700
12199-334
0
70
FREQUENCY (MHz)
Figure 37. IF Channel-to-Channel Isolation vs. RF Frequency
over Three Temperatures
10
9
INPUT IP3 (dBm)
7
6
5
4
2
1
=0
=2
=4
=6
=8
= 10
= 12
= 14
0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
12199-035
CONVERSION GAIN (dB)
8
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
40
39
38
37
36
35
34
33
32
31
30
29
28
27
BAL_COUT = 0
26
BAL_COUT = 2
25
BAL_COUT = 4
24
BAL_COUT = 6
BAL_COUT = 8
23
BAL_COUT = 10
22
BAL_COUT = 12
21
BAL_COUT = 14
20
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 35. Conversion Gain vs. RF Frequency for All RFB Settings,
VGS and LPF Use Optimum Settings
19
18
17
15
18
=0
=2
=4
=6
=8
= 10
= 12
= 14
17
16
14
13
12
11
10
9
8
7
=0
=2
=4
=6
=8
= 10
= 12
= 14
14
13
12
11
9
6
5
700
15
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
10
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
12199-036
INPUT P1dB (dBm)
16
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
BAL_COUT
Figure 38. Input IP3 vs. RF Frequency for All RFB Settings,
VGS and LPF Use Optimum Settings
SSB NOISE FIGURE (dB)
20
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 34. IF Output Impedance (R Parallel C Equivalent)
3
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
Figure 36. Input P1dB vs. RF Frequency for All RFB Settings,
VGS and LPF Use Optimum Settings
8
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 39. SSB Noise Figure vs. RF Frequency for All RFB Settings,
VGS and LPF Use Optimum Settings
Rev. A | Page 18 of 57
12199-139
RIN1 (Ω)
800
75
12199-038
1000
12199-137
1100
IF CHANNEL-TO-CHANNEL ISOLATION (dBc)
10
1200
Data Sheet
ADRF6612
15.0
10
14.5
9
13.0
INPUT P1dB (dBm)
13.5
7
6
5
4
VGS = 0
VGS = 1
VGS = 2
VGS = 3
VGS = 4
VGS = 5
VGS = 6
VGS = 7
1
9.0
8.5
8.0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 43. Input P1dB vs. RF Frequency for All VGS Settings,
RFB and LPF Use Optimum Settings
14.0
13.5
SSB NOISE FIGURE (dB)
13.0
VGS = 0
VGS = 1
VGS = 2
VGS = 3
VGS = 4
VGS = 5
VGS = 6
VGS = 7
RF FREQUENCY (MHz)
11.0
10.5
RF FREQUENCY (MHz)
Figure 44. SSB Noise Figure vs. RF Frequency for All VGS Settings,
RFB and LPF Use Optimum Settings
15
=0
=2
=4
=6
14
13
8.0
12
INPUT P1dB (dBm)
8.5
7.5
7.0
6.5
6.0
5.5
LPF
LPF
LPF
LPF
=0
=2
=4
=6
11
10
9
5.0
8
4.5
7
4.0
3.0
700
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 42. Conversion Gain vs. RF Frequency for All LPF Settings,
RFB and VGS Use Optimum Settings
5
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 45. Input P1dB vs. RF Frequency for All LPF Settings,
RFB and VGS Use Optimum Settings
Rev. A | Page 19 of 57
12199-149
6
3.5
12199-146
CONVERSION GAIN (dB)
11.5
9.0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
Figure 41. Input IP3 vs. RF Frequency for All VGS Settings,
RFB and LPF Use Optimum Settings
9.0
12.0
9.5
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
LPF
LPF
LPF
LPF
12.5
VGS = 0
VGS = 1
VGS = 2
VGS = 3
VGS = 4
VGS = 5
VGS = 6
VGS = 7
10.0
12199-141
INPUT IP3 (dBm)
Figure 40. Conversion Gain vs. RF Frequency
for All VGS Settings, RFB and LPF Use Optimum Settings
9.5
11.0
10.5
9.5
RF FREQUENCY (MHz)
10.0
11.5
10.0
0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
700
12.0
12199-043
2
12.5
12199-144
3
12199-040
CONVERSION GAIN (dB)
14.0
8
VGS = 0
VGS = 1
VGS = 2
VGS = 3
VGS = 4
VGS = 5
VGS = 6
VGS = 7
18
14
13
12
11
=0
=2
=4
=6
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
8
700
IFMAIN = 3
IFMAIN = 4
IFMAIN = 5
IFMAIN = 6
IFMAIN = 7
IFMAIN = 8
IFMAIN = 9
IFMAIN = 10
IFMAIN = 11
IFMAIN = 12
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 49. SSB Noise Figure vs. RF Frequency for All LPF Settings,
RFB and VGS Use Optimum Settings
40
IFMAIN = 13
IFMAIN = 14
IFMAIN = 15
35
2.4
2.3
2.2
2.1
2.0
1.9
30
25
20
IFMAIN = 3
IFMAIN = 4
IFMAIN = 5
IFMAIN = 6
IFMAIN = 7
IFMAIN = 8
IFMAIN = 9
15
1.8
0
–20
20
40
60
80
TEMPERATURE (°C)
10
–40
12199-347
IFLIN = 8
IFLIN = 9
IFLIN = 10
IFLIN = 11
IFLIN = 12
IFLIN = 13
IFLIN = 14
IFLIN = 15
80
34
32
INPUT IP3 (dBm)
0
1
2
3
4
5
6
7
2.30
2.28
2.26
2.24
30
28
26
2.22
2.20
24
2.18
2.16
–40
60
36
IFLIN =
IFLIN =
IFLIN =
IFLIN =
IFLIN =
IFLIN =
IFLIN =
IFLIN =
–20
0
20
40
60
80
TEMPERATURE (°C)
12199-348
POWER DISSIPATION (W)
2.32
40
Figure 50. Input IP3 vs. Temperature for IF Main Settings
2.38
2.34
20
0
TEMPERATURE (°C)
Figure 47. Power Dissipation vs. Temperature for IF Main Settings
2.36
–20
IFMAIN = 10
IFMAIN = 11
IFMAIN = 12
IFMAIN = 13
IFMAIN = 14
IFMAIN = 15
Figure 48. Power Dissipation vs. Temperature for IF LIN Settings
22
–40
IFLIN = 0
IFLIN = 1
IFLIN = 2
IFLIN = 3
IFLIN = 4
IFLIN = 5
IFLIN = 6
IFLIN = 7
–20
IFLIN = 8
IFLIN = 9
IFLIN = 10
IFLIN = 11
IFLIN = 12
IFLIN = 13
IFLIN = 14
IFLIN = 15
0
20
40
60
80
TEMPERATURE (°C)
Figure 51. Input IP3 vs. Temperature for IF LIN Settings
Rev. A | Page 20 of 57
12199-351
1.7
–40
12199-150
9
12199-350
LPF
LPF
LPF
LPF
INPUT IP3 (dBm)
POWER DISSIPATION (W)
2.5
15
10
Figure 46. Input IP3 vs. RF Frequency for All LPF Settings,
RFB and VGS Use Optimum Settings
2.6
=0
=2
=4
=6
16
RF FREQUENCY (MHz)
2.7
LPF
LPF
LPF
LPF
17
SSB NOISE FIGURE (dB)
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
700
Data Sheet
12199-147
INPUT IP3 (dBm)
ADRF6612
Data Sheet
ADRF6612
–60
–60
890MHz +10dBm
1910MHz +10dBm
2510MHz +10dBm
–70
–90
–100
–110
–120
–130
–90
–100
–110
–120
–130
–140
–140
–150
–150
0.01
0.1
1
OFFSET FREQUENCY (MHz)
10
–160
0.001
Figure 52. Phase Noise at IF Output vs. Offset Frequency with 10 dBm Blocker
in Integer Mode
0.01
0.1
1
OFFSET FREQUENCY (MHz)
10
12199-353
PHASE NOISE (dBc/Hz)
–80
12199-352
PHASE NOISE (dBc/Hz)
–80
–160
0.001
890MHz +10dBm
1910MHz +10dBm
2510MHz +10dBm
–70
Figure 53. Phase Noise at IF Output vs. Offset Frequency with 10 dBm Blocker
in Fractional Mode
Rev. A | Page 21 of 57
ADRF6612
Data Sheet
MIXER, HIGH EFFICIENCY MODE
TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection,
optimum RFB and LPF settings, unless otherwise noted.
2.1
1.9
70
= –40°C, HIGH-SIDE LO
= 25°C, HIGH-SIDE LO
= 85°C, HIGH-SIDE LO
= –40°C, LOW-SIDE LO
= 25°C, LOW-SIDE LO
= 85°C, LOW-SIDE LO
65
60
1.8
1.7
1.6
55
50
45
1.5
35
1.3
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
13
12
11
INPUT P1dB (dBm)
12.0
TA = –40°C, HIGH_LO
11.5
TA = +25°C,HIGH_LO
11.0
TA = +85°C, HIGH_LO
10.5
TA = –40°C, LOW_LO
TA = +25°C, LOW_LO
10.0
TA = +85°C, LOW_LO
9.5
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
Figure 57. Input IP2 vs. RF Frequency over Three Temperatures
31
29
6
17
16
23
21
19
17
15
13
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
18
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
25
11
–40°C LOCKED
–40°C EXTERNAL LO
+25°C LOCKED
+25°C EXTERNAL LO
+85°C LOCKED
+85°C EXTERNAL LO
15
14
13
12
11
10
9
9
7
5
700
7
Figure 58. Input P1dB vs. RF Frequency over Three Temperatures
900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
RF FREQUENCY (MHz)
Figure 56. Input IP3 vs. RF Frequency over Three Temperatures
8
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
12199-153
INPUT IP3 (dBm)
27
8
3
700
SSB NOISE FIGURE (dB)
33
9
4
Figure 55. Conversion Gain vs. RF Frequency over Three Temperatures
35
10
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
5
12199-152
CONVERSION GAIN (dB)
Figure 54. Power Dissipation vs. RF Frequency over Three Temperatures
12199-155
RF FREQUENCY (MHz)
30
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
12199-151
1.2
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
TA = –40°C, HIGH-SIDE LO
TA = +25°C, HIGH-SIDE LO
TA = +85°C, HIGH-SIDE LO
TA = –40°C, LOW-SIDE LO
TA = +25°C, LOW-SIDE LO
TA = +85°C, LOW-SIDE LO
12199-357
40
1.4
RF FREQUENCY (MHz)
12199-156
POWER DISSIPATION (W)
2.0
TA
TA
TA
TA
TA
TA
INPUT IP2 (dBm)
2.2
Figure 59. SSB Noise Figure vs. RF Frequency over Three Temperatures
Rev. A | Page 22 of 57
Data Sheet
ADRF6612
SYNTHESIZER
VS = high performance mode, TA = 25°C, measured on LO output, fLO = 1700 MHz, ZO = 50 Ω, fREF = 122.88 MHz, fPFD = 1.536 MHz, fREF
power = 4 dBm, integer mode loop filter, unless otherwise noted.
–60
–80
–100
–120
–140
–160
–180
10k
100k
1M
10M
100M
OFFSET FREQUENCY (Hz)
Figure 60. VCO_0 Open-Loop Phase Noise vs. Offset Frequency,
fVCO_0 = 5.1 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V
–140
–150
0.01
0.1
1
10
100
–140
–160
10k
100k
1M
10M
100M
–70
LO_DIV = /2
LO_DIV = /4
LO_DIV = /8
–80
–90
–100
–110
–120
–130
–140
–150
–160
0.001
0.01
0.1
1
10
100
OFFSET FREQUENCY (MHz)
12199-061
CLOSED-LOOP PHASE NOISE (dBc/Hz)
–120
OFFSET FREQUENCY (Hz)
Figure 64. VCO_1 Closed-Loop Phase Noise for Various LO_DIV Dividers vs.
Offset Frequency, fVCO_1 = 4.5 GHz
Figure 61. VCO_1 Open-Loop Phase Noise vs. Offset Frequency,
fVCO_1 = 4.5 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V
–60
CLOSED-LOOP PHASE NOISE (dBc/Hz)
–40
–60
–80
–100
–120
–140
–160
10k
100k
1M
10M
100M
OFFSET FREQUENCY (Hz)
Figure 62. VCO_2 Open-Loop Phase Noise vs. Offset Frequency,
fVCO_2 = 3.8 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V
–70
LO_DIV = /2
LO_DIV = /4
LO_DIV = /8
–80
–90
–100
–110
–120
–130
–140
–150
–160
0.001
12199-159
OPEN-LOOP PHASE NOISE (dBc/Hz)
–130
OFFSET FREQUENCY (MHz)
12199-158
OPEN-LOOP PHASE NOISE (dBc/Hz)
–100
1k
–110
–120
–60
–80
–180
–90
–100
Figure 63. VCO_0 Closed-Loop Phase Noise for Various LO_DIV Dividers vs.
Offset Frequency, fVCO_0 = 5.1 GHz
–60
1k
–80
–160
0.001
–40
–180
LO_DIV = /2
LO_DIV = /4
LO_DIV = /8
0.01
0.1
1
OFFSET FREQUENCY (MHz)
10
100
12199-062
1k
–70
12199-060
CLOSED-LOOP PHASE NOISE (dBc/Hz)
–60
12199-157
OPEN-LOOP PHASE NOISE (dBc/Hz)
–40
Figure 65. VCO_2 Closed-Loop Phase Noise for Various LO_DIV Dividers vs.
Offset Frequency, fVCO_2 = 3.8 GHz
Rev. A | Page 23 of 57
ADRF6612
Data Sheet
–60
–80
–100
–120
–140
–160
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (Hz)
Figure 66. VCO_3 Open-Loop Phase Noise vs. Offset Frequency,
fVCO_3 = 3.2 GHz, Divide by Two Selected, VCOVTUNE = 1.5 V
LO_DIV = /2
LO_DIV = /4
LO_DIV = /8
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
0.001
0.01
0.1
1
10
100
OFFSET FREQUENCY (MHz)
12199-066
CLOSED-LOOP PHASE NOISE (dBc/Hz)
–60
12199-163
OPEN-LOOP PHASE NOISE (dBc/Hz)
–40
Figure 69. VCO_3 Closed-Loop Phase Noise for Various LO_DIV Dividers vs.
Offset Frequency, fVCO_3 = 3.2 GHz
–200
–200
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
–205
FOM (dBc/Hz/Hz)
FOM (dBc/Hz/Hz)
–205
–210
–215
–210
–215
–220
–220
–225
1630
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
Figure 67. PLL Figure of Merit (FOM) vs. LO Frequency, Integer Mode
–230
1430
1630
1830
2030
2230
2430
2630
Figure 70. PLL Figure of Merit (FOM) vs. LO Frequency, Fractional Mode Offset =
45 kHz, Bleed = 125 µA
OPEN-LOOP PHASE NOISE (dBc/Hz)
–40
1kHz OFFSET
–60
–80
–100
100kHz OFFSET
–120
500kHz OFFSET
–140
10MHz OFFSET
–40°C
+25°C
+85°C
–100
50kHz OFFSET
–110
200kHz OFFSET
–120
–130
1MHz OFFSET
–140
40MHz OFFSET
–150
–160
–180
1430
1630
1830
2030
2230
2430
2630
LO FREQUENCY (MHz)
2830
Figure 68. Open-Loop Phase Noise vs. LO Frequency,
Divide by Two Selected
Rev. A | Page 24 of 57
–170
1430
1630
1830
2030
2230
2430
2630
LO FREQUENCY (MHz)
Figure 71. Open-Loop Phase Noise vs. LO Frequency,
Divide by Two Selected
2830
12199-168
–160
12199-165
OPEN-LOOP PHASE NOISE (dBc/Hz)
–40°C
+25°C
+85°C
–20
2830
LO FREQUENCY (MHz)
–90
0
12199-470
–230
1430
12199-367
–225
Data Sheet
–70
ADRF6612
–80
–40°C
+25°C
+85°C
–80
50 kHz OFFSET
–100
–100
PHASE NOISE (dBc/Hz)
100kHz OFFSET
–110
–120
500kHz OFFSET
–130
–140
–130
1MHz OFFSET
–140
40MHz OFFSET
1630
1830
2030
2230
2430
2630
LO FREQUENCY (MHz)
–170
1430
12199-069
–170
1430
2030
2230
2430
2630
Figure 75. Integer Loop Filter Phase Noise, Divide by Two Selected,
Offset = 50 kHz, 200 kHz, 1 MHz, and 40 MHz
1.4
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
1.2
INTEGRATED PHASE NOISE,
WITHOUT SPURS (°rms)
1.2
1830
LO FREQUENCY (Hz)
Figure 72. Integer Loop Filter Phase Noise, Divide by Two Selected,
Offset = 1 kHz, 100 kHz, 500 kHz, and 10 MHz
1.4
1630
12199-072
–160
–160
LO_DIV = /2
1.0
0.8
0.6
0.4
0.2
LO_DIV = /2
1.0
0.8
0.6
0.4
0.2
LO_DIV = /4
3360
3860
4360
LO_DIV = /8
4860
5360
VCO FREQUENCY (MHz)
0
2860
12199-070
0
2860
Figure 73. 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency,
Divide by Two, Four, and Eight, Including Spurs
–105
–115
3860
4360
4860
5360
VCO FREQUENCY (MHz)
12199-071
–125
3360
4360
4860
5360
–75
–40°C LO_DIV = /8
+25°C LO_DIV = /8
+85°C LO_DIV = /8
–95
–135
2860
3860
Figure 76. 10 kHz to 40 MHz Integrated Phase Noise vs. VCO Frequency,
Divide by Two, Four, and Eight, Excluding Spurs
REFERENCE SPURS (dBc), 2 × PFD OFFSET
–85
3360
VCO FREQUENCY (MHz)
–75
–40°C LO_DIV = /2
+25°C LO_DIV = /2
+85°C LO_DIV = /2
–40°C LO_DIV = /4
+25°C LO_DIV = /4
+85°C LO_DIV = /4
LO_DIV = /8
LO_DIV = /4
12199-073
INTEGRATED PHASE NOISE,
WITH SPURS (°rms)
200 kHz OFFSET
–120
–150
10 MHz OFFSET
–150
–110
Figure 74. fPFD Reference Spurs vs. VCO Frequency,
1 × PFD Offset, Measured at LO Output, Integer Mode
–85
–95
–105
–115
–40°C LO_DIV = /2
+25°C LO_DIV = /2
+85°C LO_DIV = /2
–40°C LO_DIV = /4
+25°C LO_DIV = /4
+85°C LO_DIV = /4
–125
–135
2860
3360
3860
4360
–40°C LO_DIV = /8
+25°C LO_DIV = /8
+85°C LO_DIV = /8
4860
5360
VCO FREQUENCY (MHz)
Figure 77. fPFD Reference Spurs vs. VCO Frequency,
2 × PFD Offset, Measured at LO Output, Integer Mode
Rev. A | Page 25 of 57
12199-074
PHASE NOISE (dBc/Hz)
–90
REFERENCE SPURS (dBc), 1 × PFD OFFSET
–40°C
+25°C
+85°C
–90
1kHz OFFSET
ADRF6612
–105
–115
–125
3860
3360
4360
4860
5360
VCO FREQUENCY (MHz)
–95
–105
–115
–125
–135
2860
–60
REFERENCE SPURS (dBc), 2 × PFD OFFSET
–70
–75
–80
–85
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
–64
–66
–68
–70
–72
–74
–76
–78
–74
–76
–78
–80
–82
–84
–86
–88
–90
1430
1630
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
Figure 80. fPFD Reference Spurs vs. LO Frequency,
3 × PFD Offset, Measured at LO Output, Fractional Mode
Rev. A | Page 26 of 57
1830
2030
2230
2430
2630
2830
Figure 82. fPFD Reference Spurs vs. LO Frequency,
2 × PFD Offset, Measured at LO Output, Fractional Mode
REFERENCE SPURS (dBc), 4 × PFD OFFSET
–40°C
+25°C
+85°C
12199-380
REFERENCE SPURS (dBc), 3 × PFD OFFSET
–70
1630
LO FREQUENCY (MHz)
Figure 79. fPFD Reference Spurs vs. LO Frequency,
1 × PFD Offset, Measured at LO Output, Fractional Mode
–72
5360
–40°C
+25°C
+85°C
–62
–80
1430
12199-379
REFERENCE SPURS (dBc), 1 × PFD OFFSET
–65
1630
4860
Figure 81. fPFD Reference Spurs vs. VCO Frequency,
4 × PFD Offset, Measured at LO Output, Integer Mode
–40°C
+25°C
+85°C
–90
1430
4360
VCO FREQUENCY (MHz)
Figure 78. fPFD Reference Spurs vs. VCO Frequency,
3 × PFD Offset, Measured at LO Output, Integer Mode
–60
3860
3360
12199-382
–135
2860
–85
–40°C LO_DIV = /8
+25°C LO_DIV = /8
+85°C LO_DIV = /8
12199-078
–95
–40°C LO_DIV = /2
+25°C LO_DIV = /2
+85°C LO_DIV = /2
–40°C LO_DIV = /4
+25°C LO_DIV = /4
+85°C LO_DIV = /4
–40°C
+25°C
+85°C
–76
–78
–80
–82
–84
–86
–88
–90
1430
1630
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
Figure 83. fPFD Reference Spurs vs. LO Frequency,
4 × PFD Offset, Measured at LO Output, Fractional Mode
12199-383
–85
–75
–40°C LO_DIV = /8
+25°C LO_DIV = /8
+85°C LO_DIV = /8
REFERENCE SPURS (dBc), 4 × PFD OFFSET
–40°C LO_DIV = /2
+25°C LO_DIV = /2
+85°C LO_DIV = /2
–40°C LO_DIV = /4
+25°C LO_DIV = /4
+85°C LO_DIV = /4
12199-075
REFERENCE SPURS (dBc), 3 × PFD OFFSET
–75
Data Sheet
Data Sheet
ADRF6612
0
IF AT –40°C
IF AT +25°C
IF AT +85°C
LO AT –40°C
LO AT +25°C
LO AT +85°C
–20
–10
–20
–40
ISOLATION (dB)
–30
–60
–80
–40
–50
–60
–70
–100
–80
–120
–90
1630
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
–100
700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 2900
12199-387
–140
1430
12199-384
REFERENCE SPURS (dBc), 1 × PFD OFFSET
0
RF FREQUENCY (MHz)
Figure 84. fPFD Reference Spurs vs. LO Frequency, Divide by Two Selected, 1 × PFD
Offset, Measured on LO Output and IF Output
Figure 87. RF to LO Output Feedthrough, LO_DRV_LVL = 0
10
1520
LO_DRV_LVL = 0 AT –40°C
LO_DRV_LVL = 0 AT +25°C
LO_DRV_LVL = 0 AT +85°C
8
LO_DRV_LVL = 1 AT –40°C
LO_DRV_LVL = 1 AT +25°C
LO_DRV_LVL = 1 AT +85°C
1515
4
LO FREQUENCY (MHz)
LO AMPLITUDE (dBm)
3
2
0
–2
–4
–6
1510
1505
1500
1495
1490
–8
850
1350
1850
2350
1485
2850
LO FREQUENCY (MHz)
1480
0
20
30
40
50
60
70
80
90
100
LOCK TIME (ms)
Figure 85. LO Amplitude vs. LO Frequency, LO_DRV_LVL = 0, 1, 2, and 3
Figure 88. LO Frequency Settling Time, Integer Mode Loop Filter,
Integer Mode
1520
225
LO_DRV_LVL = 3 AT
LO_DRV_LVL = 3 AT
LO_DRV_LVL = 3 AT
LO_DRV_LVL = 2 AT
LO_DRV_LVL = 2 AT
LO_DRV_LVL = 2 AT
1515
LO FREQUENCY (MHz)
205
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
195
185
175
165
155
135
125
350
LO_DRV_LVL = 1 AT
LO_DRV_LVL = 1 AT
LO_DRV_LVL = 1 AT
LO_DRV_LVL = 0 AT
LO_DRV_LVL = 0 AT
LO_DRV_LVL = 0 AT
850
1350
1505
1500
1495
1490
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
1485
1850
2350
LO FREQUENCY (MHz)
Figure 86. Supply Current for VCC7 vs. LO Frequency,
LO_DRV_LVL = 0, 1, 2, and 3
2850
1480
12199-386
145
1510
0
0.5
1.0
1.5
2.0
2.5
3.0
LOCK TIME (ms)
3.5
4.0
4.5
5.0
12199-389
215
VCC7 SUPPLY CURRENT (mA)
10
12199-388
–12
350
LO_DRV_LVL = 3 AT –40°C
LO_DRV_LVL = 3 AT +25°C
LO_DRV_LVL = 3 AT +85°C
12199-500
LO_DRV_LVL = 2 AT –40°C
LO_DRV_LVL = 2 AT +25°C
LO_DRV_LVL = 2 AT +85°C
–10
Figure 89. LO Frequency Settling Time, Fractional Loop Filter, Fractional Mode
Rev. A | Page 27 of 57
ADRF6612
2.5
Data Sheet
–60
VTUNE +85°C
VTUNE –40°C
–70
–80
PFD SPURS (dBc)
VTUNE (V)
2.0
3.18GHz
3.81GHz
4.45GHz
5.08GHz
1.5
1.0
–90
–100
–110
–120
0.5
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
Figure 90. VTUNE vs. LO Frequency for Lock at Cold Drift to Hot
2.5
VTUNE +85°C
VTUNE –40°C
1.5
1.0
0.5
0
1430
1630
1830
2030
2230
2430
2630
2830
LO FREQUENCY (MHz)
12199-188
VTUNE (V)
2.0
Figure 91. VTUNE vs. LO Frequency for Lock at Hot Drift to Cold
Rev. A | Page 28 of 57
–140
–100
–80
–60
–40
–20
0
20
40
60
80
100
OFFSET FREQUENCY (MHz)
Figure 92. PFD Spurs vs. Offset Frequency for 4 VCOs, Integer Mode
12199-189
1630
12199-187
0
1430
–130
Data Sheet
ADRF6612
SPURIOUS PERFORMANCE
(N × fRF) − (M × fLO) spur measurements were made using the standard evaluation board. Mixer spurious products are measured in dBc from the
IF output power level. Data was measured only for frequencies less than 6 GHz. Typical noise floor of the measurement system = −100 dBm.
High Performance Mode
VS = high performance mode, TA = 25°C, ZO = 50 Ω, fREF = 122.88 MHz, fREF power = 4 dBm, fPFD = 1.536 MHz, low-side LO injection,
optimum RFB and LPF settings, unless otherwise noted.
Table 11. RF = 900 MHz, LO = 697 MHz
M
0
N
0
1
2
3
4
5
6
7
8
9
−35.5
−55.3
−88.2