a
MicroConverter, 10-channel 24-Bit ADC
with Embedded 62kB FLASH MCU
Preliminary Technical Data
FEATURES
High Resolution Sigma-Delta ADC
24-Bit Resolution
Up to 10 ADC input channels
24-Bit No Missing Codes
20-Bit rms (17.4 Bit p-p) Effective Resolution @ 60 Hz
Offset Drift 10 nV/°C, Gain Drift 0.5 ppm/°C (Chop enabled)
Memory
62 Kbytes On-Chip Flash/EE Program Memory
4 Kbytes On-Chip Flash/EE Data Memory
Flash/EE, 100 Year Retention, 100 Kcycles Endurance
3 Levels of Flash/EE Program Memory Security
In-Circuit Serial Download (No External Hardware)
High Speed User Download (5 Seconds)
2304 Bytes On-Chip Data RAM
8051-Based Core
8051 Compatible Instruction Set
High Performance Single Cycle Core
32 kHz External Crystal
On-Chip Programmable PLL (12.58 MHz Max)
3 x 16-Bit Timer/Counter
26 Programmable I/O Lines
11 Interrupt Sources, Two Priority Levels
Dual Data Pointer, Extended 11-Bit Stack Pointer
ADuC847
On-Chip Peripherals
Internal Power on Reset Circuit
Dual 16-Bit S-D DACs/PWMs
On-Chip Temperature Sensor
Dual Excitation Current Sources
Time Interval Counter (Wakeup/RTC Timer)
UART, SPI®, and I2C® Serial I/O
High Speed Baud Rate Generator (incl 115,200)
Watchdog Timer (WDT)
Power Supply Monitor (PSM)
Power
Normal: 2.3mA Max @ 3.6 V (Core CLK = 1.57 MHz)
Power-Down: 20mA Max with Wakeup Timer Running
Specified for 3 V and 5 V Operation
Package and Temperature Range
52-Lead MQFP (14 mm x 14 mm), –40°C to +125°C
56-Lead CSP (8 mm x 8 mm), –40°C to +85°C
APPLICATIONS
Multi channel Sensor monitoring
Industrial/Environmental Instrumentation
WeighScales
Portable Instrumentation, Battery Powered Systems
4-20mA Transmitters
Data Logging
Precision System Monitoring
FUNCTIONAL BLOCK DIAGRAM
REV. PrA 05/03
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© 2003 Analog Devices, Inc. All rights reserved
ADUC847* Product Page Quick Links
Last Content Update: 11/01/2016
Comparable Parts
Tools and Simulations
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• Sigma-Delta ADC Tutorial
Evaluation Kits
Reference Materials
• ADuC847 QuickStart Development System
Technical Articles
• Integrated Route Taken to Pulse Oximetry
Documentation
Application Notes
• AN-1074: Understanding the Serial Download Protocol
(Formerly uC004)
• AN-1139: Understanding the Parallel Programming
Protocol
• AN-282: Fundamentals of Sampled Data Systems
• AN-660: XY-Matrix Keypad Interface to MicroConverter®
• AN-709: RTD Interfacing and Linearization Using an
ADuC8xx MicroConverter&®
• AN-759: Expanding the Number of DAC Outputs on the
ADuC8xx and ADuC702x Families (uC012)
• UC-006: A 4-wire UART-to-PC Interface
• UC-009: Addressing 16MB of External Data Memory
Data Sheet
• ADuC845/ADuC847/ADuC848: MicroConverter® MultiChannel 24-/16-Bit ADCs with Embedded 62 kB FLASH
and Single-Cycle MCU Data Sheet
User Guides
• ADuC845/ADuC847/ADuC848 Quick Reference Guide
• UG-041: ADuC8xx Evaluation Kit Getting Started User
Guide
Design Resources
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frequently modified.
Preliminary Technical Data
ADuC847
SPECIFICATIONS1
(AVDD = 2.7 V to 3.6 V or 4.75 V to 5.25 V, DVDD = 2.85 V to 3.6 V or 4.75 V to 5.25 V, REFIN(+) = 2.5 V, REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768
kHz Crystal; all specifications TMIN, to TMAX unless otherwise noted.). Buffer On unless otherwise noted.
PARAMETER
MIN
TYP
MAX
UNITS
5.4
16.06
24
19.79
59.36
105
1365
Hz
Hz
Bits
Bits Pk-Pk
Bits Pk-Pk
Bits Pk-Pk
Bits Pk-Pk
CONDITION
ADC (CHOP ENABLED) 1
Conversion Rate (Chop enabled)
(Chop disabled)
No Missing Codes2
Resolution
(Chop enabled)
(Chop disabled)
(Chop enabled)
(Chop disabled)
Output Noise
Integral Non Linearity
3
Offset Error
13.5
13
18.5
17.4
See Tables IV, V VI & VII in
ADC Description
±2
± 15
±3
ppm of FSR
µV
See tables VI & VII
Offset Error Drift vs. Temp (Chop enabled)
Offset Error Drift vs. Temp (Chop disabled)
4
Full-Scale Error
Gain Error Drift vs. Temp
± 10
±200
± 10
5
PARAMETER
ADC ANALOG INPUTS
9, 10
Differential Input Voltage Ranges
Bipolar Mode (ADC0CON.5 = 0)
Unipolar Mode (ADC0CON.5 = 1)
ADC Range Matching
Power Supply Rejection
Common Mode DC Rejection
On AIN
On AIN
Common Mode 50/60Hz Rejection
On AIN
On AIN
On AIN
On AIN
Normal Mode 50/60 Hz Rejection
On AIN
2
Analog Input Current
nV/°C
nV/°C
µV
ppm/°C
± 0.5
MIN
TYP
MAX
± 1.024 x VREF/GAIN
V
0 Æ 1.024 x Vref/GAIN
±2
80
113
V
µV
dBs
dBs
95
dBs
dBs
Offset Error is in the order of the noise for the
programmed gain and update rate following a
calibration for CHOP disabled.
Chop Enabled
Chop Disabled
CONDITION
VREF = REFIN(+) - REFIN(-) (or Int 1.25V Ref)
GAIN = 1 to 128
VREF = REFIN(+) - REFIN(-) GAIN=1 to 128
AIN=18mV
AIN=1V, Range=± 2.56V
AIN=7.8mV, Range=± 20mV
95
90
dBs
dBs
95
90
dBs
dBs
@DC, AIN=7.8mV, Range=± 20mV
@DC, AIN=1V, Range=± 2.56V
20Hz Update Rate
50/60Hz ± 1Hz, AIN=7.8mV, Range=± 20mV
50/60Hz ± 1Hz, AIN=1V, Range=± 2.56V
59Hz Update Rate
50/60Hz ± 1Hz, AIN=7.8mV, Range=± 20mV
50/60Hz ± 1Hz, AIN=1V, Range=± 2.56V
dBs
nA
50/60Hz ± 1Hz, 20Hz/59Hz Update Rate
TMAX = 85°C
113
60
±1
±5
Analog Input Current Drift
±5
± 15
± 125
±2
AINCOM Input Current
AINCOM Input Current Drift
2
Absolute AIN Voltage Limits
AGND + 0.1
Absolute AINCOM Voltage Limits
AGND + 0.03
REV. PrA 05/03
UNITS
CHOP = 0 (ADCMODE.3)
CHOP = 1 (ADCMODE.3)
19.79Hz/ 59.36Hz Update Rate
Range = ± 20mV, 20Hz Update Rate
Range = ± 20mV, 59Hz Update Rate
Range = ± 2.56V, 20Hz Update Rate
Range = ± 2.56V, 59.4Hz Update Rate
Output Noise varies with selected Update Rates
and Gain Range
1 LSB16
CHOP Enabled
AVDD – 0.1
AVDD – 0.03
2
nA
pA/°C
pA/°C
nA/V
pA/V/°C
V
V
TMAX = 125°C
TMAX = 85°C
TMAX = 125°C
± 2.56V Range
Ain0-Ain9 with Buffer ON
(ADC0CON1.6 = 0 & ADC0CON1.7 = 0)
Buffer bypassed (ADC0CON1.6=0,
ADC0CON1.7=1)
Preliminary Technical Data
EXTERNAL REFERENCE INPUTS
2
REFIN(+) to REFIN(–) Range
Average Reference Input Current
Average Reference Input Current Drift
‘NO Ext. REF’ Trigger Voltage
0.3
Common Mode DC Rejection
Common Mode 50/60Hz Rejection
Normal Mode 50/60 Hz Rejection
125
90
60
PARAMETER
ADC SYSTEM CALIBRATION
Full Scale Calibration Limit
Zero Scale Calibration Limit
Input Span
INT REFERENCE (CHOP ENABLED)
ADC Reference
Reference Voltage
Power Supply Rejection
Reference Tempco
1
MIN
1.237
Initial Tolerance at 25°C
Drift
REV. PrA 05/03
0.65
µA/V
nA/V/°C
V
TYP
MAX
+1.05 x FS
AIN- Current
POWER SUPPLY MONITOR (PSM)
AVDD Trip Point Selection Range
AVDD Trip Point Accuracy
AVDD Trip Point Accuracy
DVDD Trip Point Selection Range
DVDD Trip Point Accuracy
DVDD Trip Point Accuracy
V
dBs
dBs
dBs
-1.05 x FS
0.8 x FS
TRANSDUCER BURNOUT CURRENT SOURCES
AIN+ Current
PARAMETER
AVDD
1
+/- 0.1
TEMPERATURE SENSOR
Accuracy
Thermal Impedance
EXCITATION CURRENT SOURCES
Output Current
Initial Tolerance at 25°C
Drift
Initial Current Matching at 25°C
Drift Matching
Line Regulation (AVDD)
Load Regulation
Output Compliance
2.5
2.1 x FS
1.25
45
100
1.2625
2.63
V
dBs
ppm/°C
-100
nA
100
nA
+/- 10
0.03
%
%/°C
0.1
AVDD-0.6
TYP
µA
%
ppm/°C
%
ppm/°C
µA/V
V
V
MAX
UNITS
4.63
+/- 3.0
+/- 3.0
4.63
+/- 3.0
+/- 3.0
V
%
%
V
%
%
-3-
ADC Enabled
NOXREF bit active if VREF0.65
@DC, AIN=1V, Range=± 2.56V
50/60Hz ± 1Hz, AIN=1V, Range=± 2.56V
50/60Hz ± 1Hz, 20Hz/59.4Hz Update Rate
CONDITION
V
V
V
°C
°C/W
°C/W
AGND
2.63
UNITS
+/- 2
90
52
-200
+/-10
200
+/-1
20
1
MIN
ADuC847
initial tolerance @ 25°C, VDD=5V
MQFP Package
CSP Package
AIN+ is the selected positive input (Ain4 or
Ain6 only) to the ADC
AIN- is the selected negative input (Ain5 or
Ain7 only) to the ADC
Available from each Current Source
Matching between both Current Sources
AVDD=5V +/- 5%
CONDITION
Four Trip Points selectable in this range
TMAX = 85°C
TMAX = 125°C
Four Trip Points selectable in this range
TMAX = 85°C
TMAX = 125°C
Preliminary Technical Data
CRYSTAL OSCILLATOR (XTAL 1AND XTAL2)
Logic Inputs, XTAL1 Only2
VINL, Input Low Voltage
VINH, Input Low Voltage
0.8
0.4
V
V
V
V
pF
pF
DVDD = 5V
DVDD = 3V
DVDD = 5V
DVDD = 3V
0.8
0.4
V
V
V
DVDD = 5V
DVDD = 3V
3.0
2.5
1.4
1.1
0.85
V
V
V
V
V
DVDD = 5V
DVDD = 3V
DVDD = 5V
DVDD = 3V
DVDD = 5V or 3V
+/- 10
-40
+/-10
+/-10
105
+/-10
-660
-75
10
V
µA
µA
µA
µA
µA
µA
µA
µA
pF
VIN = 0V or VDD
VIN = 0V, DVDD=5V, Internal Pullup
VIN = DVDD, DVDD=5V
VIN = 0V, DVDD=5V
VIN = DVDD, DVDD=5V, Internal Pull-Down
VIN = DVDD, DVDD=5V
VIN = 2V, DVDD=5V
VIN = 0.45V, DVDD=5V
All Digital Inputs
10
V
V
V
V
V
µA
pF
3.5
2.5
XTAL1 Input Capacitance
XTAL2 Output Capacitance
18
18
LOGIC INPUTS
All Inputs except SCLOCK, RESET
and XTAL12
VINL, Input Low Voltage
VINH, Input Low Voltage
SCLOCK and RESET Only
(Schmidt Triggered Inputs)2
VT+
VTVT+ - VTInput Currents
Port 0, P1.0ÆP1.7, EA
SCLOCK, MOSI,MISO SS13
2.0
1.3
0.95
0.8
0.4
0.3
2.0
-10
RESET
35
Port 2, Port 3
-180
-20
Input Capacitance
LOGIC OUTPUTS
All Digital Outputs except XTAL22
VOH, Output High Voltage
VOL, Output Low Voltage14
2.4
2.4
0.8
0.8
0.8
+/-10
Floating State Leakage Current
Floating State Output Capacitance
PARAMETER
START UP TIME
At Power On
After External RESET in Normal Mode
After WDT RESET in Normal Mode
From Idle Mode
From Power-Down Mode
Oscillator Running
Wakeup with INT0 Interrupt
Wakeup with SPI Interrupt
Wakeup with TIC Interrupt
Wakeup with External RESET
Oscillator Powered Down
Wakeup with INT0 Interrupt
Wakeup with SPI Interrupt
Wakeup with External RESET
REV. PrA 05/03
MIN
ADuC847
TYP
MAX
UNITS
300
3
3
10
ms
ms
ms
us
20
20
20
3
us
us
us
us
20
20
5
us
us
ms
DVDD = 5V, ISOURCE = 80 µA
DVDD = 3V, ISOURCE = 20 µA
ISINK = 8mA, SCLOCK, MOSI/SDATA
ISINK = 10mA, P1.0, P1.1
ISINK = 1.6mA, All Other Outputs
CONDITION
Controlled via WDCON SFR
PLLCON.7 = 0
PLLCON.7 = 1
4
Preliminary Technical Data
FLAH/EE MEMORY RELIABILITY CHARACTERISTICS
Endurance16
100,000 700,000
Data Retention17
100
POWER REQUIREMENTS
Power Supply Voltages
AVDD 3V Nominal
AVDD 5V Nominal
DVDD 3V Nominal
DVDD 5V Nominal
5V POWER CONSUMPTION
Normal Mode18, 19
DVDD Current
2.85
4.75
2.85
4.75
Cycles
Years
3.6
5.25
3.6
5.25
13
DVDD Current
AVDD Current
4
16
180
mA
mA
µA
core clock = 1.57MHz
core clock = 12.58MHz
53
100
30
80
1
3
µA
µA
µA
µA
µA
µA
TMAX = 85°C; Osc ON;TIC ON
TMAX = 125°C; Osc ON; TIC ON
TMAX = 85°C; Osc OFF
TMAX = 125°C; Osc OFF
TMAX = 85°C; Osc ON or OFF
TMAX = 125°C; Osc ON or OFF
Typical Additional Peripheral Currents (AIDD and D IDD)
Primary ADC
1
Auxiliary ADC
0.5
Power Supply Monitor
50
DAC
150
Dual Excitation Current Sources
400
mA
mA
µA
µA
µA
4.75V < DVDD