ADUCRF101

ADC0 ADC5 UHF TRANSCEIVER MUX TEMP SENSOR BAND GAP REFERENCE 1 4 -B I T S AR A D C 50 0 kS P S XOSC26N XOSC26P LOW POWER RADIO RFIO_1P RFIO_1N RFO2 VREF RESET LFXTAL1 LFXTAL2 OSC POR AVDD LVDD IOVDD SPI I2C UART P WM GPIOS ... ... PACKET HANDLER & WAKE UP CONTROL ARM CORTEX M3 - BASED MCU WITH ADDITIONAL PERIPHERALS 2xGEN PURPOSE TIMERS WAKE-UP TIMER IN T E R R U P T C O N T R O L LE R WATCHDOG TIMER 16K BYTES SRAM (4k x 32 bits) 2 KBYTES 128 KBYTES FLASH/EE (32k x 32 bits) GPIOs ADuCRF101 SERIAL WIRE HT TH B B B B B B B B B B B B B B B B B B  B B     SCLOCK (POLARITY = 0) SCLOCK (POLARITY = 1) tSH tSL tSR tSF tDAV MOSI MSB tDF tDR BITS 6 TO 1 LSB MISO MSB IN BITS 6 TO 1 LSB IN 04955-055 tDSU tDHD SCLOCK (POLARITY = 0) tSH tSL tSR SCLOCK (POLARITY = 1) tSF tDOSU MOSI MSB tDAV tDF tDR BITS 6 TO 1 LSB MISO MSB IN BITS 6 TO 1 LSB IN tDHD 04955-056 tDSU CS tCS SCLOCK (POLARITY = 0) tSFS tSH tSL tSR SCLOCK (POLARITY = 1) tSF tDAV MISO MSB tDF tDR BITS 6 TO 1 LSB MOSI MSB IN BITS 6 TO 1 LSB IN 04955-057 tDSU tDHD CS tCS SCLOCK (POLARITY = 0) tSFS tSH SCLOCK (POLARITY = 1) tSL tSR tSF tDAV tDOCS tDF MISO MSB tDR BITS 6 TO 1 LSB MOSI MSB IN BITS 6 TO 1 LSB IN 04955-058 tDSU tDHD  64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P IN 1 ID E N T IF IE R 49 48 47 46 45 44 43 AD u C R F 1 01 T O P V IE W (N o t t o S c a l e ) 42 41 40 39 38 37 36 35 34 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32