FUNCTIONAL BLOCK DIAGRAMS
High common-mode transient immunity: 100 kV/μs
High robustness to radiated and conducted noise
Low propagation delay: 13 ns maximum for 5 V operation,
15 ns maximum for 1.8 V operation
150 Mbps maximum data rate
Safety and regulatory approvals (pending)
UL recognition: 5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 849 V peak
10,000 V peak surge/impulse voltage rating
CQC Certification per GB4943.1-2011
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C maximum
Fail-safe high or low options
8-lead/16-lead, RoHS compliant SOIC packages
Qualified for automotive applications
APPLICATIONS
GND1
1
16
GND2
NIC
2
15
NIC
VDD1
3
14
VDD2
VIA
4
ENCODE
DECODE
13
VOA
ENCODE
DECODE
12
VOB
ADuM220N
VIB
5
NIC
6
11
NIC
GND1
7
10
NIC
NIC
8
9
GND2
14116-001
FEATURES
Figure 1.
GND1
1
16
GND2
NIC
2
15
NIC
VDD1
3
14
VDD2
VOA
4
DECODE
ENCODE
13
VIA
VIB
5
ENCODE
DECODE
12
VOB
NIC
6
11
NIC
GND1
7
10
NIC
NIC
8
9
GND2
8
VDD2
ADuM221N
14116-002
Data Sheet
5.0 kV RMS Dual Channel Digital Isolators
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Figure 2.
General-purpose multichannel isolation
Industrial field bus isolation
Automotive systems
ADuM225N
VDD1 1
GENERAL DESCRIPTION
VIA 2
ENCODE
DECODE
7
VOA
VIB 3
ENCODE
DECODE
6
VOB
5
GND2
The ADuM220N/ADuM221N/ADuM225N/ADuM226N data
channels are independent and are available in a variety of
configurations with a withstand voltage rating of 5.0 kV rms (see
the Ordering Guide). The devices operate with the supply voltage
on either side ranging from 1.8 V to 5 V, providing compatibility
with lower voltage systems as well as enabling voltage translation
functionality across the isolation barrier. Unlike other optocoupler
alternatives, dc correctness is ensured in the absence of input logic
transitions. Two different fail-safe options are available, in which
GND1 4
Figure 3.
ADuM226N
VDD1 1
8
VDD2
VOA 2
DECODE
ENCODE
7
VIA
VIB 3
ENCODE
DECODE
6
VOB
5
GND2
GND1 4
14116-004
The ADuM220N/ADuM221N/ADuM225N/ADuM226N are
dual-channel digital isolators based on Analog Devices, Inc.,
iCoupler® technology. Combining high speed, complementary
metal-oxide semiconductor (CMOS) and monolithic air core
transformer technology, these isolation components provide
outstanding performance characteristics superior to alternatives
such as optocoupler devices and other integrated couplers. The
maximum propagation delay is 13 ns with a pulse width distortion
(PWD) of less than 3 ns at 5 V operation. Channel matching is
tight at 3.0 ns maximum.
14116-003
1
Figure 4.
the outputs transition to a predetermined state when the input
power supply is not applied or the inputs are disabled. The
ADuM220N0 is pin compatible with the ADuM2210 RW-16
package. The ADuM220N1 is pin compatible with the
ADuM2200 RW-16 package. The ADuM221N0 is pin compatible with the ADuM2211 RW-16 package. The ADuM221N1 is
pin compatible with the ADuM2201 RW-16 package.
1
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. B
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Technical Support
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ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ......................................................... 13
Applications ....................................................................................... 1
ESD Caution................................................................................ 13
General Description ......................................................................... 1
Pin Configurations and Function Descriptions ......................... 15
Functional Block Diagrams ............................................................. 1
Typical Performance Characteristics ........................................... 18
Revision History ............................................................................... 2
Theory of Operation ...................................................................... 19
Specifications..................................................................................... 3
Overview ..................................................................................... 19
Electrical Characteristics—5 V Operation................................ 3
Applications Information .............................................................. 20
Electrical Characteristics—3.3 V Operation ............................ 4
PCB Layout ................................................................................. 20
Electrical Characteristics—2.5 V Operation ............................ 6
Propagation Delay Related Parameters ................................... 20
Electrical Characteristics—1.8 V Operation ............................ 7
Jitter Measurement ..................................................................... 20
Insulation and Safety Related Specifications ............................ 9
Insulation Lifetime ..................................................................... 20
Package Characteristics ............................................................... 9
Outline Dimensions ....................................................................... 22
Regulatory Information ............................................................. 10
Ordering Guide .......................................................................... 23
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ............................................................................ 11
Automotive Products ................................................................. 23
Recommended Operating Conditions .................................... 12
REVISION HISTORY
7/2019—Rev. A to Rev. B
Changes to Table 13 ........................................................................ 10
Changes to Automotive Products Section................................... 23
4/2016—Revision 0: Initial Version
9/2016—Rev. 0 to Rev. A
Changes to Features Section and Applications Section ............... 1
Added Automotive Products Section .......................................... 23
Changes to Ordering Guide .......................................................... 23
Rev. B | Page 2 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
Symbol
Min
PW
6.6
tPHL, tPLH
PWD
150
4.8
7.2
0.5
1.5
tPSK
Max
13
3
6.0
tPSKCD
tPSKOD
0.5
0.5
380
55
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
VIH
VIL
0.7 × VDDx
VOH
VDDx − 0.1
VDDx − 0.4
Logic Low
VOL
Input Current per Channel
Quiescent Supply Current
ADuM220N/ADuM225N
Typ
3.0
3.0
Unit
Test Conditions/Comments
ns
Within pulse width distortion (PWD)
limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Mbps
ns
ns
ps/°C
ns
ns
ns
ps p-p
ps rms
Between any two units at the
same temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
0.3 × VDDx
V
V
VDDx
VDDx − 0.2
0.0
0.2
+0.01
0.1
0.4
+10
V
V
V
V
µA
IOx 1 = −20 µA, VIx = VIxH 2
IOx1 = −4 mA, VIx = VIxH2
IOx1 = 20 µA, VIx = VIxL 3
IOx1 = 4 mA, VIx = VIxL3
0 V ≤ VIx ≤ VDDx
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
0.9
1.3
6.4
1.4
1.3
1.8
10.0
1.9
mA
mA
mA
mA
VI 4 = 0 (N0), 1 (N1) 5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
1.1
1.1
4.0
4.9
1.6
1.5
5.8
6.4
mA
mA
mA
mA
VI4 = 0 (N0), 1 (N1)5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
IDDI (D)
IDDO (D)
UVLO
VDDxUV+
VDDxUV−
VDDxUVH
0.01
0.02
mA/Mbps
mA/Mbps
Inputs switching, 50% duty cycle
Inputs switching, 50% duty cycle
1.6
1.5
0.1
V
V
V
II
−10
ADuM221N/ADuM226N
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
Rev. B | Page 3 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Parameter
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity 6
Symbol
Min
Typ
tR/tF
|CMH|
75
|CML|
75
Data Sheet
Max
Unit
Test Conditions/Comments
2.5
100
ns
kV/µs
100
kV/µs
10% to 90%
VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
IOx is the Channel x output current, where x is A or B.
VIxH is the input side logic high.
VIxL is the input side logic low.
4
VI is the voltage input.
5
N0 refers to the ADuM220N0/ADuM221N0/ADuM225N0/ADuM226N0 models, and N1 refers to the ADuM220N1/ADuM221N1/ADuM225N1/ADuM226N1 models. See
the Ordering Guide section.
6
|CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode
voltage edges.
1
2
3
Table 2. Total Supply Current vs. Data Throughput
Parameter
SUPPLY CURRENT
ADuM220N/ADuM225N
Supply Current Side 1
Supply Current Side 2
ADuM221N/ADuM226N
Supply Current Side 1
Supply Current Side 2
Symbol
1 Mbps
Typ
Max
Min
Min
25 Mbps
Typ
Max
Min
100 Mbps
Typ
Max
Unit
IDD1
IDD2
3.7
1.4
6.8
2.0
4.2
2.2
7.2
3.2
6.2
4.8
9.3
8.1
mA
mA
IDD1
IDD2
2.6
3.0
4.5
4.9
3.2
3.7
5.4
5.9
5.4
5.9
8.2
8.6
mA
mA
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 3.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Symbol
Min
PW
6.6
150
4.8
tPHL, tPLH
PWD
Typ
6.8
0.7
1.5
tPSK
Unit
Test Conditions/Comments
14
3
ns
Mbps
ns
ns
ps/°C
ns
Within PWD limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
7.0
tPSKCD
tPSKOD
VIH
VIL
Max
0.7
0.7
290
45
3.0
3.0
0.7 × VDDx
0.3 × VDDx
Rev. B | Page 4 of 23
ns
ns
ps p-p
ps rms
V
V
Between any two units at the same
temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Parameter
Output Voltage
Logic High
Logic Low
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VOH
VDDx − 0.1
VDDx − 0.4
VDDx
VDDx − 0.2
0.0
0.2
+0.01
0.1
0.4
+10
V
V
V
V
µA
IOx 1 = −20 µA, VIx = VIxH 2
IOx1 = −2 mA, VIx = VIxH2
IOx1 = 20 µA, VIx = VIxL 3
IOx1 = 2 mA, VIx = VIxL3
0 V ≤ VIx ≤ VDDx
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
0.8
1.2
6.3
1.3
1.3
1.8
9.7
1.8
mA
mA
mA
mA
VI 4 = 0 (N0), 1 (N1) 5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
1.0
1.0
3.9
4.8
1.6
1.5
5.8
6.4
mA
mA
mA
mA
VI4 = 0 (N0), 1 (N1)5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
Inputs switching, 50% duty cycle
IDDI (D)
IDDO (D)
UVLO
VDDxUV+
VDDxUV−
VDDxUVH
0.01
0.01
mA/Mbps
mA/Mbps
1.6
1.5
0.1
V
V
V
VOL
Input Current per Channel
Quiescent Supply Current
ADuM220N/ADuM225N
II
−10
ADuM221N/ADuM226N
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity 6
tR/tF
|CMH|
75
2.5
100
ns
kV/µs
|CML|
75
100
kV/µs
10% to 90%
VIx = VDDx, VCM = 1000 V, transient
magnitude = 800 V
VIx = 0 V, VCM = 1000 V, transient
magnitude = 800 V
IOx is the Channel x output current, where x is A or B.
VIxH is the input side logic high.
3
VIxL is the input side logic low.
4
VI is the voltage input.
5
N0 refers to the ADuM220N0/ADuM221N0/ADuM225N0/ADuM226N0 models, and N1 refers to the ADuM220N1/ADuM221N1/ADuM225N1/ADuM226N1 models. See
the Ordering Guide section.
6
|CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. |CML| is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
1
2
Table 4. Total Supply Current vs. Data Throughput
Parameter
SUPPLY CURRENT
ADuM220N/ADuM225N
Supply Current Side 1
Supply Current Side 2
ADuM221N/ADuM226N
Supply Current Side 1
Supply Current Side 2
Symbol
Min
1 Mbps
Typ
Max
Min
25 Mbps
Typ
Max
Min
100 Mbps
Typ
Max
Unit
IDD1
IDD2
3.6
1.3
6.2
1.9
4.0
2.1
6.7
3.1
5.6
4.4
9.1
6.8
mA
mA
IDD1
IDD2
2.5
2.9
4.6
4.8
3.0
3.5
5.5
5.8
5.0
5.4
8.1
8.3
mA
mA
Rev. B | Page 5 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
ELECTRICAL CHARACTERISTICS—2.5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 2.5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 2.25 V ≤ VDD1 ≤ 2.75 V, 2.25 V ≤ VDD2 ≤ 2.75 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 5.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
Symbol
Min
PW
6.6
150
5.0
tPHL, tPLH
PWD
7.0
0.7
1.5
tPSK
Max
Unit
Test Conditions/Comments
14
3
ns
Mbps
ns
ns
ps/°C
ns
Within PWD limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
7.0
tPSKCD
tPSKOD
0.7
0.7
320
65
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
VIH
VIL
0.7 × VDDx
VOH
VDDx − 0.1
VDDx − 0.4
Logic Low
VOL
Input Current per Channel
Quiescent Supply Current
ADuM220N/ADuM225N
Typ
3.0
3.0
ns
ns
ps p-p
ps rms
Between any two units at the same
temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
0.3 × VDDx
V
V
VDDx
VDDx − 0.2
0.0
0.2
+0.01
0.1
0.4
+10
V
V
V
V
µA
IOx 1 = −20 µA, VIx = VIxH 2
IOx1 = −2 mA, VIx = VIxH2
IOx1 = 20 µA, VIx = VIxL 3
IOx1 = 2 mA, VIx = VIxL3
0 V ≤ VIx ≤ VDDx
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
0.8
1.2
6.2
1.3
1.2
1.8
9.5
1.8
mA
mA
mA
mA
VI 4 = 0 (N0), 1 (N1) 5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
1.0
1.0
3.9
4.8
1.5
1.4
5.8
6.4
mA
mA
mA
mA
VI4 = 0 (N0), 1 (N1)5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
Inputs switching, 50% duty cycle
IDDI (D)
IDDO (D)
0.01
0.01
mA/Mbps
mA/Mbps
VDDxUV+
VDDxUV−
VDDxUVH
1.6
1.5
0.1
V
V
V
II
−10
ADuM221N/ADuM226N
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
Rev. B | Page 6 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Parameter
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity 6
Symbol
Min
Typ
tR/tF
|CMH|
75
|CML|
75
Max
Unit
Test Conditions/Comments
2.5
100
ns
kV/µs
100
kV/µs
10% to 90%
VIx = VDDx, VCM = 1000 V, transient
magnitude = 800 V
VIx = 0 V, VCM = 1000 V, transient
magnitude = 800 V
IOx is the Channel x output current, where x is A or B.
VIxH is the input side logic high.
VIxL is the input side logic low.
4
VI is the voltage input.
5
N0 refers to the ADuM220N0/ADuM221N0/ADuM225N0/ADuM226N0 models, and N1 refers to the ADuM220N1/ADuM221N1/ADuM225N1/ADuM226N1 models. See
the Ordering Guide section.
6
|CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. |CML| is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
1
2
3
Table 6. Total Supply Current vs. Data Throughput
Parameter
SUPPLY CURRENT
ADuM220N/ADuM225N
Supply Current Side 1
Supply Current Side 2
ADuM221N/ADuM226N
Supply Current Side 1
Supply Current Side 2
Symbol
Min
1 Mbps
Typ
Max
Min
25 Mbps
Typ
Max
Min
100 Mbps
Typ
Max
Unit
IDD1
IDD2
3.5
1.3
6.2
1.9
3.9
1.9
6.6
2.8
5.4
3.6
9.0
5.8
mA
mA
IDD1
IDD2
2.4
2.9
4.7
4.9
2.9
3.3
5.5
5.7
4.5
4.9
8.0
7.7
mA
mA
ELECTRICAL CHARACTERISTICS—1.8 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 1.8 V. Minimum/maximum specifications apply over the entire recommended
operation range: 1.7 V ≤ VDD1 ≤ 1.9 V, 1.7 V ≤ VDD2 ≤ 1.9 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 7.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
Symbol
Min
PW
6.6
150
5.8
tPHL, tPLH
PWD
8.7
0.7
1.5
tPSK
tPSKCD
tPSKOD
0.7
0.7
630
190
VIH
VIL
0.7 × VDDx
VOH
VDDx − 0.1
VDDx − 0.4
Logic Low
VOL
II
Max
Unit
Test Conditions/Comments
15
3
ns
Mbps
ns
ns
ps/°C
ns
Within PWD limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
7.0
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
Input Current per Channel
Typ
−10
VDDx
VDDx − 0.2
0.0
0.2
+0.01
3.0
3.0
ns
ns
ps p-p
ps rms
0.3 × VDDx
V
V
0.1
0.4
+10
V
V
V
V
µA
Rev. B | Page 7 of 23
Between any two units at the same
temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
IOx 1 = −20 µA, VIx = VIxH 2
IOx1 = −2 mA, VIx = VIxH2
IOx1 = 20 µA, VIx = VIxL 3
IOx1 = 2 mA, VIx = VIxL3
0 V ≤ VIx ≤ VDDx
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Parameter
Quiescent Supply Current
ADuM220N/ADuM225N
Symbol
Min
Data Sheet
Typ
Max
Unit
Test Conditions/Comments
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
0.7
1.2
6.2
1.3
1.2
1.8
9.6
1.8
mA
mA
mA
mA
VI 4 = 0 (N0), 1 (N1) 5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
1.0
1.0
3.8
4.7
1.5
1.4
5.8
6.4
mA
mA
mA
mA
VI4 = 0 (N0), 1 (N1)5
VI4 = 0 (N0), 1 (N1)5
VI4 = 1 (N0), 0 (N1)5
VI4 = 1 (N0), 0 (N1)5
Inputs switching, 50% duty cycle
IDDI (D)
IDDO (D)
UVLO
VDDxUV+
VDDxUV−
VDDxUVH
0.01
0.01
mA/Mbps
mA/Mbps
1.6
1.5
0.1
V
V
V
ADuM221N/ADuM226N
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity 6
tR/tF
|CMH|
75
2.5
100
ns
kV/µs
|CML|
75
100
kV/µs
10% to 90%
VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
IOx is the Channel x output current, where x is A or B.
VIxH is the input side logic high.
VIxL is the input side logic low.
4
VI is the voltage input.
5
N0 refers to the ADuM220N0/ADuM221N0/ADuM225N0/ADuM226N0 models, and N1 refers to the ADuM220N1/ADuM221N1/ADuM225N1/ADuM226N1 models. See
the Ordering Guide section.
6
|CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. |CML| is the maximum common-mode voltage slew rate
that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
1
2
3
Table 8. Total Supply Current vs. Data Throughput
Parameter
SUPPLY CURRENT
ADuM220N/ADuM225N
Supply Current Side 1
Supply Current Side 2
ADuM221N/ADuM226N
Supply Current Side 1
Supply Current Side 2
Symbol
Min
1 Mbps
Typ
Max
Min
25 Mbps
Typ
Max
Min
100 Mbps
Typ
Max
Unit
IDD1
IDD2
3.4
1.2
6.0
1.8
3.8
1.8
6.4
2.8
5.2
3.6
8.4
5.8
mA
mA
IDD1
IDD2
2.4
2.8
4.7
4.8
2.8
3.2
5.5
5.6
4.4
4.8
7.8
7.9
mA
mA
Rev. B | Page 8 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
INSULATION AND SAFETY RELATED SPECIFICATIONS
For additional information, see www.analog.com/icouplersafety.
Table 9. ADuM220N/ADuM221N
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L (I01)
Value
5000
7.8
Unit
V rms
mm min
Minimum External Tracking (Creepage)
L (I02)
7.8
mm min
Minimum Clearance in the Plane of the Printed
Circuit Board (PCB Clearance)
L (PCB)
8.3
mm min
CTI
25.5
>400
II
μm min
V
Unit
V rms
mm min
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Material Group
Test Conditions/Comments
1-minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Measured from input terminals to output terminals,
shortest distance through air, line of sight, in the PCB
mounting plane
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
Table 10. ADuM225N/ADuM226N
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L (I01)
Value
5000
8.3
Minimum External Tracking (Creepage)
L (I02)
8.3
mm min
Minimum Clearance in the Plane of the Printed
Circuit Board (PCB Clearance)
L (PCB)
8.3
mm min
CTI
25.5
>400
II
μm min
V
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Material Group
Test Conditions/Comments
1-minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Measured from input terminals to output terminals,
shortest distance through air, line of sight, in the PCB
mounting plane
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
PACKAGE CHARACTERISTICS
Table 11. ADuM220N/ADuM221N
Parameter
Resistance (Input to Output) 1
Capacitance (Input to Output)1
Input Capacitance 2
IC Junction to Ambient Thermal
Resistance
1
2
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1013
2.2
4.0
45
Max
Unit
Ω
pF
pF
°C/W
Test Conditions/Comments
f = 1 MHz
Thermocouple located at center of package
underside
These devices are considered 2-terminal devices: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
Input capacitance is from any input data pin to ground.
Table 12. ADuM225N/ADuM226N
Parameter
Resistance (Input to Output) 1
Capacitance (Input to Output)1
Input Capacitance 2
IC Junction to Ambient Thermal
Resistance
1
2
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1013
2.2
4.0
80
Max
Unit
Ω
pF
pF
°C/W
Test Conditions/Comments
f = 1 MHz
Thermocouple located at center of package
underside
These devices are considered 2-terminal devices: Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.
Input capacitance is from any input data pin to ground.
Rev. B | Page 9 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
REGULATORY INFORMATION
See Table 18 and Table 19 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific
cross isolation waveforms and insulation levels.
The ADuM220N/ADuM221N are approved or pending approval by the organizations listed in Table 13.
Table 13.
UL (Pending)
Recognized Under UL 1577
Component Recognition
Program 1
Single Protection, 5000 V rms
Isolation Voltage
Double Protection,
5000 V rms Isolation
Voltage
File E214100
1
2
CSA (Pending)
Approved under CSA Component
Acceptance Notice 5A
VDE (Pending)
DIN V VDE V 0884-10
(VDE V 0884-10):2006-12 2
CQC (Pending)
Certified by
CQC11-471543-2015
CSA 60950-1-07+A1+A2 and IEC 60950-1
second edition +A1+A2:
Basic insulation at 780 V rms (1103 V peak)
Reinforced insulation at 390 V rms
(552 V peak)
IEC 60601-1 Edition 3.1:
Basic insulation (1 means of patient
protection (MOPP)), 490 V rms (686 V peak)
Reinforced insulation (2 MOPP), 238 V rms
(325 V peak)
CSA 61010-1-12 and IEC 61010-1 third edition:
Basic insulation at 300 V rms mains, 780 V
secondary (1103 V peak)
Reinforced insulation at: 300 V rms mains,
390 V secondary (552 V peak)
File 205078
Reinforced insulation, 849 V peak,
VIOSM = 10,000 V peak
Basic insulation 849 V peak,
VIOSM = 16,000 V peak
GB4943.1-2011
Basic insulation at
780 V rms (1103 V peak)
Reinforced insulation at
389 V rms (552 V peak)
File 2471900-4880-0001
File (CQC16001160971)
In accordance with UL 1577, each ADuM220N/ADuM221N is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.
In accordance with DIN V VDE V 0884-10, each ADuM220N/ADuM221N is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge
detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
The ADuM225N/ADuM226N are approved or pending approval by the organizations listed in Table 14.
Table 14.
UL (Pending)
UL 1577 Component
Recognition Program 1
Single Protection, 5000 V rms
Isolation Voltage
Double Protection,
5000 V rms Isolation
Voltage
File E214100
1
2
CSA (Pending)
Approved under CSA Component Acceptance
Notice 5A
CSA 60950-1-07+A1+A2 and IEC 60950-1 second
edition +A1+A2:
Basic insulation at 800 V rms (1131 V peak)
Reinforced insulation at 400 V rms (565 V peak)
IEC 60601-1 Edition 3.1:
Basic insulation (1 MOPP), 500 V rms (707 V peak)
Reinforced insulation (2 MOPP), 250 V rms
(1414 V peak)
CSA 61010-1-12 and IEC 61010-1 third edition:
Basic insulation at 300 V rms mains, 800 V
secondary (1089 V peak)
Reinforced insulation at: 300 V rms mains, 400 V
secondary (565 V peak)
File 205078
VDE (Pending)
DIN V VDE V 0884-10
(VDE V 0884-10):2006-12 2
Reinforced insulation, 849 V
peak, VIOSM = 10,000 V peak
Basic insulation 849 V peak,
VIOSM = 16,000 V peak
CQC (Pending)
Certified by
CQC11-471543-2012
GB4943.1-2011
Basic insulation at
800 V rms (1131 V peak)
Reinforced insulation at
400 V rms (565 Vpeak)
File 2471900-4880-0001
File (pending)
In accordance with UL 1577, each ADuM225N/ADuM226N is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.
In accordance with DIN V VDE V 0884-10, each ADuM225N/ADuM226N is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge
detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
Rev. B | Page 10 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These ADuM220N/ADuM221N/ADuM225N/ADuM226N isolators are suitable for reinforced electrical isolation only within the safety
limit data. Protective circuits ensure the maintenance of the safety data. The * marking on packages denotes DIN V VDE V 0884-10
approval.
Table 15.
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 600 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method B1
Test Conditions/Comments
VIORM × 1.875 = Vpd (m), 100% production test,
tini = tm = 1 sec, partial discharge < 5 pC
Input to Output Test Voltage, Method A
After Environmental Tests Subgroup 1
VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Surge Isolation Voltage Basic
VPEAK = 16 kV, 1.2 µs rise time, 50 µs,
50% fall time
VPEAK = 16 kV, 1.2 µs rise time, 50 µs,
50% fall time
Maximum value allowed in the event of a
failure (see Figure 5 or Figure 6)
Surge Isolation Voltage Reinforced
Safety Limiting Values
Maximum Junction Temperature
Total Power Dissipation at 25°C
ADuM220N/ADuM221N
ADuM225N/ADuM226N
Insulation Resistance at TS
VIO = 500 V
Symbol
Characteristic
Unit
VIORM
Vpd (m)
I to IV
I to IV
I to IV
40/105/21
2
849
1592
V peak
V peak
Vpd (m)
1274
V peak
1019
V peak
VIOTM
VIOSM
7000
16,000
V peak
V peak
VIOSM
10,000
V peak
TS
PS
150
°C
2.78
1.56
>109
W
W
Ω
RS
1.8
3.0
1.6
SAFETY LIMITING POWER (W)
SAFETY LIMITING POWER (W)
2.5
2.0
1.5
1.0
1.4
1.2
1.0
0.8
0.6
0.4
0.5
0
50
100
150
AMBIENT TEMPERATURE (°C)
200
0
14116-005
0
Figure 5. ADuM220N/ADuM221N Thermal Derating Curve, Dependence of
Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10
0
50
100
150
AMBIENT TEMPERATURE (°C)
200
14116-006
0.2
Figure 6. ADuM225N/ADuM226N Thermal Derating Curve, Dependence of
Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10
Rev. B | Page 11 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
RECOMMENDED OPERATING CONDITIONS
Table 16.
Parameter
Operating Temperature
Supply Voltages
Input Signal Rise and Fall Times
Symbol
TA
VDD1, VDD2
Rating
−40°C to +125°C
1.7 V to 5.5 V
1.0 ms
Rev. B | Page 12 of 23
Data Sheet
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Table 17.
Parameter
Storage Temperature (TST) Range
Ambient Operating Temperature
(TA) Range
Supply Voltages (VDD1, VDD2)
Input Voltages (VIA, VIB)
Output Voltages (VOA, VOB)
Average Output Current per Pin3
Side 1 Output Current (IO1)
Side 2 Output Current (IO2)
Common-Mode Transients4
Rating
−65°C to +150°C
−40°C to +125°C
−0.5 V to +7.0 V
−0.5 V to VDDI1 + 0.5 V
−0.5 V to VDDO2 + 0.5 V
ESD CAUTION
−10 mA to +10 mA
−10 mA to +10 mA
−150 kV/μs to +150 kV/μs
VDDI is the input side supply voltage.
VDDO is the output side supply voltage.
3
See Figure 5 or Figure 6 for the maximum rated current values for various
temperatures.
4
This term refers to the common-mode transients across the insulation
barrier. Common-mode transients exceeding the absolute maximum ratings
may cause latch-up or permanent damage.
1
2
Table 18. ADuM220N/ADuM221N Maximum Continuous Working Voltage1
Parameter
AC Voltage
Bipolar Waveform
Basic Insulation
Reinforced Insulation
Unipolar Waveform
Basic Insulation
Reinforced Insulation
DC Voltage
Basic Insulation
Reinforced Insulation
Rating
Constraint
849 V peak
767 V peak
50-year minimum insulation lifetime
Lifetime limited by package creepage maximum approved working voltage per IEC 60950-12
1698 V peak
885 V peak
50-year minimum insulation lifetime
Lifetime limited by package creepage maximum approved working voltage per IEC 60950-12
Lifetime limited by package creepage maximum approved working voltage per IEC 60950-12
1092 V peak
543 V peak
Maximum continuous working voltage refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more
details.
2
Insulation lifetime for the specified test condition is greater than 50 years.
1
Table 19. ADuM225N/ADuM226N Maximum Continuous Working Voltage1
Parameter
AC Voltage
Bipolar Waveform
Basic Insulation
Reinforced Insulation
Unipolar Waveform
Basic Insulation
Reinforced Insulation
DC Voltage
Basic Insulation
Reinforced Insulation
Rating
Constraint
849 V peak
789 V peak
50-year minimum insulation lifetime
Lifetime limited by package creepage maximum approved working voltage per IEC 60950-12
50-year minimum insulation lifetime
1698 V peak
849 V peak
Lifetime limited by package creepage maximum approved working voltage per IEC 60950-12
1118 V peak
558 V peak
Maximum continuous working voltage refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more
details.
2
Insulation lifetime for the specified test condition is greater than 50 years.
1
Rev. B | Page 13 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
Truth Table
Table 20. ADuM220N/ADuM221N/ADuM225N/ADuM226N Truth Table (Positive Logic)
VIx Input 1, 2
Low
High
X4
X4
VDDI State2
Powered
Powered
Unpowered
Powered
VDDO State2
Powered
Powered
Powered
Unpowered
Default Low (N0),
VOx Output1, 2, 3
Low
High
Low
Indeterminate
Default High (N1),
VOx Output1, 2, 3
Low
High
High
Indeterminate
Test Conditions/
Comments
Normal operation
Normal operation
Fail-safe output
Fail-safe output
X means don’t care.
VIx and VOx refer to the input and output signals of a given channel (A or B). VDDI and VDDO refer to the supply voltages on the input and output sides of the given
channel, respectively.
3
N0 refers to the ADuM220N0/ADuM221N0/ADuM225N0/ADuM226N0 models, and N1 refers to the ADuM220N1/ADuM221N1/ADuM225N1/ADuM226N1 models. See
the Ordering Guide section.
4
Input pins (VIx) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry.
1
2
Rev. B | Page 14 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
GND1 1
16 GND2
VDD1 3
VIA 4
VIB 5
15 NIC
ADuM220N
TOP VIEW
(Not to Scale)
14 VDD2
13 VOA
12 VOB
NIC 6
11 NIC
GND1 7
10 NIC
NIC 8
9
GND2
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. PIN 1 AND PIN 7 ARE INTERNALLY CONNECTED, AND
CONNECTING BOTH TO GND1 IS RECOMMENDED.
3. PIN 9 AND PIN 16 ARE INTERNALLY CONNECTED, AND
CONNECTING BOTH TO GND2 IS RECOMMENDED.
14116-007
NIC 2
Figure 7. ADuM220N Pin Configuration
Table 21. ADuM220N Pin Function Descriptions1
Pin No.
1
Mnemonic
GND1
2
3
4
5
6
7
NIC
VDD1
VIA
VIB
NIC
GND1
8
9
NIC
GND2
10
11
12
13
14
15
16
NIC
NIC
VOB
VOA
VDD2
NIC
GND2
1
Description
Ground 1. Ground reference for Isolator Side 1. Pin 1 and Pin 7 are internally
connected, and connecting both to GND1 is recommended.
No Internal Connection. Leave this pin floating.
Supply Voltage for Isolator Side 1.
Logic Input A.
Logic Input B.
No Internal Connection. Leave this pin floating.
Ground 1. Ground reference for Isolator Side 1. Pin 1 and Pin 7 are internally
connected, and connecting both to GND1 is recommended.
No Internal Connection. Leave this pin floating.
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 16 are internally
connected, and connecting both to GND2 is recommended.
No Internal Connection. Leave this pin floating.
No Internal Connection. Leave this pin floating.
Logic Output B.
Logic Output A.
Supply Voltage for Isolator Side 2.
No Internal Connection. Leave this pin floating.
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 16 are internally
connected, and connecting both to GND2 is recommended.
Reference the AN-1109 Application Note for specific layout guidelines.
Rev. B | Page 15 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
GND1 1
Data Sheet
16 GND2
15 NIC
VDD1 3
ADuM221N
VOA 4
TOP VIEW
(Not to Scale)
VIB 5
14 VDD2
13 VIA
12 VOB
NIC 6
11 NIC
GND1 7
10 NIC
NIC 8
9
GND2
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. PIN 1 AND PIN 7 ARE INTERNALLY CONNECTED, AND
CONNECTING BOTH TO GND1 IS RECOMMENDED.
3. PIN 9 AND PIN 16 ARE INTERNALLY CONNECTED, AND
CONNECTING BOTH TO GND2 IS RECOMMENDED.
14116-008
NIC 2
Figure 8. ADuM221N Pin Configuration
Table 22. ADuM221N Pin Function Descriptions
Pin No.
1
Mnemonic
GND1
2
3
4
5
6
7
NIC
VDD1
VOA
VIB
NIC
GND1
8
9
NIC
GND2
10
11
12
13
14
15
16
NIC
NIC
VOB
VIA
VDD2
NIC
GND2
Description
Ground 1. Ground reference for Isolator Side 1. Pin 1 and Pin 7 are internally
connected, and connecting both to GND1 is recommended.
No Internal Connection. Leave this pin floating.
Supply Voltage for Isolator Side 1.
Logic Output A.
Logic Input B.
No Internal Connection. Leave this pin floating.
Ground 1. Ground reference for Isolator Side 1. Pin 1 and Pin 7 are internally
connected, and connecting both to GND1 is recommended.
No Internal Connection. Leave this pin floating.
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 16 are internally
connected, and connecting both to GND2 is recommended.
No Internal Connection. Leave this pin floating.
No Internal Connection. Leave this pin floating.
Logic Output B.
Logic Input A.
Supply Voltage for Isolator Side 2.
No Internal Connection. Leave this pin floating.
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 16 are internally
connected, and connecting both to GND2 is recommended.
Reference the AN-1109 Application Note for specific layout guidelines.
VDD1 1
VIA 2
VIB 3
GND1 4
ADuM225N
TOP VIEW
(Not to Scale)
8
VDD2
7
VOA
6
VOB
5
GND2
14116-009
1
1
Figure 9. ADuM225N Pin Configuration
Table 23. ADuM225N Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
1
Mnemonic
VDD1
VIA
VIB
GND1
GND2
VOB
VOA
VDD2
1
Description
Supply Voltage for Isolator Side 1.
Logic Input A.
Logic Input B.
Ground 1. Ground reference for Isolator Side 1.
Ground 2. Ground reference for Isolator Side 2.
Logic Output B.
Logic Output A.
Supply Voltage for Isolator Side 2.
Reference the AN-1109 Application Note for specific layout guidelines.
Rev. B | Page 16 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
VDD1 1
VOA 2
VIB 3
GND1 4
ADuM226N
TOP VIEW
(Not to Scale)
8
VDD2
7
VIA
6
VOB
5
GND2
14116-010
Data Sheet
Figure 10. ADuM226N Pin Configuration
Table 24. ADuM226N Pin Function Descriptions1
Pin No.
1
2
3
4
5
6
7
8
1
Mnemonic
VDD1
VOA
VIB
GND1
GND2
VOB
VIA
VDD2
Description
Supply Voltage for Isolator Side 1.
Logic Output A.
Logic Input B.
Ground 1. Ground reference for Isolator Side 1.
Ground 2. Ground reference for Isolator Side 2.
Logic Output B.
Logic Input A.
Supply Voltage for Isolator Side 2.
Reference the AN-1109 Application Note for specific layout guidelines.
Rev. B | Page 17 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
10
9
9
8
8
5
4
3
2
5V
3.3V
2.5V
1.8V
1
0
0
20
40
60
80
100
120
140
160
DATA RATE (Mbps)
4
3
2
0
9
8
8
IDD2 SUPPLY CURRENT (mA)
10
6
5
4
3
5V
3.3V
2.5V
1.8V
1
0
0
20
40
60
80
100
120
140
160
DATA RATE (Mbps)
8
6
4
5V
3.3V
2.5V
1.8V
3
2
80
TEMPERATURE (°C)
100
120
140
5V
3.3V
2.5V
1.8V
0
20
40
60
80
100
120
160
Figure 15. ADuM221N/ADuM226N IDD2 Supply Current vs. Data Rate at
Various Voltages
10
8
6
4
5V
3.3V
2.5V
1.8V
2
Figure 13. Propagation Delay for Logic High Output (tPLH) vs. Temperature at
Various Voltages
140
DATA RATE (Mbps)
0
–40
14116-013
60
160
0
PROPAGATION DELAY, tPHL (ns)
10
40
140
4
12
20
120
5
12
0
100
6
14
–20
80
7
14
0
–40
60
1
Figure 12. ADuM220N/ADuM225N IDD2 Supply Current vs. Data Rate at
Various Voltages
2
40
Figure 14. ADuM221N/ADuM226N IDD1 Supply Current vs. Data Rate at
Various Voltages
9
7
20
DATA RATE (Mbps)
10
2
5V
3.3V
2.5V
1.8V
0
14116-012
IDD2 SUPPLY CURRENT (mA)
5
1
Figure 11. ADuM220N/ADuM225N IDD1 Supply Current vs. Data Rate at
Various Voltages
PROPAGATION DELAY, tPLH (ns)
6
14116-015
6
7
–20
0
20
40
60
80
TEMPERATURE (°C)
100
120
140
14116-016
7
14116-014
IDD1 SUPPLY CURRENT (mA)
10
14116-011
IDD1 SUPPLY CURRENT (mA)
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 16. Propagation Delay for Logic Low Output (tPHL) vs. Temperature at
Various Voltages
Rev. B | Page 18 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
THEORY OF OPERATION
OVERVIEW
The ADuM220N/ADuM221N/ADuM225N/ADuM226N use
a high frequency carrier to transmit data across the isolation
barrier using iCoupler chip scale transformer coils separated by
layers of polyimide isolation. Using an on/off keying (OOK)
technique and the differential architecture shown in Figure 17
and Figure 18, the ADuM220N/ADuM221N/ADuM225N/
ADuM226N have very low propagation delay and high speed.
Internal regulators and input/output design techniques allow
logic and supply voltages over a wide range from 1.7 V to 5.5 V,
offering voltage translation of 1.8 V, 2.5 V, 3.3 V, and 5 V logic.
The architecture is designed for high common-mode transient
immunity and high immunity to electrical noise and magnetic
interference. Radiated emissions are minimized with a spread
spectrum OOK carrier and other techniques.
Figure 17 illustrates the waveforms for models of the ADuM220N/
ADuM221N/ADuM225N/ADuM226N that have the condition of
the fail-safe output state equal to low, where the carrier waveform is
off when the input state is low. If the input side is off or not
operating, the fail-safe output state of low (ADuM220N0/
ADuM221N0/ADuM225N0/ADuM226N0 models) sets the
output to low. For the ADuM220N/ADuM221N/ADuM225N/
ADuM226N that have a fail-safe output state of high, Figure 18
illustrates the conditions where the carrier waveform is off when
the input state is high. When the input side is off or not operating,
the fail-safe output state of high (ADuM220N1/ADuM221N1/
ADuM225N1/ADuM226N1) sets the output to high. See the
Ordering Guide for the model numbers that have the fail-safe
output state of low or the fail-safe output state of high.
REGULATOR
REGULATOR
TRANSMITTER
RECEIVER
VIN
GND1
14116-019
VOUT
GND2
Figure 17. Operational Block Diagram of a Single Channel with a Low Fail-Safe Output State
REGULATOR
REGULATOR
TRANSMITTER
RECEIVER
VIN
GND1
GND2
Figure 18. Operational Block Diagram of a Single Channel with a High Fail-Safe Output State
Rev. B | Page 19 of 23
14116-020
VOUT
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
APPLICATIONS INFORMATION
PCB LAYOUT
The ADuM220N/ADuM221N/ADuM225N/ADuM226N
digital isolators require no external interface circuitry for the
logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins (see Figure 19 and
Figure 20). For the ADuM225N/ADuM226N, bypass capacitors
are most conveniently connected between Pin 1 and Pin 4 for
VDD1 and between Pin 5 and Pin 8 for VDD2. For the ADuM220N/
ADuM221N, bypass capacitors are most conveniently connected between Pin 1 and Pin 3 for VDD1 and between Pin 14
and Pin 16 for VDD2. The recommended bypass capacitor value is
between 0.01 μF and 0.1 μF. The total lead length between both
ends of the capacitor and the input power supply pin must not
exceed 10 mm. For the ADuM220N/ADuM221N, bypassing
between Pin 3 and Pin 7 and between Pin 9 and Pin 14 must
also be considered, unless the ground pair on each package side
are connected close to the package.
GND2
NIC
NIC
VDD1
VDD2
VOA, VIA
VIB
VOB
NIC
NIC
GND1
NIC
NIC
GND2
JITTER MEASUREMENT
Figure 22 shows the eye diagram for the ADuM220N/
ADuM221N/ADuM225N/ADuM226N. The measurement
was taken using an Agilent 81110A pulse pattern generator at
150 Mbps with pseudorandom bit sequences (PRBS) 2(n − 1),
n = 14, for 5 V supplies. Jitter was measured with the Tektronix
Model 5104B oscilloscope, 1 GHz, 10 GSPS with the DPOJET
jitter and eye diagram analysis tools. The result shows a typical
measurement on the ADuM220N/ADuM221N/ADuM225N/
ADuM226N with 380 ps p-p jitter.
5
4
14116-018
VDD2
VOA, VIA
VOB
GND2
VOLTAGE (V)
Figure 19. Recommended PCB Layout for ADuM220N/ADuM221N
VDD1
VIA, VOA
VIB
GND1
Propagation delay skew is the maximum amount the propagation delay differs between multiple ADuM220N/ADuM221N/
ADuM225N/ADuM226N components operating under the
same conditions.
14116-017
VIA, VOA
Channel matching is the maximum amount the propagation
delay differs between channels within a single ADuM220N/
ADuM221N/ADuM225N/ADuM226N component.
Figure 20. Recommended PCB Layout for ADuM225N/ADuM226N
0
–10
50%
14116-021
tPHL
Figure 21. Propagation Delay Parameters
5
10
INSULATION LIFETIME
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a Logic 0 output may differ from the propagation delay
to a Logic 1 output.
50%
0
Figure 22. ADuM220N/ADuM221N/ADuM225N/ADuM226N Eye Diagram
PROPAGATION DELAY RELATED PARAMETERS
OUTPUT (VOx)
–5
TIME (ns)
See the AN-1109 Application Note for board layout guidelines.
tPLH
2
1
In applications involving high common-mode transients, ensure
that board coupling across the isolation barrier is minimized.
Furthermore, design the board layout such that any coupling
that does occur equally affects all pins on a given component
side. Failure to ensure this can cause voltage differentials between
pins exceeding the Absolute Maximum Ratings of the device,
thereby leading to latch-up or permanent damage.
INPUT (VIx)
3
14116-022
GND1
Pulse width distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately the timing of the input signal is preserved.
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage
waveform applied across the insulation as well as on the materials
and material interfaces.
The two types of insulation degradation of primary interest are
breakdown along surfaces exposed to the air and insulation
wear out. Surface breakdown is the phenomenon of surface
tracking, and the primary determinant of surface creepage
requirements in system level standards. Insulation wear out is the
phenomenon where charge injection or displacement currents
inside the insulation material cause long-term insulation
degradation.
Rev. B | Page 20 of 23
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Calculation and Use of Parameters Example
Surface tracking is addressed in electrical safety standards by
setting a minimum surface creepage based on the working
voltage, the environmental conditions, and the properties of the
insulation material. Safety agencies perform characterization
testing on the surface insulation of components that allows the
components to be categorized in different material groups. Lower
material group ratings are more resistant to surface tracking
and, therefore, can provide adequate lifetime with smaller
creepage. The minimum creepage for a given working voltage
and material group is in each system level standard and is based
on the total rms voltage across the isolation, pollution degree,
and material group. The material group and creepage for the
ADuM220N/ADuM221N/ADuM225N/ADuM226N isolators
are presented in Table 9 and Table 10.
The following example frequently arises in power conversion
applications. Assume that the line voltage on one side of the
isolation is 240 V ac rms and a 400 V dc bus voltage is present
on the other side of the isolation barrier. The isolator material is
polyimide. To establish the critical voltages in determining the
creepage, clearance and lifetime of a device, see Table 18 and
Table 19 and the following equations.
The lifetime of insulation caused by wear out is determined by
its thickness, material properties, and the voltage stress applied.
It is important to verify that the product lifetime is adequate at
the application working voltage. The working voltage supported by
an isolator for wear out may not be the same as the working
voltage supported for tracking. It is the working voltage
applicable to tracking that is specified in most standards.
Testing and modeling show that the primary driver of long-term
degradation is displacement current in the polyimide insulation
causing incremental damage. The stress on the insulation can be
broken down into broad categories, such as dc stress, which
causes very little wear out because there is no displacement
current, and an ac component time varying voltage stress,
which causes wear out.
The ratings in certification documents are usually based on
60 Hz sinusoidal stress because this reflects isolation from line
voltage. However, many practical applications have combinations
of 60 Hz ac and dc across the barrier as shown in Equation 1.
Because only the ac portion of the stress causes wear out, the
equation can be rearranged to solve for the ac rms voltage, as is
shown in Equation 2. For insulation wear out with the polyimide
materials used in these products, the ac rms voltage determines
the product lifetime.
VRMS = VAC RMS2 + VDC 2
(1)
VAC RMS = VRMS 2 − VDC 2
(2)
or
where:
VRMS is the total rms working voltage.
VAC RMS is the time varying portion of the working voltage.
VDC is the dc offset of the working voltage.
VAC RMS
VPEAK
VDC
VRMS
TIME
14116-023
Insulation Wear Out
ISOLATION VOLTAGE
Surface Tracking
Figure 23. Critical Voltage Example
The working voltage across the barrier from Equation 1 is
VRMS = VAC RMS 2 + VDC 2
VRMS = 2402 + 4002
VRMS = 466 V
This VRMS value is the working voltage used together with the
material group and pollution degree when looking up the
creepage required by a system standard.
To determine if the lifetime is adequate, obtain the time varying
portion of the working voltage. To obtain the ac rms voltage,
use Equation 2.
VAC RMS = VRMS 2 − VDC 2
VAC RMS = 466 2 − 400 2
VAC RMS = 240 V rms
In this case, the ac rms voltage is simply the line voltage of
240 V rms. This calculation is more relevant when the waveform is
not sinusoidal. The value is compared to the limits for the
continuous working voltage in Table 18 and Table 19 for the
expected lifetime, less than a 60 Hz sine wave, and it is well
within the limit for a 50-year service life.
Note that the dc working voltage limits in Table 18 and Table 19 are
set by the creepage of the package as specified in IEC 60664-1.
These values can differ for specific system level standards.
Rev. B | Page 21 of 23
ADuM220N/ADuM221N/ADuM225N/ADuM226N
Data Sheet
OUTLINE DIMENSIONS
6.05
5.85
5.65
8
5
7.60
7.50
7.40
1
4
2.45
2.35
2.25
0.30
0.20
0.10
COPLANARITY
0.10
2.65
2.50
2.35
1.27 BSC
0.51
0.41
0.31
0.75
0.50
0.25
1.04
BSC
SEATING
PLANE
45°
8°
0°
0.33
0.27
0.20
0.75
0.58
0.40
09-17-2014-B
PIN 1
MARK
10.51
10.31
10.11
Figure 24. 8-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]
Wide Body
(RI-8-1)
Dimensions shown in millimeters
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
45°
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
8°
0°
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 25. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
Rev. B | Page 22 of 23
1.27 (0.0500)
0.40 (0.0157)
03-27-2007-B
1
Data Sheet
ADuM220N/ADuM221N/ADuM225N/ADuM226N
ORDERING GUIDE
Model1, 2
ADuM220N1BRWZ
ADuM220N1BRWZ-RL
ADuM220N0BRWZ
ADuM220N0BRWZ-RL
ADuM221N1BRWZ
ADuM221N1BRWZ-RL
ADuM221N0BRWZ
ADuM221N0BRWZ-RL
ADuM221N0WBRWZ
ADuM221N0WBRWZ-RL
ADuM225N1BRIZ
ADuM225N1BRIZ-RL
ADuM225N0BRIZ
ADuM225N0BRIZ-RL
ADuM226N1BRIZ
ADuM226N1BRIZ-RL
ADuM226N0BRIZ
ADuM226N0BRIZ-RL
ADuM226N0WBRIZ
ADuM226N0WBRIZ-RL
1
2
Temperature
Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
No. of
Inputs,
VDD1
Side
2
2
2
2
1
1
1
1
1
1
2
2
2
2
1
1
1
1
1
1
No. of
Inputs,
VDD2
Side
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
Withstand
Voltage
Rating
(kV rms)
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
Fail-Safe
Output
State
High
High
Low
Low
High
High
Low
Low
Low
Low
High
High
Low
Low
High
High
Low
Low
Low
Low
Package
Description
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
8-Lead SOIC_IC
Package
Option
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RI-8-1
RI-8-1
RI-8-1
RI-8-1
RI-8-1
RI-8-1
RI-8-1
RI-8-1
RI-8-1
RI-8-1
Z = RoHS Compliant Part.
W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADuM221N0WBRWZ, ADuM221N0WBRWZ-RL, ADuM226N0WBRIZ, and ADuM226N0WBRIZ-RL models are available with
controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive
models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of
this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local
Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports
for these models.
©2016–2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14116-0-7/19(B)
Rev. B | Page 23 of 23
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