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ADUM231E0BRWZ

ADUM231E0BRWZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOIC-WB-16_10.3X7.5MM

  • 描述:

    DGTL ISO 5KV 3CH GEN PURP 16SOIC

  • 数据手册
  • 价格&库存
ADUM231E0BRWZ 数据手册
FUNCTIONAL BLOCK DIAGRAMS APPLICATIONS General-purpose multichannel isolation Serial peripheral interface (SPI)/data converter isolation Industrial field bus isolation ADuM230D 2 VDD2 GND2 VOA 13 VOB 12 VOC 15 3 ENCODE DECODE 4 ENCODE DECODE ENCODE DECODE 5 NIC 6 DISABLE1 7 GND1 8 16 14 11 10 9 NIC NIC GND2 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. Figure 1. ADuM230D Functional Block Diagram VIB 4 VIC 5 NIC 6 NIC 7 GND1 8 ADuM230E 16 VDD2 GND2 VOA 13 VOB 12 VOC 15 ENCODE DECODE ENCODE DECODE ENCODE DECODE 14 NIC VE2 9 GND2 11 10 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. The ADuM230D/ADuM230E/ADuM231D/ADuM231E1 are triple-channel digital isolators based on Analog Devices, Inc., iCoupler® technology. Combining high speed, complementary metal-oxide semiconductor (CMOS) and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices and other integrated couplers. The maximum propagation delay is 13 ns with a pulse width distortion of less than 3 ns at 5 V operation. Channel matching is tight at 3.0 ns maximum. The ADuM230D/ADuM230E/ADuM231D/ADuM231E data channels are independent and are available in a variety of configurations with a withstand voltage rating of 5.0 kV rms (see the Ordering Guide). The devices operate with the supply voltage on either side ranging from 1.8 V to 5 V, providing compatibility with lower voltage systems as well as enabling voltage translation functionality across the isolation barrier. 13577-002 VDD1 1 GND1 2 VIA 3 Figure 2. ADuM230E Functional Block Diagram VDD1 GND1 VIA VIB VOC 1 ADuM231D 2 15 3 ENCODE DECODE 4 ENCODE DECODE DECODE ENCODE 5 NIC 6 DISABLE1 7 GND1 8 VDD2 GND2 14 VOA 13 VOB 12 VIC 16 NIC DISABLE2 9 GND2 11 10 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. GENERAL DESCRIPTION 1 VDD1 1 GND1 VIA VIB VIC 13577-101 High common-mode transient immunity: 100 kV/μs High robustness to radiated and conducted noise Low propagation delay: 13 ns maximum for 5 V operation, 15 ns maximum for 1.8 V operation 150 Mbps maximum data rate Safety and regulatory approvals (pending) UL recognition 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 849 V peak 8000 V peak reinforced surge isolation voltage (VIOSM) CQC certification per GB4943.1-2011 Low dynamic power consumption 1.8 V to 5 V level translation High temperature operation: 125°C Fail-safe high or low options 16-lead, RoHS compliant, SOIC package 13577-001 FEATURES Figure 3. ADuM231D Functional Block Diagram VDD1 GND1 VIA VIB VOC 1 ADuM231E 2 ENCODE DECODE 4 ENCODE DECODE DECODE ENCODE NIC 6 VE1 7 GND1 8 VDD2 GND2 VOA 13 VOB 12 VIC 15 3 5 16 14 NIC VE2 9 GND2 11 10 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 13577-102 Data Sheet 5.0 kV RMS Triple Channel Digital Isolators ADuM230D/ADuM230E/ADuM231D/ADuM231E Figure 4. ADuM231E Functional Block Diagram Unlike other optocoupler alternatives, dc correctness is ensured in the absence of input logic transitions. Two different fail-safe options are available, by which the outputs transition to a predetermined state when the input power supply is not applied or the inputs are disabled. Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015–2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .................................... 11 Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 12 General Description ......................................................................... 1 ESD Caution................................................................................ 12 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ......................... 14 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 16 Specifications..................................................................................... 3 Theory of Operation ...................................................................... 17 Electrical Characteristics—5 V Operation................................ 3 Applications Information .............................................................. 18 Electrical Characteristics—3.3 V Operation ............................ 4 PCB Layout ................................................................................. 18 Electrical Characteristics—2.5 V Operation ............................ 6 Propagation Delay Related Parameters ................................... 18 Electrical Characteristics—1.8 V Operation ............................ 7 Jitter Measurement ..................................................................... 18 Insulation and Safety Related Specifications ............................ 9 Insulation Lifetime ..................................................................... 18 Package Characteristics ............................................................... 9 Outline Dimensions ....................................................................... 20 Regulatory Information ............................................................. 10 Ordering Guide .......................................................................... 21 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics ............................................................................ 11 REVISION HISTORY 10/2018—Rev. A to Rev. B Changes to CQC Column and Note 2, Table 12 and CQC Column and Note 2, Table 13 ............................................. 10 Updated Outline Dimensions ....................................................... 20 4/2016—Rev. 0 to Rev. A Added RI-16-2 .................................................................... Universal Added Table 10; Renumbered Sequentially .................................. 9 Added Table 13 ............................................................................... 10 Added Table 18 ............................................................................... 12 Added Figure 23.............................................................................. 20 Updated Outline Dimensions ....................................................... 20 Changes to Ordering Guide .......................................................... 21 10/2015—Revision 0: Initial Version Rev. B | Page 2 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 1. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Symbol Min PW 6.6 150 4.8 tPHL, tPLH PWD 7.2 0.5 1.5 tPSK VIH VIL Output Voltage Logic High VOH Logic Low VOL Max Unit Test Conditions/Comments 13 3 ns Mbps ns ns ps/°C ns Within pulse width distortion (PWD) limit Within PWD limit 50% input to 50% output |tPLH − tPHL| 6.1 tPSKCD tPSKOD Logic Low Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM230D/ADuM230E Typ 0.5 0.5 630 80 3.0 3.0 0.7 × VDDx See the Jitter Measurement section See the Jitter Measurement section V 0.3 × VDDx VDDx VDDx − 0.2 0.0 0.2 +0.01 −3 9 +0.01 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) V V V IOx2 = −20 µA, VIx = VIxH3 IOx2 = −4 mA, VIx = VIxH3 15 +10 V V µA µA µA µA IOx2 = 20 µA, VIx = VIxL4 IOx2 = 4 mA, VIx = VIxL4 0 V ≤ VIx ≤ VDDx VE2 = 0 V DISABLE1 = VDDx 0 V ≤ VOx ≤ VDDx 1.35 1.73 9.7 1.87 2.6 2.9 15.2 3.0 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.62 1.61 7.4 5.34 2.7 2.8 11.4 7.2 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDDI (D) IDDO (D) 0.01 0.02 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle II IPU IPD IOZ VDDx − 0.1 VDDx − 0.4 ns ns ps p-p ps rms Between any two devices at the same temperature, voltage, and load −10 −10 −10 0.1 0.4 +10 ADuM231D/ADuM231E Dynamic Supply Current Dynamic Input Dynamic Output Rev. B | Page 3 of 21 ADuM230D/ADuM230E/ADuM231D/ADuM231E Parameter Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 Symbol UVLO VDDxUV+ VDDxUV− VDDxUVH Min Typ Data Sheet Max Unit 1.6 1.5 0.1 V V V tR/tF |CMH| 75 2.5 100 ns kV/µs |CML| 75 100 kV/µs Test Conditions/Comments 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, or C. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 refers to the ADuM230E0/ADuM231E0 models, D0 refers to the ADuM230D0/ADuM231D0 models, E1 refers to the ADuM230E1/ADuM231E1 models, and D1 refers to the ADuM230D1/ADuM231D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VOx) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VOx > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 2. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM230D/ADuM230E Supply Current Side 1 Supply Current Side 2 ADuM231D/ADuM231E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 5.6 1.9 9.0 3.7 6.3 3.1 9.8 4.9 9.4 6.8 14.3 10 mA mA IDD1 IDD2 4.6 3.6 7.2 5.8 5.5 4.6 8.3 6.8 8.8 8.0 11.9 11.3 mA mA ELECTRICAL CHARACTERISTICS—3.3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 3. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Symbol Min PW 6.6 150 4.8 tPHL, tPLH PWD Typ 6.8 0.7 1.5 tPSK Unit Test Conditions/Comments 14 3 ns Mbps ns ns ps/°C ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| 7.5 tPSKCD tPSKOD VIH Max 0.7 0.7 640 75 0.7 × VDDx Rev. B | Page 4 of 21 3.0 3.0 ns ns ps p-p ps rms V Between any two devices at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E Parameter Logic Low Output Voltage Logic High Logic Low Symbol VIL Min Typ VOH VDDx − 0.1 VDDx − 0.4 VDDx VDDx − 0.2 0.0 0.2 +0.01 −3 9 +0.01 VOL Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM230D/ADuM230E II IPU IPD IOZ −10 −10 −10 Max 0.3 × VDDx Unit V Test Conditions/Comments 15 +10 V V V V µA µA µA µA IOx2 = −20 µA, VIx = VIxH3 IOx2 = −2 mA, VIx = VIxH3 IOx2 = 20 µA, VIx = VIxL4 IOx2 = 2 mA, VIx = VIxL4 0 V ≤ VIx ≤ VDDx VE2 = 0 V DISABLE1 = VDDx 0 V ≤ VOx ≤ VDDx 0.1 0.4 +10 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.25 1.65 9.57 1.79 2.5 2.8 15.0 2.9 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.52 1.52 7.28 5.24 2.6 2.6 11.3 7.1 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDDI (D) IDDO (D) UVLO VDDxUV+ VDDxUV− VDDxUVH 0.01 0.01 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle 1.6 1.5 0.1 V V V ADuM231D/ADuM231E Dynamic Supply Current Dynamic Input Dynamic Output Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 tR/tF |CMH| 75 2.5 100 ns kV/µs |CML| 75 100 kV/µs 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, or C. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 refers to the ADuM230E0/ADuM231E0 models, D0 refers to the ADuM230D0/ADuM231D0 models, E1 refers to the ADuM230E1/ADuM231E1 models, and D1 refers to the ADuM230D1/ADuM231D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VOx) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VOx > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 4. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM230D/ADuM230E Supply Current Side 1 Supply Current Side 2 ADuM231D/ADuM231E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 5.4 1.8 8.8 3.6 6.0 2.9 9.4 4.7 8.5 6.2 12.7 8.4 mA mA IDD1 IDD2 4.4 3.4 7.1 5.6 5.2 4.3 8.0 6.5 8.1 7.4 10.7 9.5 mA mA Rev. B | Page 5 of 21 ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet ELECTRICAL CHARACTERISTICS—2.5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 2.5 V. Minimum/maximum specifications apply over the entire recommended operation range: 2.25 V ≤ VDD1 ≤ 2.75 V, 2.25 V ≤ VDD2 ≤ 2.75 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 5. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Logic Low Output Voltage Logic High Logic Low Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM230D/ADuM230E Symbol Min PW 6.6 150 5.0 tPHL, tPLH PWD Typ 7.0 0.7 1.5 tPSK Unit Test Conditions/Comments 14 3 ns Mbps ns ns ps/°C ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| 6.8 tPSKCD tPSKOD 0.7 0.7 770 160 VIH VIL 0.7 × VDDx VOH VDDx − 0.1 VDDx − 0.4 3.0 3.0 0.3 × VDDx VOL II IPU IPD IOZ Max −10 −10 −10 VDDx VDDx − 0.2 0.0 0.2 +0.01 −3 9 +0.01 ns ns ps p-p ps rms Between any two devices at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section V V 15 +10 V V V V µA µA µA µA IOx2 = −20 µA, VIx = VIxH3 IOx2 = −2 mA, VIx = VIxH3 IOx2 = 20 µA, VIx = VIxL4 IOx2 = 2 mA, VIx = VIxL4 0 V ≤ VIx ≤ VDDx VE2 = 0 V DISABLE1 = VDDx 0 V ≤ VOx ≤ VDDx 0.1 0.4 +10 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.2 1.61 9.52 1.76 2.4 2.7 14.9 2.8 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.47 1.48 7.23 5.19 2.5 2.5 11.2 7.0 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDDI (D) IDDO (D) 0.01 0.01 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle VDDxUV+ VDDxUV− VDDxUVH 1.6 1.5 0.1 V V V ADuM231D/ADuM231E Dynamic Supply Current Dynamic Input Dynamic Output Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis Rev. B | Page 6 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E Parameter AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 Symbol Min Typ tR/tF |CMH| 75 |CML| 75 Max Unit Test Conditions/Comments 2.5 100 ns kV/µs 100 kV/µs 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, or C. VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 refers to the ADuM230E0/ADuM231E0 models, D0 refers to the ADuM230D0/ADuM231D0 models, E1 refers to the ADuM230E1/ADuM231E1 models, and D1 refers to the ADuM230D1/ADuM231D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VOx) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VOx > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 3 Table 6. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM230D/ADuM230E Supply Current Side 1 Supply Current Side 2 ADuM231D/ADuM231E Supply Current Side 1 Supply Current Side 2 Symbol 1 Mbps Typ Max Min Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 5.3 1.8 8.7 3.6 5.9 2.6 9.3 4.4 8.2 5.2 12.3 7.4 mA mA IDD1 IDD2 4.4 3.4 7.1 5.6 5.0 4.1 7.8 6.3 7.5 6.6 10.1 8.7 mA mA ELECTRICAL CHARACTERISTICS—1.8 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 1.8 V. Minimum/maximum specifications apply over the entire recommended operation range: 1.7 V ≤ VDD1 ≤ 1.9 V, 1.7 V ≤ VDD2 ≤ 1.9 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 7. Parameter SWITCHING SPECIFICATIONS Pulse Width Data Rate1 Propagation Delay Pulse Width Distortion Change vs. Temperature Propagation Delay Skew Channel Matching Codirectional Opposing Direction Jitter DC SPECIFICATIONS Input Threshold Voltage Logic High Logic Low Symbol Min PW 6.6 150 5.8 tPHL, tPLH PWD Typ 8.7 0.7 1.5 tPSK Unit Test Conditions/Comments 15 3 ns Mbps ns ns ps/°C ns Within PWD limit Within PWD limit 50% input to 50% output |tPLH − tPHL| 7.0 tPSKCD tPSKOD VIH VIL Max 0.7 0.7 600 90 3.0 3.0 0.7 × VDDx 0.3 × VDDx Rev. B | Page 7 of 21 ns ns ps p-p ps rms V V Between any two devices at the same temperature, voltage, and load See the Jitter Measurement section See the Jitter Measurement section ADuM230D/ADuM230E/ADuM231D/ADuM231E Parameter Output Voltage Logic High Logic Low Symbol Min Typ VOH VDDx − 0.1 VDDx − 0.4 VDDx VDDx − 0.2 0.0 0.2 +0.01 −3 9 +0.01 VOL Input Current per Channel VE2 Enable Input Pull-Up Current DISABLE1 Input Pull-Down Current Tristate Output Current per Channel Quiescent Supply Current ADuM230D/ADuM230E II IPU IPD IOZ −10 −10 −10 Data Sheet Max Unit Test Conditions/Comments 15 +10 V V V V µA µA µA µA IOx2 = −20 µA, VIx = VIxH3 IOx2 = −2 mA, VIx = VIxH3 IOx2 = 20 µA, VIx = VIxL4 IOx2 = 2 mA, VIx = VIxL4 0 V ≤ VIx ≤ VDDx VE2 = 0 V DISABLE1 = VDDx 0 V ≤ VOx ≤ VDDx 0.1 0.4 +10 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.15 1.58 9.41 1.72 2.3 2.6 14.8 2.7 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDD1 (Q) IDD2 (Q) IDD1 (Q) IDD2 (Q) 1.42 1.44 7.15 5.13 2.4 2.4 11.1 6.9 mA mA mA mA VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 0 (E0, D0), 1 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 VI5 = 1 (E0, D0), 0 (E1, D1)6 IDDI (D) IDDO (D) UVLO VDDxUV+ VDDxUV− VDDxUVH 0.01 0.01 mA/Mbps mA/Mbps Inputs switching, 50% duty cycle Inputs switching, 50% duty cycle 1.6 1.5 0.1 V V V ADuM231D/ADuM231E Dynamic Supply Current Dynamic Input Dynamic Output Undervoltage Lockout Positive VDDx Threshold Negative VDDx Threshold VDDx Hysteresis AC SPECIFICATIONS Output Rise/Fall Time Common-Mode Transient Immunity7 tR/tF |CMH| 75 2.5 100 ns kV/µs |CML| 75 100 kV/µs 10% to 90% VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible. IOx is the Channel x output current, where x = A, B, or C. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 VI is the voltage input. 6 E0 refers to the ADuM230E0/ADuM231E0 models, D0 refers to the ADuM230D0/ADuM231D0 models, E1 refers to the ADuM230E1/ADuM231E1 models, and D1 refers to the ADuM230D1/ADuM231D1 models. See the Ordering Guide section. 7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VOx) > 0.8 VDDx. |CML| is the maximum commonmode voltage slew rate that can be sustained while maintaining VOx > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. 1 2 Table 8. Total Supply Current vs. Data Throughput Parameter SUPPLY CURRENT ADuM230D/ADuM230E Supply Current Side 1 Supply Current Side 2 ADuM231D/ADuM231E Supply Current Side 1 Supply Current Side 2 Symbol Min 1 Mbps Typ Max Min 25 Mbps Typ Max Min 100 Mbps Typ Max Unit IDD1 IDD2 5.2 1.7 8.6 3.5 5.8 2.5 9.3 4.3 8.1 5.2 12.2 7.3 mA mA IDD1 IDD2 4.3 3.3 7.0 5.5 4.9 4.0 7.7 6.2 7.26 6.5 10.0 8.6 mA mA Rev. B | Page 8 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E INSULATION AND SAFETY RELATED SPECIFICATIONS For additional information, see www.analog.com/icouplersafety. Table 9. RW-16 Wide Body [SOIC_W] Package Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L (I01) Value 5000 7.8 Unit V rms mm min Minimum External Tracking (Creepage) L (I02) 7.8 mm min Minimum Clearance in the Plane of the Printed Circuit Board (PCB Clearance) L (PCB) 8.1 mm min CTI 25.5 >400 II μm min V Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Material Group Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Measured from input terminals to output terminals, shortest distance through air, line of sight, in the PCB mounting plane Insulation distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) Table 10. RI-16 -2 Wide Body Increased Creepage [SOIC_IC] Package Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L (I01) Value 5000 8.3 Unit V rms mm min Minimum External Tracking (Creepage) L (I02) 8.3 mm min Minimum Clearance in the Plane of the Printed Circuit Board (PCB Clearance) L (PCB) 8.3 mm min CTI 25.5 >400 II μm min V Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Material Group Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Measured from input terminals to output terminals, shortest distance through air, line of sight, in the PCB mounting plane Insulation distance through insulation DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110, 1/89, Table 1) PACKAGE CHARACTERISTICS Table 11. Parameter Resistance (Input to Output)1 Capacitance (Input to Output)1 Input Capacitance2 IC Junction to Ambient Thermal Resistance 1 2 Symbol RI-O CI-O CI θJA Min Typ 1013 2.2 4.0 45 Max Unit Ω pF pF °C/W Test Conditions/Comments f = 1 MHz Thermocouple located at center of package underside The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together. Input capacitance is from any input data pin to ground. Rev. B | Page 9 of 21 ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet REGULATORY INFORMATION See Table 17, Table 18, and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 12. RW-16 Wide Body [SOIC_W] Package UL (Pending) Recognized Under 1577 Component Recognition Program1 Single Protection, 5000 V rms Isolation Voltage Double Protection, 5000 V rms Isolation Voltage File E214100 1 2 CSA (Pending) Approved under CSA Component Acceptance Notice 5A VDE (Pending) Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-122 CSA 60950-1-07+A1+A2 and IEC 60950-1, second edition, +A1+A2: Basic insulation at 780 V rms (1103 V peak) Reinforced insulation, VIORM = 849 peak, VIOSM = 8000 V peak Basic insulation, VIORM = 849 V peak, VIOSM = 12 kV peak Reinforced insulation at 390 V rms (552 V peak) IEC 60601-1 Edition 3.1: Basic insulation (1 means of patient protection (1 MOPP)), 490 V rms (686 V peak) Reinforced insulation (2 MOPP), 238 V rms (325 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300 V rms mains, 780 V secondary (1103 V peak) Reinforced insulation at 300 V rms Mains, 390 V secondary (552 V peak) File 205078 File 2471900-4880-0001 CQC Certified by CQC11471543-2012, GB4943.1-2011 Basic insulation at 760 V rms (1075 V peak) Reinforced insulation at 380 V rms (537 V peak), tropical climate, altitude ≤ 5000 meters File CQC16001147385 In accordance with UL 1577, each ADuM230D/ADuM230E/ADuM231D/ADuM231E is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec. In accordance with DIN V VDE V 0884-10, each ADuM230D/ADuM230E/ADuM231D/ADuM231E is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. Table 13. RI-16 -2 Wide Body Increased Creepage [SOIC_IC] Package UL (Pending) Recognized Under 1577 Component Recognition Program1 Single Protection, 5000 V rms Isolation Voltage Double Protection, 5000 V rms Isolation Voltage File E214100 1 2 CSA (Pending) Approved under CSA Component Acceptance Notice 5A VDE (Pending) Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-122 CSA 60950-1-07+A1+A2 and IEC 60950-1, second edition, +A1+A2: Basic insulation at 830 V rms (1174 V peak) Reinforced insulation, VIORM = 849 peak, VIOSM = 8000 V peak Basic insulation, VIORM = 849 V peak, VIOSM = 12 kV peak Reinforced insulation at 415 V rms (587 V peak) IEC 60601-1 Edition 3.1: Basic insulation (1 means of patient protection (1 MOPP)), 519 V rms (734 V peak) Reinforced insulation (2 MOPP), 261 V rms (369 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300 V rms mains, 830 V secondary (1174 V peak) Reinforced insulation at 300 V rms Mains, 390 V secondary (587 V peak) File 205078 File 2471900-4880-0001 CQC Certified by CQC11471543-2012, GB4943.1-2011 Basic insulation at 820 V rms (1159 V peak) Reinforced insulation at 410 V rms (578 V peak), tropical climate, altitude ≤ 5000 meters File CQC17001171586 In accordance with UL 1577, each ADuM230D/ADuM230E/ADuM231D/ADuM231E is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec. In accordance with DIN V VDE V 0884-10, each ADuM230D/ADuM230E/ADuM231D/ADuM231E is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. Rev. B | Page 10 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation only within the safety limit data. Protective circuits ensure the maintenance of the safety data. The * marking on packages denotes DIN V VDE V 0884-10 approval. Table 14. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms For Rated Mains Voltage ≤ 300 V rms For Rated Mains Voltage ≤ 400 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input to Output Test Voltage, Method B1 Test Conditions/Comments VIORM × 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 Characteristic Unit VIORM Vpd (m) I to IV I to III I to III 40/125/21 2 849 1592 V peak V peak 1274 V peak 1019 V peak VIOTM VIOSM 8000 12,000 V peak V peak VIOSM 8000 V peak TS PS RS 150 2.78 >109 °C W Ω Vpd (m) VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Surge Isolation Voltage Basic VPEAK = 12.8 kV, 1.2 µs rise time, 50 µs, 50% fall time VPEAK = 12.8 kV, 1.2 µs rise time, 50 µs, 50% fall time Maximum value allowed in the event of a failure (see Figure 5) Surge Isolation Voltage Reinforced Safety Limiting Values Maximum Junction Temperature Total Power Dissipation at 25°C Insulation Resistance at TS SAFE LIMITING POWER (W) Symbol VIO = 500 V 3.0 RECOMMENDED OPERATING CONDITIONS 2.5 Table 15. Parameter Operating Temperature Supply Voltages Input Signal Rise and Fall Times 2.0 1.5 1.0 0 0 50 100 150 AMBIENT TEMPERATURE (°C) 200 13577-003 0.5 Figure 5. Thermal Derating Curve, Dependence of Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10 Rev. B | Page 11 of 21 Symbol TA VDD1, VDD2 Rating −40°C to +125°C 1.7 V to 5.5 V 1.0 ms ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 18. Maximum Continuous Working Voltage1 RI-16 -2 Wide Body Increased Creepage [SOIC_IC] Package Table 16. Parameter Storage Temperature (TST) Range Ambient Operating Temperature (TA) Range Supply Voltages (VDD1, VDD2) Input Voltages (VIA, VIB, VIC, VE1, VE2, DISABLE1, DISABLE2)1 Output Voltages (VOA, VOB, VOC)2 Average Output Current per Pin3 Side 1 Output Current (IO1) Side 2 Output Current (IO2) Common-Mode Transients4 Rating −65°C to +150°C −40°C to +125°C Parameter AC Voltage Bipolar Waveform Basic Insulation −0.5 V to +7.0 V −0.5 V to VDDI + 0.5 V Reinforced Insulation −10 mA to +10 mA −10 mA to +10 mA −150 kV/μs to +150 kV/μs VDDI is the input side supply voltage. VDDO is the output side supply voltage. 3 See Figure 5 for the maximum rated current values for various ambient temperatures. 4 Refers to the common-mode transients across the insulation barrier. Common-mode transients exceeding the absolute maximum ratings may cause latch-up or permanent damage. Unipolar Waveform Basic Insulation Reinforced Insulation 2 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Table 17. Maximum Continuous Working Voltage1 RW-16 Wide Body [SOIC_W] Package Reinforced Insulation Unipolar Waveform Basic Insulation Reinforced Insulation DC Voltage Basic Insulation Reinforced Insulation 1 Constraint 849 V peak 50-year minimum insulation lifetime Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 819 V peak −0.5 V to VDDO + 0.5 V 1 Parameter AC Voltage Bipolar Waveform Basic Insulation Rating Rating Constraint DC Voltage Basic Insulation Reinforced Insulation 1 790 V peak 1698 V peak 849 V peak 1118 V peak 559 V peak 943 V peak 1157 V peak 579 V peak 50-year minimum insulation lifetime Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. ESD CAUTION 849 V peak 1698 V peak 50-year minimum insulation lifetime 50-year minimum insulation lifetime 50-year minimum insulation lifetime 50-year minimum insulation lifetime Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Lifetime limited by package creepage maximum approved working voltage per IEC 60950-1 Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Rev. B | Page 12 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E Truth Tables Table 19. ADuM230D/ADuM231D Truth Table (Positive Logic) VIx Input1, 2 L H X VDISABLEx Input1, 2 L or NC L or NC H VDDI State2 Powered Powered Powered VDDO State2 Powered Powered Powered Default Low (D0), VOx Output1, 2, 3 L H L Default High (D1), VOx Output1, 2, 3 L H H X4 X4 X4 X4 Unpowered Powered Powered Unpowered L Indeterminate H Indeterminate Test Conditions/ Comments Normal operation Normal operation Inputs disabled, fail-safe output Fail-safe output L means low, H means high, X means don’t care, and NC means not connected. VIx and VOx refer to the input and output signals of a given channel (A, B, or C). VDISABLEx refers to the input disable signal on the same side as the VIx inputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. 3 D0 refers to the ADuM230D0/ADuM231D0 models, and D1 refers to the ADuM230D1/ADuM231D1 models. See the Ordering Guide section. 4 Input pins (VIx, DISABLEx) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry. 1 2 Table 20. ADuM230E/ADuM231E Truth Table (Positive Logic) VIx Input1, 2 L H X L X4 X4 VEx Input1, 2 H or NC H or NC L H or NC L4 X4 VDDI State2 Powered Powered Powered Unpowered Unpowered Powered VDDO State2 Powered Powered Powered Powered Powered Unpowered Default Low (E0), VOx Output1, 2, 3 L H Z L Z Indeterminate Default High (E1), VOx Output1, 2, 3 L H Z H Z Indeterminate Test Conditions/ Comments Normal operation Normal operation Outputs disabled Fail-safe output Outputs disabled L means low, H means high, X means don’t care, and NC means not connected, and Z means high impedance. VIx and VOx refer to the input and output signals of a given channel (A, B, or C). VEx refers to the output enable signal on the same side as the VOx inputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. 3 E0 refers to the ADuM230E0/ADuM231E0 models, and E1 refers to the ADuM230E1/ADuM231E1 models. See the Ordering Guide section. 4 Input pins (VIx, VEx) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry. 1 2 Rev. B | Page 13 of 21 ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet VDD1 1 16 VDD2 VDD1 1 16 VDD2 GND1 2 15 GND2 GND1 2 15 GND2 VIA 3 14 VOA VIA 3 14 VOA ADuM230D 13 VOB VIB 4 ADuM230E 13 VOB VIC 5 TOP VIEW (Not to Scale) 12 VOC VIC 5 TOP VIEW (Not to Scale) 12 VOC NIC 6 11 NIC NIC 6 11 NIC DISABLE1 7 10 NIC NIC 7 10 VE2 GND1 8 9 GND2 GND1 8 9 GND2 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 13577-004 VIB 4 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 13577-005 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 7. ADuM230E Pin Configuration Figure 6. ADuM230D Pin Configuration Table 21. Pin Function Descriptions Pin No.1 ADuM230D ADuM230E 1 1 2, 8 2, 8 3 3 4 4 5 5 6, 10, 11 6, 7, 11 7 Not applicable Mnemonic VDD1 GND1 VIA VIB VIC NIC DISABLE1 9, 15 Not applicable 9, 15 10 GND2 VE2 12 13 14 16 12 13 14 16 VOC VOB VOA VDD2 1 Description Supply Voltage for Isolator Side 1. Ground Reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Input C. No Internal Connection. Leave these pins floating. Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Ground Reference for Isolator Side 2. Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA, VOB, and VOC outputs are enabled. When VE2 is low, the VOA, VOB, and VOC outputs are disabled to the high-Z state. Logic Output C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2. Reference the AN-1109 Application Note for specific layout guidelines. Rev. B | Page 14 of 21 ADuM230D/ADuM230E/ADuM231D/ADuM231E VDD1 1 16 VDD2 VDD1 1 16 VDD2 GND1 2 15 GND2 GND1 2 15 GND2 VIA 3 14 VOA VIA 3 14 VOA ADuM231D 13 VOB VIB 4 ADuM231E 13 VOB VOC 5 TOP VIEW (Not to Scale) 12 VIC VOC 5 TOP VIEW (Not to Scale) 12 VIC NIC 6 11 NIC NIC 6 11 NIC DISABLE1 7 10 DISABLE2 VE1 7 10 VE2 GND1 8 9 GND2 GND1 8 9 GND2 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 13577-104 VIB 4 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 13577-105 Data Sheet Figure 9. ADuM231E Pin Configuration Figure 8. ADuM231D Pin Configuration Table 22. Pin Function Descriptions Pin No.1 ADuM231D ADuM231E 1 1 2, 8 2, 8 3 3 4 4 5 5 6, 11 6, 11 7 Not applicable Mnemonic VDD1 GND1 VIA VIB VOC NIC DISABLE1 Not applicable 7 VE1 9, 15 10 9, 15 Not applicable GND2 DISABLE2 Not applicable 10 VE2 12 13 14 16 12 13 14 16 VIC VOB VOA VDD2 1 Description Supply Voltage for Isolator Side 1. Ground Reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Output C. No Internal Connection. Leave these pins floating. Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Output Enable 1. Active high logic input. When VE1 is high or disconnected, the VOC output is enabled. When VE1 is low, the VOC output is disabled to the high-Z state. Ground Reference for Isolator Side 2. Input Disable 2. This pin disables the isolator inputs. Outputs take on the logic state determined by the fail-safe option shown in the Ordering Guide. Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA and VOB outputs are enabled. When VE2 is low, the VOA and VOB outputs are disabled to the high-Z state. Logic Input C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2. Reference the AN-1109 Application Note for specific layout guidelines. Rev. B | Page 15 of 21 ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 16 16 5.0V 3.3V 2.5V 1.8V 12 10 8 6 4 2 40 100 60 80 DATA RATE (Mbps) 120 140 160 Figure 10. ADuM230D/ADuM230E IDD1 Supply Current vs. Data Rate at Various Voltages 6 4 0 20 40 60 100 80 120 140 160 DATA RATE (Mbps) Figure 13. ADuM231D/ADuM231E IDD2 Supply Current vs. Data Rate at Various Voltages 14 PROPAGATION DELAY (tPLH) (ns) 5.0V 3.3V 2.5V 1.8V 14 12 10 8 6 4 12 5.0V 3.3V 2.5V 1.8V 10 8 6 4 20 40 60 80 100 120 140 160 DATA RATE (Mbps) 0 –40 13577-111 0 Figure 11. ADuM230D/ADuM230E IDD2 Supply Current vs. Data Rate at Various Voltages –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 13577-114 2 2 Figure 14. Propagation Delay (tPLH) vs. Temperature at Various Voltages 16 14 14 PROPAGATION DELAY (tPHL ) (ns) 5.0V 3.3V 2.5V 1.8V 12 10 8 6 4 12 5.0V 3.3V 2.5V 1.8V 10 8 6 4 2 2 20 40 60 80 100 DATA RATE (Mbps) 120 140 160 0 –40 13577-112 0 Figure 12. ADuM231D/ADuM231E IDD1 Supply Current vs. Data Rate at Various Voltages –20 0 20 40 60 80 TEMPERATURE (°C) 100 120 140 13577-115 IDD2 SUPPLY CURRENT (mA) 8 0 16 IDD1 SUPPLY CURRENT (mA) 10 13577-113 20 13577-110 0 0 12 2 0 0 5.0V 3.3V 2.5V 1.8V 14 IDD2 SUPPLY CURRENT (mA) IDD1 SUPPLY CURRENT (mA) 14 Figure 15. Propagation Delay( tPHL) vs. Temperature at Various Voltages Rev. B | Page 16 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E THEORY OF OPERATION The ADuM230D/ADuM230E/ADuM231D/ADuM231E use a high frequency carrier to transmit data across the isolation barrier using iCoupler chip scale transformer coils separated by layers of polyimide isolation. Using an on/off keying (OOK) technique and the differential architecture shown in Figure 16 and Figure 17, the ADuM230D/ADuM230E/ADuM231D/ ADuM231E have very low propagation delay and high speed. Internal regulators and input/output design techniques allow logic and supply voltages over a wide range from 1.7 V to 5.5 V, offering voltage translation of 1.8 V, 2.5 V, 3.3 V, and 5 V logic. The architecture is designed for high common-mode transient immunity and high immunity to electrical noise and magnetic interference. Radiated emissions are minimized with a spread spectrum OOK carrier and other techniques. Figure 16 illustrates the waveforms for the models of the ADuM230D/ADuM230E/ADuM231D/ADuM231E that have the condition of the fail-safe output state equal to low, where the carrier waveform is off when the input state is low. If the input side is off or not operating, the low fail-safe output state (the ADuM230D0, ADuM231D0, ADuM230E0, and ADuM231E0 models) sets the output to low. For the ADuM230D/ADuM230E/ ADuM231D/ADuM231E models that have a fail-safe output state of high, Figure 17 illustrates the conditions where the carrier waveform is off when the input state is high. When the input side is off or not operating, the high fail-safe output state (the ADuM230D1, ADuM231D1, ADuM230E0, and ADuM231E1 models) sets the output to high. See the Ordering Guide for the model numbers that have the fail-safe output state of low or the fail-safe output state of high. REGULATOR REGULATOR TRANSMITTER RECEIVER VIN GND1 13577-014 VOUT GND2 Figure 16. Operational Block Diagram of a Single Channel with a Low Fail-Safe Output State REGULATOR REGULATOR TRANSMITTER RECEIVER VIN GND1 GND2 Figure 17. Operational Block Diagram of a Single Channel with a High Fail-Safe Output State Rev. B | Page 17 of 21 13577-015 VOUT ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet APPLICATIONS INFORMATION PCB LAYOUT JITTER MEASUREMENT The ADuM230D/ADuM230E/ADuM231D/ADuM231E digital isolators require no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins (see Figure 18). Bypass capacitors are most conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2. The recommended bypass capacitor value is between 0.01 µF and 0.1 µF. The total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 must also be considered, unless the ground pair on each package side is connected close to the package. Figure 20 shows the eye diagram for the ADuM230D/ADuM230E/ ADuM231D/ADuM231E. The measurement was taken using an Agilent 81110A pulse pattern generator at 150 Mbps with pseudorandom bit sequences (PRBS), 2(n − 1), n = 14, for 5 V supplies. Jitter was measured with the Tektronix Model 5104B oscilloscope, 1 GHz, 10 GSPS with the DPOJET jitter and eye diagram analysis tools. The result shows a typical measurement on the ADuM230D/ADuM230E/ADuM231D/ADuM231E with 630 ps p-p jitter. VDD1 GND1 VIA VIB VIC/VOC NIC DISABLE1/VE1 GND1 5 4 13577-010 VOLTAGE (V) VDD2 GND2 VOA VOB VIC/VOC NIC DISABLE2/VE2 GND2 NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING. 3 2 1 Figure 18. Recommended PCB Layout See the AN-1109 Application Note for board layout guidelines. PROPAGATION DELAY RELATED PARAMETERS Propagation delay is a parameter that describes the time required for a logic signal to propagate through a component. The propagation delay to a Logic 0 output may differ from the propagation delay to a Logic 1 output. INPUT (VIx) 50% OUTPUT (VOx) tPHL 13577-011 tPLH 50% Figure 19. Propagation Delay Parameters Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. Channel matching is the maximum amount the propagation delay differs between channels within a single ADuM230D/ ADuM230E/ADuM231D/ADuM231E component. Propagation delay skew is the maximum amount the propagation delay differs between multiple ADuM230D/ADuM230E/ ADuM231D/ADuM231E components operating under the same conditions. 0 –10 –5 0 TIME (ns) 5 10 13577-012 In applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, design the board layout such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this can cause voltage differentials between pins exceeding the Absolute Maximum Ratings of the device, thereby leading to latch-up or permanent damage. Figure 20. Eye Diagram INSULATION LIFETIME All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation as well as on the materials and material interfaces. The two types of insulation degradation of primary interest are breakdown along surfaces exposed to the air and insulation wear out. Surface breakdown is the phenomenon of surface tracking and the primary determinant of surface creepage requirements in system level standards. Insulation wear out is the phenomenon where charge injection or displacement currents inside the insulation material cause long-term insulation degradation. Surface Tracking Surface tracking is addressed in electrical safety standards by setting a minimum surface creepage based on the working voltage, the environmental conditions, and the properties of the insulation material. Safety agencies perform characterization testing on the surface insulation of components, which allows the components to be categorized in different material groups. Lower material group ratings are more resistant to surface tracking and, therefore, can provide adequate lifetime with smaller creepage. The minimum creepage for a given working voltage and material group is in each system level standard and is based on the total rms voltage across the isolation, pollution Rev. B | Page 18 of 21 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E creepage, clearance, and lifetime of a device, see Figure 21 and the following equations. degree, and material group. The material group and creepage for the ADuM230D/ADuM230E/ADuM231D/ADuM231E isolators are presented in Table 9. The working voltage across the barrier from Equation 1 is Testing and modeling have shown that the primary driver of long-term degradation is displacement current in the polyimide insulation causing incremental damage. The stress on the insulation can be broken down into broad categories, such as dc stress, which causes very little wear out because there is no displacement current, and an ac component time varying voltage stress, which causes wear out. The ratings in certification documents are usually based on 60 Hz sinusoidal stress because this reflects isolation from line voltage. However, many practical applications have combinations of 60 Hz ac and dc across the barrier as shown in Equation 1. Because only the ac portion of the stress causes wear out, the equation can be rearranged to solve for the ac rms voltage, as is shown in Equation 2. For insulation wear out with the polyimide materials used in these products, the ac rms voltage determines the product lifetime. VRMS = VAC RMS2 + VDC 2 (1) VAC RMS = VRMS 2 − VDC 2 (2) or where: VRMS is the total rms working voltage. VAC RMS is the time varying portion of the working voltage. VDC is the dc offset of the working voltage. VRMS = VAC RMS2 + VDC 2 VRMS = 2402 + 4002 VRMS = 466 V This VRMS value is the working voltage used together with the material group and pollution degree when looking up the creepage required by a system standard. To determine if the lifetime is adequate, obtain the time varying portion of the working voltage. To obtain the ac rms voltage, use Equation 2. VAC RMS = VRMS 2 − VDC 2 VAC RMS = 4662 − 4002 VAC RMS = 240 V rms In this case, the ac rms voltage is simply the line voltage of 240 V rms. This calculation is more relevant when the waveform is not sinusoidal. The value is compared to the limits for working voltage in Table 17 for the expected lifetime, less than a 60 Hz sine wave, and it is well within the limit for a 50-year service life. Note that the dc working voltage limit in Table 17 is set by the creepage of the package as specified in IEC 60664-1. This value can differ for specific system level standards. Calculation and Use of Parameters Example VAC RMS VPEAK VRMS VDC TIME The following example frequently arises in power conversion applications. Assume that the line voltage on one side of the isolation is 240 V ac rms and a 400 V dc bus voltage is present on the other side of the isolation barrier. The isolator material is polyimide. To establish the critical voltages in determining the Rev. B | Page 19 of 21 Figure 21. Critical Voltage Example 13577-013 The lifetime of insulation caused by wear out is determined by the insulation thickness and material properties, and the voltage stress applied. It is important to verify that the product lifetime is adequate at the application working voltage. The working voltage supported by an isolator for wear out may not be the same as the working voltage supported for tracking. The working voltage applicable to tracking is specified in most standards. ISOLATION VOLTAGE Insulation Wear Out ADuM230D/ADuM230E/ADuM231D/ADuM231E Data Sheet OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 1 10.65 (0.4193) 10.00 (0.3937) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.75 (0.0295) 45° 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 8° 0° 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) 03-27-2007-B COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 22. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) 12.95 12.80 12.65 9 16 7.60 7.50 7.40 1 10.55 10.30 10.05 8 PIN 1 INDICATOR TOP VIEW 2.44 2.24 0.76 0.25 0.25 BSC GAGE PLANE 45° 0.33 0.23 END VIEW SEATING PLANE 1.27 BSC 0.49 0.35 1.27 0.41 COMPLIANT TO JEDEC STANDARDS MS-013-AC Figure 23. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC] Wide Body (RI-16-2) Dimensions shown in millimeters Rev. B | Page 20 of 21 8° 0° 12-13-2017-B PKG-004586 0.25 0.10 COPLANARITY 0.10 SIDE VIEW 2.64 2.50 2.36 Data Sheet ADuM230D/ADuM230E/ADuM231D/ADuM231E ORDERING GUIDE Model1 ADuM230D1BRWZ ADuM230D1BRWZ-RL ADuM230D0BRWZ ADuM230D0BRWZ-RL ADuM230E1BRWZ ADuM230E1BRWZ-RL ADuM230E0BRWZ ADuM230E0BRWZ-RL ADuM230D1BRIZ ADuM230D1BRIZ-RL ADuM230D0BRIZ ADuM230D0BRIZ-RL ADuM230E1BRIZ ADuM230E1BRIZ-RL ADuM230E0BRIZ ADuM230E0BRIZ-RL ADuM231D1BRWZ ADuM231D1BRWZ-RL ADuM231D0BRWZ ADuM231D0BRWZ-RL ADuM231E1BRWZ ADuM231E1BRWZ-RL ADuM231E0BRWZ ADuM231E0BRWZ-RL ADuM231D1BRIZ ADuM231D1BRIZ-RL ADuM231D0BRIZ ADuM231D0BRIZ-RL ADuM231E1BRIZ ADuM231E1BRIZ-RL ADuM231E0BRIZ ADuM231E0BRIZ-RL 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C No. of Inputs, VDD1 Side 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 No. of Inputs, VDD2 Side 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Withstand Voltage Rating (kV rms) 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 Fail-Safe Output State High High Low Low High High Low Low High High Low Low High High Low Low High High Low Low High High Low Low High High Low Low High High Low Low Z = RoHS Compliant Part. ©2015–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13577-0-10/18(B) Rev. B | Page 21 of 21 Input Disable Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No Output Enable No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes Package Description 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC Package Option RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RW-16 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2
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ADUM231E0BRWZ
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