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ADUM3401TRWZ-EP

ADUM3401TRWZ-EP

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOIC-WB-16_10.3X7.5MM

  • 描述:

    DGTL ISO 2.5KV GEN PURP 16SOIC

  • 数据手册
  • 价格&库存
ADUM3401TRWZ-EP 数据手册
Enhanced system-level ESD performance per IEC 61000-4-x Low power operation 5 V operation 1.4 mA per channel maximum at 0 Mbps to 2 Mbps 4.3 mA per channel maximum at 10 Mbps 3.3 V operation 0.9 mA per channel maximum at 0 Mbps to 2 Mbps 2.4 mA per channel maximum at 10 Mbps High common-mode transient immunity: >25 kV/µs Safety and regulatory approvals UL recognition: 2500 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 560 V peak ENHANCED FEATURES Supports defense and aerospace applications (AQEC standard) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request APPLICATIONS General-purpose multichannel isolation SPI/data converter isolation RS-232/RS-422/RS-485 transceivers Industrial field bus isolation GENERAL DESCRIPTION The ADuM3400-EP/ADuM3401-EP/ADuM3402-EP isolators provide four independent isolation channels in a variety of channel configurations and data rates (see the Ordering Guide). All models operate with the supply voltage on either side ranging from 3.135 V to 5.5 V, providing compatibility with lower voltage systems as well as enabling a voltage translation functionality across the isolation barrier. Protected by US Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Rev. A ADuM3400-EP 16 VDD2 15 GND2 VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VIC 5 ENCODE DECODE 12 VOC VID 6 ENCODE DECODE 11 VOD NC 7 10 VE2 GND1 8 9 GND2 Figure 1. ADuM3400-EP Functional Block Diagram VDD1 1 ADuM3401-EP GND1 2 16 VDD2 15 GND2 VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VIC 5 ENCODE DECODE 12 VOC VOD 6 DECODE ENCODE 11 VID VE1 7 10 GND1 8 9 VE2 GND2 Figure 2. ADuM3401-EP Functional Block Diagram VDD1 1 ADuM3402-EP GND1 2 16 VDD2 15 GND2 VIA 3 ENCODE DECODE 14 VOA VIB 4 ENCODE DECODE 13 VOB VOC 5 DECODE ENCODE 12 VIC VOD 6 DECODE ENCODE 11 VID VE1 7 10 VE2 GND1 8 9 GND2 Figure 3. ADuM3402-EP Functional Block Diagram The ADuM3400-EP/ADuM3401-EP/ADuM3402-EP1 are 4-channel digital isolators based on the Analog Devices, Inc., iCoupler® technology. Combining high speed CMOS and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices. 1 VDD1 1 GND1 2 13271-001 FUNCTIONAL BLOCK DIAGRAMS 13271-002 FEATURES 13271-003 Enhanced Product Quad-Channel, Digital Isolators, Enhanced System-Level ESD Reliability ADuM3400-EP/ADuM3401-EP/ADuM3402-EP The ADuM3400-EP/ADuM3401-EP/ADuM3402-EP isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/powerdown conditions. The ADuM3400-EP/ADuM3401-EP/ADuM3402-EP isolators contain various circuit and layout changes to provide increased capability relative to system-level IEC 61000-4-x testing (ESD/ burst/surge). The precise capability in these tests is determined by the design and layout of the user’s board or module. For more information, see the AN-793 Application Note, ESD/Latch-Up Considerations with iCoupler Isolation Products. Additional application and technical information can be found in the ADuM3400/ADuM3401/ADuM3402 data sheet. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 Regulatory Information ................................................................9 Enhanced Features............................................................................ 1 Insulation and Safety-Related Specifications .............................9 Applications ....................................................................................... 1 General Description ......................................................................... 1 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics ............................................................................ 10 Functional Block Diagrams ............................................................. 1 Recommended Operating Conditions .................................... 10 Revision History ............................................................................... 2 Absolute Maximum Ratings ......................................................... 11 Specifications..................................................................................... 3 ESD Caution................................................................................ 11 Electrical Characteristics—5 V Operation................................ 3 Pin Configurations and Function Descriptions ......................... 12 Electrical Characteristics—3.3 V Operation ............................ 4 Typical Performance Characteristics ........................................... 15 Electrical Characteristics—Mixed 5 V/3.3 V or 3.3 V/5 V Operation....................................................................................... 6 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 17 Package Characteristics ............................................................... 9 REVISION HISTORY 5/2017—Rev. 0 to Rev. A Change to Features Section ............................................................. 1 Changes to Regulatory Information Section and Table 5 ........... 9 7/2015—Revision 0: Initial Version Rev. A | Page 2 of 17 Enhanced Product ADuM3400-EP/ADuM3401-EP/ADuM3402-EP SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V and 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Table 1. Parameter DC SPECIFICATIONS Input Supply Current per Channel, Quiescent Output Supply Current per Channel, Quiescent ADuM3400-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps VDD1 Supply Current VDD2 Supply Current ADuM3401-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps VDD1 Supply Current VDD2 Supply Current ADuM3402-EP, Total Supply Current1 DC to 2 Mbps VDD1 or VDD2 Supply Current 10 Mbps VDD1 or VDD2 Supply Current For All Models Input Leakage per Channel VEx Input Pull-Up Current Tristate Leakage Current per Channel Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages Symbol Typ Max Unit IDDI (Q) IDDO (Q) 0.57 0.29 0.83 mA 0.35 mA IDD1 (Q) IDD2 (Q) 2.9 1.2 3.5 1.9 IDD1 (10) IDD2 (10) 9.0 3.0 11.6 mA 5.5 mA 5 MHz logic signal frequency 5 MHz logic signal frequency IDD1 (Q) IDD2 (Q) 2.5 1.6 3.2 2.4 DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency IDD1 (10) IDD2 (10) 7.4 4.4 10.6 mA 6.5 mA 5 MHz logic signal frequency 5 MHz logic signal frequency IDD1 (Q), IDD2 (Q) 2.0 2.8 mA DC to 1 MHz logic signal frequency IDD1 (10), IDD2 (10) 6.0 7.5 mA 5 MHz logic signal frequency II IPU IOZ VIH, VEH VIL, VEL VOAH, VOBH VOCH, VODH Logic Low Output Voltages SWITCHING SPECIFICATIONS Minimum Pulse Width Maximum Data Rate Propagation Delay Pulse Width Distortion, |tPLH − tPHL| Change vs. Temperature Propagation Delay Skew Channel to Channel Matching Codirectional Channels Opposing Directional Channels Min −10 −10 −10 2.0 (VDD1 or VDD2) − 0.1 (VDD1 or VDD2) − 0.4 VOAL, VOBL VOCL, VODL mA mA mA mA IOx2 = −20 µA, VIx = VIxH3 4.8 V IOx2 = −4 mA, VIx = VIxH3 0.1 0.1 0.4 V V V IOx2 = 20 µA, VIx = VIxL4 IOx2 = 400 µA, VIx = VIxL4 IOx2 = 4 mA, VIx = VIxL4 100 CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels PW tPSK 15 ns Mbps ns ns ps/°C ns tPSKCD tPSKOD 3 6 ns ns tPHL, tPLH PWD 32 50 3 5 Rev. A | Page 3 of 17 DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency +0.01 +10 µA −3 +0.01 +10 µA V 0.8 V 5.0 V 0.0 0.04 0.2 10 20 Test Conditions/Comments 0 V ≤ VIx ≤ VDDx VEx = 0 V ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Parameter For All Models Output Propagation Delay Disable (High/Low to High Impedance) Enable (High Impedance to High/Low) Output Rise/Fall Time (10% to 90%) Common-Mode Transient Immunity Logic High Output5 Logic Low Output5 Refresh Rate Dynamic Supply Current per Channel6 Input Output Symbol Min tPHZ, tPLH tPZH, tPZL tR/tF Enhanced Product Typ Max Unit Test Conditions/Comments 6 6 2.5 8 8 ns ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels VIx = VDD1/VDD2, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V |CMH| 25 35 kV/µs |CML| 25 35 kV/µs fr 1.2 Mbps IDDI (D) IDDO (D) 0.20 0.05 mA/Mbps mA/Mbps 1 The supply current values for all four channels are combined when running at identical data rates. Output supply current values are specified with no output load present. See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 15 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM3400-EP/ADuM3401-EP/ADuM3402-EP channel configurations. 2 IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining the output voltage (VOUT) > 0.8 VDD2. CML is the maximum commonmode voltage slew rate that can be sustained while maintaining VOUT < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 6 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per-channel supply current for unloaded and loaded conditions. ELECTRICAL CHARACTERISTICS—3.3 V OPERATION All voltages are relative to their respective ground. 3.135 V ≤ VDD1 ≤ 3.6 V and 3.135 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Table 2. Parameter DC SPECIFICATIONS Input Supply Current per Channel, Quiescent Output Supply Current per Channel, Quiescent ADuM3400-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps VDD1 Supply Current VDD2 Supply Current ADuM3401-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current VDD2 Supply Current 10 Mbps VDD1 Supply Current VDD2 Supply Current ADuM3402-EP, Total Supply Current1 DC to 2 Mbps VDD1 or VDD2 Supply Current 10 Mbps VDD1 or VDD2 Supply Current Symbol Min Typ Max Unit IDDI (Q) IDDO (Q) 0.31 0.19 0.49 mA 0.27 mA IDD1 (Q) IDD2 (Q) 1.6 0.7 2.1 1.2 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency IDD1 (10) IDD2 (10) 4.8 1.8 7.1 2.3 mA mA 5 MHz logic signal frequency 5 MHz logic signal frequency IDD1 (Q) IDD2 (Q) 1.4 0.9 1.9 1.5 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency IDD1 (10) IDD2 (10) 4.1 2.5 5.6 3.3 mA mA 5 MHz logic signal frequency 5 MHz logic signal frequency IDD1 (Q), IDD2 (Q) 1.2 1.7 mA DC to 1 MHz logic signal frequency IDD1 (10), IDD2 (10) 3.3 4.4 mA 5 MHz logic signal frequency Rev. A | Page 4 of 17 Test Conditions/Comments Enhanced Product Parameter For All Models Input Leakage per Channel VEx Input Pull-Up Current Tristate Leakage Current per Channel Logic High Input Threshold Logic Low Input Threshold Logic High Output Voltages ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Symbol Min Typ II IPU IOZ VIH, VEH VIL, VEL VOAH, VOBH −10 −10 −10 1.6 +0.01 +10 −3 +0.01 +10 (VDD1 or VDD2) − 0.1 (VDD1 or VDD2) − 0.4 VOCH, VODH Logic Low Output Voltages SWITCHING SPECIFICATIONS Minimum Pulse Width Maximum Data Rate Propagation Delay Pulse Width Distortion, |tPLH − tPHL| Change vs. Temperature Propagation Delay Skew Channel to Channel Matching Codirectional Channels Opposing Directional Channels For All Models Output Propagation Delay Disable (High/Low to High Impedance) Enable (High Impedance to High/Low) Output Rise/Fall Time (10% to 90%) Common-Mode Transient Immunity5 Logic High Output Logic Low Output Refresh Rate Dynamic Supply Current per Channel6 Input Output Max Unit 0 V ≤ VIx ≤ VDDx VEx = 0 V 3.3 µA V V V IOx2 = −20 µA, VIx = VIxH3 2.8 V IOx2 = −4 mA, VIx = VIxH3 0.1 0.1 0.4 V V V IOx2 = 20 µA, VIx = VIxL4 IOx2 = 400 µA, VIx = VIxL4 IOx2 = 4 mA, VIx = VIxL4 100 CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels 0.4 VOAL, VOBL VOCL, VODL µA Test Conditions/Comments 0.0 0.04 0.2 PW tPSK 22 ns Mbps ns ns ps/°C ns tPSKCD tPSKOD 3 6 ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels 8 8 ns ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels VIx = VDD1/VDD2, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V tPHL, tPLH PWD 10 20 38 50 3 5 tPHZ, tPLH tPZH, tPZL tR/tF 6 6 3 |CMH| 25 35 kV/µs |CML| 25 35 kV/µs fr 1.1 Mbps IDDI (D) IDDO (D) 0.10 0.03 mA/Mbps mA/Mbps 1 The supply current values for all four channels are combined when running at identical data rates. Output supply current values are specified with no output load present. section. See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 15 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM3400-EP/ADuM3401-EP/ADuM3402-EP channel configurations. 2 IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 6 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per channel supply current for unloaded and loaded conditions. Rev. A | Page 5 of 17 ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Enhanced Product ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OR 3.3 V/5 V OPERATION All voltages are relative to their respective ground. For 5 V/3.3 V operation, 4.5 V ≤ VDD1 ≤ 5.5 V and 3.135 V ≤ VDD2 ≤ 3.6 V, and for 3.3 V/5 V operation, 3.135 V ≤ VDD1 ≤ 3.6 V and 4.5 V ≤ VDD2 ≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C; VDD1 = 3.3 V, VDD2 = 5 V or VDD1 = 5 V, VDD2 = 3.3 V. Table 3. Parameter DC SPECIFICATIONS Input Supply Current per Channel, Quiescent 5 V/3.3 V Operation 3.3 V/5 V Operation Output Supply Current per Channel, Quiescent 5 V/3.3 V Operation 3.3 V/5 V Operation ADuM3400-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation VDD2 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation 10 Mbps VDD1 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation VDD2 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation ADuM3401-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation VDD2 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation 10 Mbps VDD1 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation VDD2 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation ADuM3402-EP, Total Supply Current1 DC to 2 Mbps VDD1 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation VDD2 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation Symbol Min Typ Max Unit Test Conditions/Comments 0.57 0.31 0.83 mA 0.49 mA 0.29 0.19 0.27 mA 0.35 mA 2.9 1.6 3.5 2.1 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency 0.7 1.2 1.2 1.9 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency 9.0 4.8 11.6 mA 7.1 mA 5 MHz logic signal frequency 5 MHz logic signal frequency 1.8 3.0 2.3 5.5 mA mA 5 MHz logic signal frequency 5 MHz logic signal frequency 2.5 1.4 3.2 1.9 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency 0.9 1.6 1.5 2.4 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency 7.4 4.1 10.6 mA 5.6 mA 5 MHz logic signal frequency 5 MHz logic signal frequency 2.5 4.4 3.3 6.5 mA mA 5 MHz logic signal frequency 5 MHz logic signal frequency 2.0 1.2 2.8 1.7 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency 1.2 2.0 1.7 2.8 mA mA DC to 1 MHz logic signal frequency DC to 1 MHz logic signal frequency IDDI (Q) IDDO (Q) IDD1 (Q) IDD2 (Q) IDD1 (10) IDD2 (10) IDD1 (Q) IDD2 (Q) IDD1 (10) IDD2 (10) IDD1 (Q) IDD2 (Q) Rev. A | Page 6 of 17 Enhanced Product Parameter 10 Mbps VDD1 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation VDD2 Supply Current 5 V/3.3 V Operation 3.3 V/5 V Operation For All Models Input Leakage per Channel VEx Input Pull-Up Current Tristate Leakage Current per Channel Logic High Input Threshold 5 V/3.3 V Operation 3.3 V/5 V Operation Logic Low Input Threshold 5 V/3.3 V Operation 3.3 V/5 V Operation Logic High Output Voltages Logic Low Output Voltages SWITCHING SPECIFICATIONS Minimum Pulse Width Maximum Data Rate Propagation Delay Pulse Width Distortion, |tPLH − tPHL| Change vs. Temperature Propagation Delay Skew Channel to Channel Matching Codirectional Channels Opposing Directional Channels For All Models Output Propagation Delay Disable (High/Low-to-High Impedance) Enable (High Impedance-to-High/Low) Output Rise/Fall Time (10% to 90%) 5 V/3.3 V Operation 3.3 V/5 V Operation Common-Mode Transient Immunity Logic High Output5 Logic Low Output5 Refresh Rate 5 V/3.3 V Operation 3.3 V/5 V Operation ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Symbol Min Typ Max Unit Test Conditions/Comments 6.0 3.3 7.5 4.4 mA mA 5 MHz logic signal frequency 5 MHz logic signal frequency 3.3 6.0 4.4 7.5 mA mA 5 MHz logic signal frequency 5 MHz logic signal frequency +0.01 −3 +0.01 +10 µA IDD1 (10) IDD2 (10) II IPU IOZ VIH, VEH −10 −10 −10 0 V ≤ VIx ≤ VDDx VEx = 0 V +10 µA 2.0 1.6 V V VIL, VEL 0.8 0.4 VOAH, VOBH (VDD1 or VDD2) − 0.1 VOCH, VODH (VDD1 or VDD2) − 0.4 VOAL, VOBL VOCL, VODL (VDD1 or VDD2) (VDD1 or VDD2) − 0.2 0.0 0.1 0.04 0.1 0.2 0.4 PW IOx2 = −20 µA, VIx = VIxH3 V IOx2 = −4 mA, VIx = VIxH3 V V V IOx2 = 20 µA, VIx = VIxL4 IOx2 = 400 µA, VIx = VIxL4 IOx2 = 4 mA, VIx = VIxL4 CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels tPSK 22 ns Mbps ns ns ps/°C ns tPSKCD tPSKOD 3 6 ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels 8 8 ns ns CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels CL = 15 pF, CMOS signal levels tPHL, tPLH PWD 100 V V V 10 15 35 50 3 5 tPHZ, tPLH tPZH, tPZL tR/tf 6 6 3.0 2.5 ns ns |CMH| 25 35 kV/µs |CML| 25 35 kV/µs 1.2 1.1 Mbps Mbps fr Rev. A | Page 7 of 17 VIx = VDD1/VDD2, VCM = 1000 V, transient magnitude = 800 V VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Parameter Dynamic Supply Current per Channel6 Input 5 V/3.3 V Operation 3.3 V/5 V Operation Output 5 V/3.3 V Operation 3.3 V/5 V Operation Symbol IDDI (D) Min Enhanced Product Typ Max Unit 0.20 0.10 mA/Mbps mA/Mbps 0.03 0.05 mA/Mbps mA/Mbps Test Conditions/Comments IDDO (D) 1 The supply current values for all four channels are combined when running at identical data rates. Output supply current values are specified with no output load present. See Figure 8 through Figure 10 for information on per channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 15 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM3400-EP/ADuM3401-EP/ADuM3402-EP channel configurations. 2 IOx is the Channel x output current, where x = A, B, C, or D. 3 VIxH is the input side logic high. 4 VIxL is the input side logic low. 5 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 6 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per-channel supply current for unloaded and loaded conditions. Rev. A | Page 8 of 17 Enhanced Product ADuM3400-EP/ADuM3401-EP/ADuM3402-EP PACKAGE CHARACTERISTICS Table 4. Parameter Resistance (Input to Output)1 Capacitance (Input to Output)1 Input Capacitance2 IC Junction to Case Thermal Resistance Side 1 Side 2 1 2 Symbol RIO CIO CI Min θJCI θJCO Typ 1012 2.2 4.0 Max 33 28 Unit Ω pF pF °C/W °C/W Test Conditions/Comments f = 1 MHz Thermocouple located at center of package underside Thermocouple located at center of package underside Device considered a 2-terminal device; Pin 1 to Pin 8 are shorted together, and Pin 9 to Pin 16 are shorted together. Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADuM3400-EP/ADuM3401-EP/ADuM3402-EP are approved by the organizations listed in Table 5. Table 5. UL Recognized under 1577 Component Recognition Program1 Single Protection, 2500 V rms Isolation Voltage File E214100 CSA Approved under CSA Component Acceptance Notice 5A Basic insulation per CSA 60950-1-03 and IEC 60950-1, 780 V rms (1103 V peak) maximum working voltage Reinforced insulation per CSA 60950-1-03 and IEC 60950-1, 390 V rms (551 V peak) maximum working voltage Basic insulation under IEC62020-1, 300 V rms (566 V peak) maximum working voltage File 205078 VDE Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-122 Reinforced insulation, 560 V peak File 2471900-4880-0001 1 In accordance with UL 1577, each ADuM3400-EP/ADuM3401-EP/ADuM3402-EP is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current leakage detection limit = 5 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM3400-EP/ADuM3401-EP/ADuM3402-EP is proof tested by applying an insulation test voltage ≥1050 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 6. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol Value 2500 L(I01) 7.8 min Minimum External Tracking (Creepage) L(I02) Minimum Clearance in the Plane of the Printed Circuit Board (PCB Clearance) L(PCB) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI Unit Test Conditions/Comments V rms 1 minute duration mm Measured from input terminals to output terminals, shortest distance through air 7.8 min mm Measured from input terminals to output terminals, shortest distance path along body 8.1 min mm Measured from input terminals to output terminals, shortest distance through air, line of sight, in the PCB mounting plane 0.017 min mm Insulation distance through insulation >400 V DIN IEC 112/VDE 0303 Part 1 II Material Group (DIN VDE 0110, 1/89, Table 1) Rev. A | Page 9 of 17 ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Enhanced Product DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The * marking on packages denotes DIN V VDE V 0884-10 approval. Table 7. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms For Rated Mains Voltage ≤ 300 V rms For Rated Mains Voltage ≤ 400 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method B1 Test Conditions/Comments VIORM × 1.875 = VPR, 100% production test, tm = 1 sec, partial discharge < 5 pC VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC Input-to-Output Test Voltage, Method A After Environmental Tests Subgroup 1 After Input and/or Safety Test Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Safety-Limiting Values VIO = 500 V Characteristic Unit VIORM VPR I to IV I to III I to II 40/105/21 2 560 1050 V peak V peak 896 672 V peak V peak VTR 4000 V peak TS IS1 IS2 RS 150 265 335 >109 °C mA mA Ω VPR 350 RECOMMENDED OPERATING CONDITIONS 300 Table 8. Parameter Operating Temperature Range (TA) Supply Voltages (VDD1, VDD2)1 Input Signal Rise and Fall Times 250 SIDE 2 200 150 SIDE 1 1 All voltages are relative to their respective ground. 100 50 0 0 50 100 150 CASE TEMPERATURE (°C) 200 13271-004 SAFETY LIMITING CURRENT (mA) Case Temperature Side 1 Current Side 2 Current Insulation Resistance at TS VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC Transient overvoltage, tTR = 10 seconds Maximum value allowed in the event of a failure (see Figure 4) Symbol Figure 4. Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V VDE V 0884-10 Rev. A | Page 10 of 17 Rating −55°C to +125°C 3.135 V to 5.5 V 1.0 ms Enhanced Product ADuM3400-EP/ADuM3401-EP/ADuM3402-EP ABSOLUTE MAXIMUM RATINGS Ambient temperature = 25°C, unless otherwise noted. Table 9. Parameter Storage Temperature Range (TST) Ambient Operating Temperature Range (TA) Supply Voltages (VDD1, VDD2)1 Input Voltage (VIA, VIB, VIC, VID, VE1, VE2)1, 2 Output Voltage (VOA, VOB, VOC, VOD)1, 2 Average Output Current per Pin3 Side 1 (IO1) Side 2 (IO2) Common-Mode Transients (CMH, CML)4 Rating −65°C to +150°C −55°C to +125°C −0.5 V to +7.0 V −0.5 V to VDD1 + 0.5 V −0.5 V to VDDO + 0.5 V −18 mA to +18 mA −22 mA to +22 mA −100 kV/µs to +100 kV/µs Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION 1 All voltages are relative to their respective ground. VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. 3 See Figure 4 for maximum rated current values for various temperatures. 4 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the Absolute Maximum Ratings can cause latchup or permanent damage. 2 Table 10. Maximum Continuous Working Voltage1 Parameter AC Voltage Bipolar Waveform Unipolar Waveform Basic Insulation Reinforced Insulation DC Voltage Basic Insulation Reinforced Insulation 1 Max Unit Constraint 565 V peak 50-year minimum lifetime 1131 560 V peak V peak Maximum approved working voltage per IEC 60950-1 Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 1131 560 V peak V peak Maximum approved working voltage per IEC 60950-1 Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 Refers to continuous voltage magnitude imposed across the isolation barrier. Table 11. Truth Table (Positive Logic) VIx Input1, 2 H L X X X X VEx Input3, 2 H or NC H or NC L H or NC L X VDDI State1 Powered Powered Powered Unpowered Unpowered Powered VDDO State1 Powered Powered Powered Powered Powered Unpowered VOX Output1 Notes H L Z H Outputs return to the input state within 1 µs of VDDI power restoration. Z Indeterminate Outputs return to the input state within 1 µs of VDDO power restoration if VEx state is H or NC. Outputs return to high impedance state within 8 ns of VDDO power restoration if VEx state is L. 1 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VEx refers to the output enable signal on the same side as the VOx outputs. VDDI and VDDO refer to the supply voltages on the input and output sides of the given channel, respectively. H is high, L is low, X is don’t care, and NC is no connect. 3 In noisy environments, connecting VEx to an external logic high or low is recommended. 2 Rev. A | Page 11 of 17 ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Enhanced Product PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD1 1 16 VDD2 *GND1 2 15 GND2* VIA 3 ADuM3400-EP 14 VOA VIB 4 TOP VIEW (Not to Scale) 13 VOB 12 VOC VID 6 11 VOD NC 7 10 VE2 *GND1 8 9 GND2* VIC 5 *PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED AND CONNECTING BOTH TO GND1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED AND CONNECTING BOTH TO GND2 IS RECOMMENDED. IN NOISY ENVIRONMENTS, CONNECTING OUTPUT ENABLES (PIN 7 FOR ADuM3401-EP/ADuM3402-EP AND PIN 10 FOR ALL MODELS) TO AN EXTERNAL LOGIC HIGH OR LOW IS RECOMMENDED. 13271-005 NC = NO CONNECT Figure 5. ADuM3400-EP Pin Configuration Table 12. ADuM3400-EP Pin Function Descriptions Pin No. 1 2, 8 3 4 5 6 7 9, 15 10 Mnemonic VDD1 GND1 VIA VIB VIC VID NC GND2 VE2 11 12 13 14 16 VOD VOC VOB VOA VDD2 Description Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V. Ground 1. Ground reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Input D. No Connect. Ground 2. Ground reference for Isolator Side 2. Output Enable 2. Active high logic input. VOA, VOB, VOC, and VOD outputs are enabled when VE2 is high or disconnected. VOA, VOB, VOC, and VOD outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or low is recommended. Logic Output D. Logic Output C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V. Rev. A | Page 12 of 17 ADuM3400-EP/ADuM3401-EP/ADuM3402-EP VDD1 1 16 VDD2 *GND1 2 15 GND2* VIA 3 ADuM3401-EP 14 VOA VIB 4 TOP VIEW (Not to Scale) 13 VOB 12 VOC VOD 6 11 VID VE1 7 10 VE2 *GND1 8 9 GND2* VIC 5 *PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED AND CONNECTING BOTH TO GND1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED AND CONNECTING BOTH TO GND2 IS RECOMMENDED. IN NOISY ENVIRONMENTS, CONNECTING OUTPUT ENABLES (PIN 7 FOR ADuM3401-EP/ADuM3402-EP AND PIN 10 FOR ALL MODELS) TO AN EXTERNAL LOGIC HIGH OR LOW IS RECOMMENDED. 13271-006 Enhanced Product Figure 6. ADuM3401-EP Pin Configuration Table 13. ADuM3401-EP Pin Function Descriptions Pin No. 1 2, 8 3 4 5 6 7 Mnemonic VDD1 GND1 VIA VIB VIC VOD VE1 9, 15 10 GND2 VE2 11 12 13 14 16 VID VOC VOB VOA VDD2 Description Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V. Ground 1. Ground reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Input C. Logic Output D. Output Enable 1. Active high logic input. VOD output is enabled when VE1 is high or disconnected. VOD is disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is recommended. Ground 2. Ground reference for Isolator Side 2. Output Enable 2. Active high logic input. VOA, VOB, and VOC outputs are enabled when VE2 is high or disconnected. VOA, VOB, and VOC outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or low is recommended. Logic Input D. Logic Output C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V. Rev. A | Page 13 of 17 Enhanced Product VDD1 1 16 VDD2 *GND1 2 15 GND2* VIA 3 ADuM3402-EP 14 VOA VIB 4 TOP VIEW (Not to Scale) 13 VOB 12 VIC VOD 6 11 VID VE1 7 10 VE2 *GND1 8 9 GND2* VOC 5 *PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED AND CONNECTING BOTH TO GND1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED AND CONNECTING BOTH TO GND2 IS RECOMMENDED. IN NOISY ENVIRONMENTS, CONNECTING OUTPUT ENABLES (PIN 7 FOR ADuM3401-EP/ADuM3402-EP AND PIN 10 FOR ALL MODELS) TO AN EXTERNAL LOGIC HIGH OR LOW IS RECOMMENDED. 13271-007 ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Figure 7. ADuM3402-EP Pin Configuration Table 14. ADuM3402-EP Pin Function Descriptions Pin No. 1 2, 8 3 4 5 6 7 Mnemonic VDD1 GND1 VIA VIB VOC VOD VE1 9, 15 10 GND2 VE2 11 12 13 14 16 VID VIC VOB VOA VDD2 Description Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V. Ground 1. Ground reference for Isolator Side 1. Logic Input A. Logic Input B. Logic Output C. Logic Output D. Output Enable 1. Active high logic input. VOC and VOD outputs are enabled when VE1 is high or disconnected. VOC and VOD outputs are disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is recommended. Ground 2. Ground reference for Isolator Side 2. Output Enable 2. Active high logic input. VOA and VOB outputs are enabled when VE2 is high or disconnected. VOA and VOB outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to an external logic high or low is recommended. Logic Input D. Logic Input C. Logic Output B. Logic Output A. Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V. Rev. A | Page 14 of 17 Enhanced Product ADuM3400-EP/ADuM3401-EP/ADuM3402-EP 20 80 15 60 CURRENT (mA) 5V 10 3V 5V 3V 20 20 40 60 DATA RATE (Mbps) 80 0 13271-008 0 100 Figure 8. Typical Input Supply Current per Channel vs. Data Rate (No Load) 0 40 60 DATA RATE (Mbps) 15 60 CURRENT (mA) 80 100 40 20 5 5V 5V 20 40 60 DATA RATE (Mbps) 80 13271-009 0 0 100 Figure 9. Typical Output Supply Current per Channel vs. Data Rate (No Load) 0 15 60 CURRENT (mA) 80 5V 40 60 DATA RATE (Mbps) 80 100 Figure 12. Typical ADuM3400-EP VDD2 Supply Current vs. Data Rate for 5 V and 3.3 V Operation 20 10 20 13271-012 3V 3V 0 CURRENT/CHANNEL (mA) 80 Figure 11. Typical ADuM3400-EP VDD1 Supply Current vs. Data Rate for 5 V and 3.3 V Operation 20 10 20 13271-011 5 0 CURRENT/CHANNEL (mA) 40 5 40 5V 20 3V 3V 0 20 40 60 DATA RATE (Mbps) 80 0 13271-010 0 100 Figure 10. Typical Output Supply Current per Channel vs. Data Rate (15 pF Output Load) 0 20 40 60 DATA RATE (Mbps) 80 100 13271-013 CURRENT/CHANNEL (mA) TYPICAL PERFORMANCE CHARACTERISTICS Figure 13. Typical ADuM3401-EP VDD1 Supply Current vs. Data Rate for 5 V and 3.3 V Operation Rev. A | Page 15 of 17 ADuM3400-EP/ADuM3401-EP/ADuM3402-EP Enhanced Product 40 80 PROPAGATION DELAY (ns) CURRENT (mA) 60 40 5V 20 3V 35 30 5V 0 20 60 40 DATA RATE (Mbps) 80 100 Figure 14. Typical ADuM3401-EP VDD2 Supply Current vs. Data Rate for 5 V and 3.3 V Operation 80 CURRENT (mA) 60 40 5V 20 0 0 20 40 60 DATA RATE (Mbps) 80 100 13271-015 3V Figure 15. Typical ADuM3402-EP VDD1 or VDD2 Supply Current vs. Data Rate for 5 V and 3.3 V Operation Rev. A | Page 16 of 17 25 –50 –25 0 50 25 TEMPERATURE (°C) 75 Figure 16. Propagation Delay vs. Temperature 100 13271-016 0 13271-014 3V Enhanced Product ADuM3400-EP/ADuM3401-EP/ADuM3402-EP OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193) 10.00 (0.3937) 8 1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 0.75 (0.0295) 45° 0.25 (0.0098) 2.65 (0.1043) 2.35 (0.0925) SEATING PLANE 8° 0° 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 03-27-2007-B 1 Figure 17. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 ADUM3400TRWZ-EP ADUM3400TRWZ-EP-RL ADUM3401TRWZ-EP ADUM3401TRWZ-EP-RL ADUM3402TRWZ-EP ADUM3402TRWZ-EP-RL 1 Number of Inputs, VDD1 Side 4 4 3 3 2 2 Number of Inputs, VDD2 Side 0 0 1 1 2 2 Maximum Data Rate (Mbps) 10 10 10 10 10 10 Maximum Propagation Delay, 5 V (ns) 50 50 50 50 50 50 Z = RoHS Compliant Part. ©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13271-0-5/17(A) Rev. A | Page 17 of 17 Temperature Range −55°C to +125°C −55°C to +125°C −55°C to +125°C −55°C to +125°C −55°C to +125°C −55°C to +125°C Package Description 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W 16-Lead SOIC_W Package Option RW-16 RW-16 RW-16 RW-16 RW-16 RW-16
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ADUM3401TRWZ-EP
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