Low Emission,
Isolated DC-to-DC Converters
ADuM5020/ADuM5028
Data Sheet
FUNCTIONAL BLOCK DIAGRAMS
NIC 1
16 NIC
ADuM5020
15 GNDISO
GND1 2
14 VSEL
PCS
PDIS 3
GND1 4
13 GNDISO
OSC
VDDP 5
RECT
REG
GND1 6
12 VISO
11 GNDISO
NIC 7
10 NIC
GND1 8
9 GNDISO
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 1. ADuM5020 Functional Block Diagram
ADuM5028
APPLICATIONS
GND1 2
RS-485/RS-422/CAN transceiver power
Power supply start-up bias and gate drives
Isolated sensor interfaces
Industrial PLCs
VDDP 3
8 VSEL
PCS
PDIS 1
7 GNDISO
OSC
GND1 4
RECT
REG
6 VISO
5 GNDISO
16520-102
isoPower integrated, isolated dc-to-dc converter
100 mA output current for ADuM5020
60 mA output current for ADuM5028
Meets CISPR22 Class B emissions limits at full load on a
2-layer PCB
16-lead SOIC_W package with 7.8 mm minimum creepage
8-lead SOIC_IC package with 8.3 mm minimum creepage
High temperature operation: 125°C maximum
Safety and regulatory approvals
UL recognition (pending)
3000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A (pending)
VDE certificate of conformity (pending)
VDE V 0884-10
VIORM = 565 V peak
CQC certification per GB4943.1-2011 (pending)
16520-001
FEATURES
Figure 2. ADuM5028 Functional Block Diagram
GENERAL DESCRIPTION
The ADuM5020 and ADuM50281 are isoPower®, integrated,
isolated dc-to-dc converters. Based on the Analog Devices, Inc.,
iCoupler® technology, these dc-to-dc converters provide
regulated, isolated power that is below CISPR22 Class B limits at
full load on a 2-layer printed circuit board (PCB) with ferrites.
Common voltage combinations and the associated current
output levels are shown in Table 1 through Table 6.
The ADuM5020 and ADuM5028 eliminate the need to design
and build isolated dc-to-dc converters in applications up to
500 mW. The iCoupler chip scale transformer technology is used
for the magnetic components of the dc-to-dc converter. The
result is a small form factor, isolated solution.
1
The ADuM5020 and ADuM5028 isolated dc-to-dc converters
provide two different package variants: the ADuM5020 in a
wide body, 16-lead SOIC_W package, and the ADuM5028 in
the space saving, 8-lead, wide body SOIC_IC. For 5 V input
operations, use the ADuM5020-5BRWZ and the ADuM50285BRIZ. For 3.3 V input to 3.3 V output operations, use the
ADuM5020-3BRWZ and the ADuM5028-3RIZ. See the Pin
Configuration and Function Descriptions section and the
Ordering Guide for more information.
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. A
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700
©2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADuM5020/ADuM5028
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Recommended Operating Conditions .......................................9
Applications ....................................................................................... 1
Absolute Maximum Ratings ......................................................... 10
Functional Block Diagrams ............................................................. 1
ESD Caution................................................................................ 10
General Description ......................................................................... 1
Pin Configuration and Function Descriptions........................... 11
Revision History ............................................................................... 2
Typical Performance Characteristics ........................................... 13
Specifications..................................................................................... 3
Theory of Operation ...................................................................... 16
Electrical Characteristics—5 V Primary Input Supply/5 V
Secondary Isolated Supply .......................................................... 3
Applications Information .............................................................. 17
Electrical Characteristics—5 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 4
Thermal Analysis ....................................................................... 18
Electrical Characteristics—3.3 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 5
Insulation Lifetime ..................................................................... 18
Regulatory Approvals................................................................... 6
Insulation and Safety Related Specifications ............................ 6
PCB Layout ................................................................................. 17
EMI Considerations ................................................................... 18
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 21
Package Characteristics ............................................................... 7
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 7
REVISION HISTORY
12/2018—Rev. 0 to Rev. A
Change to Features Section ............................................................. 1
Change to General Description Section ........................................ 1
Changes to Table 1 Table Title, Efficiency at IISO (MAX) Parameter,
Table 1, and Table 2 .......................................................................... 3
Changes to Table 3 and Table 4 ....................................................... 4
Added Electrical Characteristics—3.3 V Primary Input
Supply/3.3 V Secondary Isolated Supply Section, Table 5, and
Table 6; Renumbered Sequentially ................................................. 5
Changes to Table 14 .......................................................................... 9
Changes to Table 17, Table 18, and Table 19 ............................... 11
Changes to Figure 7, Figure 8, and Figure 9................................ 12
Change to Theory of Operations Section .................................... 15
Changes to Ordering Guide .......................................................... 20
6/2018—Revision 0: Initial Version
Rev. A | Page 2 of 20
Data Sheet
ADuM5020/ADuM5028
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = VISO = 5 V. Minimum and maximum specifications apply over the entire recommended
operation range, which is 4.5 V ≤ VDDP ≤ 5.5 V, 4.5 V ≤ VISO ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 1. ADuM5020-5BRIZ DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation1
Output Ripple1
Output Noise1
Switching Frequency
Pulse-Width Modulation (PWM)
Frequency
Output Supply Current 1
Efficiency at IISO (MAX)
VDDP Supply Current
No VISO Load
Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VISO (LINE)
VISO (LOAD)
VISO (RIP)
4.75
5.0
2
1
75
5.25
V
mV/V
%
mV p-p
VISO output current (IISO) = 10 mA
IISO = 50 mA, VDDP = 4.5 V to 5.5 V
IISO = 10 mA to 90 mA
20 MHz bandwidth, bypass output capacitance (CBO) =
0.1 µF||10 µF, IISO = 90 mA
CBO = 0.1 µF||10 µF, IISO = 90 mA
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
5
200
180
625
mV p-p
MHz
kHz
33
mA
mA
%
50
100
IDDP (Q)
IDDP (MAX)
8
310
25
154
10
4.75 V < VISO < 5.25 V
4.5 V < VISO < 5.25 V
IISO = 100 mA, TA = 25°C
mA
mA
°C
°C
Maximum VISO output current is derated by 1.75 mA/ºC for TA > 85ºC.
Table 2. ADuM5028-5BRIZ DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation1
Output Ripple1
Output Noise1
Switching Frequency
PWM Frequency
Output Supply Current 1
Efficiency at IISO (MAX)
VDDP Supply Current
No VISO Load
Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
4.75
5.0
2
1
75
200
180
625
5.25
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
%
IISO = 10 mA
IISO = 30 mA, VDDP = 4.5 V to 5.5 V
IISO = 6 mA to 54 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 54 mA
CBO = 0.1 µF||10 µF, IISO = 54 mA
5
60
33
IDDP (Q)
IDDP (MAX)
8
190
154
10
25
mA
mA
°C
°C
Maximum VISO output current is derated by 1 mA/ºC for TA > 85ºC.
Rev. A | Page 3 of 20
4.75 V < VISO < 5.25 V
IISO = 60 mA, TA = 25°C
ADuM5020/ADuM5028
Data Sheet
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = 5.0 V, VISO = 3.3 V. Minimum/maximum specifications apply over the entire
recommended operation range, which is 4.5 V ≤ VDDP ≤ 5.5 V, 3.0 V ≤ VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 3. ADuM5020-5BRIZ DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation1
Output Ripple1
Output Noise1
Switching Frequency
PWM Frequency
Output Supply Current 1
Efficiency at IISO (MAX)
VDDP Supply Current
No VISO Load
Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
3.135
3.3
2
1
50
130
180
625
3.465
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
mA
%
IISO = 10 mA
IISO = 50 mA, VDDP = 4.5 V to 5.5 V
IISO = 10 mA to 90 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 90 mA
CBO = 0.1 µF||10 µF, IISO = 90 mA
5
50
100
27
IDDP (Q)
IDDP (MAX)
5
250
18
154
10
3.135 V < VISO < 3.465 V
3.0 V < VISO < 3.465 V
IISO = 100 mA, TA = 25°C
mA
mA
°C
°C
Maximum VISO output current is derated by 1.75 mA/ºC for TA > 85ºC.
Table 4. ADuM5028-5BRIZ DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation1
Output Ripple1
Output Noise1
Switching Frequency
PWM Frequency
Output Supply Current 1
Efficiency at IISO (MAX)
VDDP Supply Current
No VISO Load
Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
3.135
3.3
2
1
50
130
180
625
3.465
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
mA
%
IISO = 10 mA
IISO = 30 mA, VDDP = 4.5 V to 5.5 V
IISO = 6 mA to 54 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 54 mA
CBO = 0.1 µF||10 µF, IISO = 54 mA
5
30
60
27
IDDP (Q)
IDDP (MAX)
5
150
154
10
18
mA
mA
°C
°C
Maximum VISO output current is derated by 1 mA/ºC for TA > 85ºC.
Rev. A | Page 4 of 20
3.135 V < VISO < 3.465 V
3.0 V < VISO < 3.465 V
IISO = 60 mA, TA = 25°C
Data Sheet
ADuM5020/ADuM5028
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = 3.3 V, VISO = 3.3 V. Minimum/maximum specifications apply over the entire
recommended operation range, which is 3.0 V ≤ VDDP ≤ 3.6 V, 3.0 V ≤ VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 5. ADuM5020-3BRWZ DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation1
Output Ripple1
Output Noise1
Switching Frequency
PWM Frequency
Output Supply Current 1
Efficiency at IISO (MAX)
VDDP Supply Current
No VISO Load
Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
3.135
3.3
2
1
50
130
180
625
3.465
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
mA
%
IISO = 10 mA
IISO = 50 mA, VDDP = 3.0 V to 3.6 V
IISO = 7 mA to 63 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 90 mA
CBO = 0.1 µF||10 µF, IISO = 90 mA
5
35
70
33
IDDP (Q)
IDDP (MAX)
5
225
15
154
10
3.135 V < VISO < 3.465 V
3.0 V < VISO < 3.465 V
IISO = 70 mA, TA = 25°C
mA
mA
°C
°C
Maximum VISO output current is derated by 2 mA/°C for TA > 105°C.
Table 6. ADuM5028-3BRIZ DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation1
Output Ripple1
Output Noise1
Switching Frequency
PWM Frequency
Output Supply Current 1
Efficiency at IISO (MAX)
VDDP Supply Current
No VISO Load
Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
1
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
3.135
3.3
2
1
50
130
180
625
3.465
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
mA
%
IISO = 10 mA
IISO = 30 mA, VDDP = 3.0 V to 3.6 V
IISO = 6 mA to 54 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 54 mA
CBO = 0.1 µF||10 µF, IISO = 54 mA
5
30
60
33
IDDP (Q)
IDDP (MAX)
5
190
154
10
15
mA
mA
°C
°C
Maximum VISO output current is derated by 2 mA/°C for TA > 105°C.
Rev. A | Page 5 of 20
3.135 V < VISO < 3.465 V
3.0 V < VISO < 3.465 V
IISO = 60 mA, TA = 25°C
ADuM5020/ADuM5028
Data Sheet
REGULATORY APPROVALS
Table 7.
UL (Pending) 1
Recognized Under 1577 Component
Recognition Program1
Single Protection, 3000 V rms
Isolation Voltage
CSA (Pending)
Approved under CSA Component
Acceptance Notice 5A
CSA 60950-1-07+A1+A2 and
IEC 60950-1, second edition, +A1+A2
File E214100
Basic insulation at 780 V rms
(1103 V peak)
Reinforced insulation at 390 V rms
(552 V peak)
IEC 60601-1 Edition 3.1:
Basic insulation (1 means of patient
protection (1 MOPP)), 585 V rms
(827 V peak)
CSA 61010-1-12 and IEC 61010-1 third
edition:
Basic insulation at 300 V rms mains,
780 V rms (1103 V peak)
Reinforced insulation at 300 V rms
mains, 390 V rms (552 V peak)
File 205078
1
2
VDE (Pending) 2
DIN V VDE V 0884-10
(VDE V 0884-10):2006-12
Reinforced insulation
565 V peak, surge isolation
voltage (VIOSM) =
6000 V peak
Transient voltage (VIOTM) =
4242 V peak
CQC (Pending)
Certified under
CQC11-471543-2012
GB4943.1-2011:
Basic insulation at 780 V rms
(1103 V peak)
File 2471900-4880-0001
File (pending)
Reinforced insulation at
390 V rms (552 V peak)
In accordance with UL 1577, each ADuM5020 and ADuM5028 are proof tested by applying an insulation test voltage ≥ 3600 V rms for 1 sec.
In accordance with DIN V VDE V 0884-10, each ADuM5020 and ADuM5028 are proof tested by applying an insulation test voltage ≥ 1059 V peak for 1 sec (partial
discharge detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS
For additional information, see www.analog.com/icouplersafety.
Table 8. ADuM5020 Insulation and Safety
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L (I01)
Value
3000
7.8
Unit
V rms
mm min
Minimum External Tracking (Creepage)
L (I02)
7.8
mm min
Minimum Clearance in the Plane of the Printed
Circuit Board (PCB Clearance)
L (PCB)
8.3
mm min
CTI
25.5
>600
I
μm min
V
Unit
V rms
mm min
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Material Group
Test Conditions/Comments
1-minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Measured from input terminals to output terminals,
shortest distance through air, line of sight, in the PCB
mounting plane
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
Table 9. ADuM5028 Insulation and Safety
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L (I01)
Value
3000
8.3
Minimum External Tracking (Creepage)
L (I02)
8.3
mm min
Minimum Clearance in the Plane of the Printed
Circuit Board (PCB Clearance)
L (PCB)
8.3
mm min
CTI
25.5
>600
I
μm min
V
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Material Group
Rev. A | Page 6 of 20
Test Conditions/Comments
1-minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Measured from input terminals to output terminals,
shortest distance through air, line of sight, in the PCB
mounting plane
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
Data Sheet
ADuM5020/ADuM5028
PACKAGE CHARACTERISTICS
Table 10. ADuM5020 Package Characteristics
Parameter
Resistance (Input to Output) 1
Capacitance (Input to Output)1
Input Capacitance 2
IC Junction to Ambient Thermal
Resistance
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1013
2.2
4.0
45
Max
Unit
Ω
pF
pF
°C/W
Test Conditions/Comments
f = 1 MHz
Thermocouple located at center of package
underside 3
This device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
Input capacitance is from any input data pin to ground.
3
The value of θJA is based on devices mounted on a JEDEC JESD-51 standard 2s2p board and still air.
1
2
Table 11. ADuM5028 Package Characteristics
Parameter
Resistance (Input to Output) 1
Capacitance (Input to Output)1
Input Capacitance 2
IC Junction to Ambient Thermal
Resistance
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1013
2.2
4.0
80
Max
Unit
Ω
pF
pF
°C/W
Test Conditions/Comments
f = 1 MHz
Thermocouple located at center of package
underside 3
This device is considered a 2-terminal device: Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.
Input capacitance is from any input data pin to ground.
3
The value of θJA is based on devices mounted on a JEDEC JESD-51 standard 2s2p board and still air.
1
2
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
the protective circuits. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval.
Table 12. ADuM5020 VDE Characteristics
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b1
Input to Output Test Voltage, Method a
After Environmental Tests Subgroup 1
After Input or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Withstand Isolation Voltage
Surge Isolation Voltage Reinforced
Safety Limiting Values
Case Temperature
Total Power Dissipation at 25°C
Insulation Resistance at TS
Test Conditions/Comments
VIORM × 1.875 = VPR, 100% production test, tm = 1 sec,
partial discharge < 5 pC
VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
Transient overvoltage, tTR = 10 sec
1 minute withstand rating
VIOSM(TEST) = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time
Maximum value allowed in the event of a failure
(see Figure 3)
VIO = 500 V
Rev. A | Page 7 of 20
Symbol
Characteristic
Unit
VIORM
VPR
I to IV
I to III
I to II
40/125/21
2
565
1059
V peak
V peak
VPR
Vpd(m)
848
V peak
Vpd(m)
678
V peak
VIOTM
VISO
VIOSM
4242
3000
6000
V peak
V rms
V peak
TS
IS1
RS
150
2.78
>109
°C
W
Ω
ADuM5020/ADuM5028
Data Sheet
Table 13. ADuM5028 VDE Characteristics
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b1
Input to Output Test Voltage, Method a
After Environmental Tests Subgroup 1
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Withstand Isolation Voltage
Surge Isolation Voltage Reinforced
Safety Limiting Values
Case Temperature
Total Power Dissipation at 25°C
Insulation Resistance at TS
Test Conditions/Comments
VIORM × 1.875 = VPR, 100% production test, tm = 1 sec,
partial discharge < 5 pC
VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
Transient overvoltage, tTR = 10 sec
1 minute withstand rating
VIOSM(TEST) = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time
Maximum value allowed in the event of a failure
(see Figure 4)
VIO = 500 V
Rev. A | Page 8 of 20
Symbol
Characteristic
Unit
VIORM
VPR
I to IV
I to III
I to II
40/125/21
2
565
1059
V peak
V peak
VPR
Vpd(m)
848
V peak
Vpd(m)
678
V peak
VIOTM
VISO
VIOSM
4242
3000
6000
V peak
V rms
V peak
TS
IS1
RS
150
1.56
>109
°C
W
Ω
Data Sheet
ADuM5020/ADuM5028
RECOMMENDED OPERATING CONDITIONS
3.0
Table 14.
SAFE LIMITING POWER (W)
2.5
2.0
1.5
1.0
0
0
50
100
150
AMBIENT TEMPERATURE (°C)
200
16520-002
0.5
Figure 3. ADuM5020 Thermal Derating Curve, Dependence of Safety Limiting
Values with Ambient Temperature per DIN V VDE V 0884-10
1.8
1
1.6
SAFETY LIMITING POWER (W)
Parameter
Operating Temperature1
Supply Voltages 2
ADuM5020-5BRWZ,
ADuM5028-5BRIZ,
VDDP at VISO = 3.135 V
to 3.465 V
ADuM5020-3BRWZ,
ADuM5028-3BRIZ,
VDDP at VISO = 3.135 V
to 3.465 V
ADuM5020-5BRWZ,
ADuM5028-5BRIZ,
VDDP at VISO = 4.75 V
to 5.25 V
2
1.2
1.0
0.8
0.6
0.4
50
100
150
AMBIENT TEMPERATURE (°C)
200
16520-104
0.2
0
Min
−40
Typ
Max
+125
Unit
°C
4.5
5.5
V
3.0
3.6
V
4.5
5.5
V
Operation at >85°C requires reduction of the maximum load current.
Each voltage is relative to its respective ground.
1.4
0
Symbol
TA
VDDP
Figure 4. ADuM5028 Thermal Derating Curve, Dependence of Safety Limiting
Values with Ambient Temperature per DIN V VDE V 0884-10
Rev. A | Page 9 of 20
ADuM5020/ADuM5028
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 16. Maximum Continuous Working Voltage
Supporting 50-Year Minimum Lifetime1
Table 15.
Parameter
Storage Temperature (TST)
Ambient Operating Temperature (TA)
Supply Voltages (VDDP, VISO)1
VISO Supply Current
ADuM5020
ADuM5028
Input Voltage (PDIS, VSEL)1, 2
Common-Mode Transients3
Rating
−55°C to +150°C
−40°C to +125°C
−0.5 V to +7.0 V
100 mA
60 mA
−0.5 V to VDDI + 0.5 V
−200 kV/µs to +200 kV/µs
All voltages are relative to their respective ground.
VDDI is the input side supply voltage.
3
Common-mode transients refer to common-mode transients across the
insulation barrier. Common-mode transients exceeding the absolute
maximum ratings may cause latch-up or permanent damage.
1
Parameter
AC Voltage
Bipolar Waveform
Unipolar Waveform
Basic Insulation
DC Voltage
Basic Insulation
1
Max
Unit
Applicable
Certification
560
V peak
50-year operation
560
V peak
50-year operation
1000
V peak
50-year operation
Maximum continuous working voltage refers to the continuous voltage
magnitude imposed across the isolation barrier. See the Insulation Lifetime
section for more information.
2
ESD CAUTION
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 10 of 20
Data Sheet
ADuM5020/ADuM5028
NIC 1
16
NIC
GND1 2
15
GNDISO
PDIS 3
14
VSEL
13
GNDISO
12
VISO
GND1 6
11
GNDISO
NIC 7
10
NIC
GND1 8
9
GNDISO
GND1 4
VDDP 5
ADuM5020
TOP VIEW
(Not to Scale)
NIC = NO INTERNAL CONNECTION.
LEAVE THESE PINS FLOATING.
16520-003
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 5. Pin Configuration
Table 17. ADuM5020 Pin Function Descriptions
Mnemonic
NIC
GND1
PDIS
5
9, 11, 13, 15
12
14
VDDP
GNDISO
VISO
VSEL
Description
No Internal Connection. Leave these pins floating.
Ground 1. Ground reference for the primary. It is recommended that these pins be connected to a common ground.
Power Disable. When tied to any GND1 pin, the VISO output voltage is active. When a logic high voltage is applied,
the VISO output voltage is shut down. Do not leave this pin floating.
Primary Supply Voltage.
Ground Reference for VISO on Side 2. It is recommended that these pins be connected to a common ground.
Secondary Supply Voltage Output for External Loads.
Output Voltage Selection. Connect VSEL to VISO for 5 V output or connect VSEL to GNDISO for 3.3 V output. This pin has a
weak internal pull-up. Therefore, do not leave this pin floating. It is recommended that the ADuM5020-3BRWZ and
the ADuM5028-3BRIZ are only used for 3.3 V input to 3.3 V operation, therefore connect VSEL to GNDISO.
PDIS 1
GND1 2
VDDP 3
GND1 4
ADuM5028
TOP VIEW
(Not to Scale)
8
VSEL
7
GNDISO
6
VISO
5
GNDISO
16520-106
Pin No.
1, 7, 10, 16
2, 4, 6, 8
3
Figure 6. ADuM5028 Pin Configuration
Table 18. ADuM5028 Pin Function Descriptions
Pin No. Mnemonic Description
Power Disable. When tied to any GND1 pin, the VISO output voltage is active. When a logic high voltage is applied, the
1
PDIS
VISO output voltage is shut down. Do not leave this pin floating.
2, 4
GND1
Ground 1. Ground reference for the primary. It is recommended that these pins be connected to a common ground.
3
VDDP
Primary Supply Voltage.
5, 7
GNDISO
Ground Reference for VISO on Side 2. It is recommended that these pins be connected together.
6
VISO
Secondary Supply Voltage Output for External Loads.
Output Voltage Selection. Connect VSEL to VISO for 5 V output or connect VSEL to GNDISO for 3.3 V output. This pin has a
8
VSEL
weak internal pull-up; therefore, do not leave this pin floating. It is recommended that the ADuM5020-3BRWZ and the
ADuM5028-3BRIZ are only used for 3.3 V input to 3.3 V operation, therefore connect VSEL to GNDISO.
Table 19. Truth Table (Positive Logic)
VDDP (V)
5
5
5
3.3
3.3
3.3
VSEL Input
High
Low
Don’t care
Low
High
Don’t care
PDIS Input
Low
Low
High
Low
Low
High
VISO Output (V)
5
3.3
0
3.3
5
0
Rev. A | Page 11 of 21
Notes
Configuration not recommended
ADuM5020/ADuM5028
Data Sheet
35
5.10
30
5.08
25
5.06
20
5.04
VISO (V)
15
10
5.00
3.3V IN/3.3V OUT
5V IN/5V OUT
5V IN/3.3V OUT
0
0.02
0.04
0.06
4.98
0.10
0.08
IISO OUTPUT CURRENT (A)
4.96
16520-004
5
0
5.02
0
0.02
0.04
0.06
0.08
0.10
IISO OUTPUT CURRENT (A)
Figure 7. Typical Power Supply Efficiency in Supported Supply Configurations
16520-007
EFFICIENCY (%)
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 10. VISO vs. IISO Output Current, Input = 5 V, VISO = 5 V
0.10
3.36
0.09
3.34
3.32
0.07
0.06
VISO (V)
IISO OUTPUT CURRENT (A)
0.08
0.05
0.04
0.03
3.30
3.28
3.26
0.02
3.3V IN/3.3V OUT
5V IN/5V OUT
5V IN/3.3V OUT
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
INPUT CURRENT (A)
3.22
0
0.02
0.04
0.06
0.08
0.10
IISO OUTPUT CURRENT (A)
Figure 8. IISO Output Current vs. Input Current in Supported Power
Configurations
16520-008
0
3.24
16520-005
0.01
Figure 11. VISO vs. IISO Output Current, Input = 5 V,
VISO = 3.3 V
1.1
5.10
5.08
0.9
0.8
5.06
VISO (V)
0.7
0.6
0.5
5.04
5.02
0.4
5.00
0.3
3.3V IN/3.3V OUT
5V IN/5V OUT
5V IN/3.3V OUT
0.1
0
0
0.02
0.04
0.06
IISO OUTPUT CURRENT (A)
0.08
0.10
4.98
Figure 9. Total Power Dissipation vs. IISO Output Current in Supported Power
Configurations
Rev. A | Page 12 of 20
4.96
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
Figure 12. VISO vs. Temperature, Input = 5 V, VISO Output = 5 V
16520-009
0.2
16520-006
TOTAL POWER DISSIPATION (W)
1.0
Data Sheet
ADuM5020/ADuM5028
3.32
3.30
3.26
3.24
3.22
3.20
25
50
75
100
125
TEMPERATURE (°C)
Figure 13. VISO vs. Temperature, Input = 3.3 V, VISO Output = 3.3 V
1.0
0.5
0
3.5
4.0
4.5
5.0
Figure 16. Short-Circuit Input Current (IDD1) and Power Dissipation vs. VDDP
15
1,000
10
500
5
VISO AT 5V (mV)
PERCENT LOAD
0
0
–500
–5
–1,000
100
–10
50
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
TIME (µs)
16520-012
–15
5.5
VDDP (V)
VISO (mV)
5V VISO(RIP) (mV)
1.5
Figure 14. VISO Ripple, 5 V Input to 5 V Output at 90% Load,
Bandwidth = 20 MHz
1.0
2.0
3.0
4.0
5.0
0
6.0
RATED LOAD (%)
0
–25
2.0
16520-011
3.18
–50
2.5
TIME (ms)
16520-015
VISO (V)
3.28
POWER DISSIPATION
IDD1
16520-014
IDD1 (A) AND POWER DISSIPATION (W)
3.0
Figure 17. VISO Transient Load Response 5 V Input to 5 V Output 10% to 90%
Load Step
15
1,000
VISO AT 3.3V (mV)
PERCENT LOAD
VISO (mV)
500
0
–500
–5
–1,000
100
–10
–15
50
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
TIME (µs)
Figure 15. VISO Ripple, 5 V Input to 3.3 V Output at 90% Load,
Bandwidth = 20 MHz
–1.0
0
1.0
2.0
3.0
0
4.0
TIME (ms)
Figure 18. VISO Transient Load Response 5 V Input to 3.3 V Output, 10% to
90% Load Step
Rev. A | Page 13 of 20
16520-115
0
RATED LOAD (%)
5
16520-013
3.3V VISO(RIP) (mV)
10
ADuM5020/ADuM5028
7
Data Sheet
5
VISO AT 10% LOAD (V)
VISO AT 90% LOAD (V)
VISO AT 10% LOAD (V)
VISO AT 90% LOAD (V)
6
4
5
3
VISO (V)
VISO (V)
4
3
2
2
1
1
0
0
1
2
TIME (ms)
3
4
–1
16520-016
–1
Figure 19. 5 V Input to 5 V Output VISO Start-Up Transient at 10% and 90%
Load
0
1
2
TIME (ms)
3
4
16520-017
0
Figure 20. 5 V Input to 3.3 V Output VISO Start-Up Transient at 10% and 90%
Load
Rev. A | Page 14 of 20
Data Sheet
ADuM5020/ADuM5028
THEORY OF OPERATION
The ADuM5020/ADuM5028 dc-to-dc work on principles that
are common to most standard power supplies. The converters
have a split controller architecture with isolated PWM feedback.
VDDP power is supplied to an oscillating circuit that switches
current into a chip scale air core transformer. Power transferred to
the secondary side is rectified and regulated to 3.3 V or 5.0 V,
depending on the setting of the VSEL pin. Note that the
ADuM5020-3BRWZ and the ADuM5028-3BRIZ can only be
used for 3.3 V input to 3.3 V output applications, and the
ADuM5020-5BRWZ and ADuM5028-5BRIZ operate best for
5 V input applications. The secondary (VISO) side controller
regulates the output by creating a PWM control signal that is sent
to the primary (VDDP) side by a dedicated iCoupler data
channel. The PWM modulates the oscillator circuit to control the
power being sent to the secondary side. Feedback allows
significantly higher power and efficiency.
The ADuM5020/ADuM5028 implement undervoltage lockout
(UVLO) with hysteresis on the primary and secondary side input
and output pins as well as the VDDP power input. The UVLO
feature ensures that the converters do not go into oscillation due
to noisy input power or slow power-on ramp rates.
Rev. A | Page 15 of 20
ADuM5020/ADuM5028
Data Sheet
APPLICATIONS INFORMATION
PCB LAYOUT
The ADuM5020 and ADuM5028 isoPower integrated dc-to-dc
converters require power supply bypassing at the input and
output supply pins (see Figure 21 and Figure 22). Low effective
series resistance (ESR) 0.1 μF bypass capacitors are required
between the VDDP pin and GND1 pin, as close to the chip pads
as possible. Low ESR 0.1 μF or 0.22 μF capacitors are required
between the VISO pin and GNDISO pin, as close to the chip pads
as possible (see the CISO note in Figure 23 and Figure 24 for
more information). The isoPower inputs require multiple
passive components to bypass the power effectively, as well as
set the output voltage and bypass the core voltage regulator (see
Figure 21 through Figure 26).
PDIS
GND1
VDDP
0.1µF
4
5
6
16520-018
10µF
GND1
3
Figure 21. ADuM5020 VDDP Bias and Bypass Components
PDIS
GND1
VDDP
0.1µF
GND1
To reduce the level of electromagnetic radiation, the impedance
to high frequency currents between the VISO and GNDISO pins and
the PCB trace connections can be increased. Using this method
of electromagnetic interference (EMI) suppression controls the
radiating signal at its source by placing surface-mount ferrite beads
in series with the VISO and GNDISO pins, as shown in Figure 25
and Figure 26. The impedance of the ferrite bead is chosen to be
about 1.8 kΩ between the 100 MHz and 1 GHz frequency range to
reduce the emissions at the 180 MHz primary switching frequency
and the 360 MHz secondary side rectifying frequency and
harmonics. See Table 20 for examples of appropriate surfacemount ferrite beads.
2
Table 20. Surface-Mount Ferrite Beads Example
3
Manufacturer
Taiyo Yuden
Murata Electronics
4
16520-122
10µF
1
for several operating frequencies. Noise suppression requires a
low inductance, high frequency capacitor, whereas ripple
suppression and proper regulation require a large value capacitor.
These capacitors are most conveniently connected between the
VDDP pin and GND1 pin, and between the VISO pin and GNDISO pin.
To suppress noise and reduce ripple, a parallel combination of at
least two capacitors is required. The recommended capacitor values
are 0.1 μF and 10 μF for VDDP and VISO. The smaller capacitor
must have a low ESR. For example, use of a ceramic capacitor is
advised. The total lead length between the ends of the 0.1 μF low
ESR capacitors, and the power supply pins must not exceed 2 mm.
Part No.
BKH1005LM182-T
BLM15HD182SN1
Figure 22. ADuM5028 VDDP Bias and Bypass Components
12
11
NIC
GNDISO
GND1
FB1
VISO
GNDISO
PDIS
VISO OUT
CISO
GND 1
10µF
FB2
CISO = 0.1µF FOR VDDP = 5V AND VISO = 5V,
CISO = 0.22µF FOR VDDP = 5V AND VISO = 3.3V
7
6
5
VISO
GND1
GNDISO
NIC
NIC
VISO OUT
CISO
FERRITES
10µF
GNDISO
BYPASS
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