ADXRS453

High Performance, Digital Output Gyroscope ADXRS453 FEATURES Complete rate gyroscope on a single chip ±300°/sec angular rate sensing Ultrahigh vibration rejection: 0.01°/sec/g Excellent 16°/hour null bias stability Internal temperature compensation 2000 g powered shock survivability SPI digital output with 16-bit data-word Low noise and low power 3.3 V to 5 V operation −40°C to +105°C operation Ultrasmall, light, and RoHS compliant Two package options Low cost SOIC_CAV package for yaw rate (z-axis) response Innovative ceramic vertical mount package (LCC_V), which can be oriented for pitch, roll, or yaw response GENERAL DESCRIPTION The ADXRS453 is an angular rate sensor (gyroscope) intended for industrial, instrumentation, and stabilization applications in high vibration environments. An advanced, differential, quad sensor design rejects the influence of linear acceleration, enabling the ADXRS453 to offer high accuracy rate sensing in harsh environments where shock and vibration are present. The ADXRS453 uses an internal, continuous self-test architecture. The integrity of the electromechanical system is checked by applying a high frequency electrostatic force to the sense structure to generate a rate signal that can be differentiated from the baseband rate data and internally analyzed. The ADXRS453 is capable of sensing an angular rate of up to ±300°/sec. Angular rate data is presented as a 16-bit word that is part of a 32-bit SPI message. The ADXRS453 is available in a 16-lead plastic cavity SOIC (SOIC_CAV) and an SMT-compatible vertical mount package (LCC_V), and is capable of operating across a wide voltage range (3.3 V to 5 V). APPLICATIONS Rotation sensing in high vibration environments Rotation sensing for industrial and instrumentation applications High performance platform stabilization FUNCTIONAL BLOCK DIAGRAM CP5 VX HIGH VOLTAGE GENERATION ADXRS453 PDD LDO REGULATOR HV DRIVE CLOCK PHASEDIVIDER LOCKED LOOP AMPLITUDE DETECT ARITHMETIC LOGIC UNIT REGISTERS/MEMORY DVDD AVDD DECIMATION FILTER TEMPERATURE CALIBRATION BAND-PASS FILTER 12-BIT ADC DEMOD SPI INTERFACE MOSI MISO SCLK CS Z-AXIS ANGULAR RATE SENSOR Q DAQ P DAQ Q FILTER SELF-TEST CONTROL FAULT DETECTION DVSS PSS 09155-001 EEPROM AVSS Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. ADXRS453 TABLE OF CONTENTS Features .............................................................................................. 1  Applications ....................................................................................... 1  General Description ......................................................................... 1  Functional Block Diagram .............................................................. 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Absolute Maximum Ratings............................................................ 4  Thermal Resistance ...................................................................... 4  Rate Sensitive Axis ....................................................................... 4  ESD Caution .................................................................................. 4  Pin Configurations and Function Descriptions ........................... 5  Typical Performance Characteristics ............................................. 7  Theory of Operation ........................................................................ 9  Continuous Self-Test .................................................................... 9  Mechanical Performance ............................................................... 10  Noise Performance ......................................................................... 11  Applications Information .............................................................. 12  Calibrated Performance ............................................................. 12  Mechanical Considerations for Mounting .............................. 12  Application Circuits ................................................................... 12  ADXRS453 Signal Chain Timing ............................................. 13  SPI Communication Protocol ....................................................... 14  Command/Response ................................................................. 14  Device Data Latching ................................................................. 15  SPI Timing Characteristics ....................................................... 16  Command/Response Bit Definitions....................................... 17  Fault Register Bit Definitions ................................................... 18  Recommended Start-Up Sequence with CHK Bit Assertion . 20  Rate Data Format............................................................................ 21  Memory Map and Registers .......................................................... 22  Memory Map .............................................................................. 22  Memory Register Definitions ................................................... 23  Package Orientation and Layout Information ............................ 25  Solder Profile............................................................................... 27  Package Marking Codes ............................................................ 28  Outline Dimensions ....................................................................... 29  Ordering Guide .......................................................................... 30  REVISION HISTORY 1/11—Revision 0: Initial Version Rev. 0 | Page 2 of 32 ADXRS453 SPECIFICATIONS TA = TMIN to TMAX, PDD = 5 V, angular rate = 0°/sec, bandwidth = f0/200 (~77.5 Hz), ±1 g, continuous self-test on. Table 1. Parameter MEASUREMENT RANGE SENSITIVITY Nominal Sensitivity Sensitivity Tolerance Nonlinearity 1 Cross-Axis Sensitivity 2 NULL ACCURACY NOISE PERFORMANCE Rate Noise Density LOW-PASS FILTER Cutoff (−3 dB) Frequency Group Delay 3 SENSOR RESONANT FREQUENCY SHOCK AND VIBRATION IMMUNITY Sensitivity to Linear Acceleration Vibration Rectification SELF-TEST Magnitude Fault Register Threshold Sensor Data Status Threshold Frequency ST Low-Pass Filter Cutoff (−3 dB) Frequency Group Delay3 SPI COMMUNICATIONS Clock Frequency Voltage Input High Voltage Input Low Voltage Output Low Voltage Output High Pull-Up Current MEMORY REGISTERS Temperature Register Value at 45°C Scale Factor Quadrature, Self-Test, and Rate Registers Scale Factor POWER SUPPLY Supply Voltage Quiescent Supply Current Turn-On Time 1 2 Test Conditions/Comments Full-scale range See Figure 2 TA = −40°C to +105°C Best fit straight line TA = 25°C TA = −40°C to +105°C TA = 25°C TA = 105°C f0/200 f = 0 Hz Symbol FSR Min ±300 Typ Max ±400 Unit °/sec LSB/°/sec % % FSR rms % °/sec °/sec °/sec/√Hz °/sec/√Hz Hz ms kHz °/sec/g °/sec/g2 LSB LSB LSB Hz Hz ms MHz V V V V μA μA 80 −3 0.05 −3 ±0.4 ±0.5 0.015 0.023 fLP tLP f0 77.5 4 15.5 0.01 0.0002 2559 Compared to LOCSTx register data Compared to LOCSTx register data f0/32 f0/8000 52 2239 1279 fST 485 1.95 64 2879 3839 +3 +3 3.25 13 4.75 19 DC to 5 kHz See the Continuous Self-Test section 76 8.08 PDD + 0.3 PDD × 0.15 0.5 MOSI, CS, SCLK MOSI, CS, SCLK MISO, current = 3 mA MISO, current = −2 mA CS, PDD = 3.3 V, CS = PDD × 0.15 CS, PDD = 5 V, CS = PDD × 0.15 See the Memory Register Definitions section 0.85 × PDD −0.3 PDD − 0.5 60 80 200 300 0 5 LSB LSB/°C 80 PDD IDD Power-on to 0.5°/sec of final value 3.15 6.0 100 5.25 8.0 LSB/°/sec V mA ms Maximum limit is guaranteed by Analog Devices, Inc., characterization. Cross-axis sensitivity specification does not include effects due to device mounting on a printed circuit board (PCB). 3 Minimum and maximum limits are guaranteed by design. Rev. 0 | Page 3 of 32 ADXRS453 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Acceleration (Any Axis, 0.5 ms) Unpowered Powered Supply Voltage (PDD) Output Short-Circuit Duration (Any Pin to Ground) Operating Temperature Range LCC_V Package SOIC_CAV Package Storage Temperature Range LCC_V Package SOIC_CAV Package Rating 2000 g 2000 g −0.3 V to +6.0 V Indefinite RATE SENSITIVE AXIS The ADXRS453 is available in two package options. • • The SOIC_CAV package is for applications that require z-axis (yaw) rate sensing. The LCC_V (vertical mount) package is for applications that require x-axis or y-axis (pitch or roll) rate sensing and for applications that require z-axis (yaw) rate sensing. The package has leads on two faces such that it can be mounted vertically for pitch or roll sensing or horizontally for yaw sensing. RATE AXIS −55°C to +125°C −40°C to +125°C −65°C to +150°C −40°C to +150°C See Figure 2 for details. Z-AXIS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. + 16 9 SOIC PACKAGE 09155-002 RATE AXIS + LCC_V PACKAGE Figure 2. Rate Signal Increases with Clockwise Rotation THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, for a device soldered in a printed circuit board (PCB) for surface-mount packages. Table 3. Thermal Resistance Package Type 16-Lead SOIC_CAV (RG-16-1) 14-Lead Ceramic LCC_V (EY-14-1)1 1 ESD CAUTION θJA 191.5 185.5 θJC 25 23 Unit °C/W °C/W Thermal resistance of the LCC_V package is for the vertical layout, not the horizontal layout. Rev. 0 | Page 4 of 32 ADXRS453 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS DVDD RSVD RSVD CS MISO PDD PSS VX 1 2 3 4 5 6 7 8 16 15 SCLK MOSI AVDD DVSS RSVD AVSS RSVD CP5 09155-003 ADXRS453 TOP VIEW (Not to Scale) 14 13 12 11 10 9 Figure 3. Pin Configuration, 16-Lead SOIC_CAV Table 4. Pin Function Descriptions, 16-Lead SOIC_CAV Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic DVDD RSVD RSVD CS MISO PDD PSS VX CP5 RSVD AVSS RSVD DVSS AVDD MOSI SCLK Description Digital Regulated Voltage. See Figure 26 for the application circuit diagram. Reserved. This pin must be connected to DVSS. Reserved. This pin must be connected to DVSS. Chip Select. Master In/Slave Out. Supply Voltage. Switching Regulator Ground. High Voltage Switching Node. See Figure 26 for the application circuit diagram. High Voltage Supply. See Figure 26 for the application circuit diagram. Reserved. This pin must be connected to DVSS. Analog Ground. Reserved. This pin must be connected to DVSS. Digital Signal Ground. Analog Regulated Voltage. See Figure 26 for the application circuit diagram. Master Out/Slave In. SPI Clock. Rev. 0 | Page 5 of 32 ADXRS453 RSVD SCLK DVDD MISO AVDD 2 RSVD MOSI DVSS PDD 7 6 543 PSS CS 14 13 12 11 10 VX 9 8 1 2 3 4 5 6 7 MISO SCLK RSVD AVSS AVDD DVDD CP5 09155-004 8 9 10 11 12 13 RSVD CS DVSS MOSI PSS TOP VIEW (Not to Scale) PDD VX AVSS 1 14 CP5 BACK VIEW (Not to Scale) Figure 4. Pin Configuration, 14-Terminal LCC_V (Vertical Layout) Figure 5. Pin Configuration, 14-Terminal LCC_V (Horizontal Layout) Table 5. Pin Function Descriptions, 14-Terminal LCC_V Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Mnemonic AVSS AVDD MISO DVDD SCLK CP5 RSVD RSVD VX CS DVSS MOSI PSS PDD Description Analog Ground. Analog Regulated Voltage. See Figure 27 for the application circuit diagram. Master In/Slave Out. Digital Regulated Voltage. See Figure 27 for the application circuit diagram. SPI Clock. High Voltage Supply. See Figure 27 for the application circuit diagram. Reserved. This pin must be connected to DVSS. Reserved. This pin must be connected to DVSS. High Voltage Switching Node. See Figure 27 for the application circuit diagram. Chip Select. Digital Signal Ground. Master Out/Slave In. Switching Regulator Ground. Supply Voltage. Rev. 0 | Page 6 of 32 09155-005 ADXRS453 TYPICAL PERFORMANCE CHARACTERISTICS 20 18 PERCENT OF POPULATION (%) 40 35 PERCENT OF POPULATION (%) 09155-006 16 14 12 10 8 6 4 2 0 –2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0 30 25 20 15 10 5 09155-009 09155-011 09155-010 0 –2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0 ERROR (°/sec) ERROR (°/sec) Figure 6. SOIC_CAV Null Accuracy at 25°C Figure 9. LCC_V Null Accuracy at 25°C 30 30 PERCENT OF POPULATION (%) 20 PERCENT OF POPULATION (%) 25 25 20 15 15 10 10 5 5 0 –2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 09155-007 0 1.0 1.5 2.0 2.5 0.025 –2.5 –2.0 –1.5 –1.0 –3.0 –3.0 –0.5 ERROR (°/sec) ERROR (°/sec) Figure 7. SOIC_CAV Null Drift over Temperature Figure 10. LCC_V Null Drift over Temperature 25 25 PERCENT OF POPULATION (%) PERCENT OF POPULATION (%) 20 20 15 15 10 10 5 5 0.5 1.0 1.5 2.0 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5 2.5 0 0 0 0 0.005 0.010 0.015 0.020 –0.030 –0.025 –0.020 –0.015 –0.010 09155-008 CHANGE IN SENSITIVITY (%) CHANGE IN SENSITIVITY (%) Figure 8. SOIC_CAV Sensitivity Error at 25°C Figure 11. LCC_V Sensitivity Error at 25°C Rev. 0 | Page 7 of 32 –0.005 0.030 3.0 3.0 0.5 0 ADXRS453 30 45 40 PERCENT OF POPULATION (%) PERCENT OF POPULATION (%) 25 35 30 25 20 15 10 5 20 15 10 5 09155-012 –3 –2 –1 0 ERROR (%) 1 2 3 –3 –2 –1 0 ERROR (%) 1 2 3 Figure 12. SOIC_CAV Sensitivity Drift over Temperature Figure 15. LCC_V Sensitivity Drift over Temperature 1 1 ROOT ALLAN VARIANCE (°/sec) 0.1 ROOT ALLAN VARIANCE (°/sec) 0.1 0.01 0.01 0.1 1 0.001 0.01 10 0.0001 100 1000 0.1 0.00001 1 0.000001 0.01 10 0.0000001 0.001 100 09155-013 0.0000001 0.000001 0.00001 0.0001 1000 130 0.001 0.001 AVERAGING TIME (Hours) AVERAGING TIME (Hours) Figure 13. Typical Root Allan Variance at 40°C Figure 16. Typical Root Allan Variance at 105°C 3 3 2 2 NULL OUTPUT (°/sec) 1 1 0 ERROR (%) 0 –1 –1 –2 –2 09155-014 –30 –10 10 30 50 70 TEMPERATURE (°C) 90 110 130 –30 –10 10 30 50 70 TEMPERATURE (°C) 90 110 Figure 14. Null Output over Temperature, 16 Devices Soldered on PCB Figure 17. Sensitivity over Temperature, 16 Devices Soldered on PCB Rev. 0 | Page 8 of 32 09155-017 –3 –50 –3 –50 09155-016 09155-015 0 0 ADXRS453 THEORY OF OPERATION The ADXRS453 operates on the principle of a resonator gyroscope. Figure 18 shows a simplified version of one of four polysilicon sensing structures. Each sensing structure contains a dither frame that is electrostatically driven to resonance. This produces the necessary velocity element to produce a Coriolis force when the device experiences angular rate. In the SOIC_CAV package, the ADXRS453 is designed to sense a z-axis (yaw) angular rate; the LCC_V vertical mount package orients the device such that it can sense pitch or roll angular rate on the same PCB. CONTINUOUS SELF-TEST The ADXRS453 gyroscope implements a complete electromechanical self-test. An electrostatic force is applied to the gyroscope frame, resulting in a deflection of the capacitive sense fingers. This deflection is exactly equivalent to deflection that occurs as a result of external rate input. The output from the beam structure is processed by the same signal chain as a true rate output signal, providing complete coverage of both the electrical and mechanical components. The electromechanical self-test is performed continuously during operation at a rate higher than the output bandwidth of the device. The self-test routine generates equivalent positive and negative rate deflections. This information can then be filtered with no overall effect on the demodulated rate output. X Y Z RATE SIGNAL WITH CONTINUOUS SELF-TEST SIGNAL. 09155-018 SELF-TEST AMPLITUDE. INTERNALLY COMPARED TO THE SPECIFICATION TABLE LIMITS. Figure 19. Continuous Self-Test Demodulation Figure 18. Simplified Gyroscope Sensing Structure When the sensing structure is exposed to angular rate, the resulting Coriolis force couples into an outer sense frame, which contains movable fingers that are placed between fixed pickoff fingers. This forms a capacitive pickoff structure that senses Coriolis motion. The resulting signal is fed to a series of gain and demodulation stages that produce the electrical rate signal output. The quad sensor design rejects linear and angular acceleration, including external g-forces and vibration. This is achieved by mechanically coupling the four sensing structures such that external g-forces appear as common-mode signals that can be removed by the fully differential architecture implemented in the ADXRS453. The resonator requires 22.5 V (typical) for operation. Because only 5 V is typically available in most applications, a switching regulator is included on chip. The difference amplitude between the positive and negative self-test deflections is filtered to f0/8000 (~1.95 Hz) and is continuously monitored and compared to hard-coded self-test limits. If the measured amplitude exceeds these limits (listed in Table 1), one of two error conditions is asserted, depending on the magnitude of the self-test error. • For less severe self-test error magnitudes, the CST bit of the fault register is asserted. However, the status bits (ST[1:0]) in the sensor data response remain set to 01 for valid sensor data. For more severe self-test errors, the CST bit of the fault register is asserted and the status bits (ST[1:0]) in the sensor data response are set to 00 for invalid sensor data. • Table 1 lists the thresholds for both of these failure conditions. If desired, the user can access the self-test information by issuing a read command to the self-test memory register (Address 0x04). See the SPI Communication Protocol section for more information about error reporting. Rev. 0 | Page 9 of 32 09155-019 LOW FREQUENCY RATE INFORMATION. ADXRS453 MECHANICAL PERFORMANCE The ADXRS453 has excellent shock and vibration rejection. Figure 20 shows the output noise response of the ADXRS453 in a vibration free environment. Figure 21 shows the response of the same device to 15 g rms random vibration (50 Hz to 5 kHz). As shown in Figure 21, no frequencies are particularly sensitive to vibration. Response to vibration in all axes is similar. 0.1 Shock response is also excellent, as shown in Figure 22 and Figure 23. Figure 22 shows a 99 g input stimulus applied to each axis, and Figure 23 shows the typical response to this shock in each axis. Shock response of 0.01°/sec/g is apparent. 40 20 GYRO OUTPUT (°/sec/ Hz) 0 0.01 INPUT STIMULUS (g) 09155-020 –20 –40 –60 –80 –100 09155-022 09155-023 0.001 0.0001 5 50 FREQUENCY (Hz) 500 –120 0 0.05 0.10 TIME (Seconds) 0.15 0.20 Figure 20. ADXRS453 Output Noise Response with No Vibration Applied Figure 22. 99 g Shock Input 0.1 10 8 6 GYRO OUTPUT (°/sec/ Hz) GYRO OUTPUT (°/sec) 5 50 FREQUENCY (Hz) 500 09155-021 0.01 4 2 0 –2 –4 –6 –8 0.001 0.0001 –10 0 0.05 0.10 TIME (Seconds) 0.15 0.20 Figure 21. ADXRS453 Output Noise Response with 15 g RMS Random Vibration (50 Hz to 5 kHz) Applied Figure 23. Typical Output Response Due to 99 g Shock (see Figure 22) Rev. 0 | Page 10 of 32 ADXRS453 NOISE PERFORMANCE The ADXRS453 noise performance is very consistent from device to device and varies very predictably with temperature. Table 6 contains statistical noise data at three temperature points for a large population of ADXRS453 devices (more than 3000 parts from several manufacturing lots). Table 6. Statistical Noise Data Temperature −40°C +25°C +105°C Mean 0.0109 0.0149 0.0222 Noise (°/sec/√Hz) Standard Deviation 0.0012 0.0015 0.0019 Noise increases fairly linearly with temperature, as shown in Figure 24. 0.050 0.045 0.040 NOISE DENSITY (°/sec/ Hz) 0.035 0.030 0.025 0.020 0.015 0.010 0.005 0 50 TEMPERATURE (°C) 100 150 09155-024 0 –50 Figure 24. Noise Density vs. Temperature, 16 Devices Rev. 0 | Page 11 of 32 ADXRS453 APPLICATIONS INFORMATION CALIBRATED PERFORMANCE The ADXRS453 gyroscope uses internal EEPROM memory to store its temperature calibration information. The calibration information is encoded into the device during factory test. The calibration data is used to perform offset, gain, and self-test corrections over temperature. By storing this information internally, the ADXRS453 eliminates the need for the customer to perform system level temperature calibration. 1µF 1 DVDD RSVD RSVD GND 3.3V TO 5V CS MISO PDD 1µF PSS 470µH GND DIODE >24V BREAKDOWN 8 VX RSVD 100nF CP5 9 GND 09155-026 SCLK 16 MOSI 1µF AVDD DVSS RSVD AVSS MECHANICAL CONSIDERATIONS FOR MOUNTING Mount the ADXRS453 in a location close to a hard mounting point of the PCB. Mounting the ADXRS453 at an unsupported PCB location (that is, at the end of a lever or in the middle of a trampoline, as shown in Figure 25) can result in apparent measurement errors because the gyroscope is subject to the resonant vibration of the PCB. Locating the gyroscope near a hard mounting point helps to ensure that any PCB resonances at the gyroscope are above the frequency at which harmful aliasing with the internal electronics can occur. To ensure that aliased signals do not couple into the baseband measurement range, design the module so that the first system level resonance occurs at a frequency higher than 800 Hz. GYROSCOPE PCB Figure 26. Recommended Application Circuit, SOIC_CAV Package 3.3V TO 5V TOP VIEW 1 AVSS 1µF AVDD MISO 1µF DVDD SCLK 100nF DVSS CS VX RSVD GND PSS MOSI PDD 1µF 14 09155-025 CP5 GND RSVD 470µH MOUNTING POINTS Figure 25. Incorrectly Placed Gyroscope APPLICATION CIRCUITS Figure 26 and Figure 27 show the recommended application circuits for the ADXRS453 gyroscope. These application circuits provide a connection reference for the available package types. Note that DVDD, AVDD, and PDD are all individually connected to ground through 1 μF capacitors; do not connect these supplies together. In addition, an external diode and inductor must be connected for proper operation of the internal shunt regulator (see Table 7). These components allow the internal resonator drive voltage to reach its required level. Table 7. Components for ADXRS453 Application Circuits Component Inductor Diode Capacitor Capacitor Qty 1 1 3 1 Description 470 μH >24 V breakdown voltage 1 μF 100 nF GND DIODE >24V BREAKDOWN 09155-027 Figure 27. Recommended Application Circuit, LCC_V Package Rev. 0 | Page 12 of 32 ADXRS453 ADXRS453 SIGNAL CHAIN TIMING The ADXRS453 primary signal chain is shown in Figure 28. The signal chain is the series of necessary functional circuit blocks through which the rate data is generated and processed. This sequence of electromechanical elements determines how quickly the device can translate an external rate input stimulus to an SPI word that is sent to the master device. The group delay, which is a function of the filter characteristic, is the time required for the output of the low-pass filter to be within 10% of the external rate input. In Figure 28, the group delay is shown to be ~4 ms. Additional delay can be observed due to the timing of SPI transactions and the population of the rate data into the internal device registers. Figure 28 illustrates this delay through each element of the signal chain. The transfer function for the rate data LPF is given as ⎡ 1 − Z −64 ⎤ ⎢ −1 ⎥ ⎢ 1− Z ⎥ ⎦ ⎣ where: 2 T= 1 1 = f 0 16 kHz (typ) (f0 is the resonant frequency of the ADXRS453.) The transfer function for the continuous self-test LPF is given as 1 64 − (63 × Z −1 ) where: T= 16 = 1 ms (typ) f0 (f0 is the resonant frequency of the ADXRS453.) PRIMARY SIGNAL CHAIN 4ms GROUP DELAY REGISTERS/MEMORY