ADSP-21469 EZ-Board
Evaluation System Manual
TM
Revision 1.0, April 2009
Part Number
82-000221-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, SHARC, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
EZ-Board is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21469 EZ-Board is designed to be used solely in a laboratory
environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-21469 EZ-Board is currently being processed for certification
that it complies with the essential requirements of the European EMC
directive 89/336/EEC amended by 93/68/EEC and therefore carries the
“CE” mark.
The EZ-Board evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-Board boards in the protective shipping package.
CONTENTS
PREFACE
Product Overview .......................................................................... xii
Purpose of This Manual .................................................................. xv
Intended Audience .......................................................................... xv
Manual Contents ........................................................................... xvi
What’s New in This Manual ........................................................... xvi
Technical or Customer Support ..................................................... xvii
Supported Processors ..................................................................... xvii
Product Information .................................................................... xviii
Analog Devices Web Site ........................................................ xviii
VisualDSP++ Online Documentation ....................................... xix
Technical Library CD ............................................................... xix
Related Documents ................................................................... xx
Notation Conventions .................................................................... xxi
USING ADSP-21469 EZ-BOARD
Package Contents .......................................................................... 1-2
Default Configuration ................................................................... 1-3
EZ-Board Installation ................................................................... 1-5
ADSP-21469 EZ-Board Evaluation System Manual
v
CONTENTS
EZ-Board Session Startup ............................................................. 1-6
Evaluation License Restrictions ..................................................... 1-8
Memory Map ............................................................................... 1-8
DDR2 Interface ........................................................................... 1-9
Parallel Flash Memory Interface .................................................. 1-10
SPI Interface .............................................................................. 1-11
Link Port Interface ..................................................................... 1-12
Temperature Sensor Interface ...................................................... 1-13
S/PDIF Interface ........................................................................ 1-14
Audio Interface ........................................................................... 1-14
UART Interface .......................................................................... 1-16
LEDs and Push Buttons .............................................................. 1-17
JTAG Interface ........................................................................... 1-18
Land Grid Array ......................................................................... 1-20
Expansion Interface II ................................................................. 1-20
Power Measurements .................................................................. 1-21
Power-On-Self Test ..................................................................... 1-21
Example Programs ...................................................................... 1-22
Background Telemetry Channel .................................................. 1-22
Reference Design Information ..................................................... 1-23
ADSP-21469 EZ-BOARD HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
DAI Interface .......................................................................... 2-3
DPI Interface .......................................................................... 2-4
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ADSP-21469 EZ-Board Evaluation System Manual
CONTENTS
Flags and Memory Selects .............................................................. 2-6
Push Button and Switch Settings ................................................... 2-7
DAI [1–8] Enable Switch (SW1) .............................................. 2-8
DAI [9–16] Enable Switch (SW2) ............................................ 2-8
DPI [1–8] Enable Switch (SW3) .............................................. 2-9
Boot Mode Select Switch (SW4) ............................................ 2-10
DSP Clock Configuration Switch (SW5) ................................ 2-11
DAI [17–20] Enable Switch (SW7) ........................................ 2-11
Programmable Flag Push Buttons (SW8–11) .......................... 2-12
Reset Push Button (SW12) .................................................... 2-12
Asynchronous Control Enable Switch (SW13) ........................ 2-13
DPI [9–14] Enable Switch (SW14) ........................................ 2-13
Audio In1 Left Selection Switch (SW15) ................................ 2-14
Audio In1 Right Selection Switch (SW16) .............................. 2-15
Audio In2 Right Selection Switch (SW17) .............................. 2-15
Audio In2 Left Selection Switch (SW18) ................................ 2-16
JTAG Switches (SW19–22) .................................................... 2-17
Headphone Enable Switch (SW23) ........................................ 2-19
Audio Loopback Switches (SW24–25) ................................... 2-19
Jumpers ...................................................................................... 2-20
Flash WP Jumper (JP1) ......................................................... 2-21
S/PDIF Loopback Jumper (JP2) ............................................ 2-21
UART RTS/CTS Jumper (JP3) .............................................. 2-21
UART Loopback Jumper (JP4) .............................................. 2-21
ADSP-21469 EZ-Board Evaluation System Manual
vii
CONTENTS
LEDs ......................................................................................... 2-22
GPIO LEDs (LED1–8) ......................................................... 2-23
Power LED (LED9) .............................................................. 2-23
Reset LED (LED10) ............................................................. 2-23
Thermal Limit LED (LED11) ............................................... 2-24
Connectors ................................................................................. 2-25
Expansion Interface II Connector (J1) ................................... 2-26
RS-232 Connector (J2) ......................................................... 2-26
Link Port 1 Connector (J3) ................................................... 2-26
RCA Audio Connector (J4) ................................................... 2-27
RCA Audio Connector (J5) ................................................... 2-27
S/PDIF IN Connector (J6) .................................................... 2-27
S/PDIF OUT Connector (J7) ............................................... 2-27
Headphone Out Connector (J8) ............................................ 2-28
JTAG Connector (P1) ........................................................... 2-28
Expansion Interface II Connector (P2) .................................. 2-28
DMAX Land Grid Array Connectors (P5–7) ......................... 2-29
Differential In/Out Connectors (P8–9) .................................. 2-29
MLB Connector (P10) .......................................................... 2-29
Link Port 0 Connector (P12) ................................................. 2-30
VDD_DDR2 Power Connector (P13) ................................... 2-30
VDDINT Power Connector (P14) ........................................ 2-30
VDDEXT Power Connector (P15) ........................................ 2-30
Power Connector (P16) ......................................................... 2-31
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ADSP-21469 EZ-Board Evaluation System Manual
CONTENTS
Standalone Debug Agent Connector (ZP1) ............................ 2-31
ADSP-21469 EZ-BOARD BILL OF MATERIALS
ADSP-21469 EZ-BOARD SCHEMATIC
Title Page .................................................................................... B-1
Processor - DDR2 Interface .......................................................... B-2
Processor - ASYNC Interface ........................................................ B-3
Processor - DAI, DPI, Link Port Interfaces .................................. B-4
Processor - Power ......................................................................... B-5
S/PDIF, RS-232, JTAG Interfaces ................................................. B-6
Reset Circuit, Push Buttons, LEDs ............................................... B-7
Audio Page 1 ................................................................................ B-8
Audio Page 2 ................................................................................ B-9
Audio Page 3 .............................................................................. B-10
Audio Page 4 .............................................................................. B-11
Audio Page 5 .............................................................................. B-12
Audio Page 6 .............................................................................. B-13
Audio Page 7 .............................................................................. B-14
Expansion II Interface / L. A. Connectors ................................... B-15
Power ........................................................................................ B-16
INDEX
ADSP-21469 EZ-Board Evaluation System Manual
ix
CONTENTS
x
ADSP-21469 EZ-Board Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21469 EZ-Board™, Analog
Devices, Inc. evaluation system for SHARC® processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the
ADSP-21469 SHARC processors. The VisualDSP++ development environment aids advanced application code development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21469 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21469 processor from a personal computer (PC) is
achieved through a USB port or an external JTAG emulator. The USB
interface of the standalone debug agent gives unrestricted access to the
ADSP-21469 processor and evaluation board’s peripherals. Analog
ADSP-21469 EZ-Board Evaluation System Manual
xi
Product Overview
Devices JTAG emulators offer faster communication between the host PC
and target hardware. To learn more about Analog Devices emulators and
processor development tools, go to http://www.analog.com/dsp/tools/.
The ADSP-21469 EZ-Board provides example programs to demonstrate
the capabilities of the product.
ADSP-21469 EZ-Board installation is part of the VisuL The
alDSP++ installation. As an EZ-KIT Lite, an EZ-Board is a
licensed product that offers an unrestricted evaluation license for
the first 90 days. For details about evaluation license restrictions
after the 90 days, refer to “Evaluation License Restrictions” on
page 1-8 and the VisualDSP++ Installation Quick Reference Card.
Product Overview
The board features:
• Analog Devices ADSP-21469 SHARC processor
D
Core performance up to 450 MHz
D
324-pin PBGA package
D
25 MHz oscillator
D
5 Mb of internal RAM memory
• Double data rate synchronous dynamic random access memory
(DDR2)
D
Micron MT47H64M16HR-3 – 128 MB (64M x 16 bits)
D
Performance of up to 225 MHz clock rate
• Parallel flash memory
D
xii
Numonyx M29W320EB – 4 MB (4M x 8 bits)
ADSP-21469 EZ-Board Evaluation System Manual
Preface
• SPI flash memory
D
Numonyx M25P16 – 16 Mb
• Analog audio interface
D
Analog Devices AD1939 audio codec
D
Eight DAC outputs for four channels of stereo output
D
Four ADC inputs for two channels of stereo input
D
Two DB25 connectors for differential inputs/outputs
D
3.5 mm headphone jack with volume control connected to
one of the stereo outputs
D
Supports all eight DACs and four ADCs in TDM and I2S
modes at 48 KHz, 96 KHz, and 192 KHz sample rates
• Digital audio interface (S/PDIF)
• RCA phono jack output
• RCA phono jack input
• Link port interface
D
Two Samtec ERF8/ERM8 series connectors
D
Link ports performance up to 166 MHz
D
Two EZ-Boards can mate with no cables required
• Temperature monitor
D
ON Semiconductor ADM1032
D
Local and remote temperature sensing
ADSP-21469 EZ-Board Evaluation System Manual
xiii
Product Overview
• Universal asynchronous receiver/transmitter (UART)
D
ADM3202 RS-232 line driver/receiver
D
DB9 female connector
• LEDs
D
Eleven LEDs: one board reset (red), eight general-purpose
(amber), one temperature sensor LED (amber), and one
power (green)
• Push buttons
D
Five push buttons: one reset, two connected to DAI, two
connected to FLAG pins of the processor
• Expansion interface II
D
Next generation of the expansion interface design, provides
access to most of the ADSP-21469 processor signals
• Land grid array
D
Easy probing of all port pins and most asynchronous
memory interface (AMI) signals
• Other features
D
JTAG ICE 14-pin header
D
SHARC power measurement jumpers
For information about the hardware components of the EZ-Board, refer
to “ADSP-21469 EZ-Board Hardware Reference” on page 2-1.
xiv
ADSP-21469 EZ-Board Evaluation System Manual
Preface
Purpose of This Manual
The ADSP-21469 EZ-Board Evaluation System Manual provides instructions for installing the product hardware (board). The text describes
operation and configuration of the board components and provides guidelines for running your own code on the ADSP-21469 EZ-Board. Finally, a
schematic and a bill of materials are provided for reference.
The product software installation is detailed in the VisualDSP++ Installation Quick Reference Card.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual, but should supplement it with other texts
(such as the ADSP-2146x SHARC Processor Hardware Reference for
ADSP-21467/8/9 Processors and SHARC Processor Instruction Set Reference)
that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
ADSP-21469 EZ-Board Evaluation System Manual
xv
Manual Contents
Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-21469 EZ-Board” on page 1-1
Describes EZ-Board functionality from a programmer’s perspective
and provides an easy-to-access memory map.
• Chapter 2, “ADSP-21469 EZ-Board Hardware Reference” on
page 2-1
Provides information on the EZ-Board hardware components.
• Appendix A, “ADSP-21469 EZ-Board Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-Board.
• Appendix B, “ADSP-21469 EZ-Board Schematic” on page B-1
Provides the resources to allow EZ-Board board-level debugging or
to use as a reference. Appendix B is part of the online Help.
What’s New in This Manual
This is the first revision of the ADSP-21469 EZ-Board Evaluation System
Manual.
xvi
ADSP-21469 EZ-Board Evaluation System Manual
Preface
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technical_support
• E-mail tools questions to
processor.tools.support@analog.com
• E-mail processor questions to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-21462,
ADSP-21465, ADSP-21467, and ADSP-21469 SHARC embedded
processors.
ADSP-21469 EZ-Board Evaluation System Manual
xvii
Product Information
Product Information
Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
Visit MyAnalog.com to sign up. If you are a registered user, just log on.
Your user name is your e-mail address.
xviii
ADSP-21469 EZ-Board Evaluation System Manual
Preface
VisualDSP++ Online Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File
Description
.chm
Help system files and manuals in Microsoft help format
.htm or
.html
Dinkum Abridged C++ library and FLEXnet License Tools software documentation. Viewing and printing the .html files requires a browser, such as Internet
Explorer 6.0 (or higher).
.pdf
VisualDSP++ and processor manuals in PDF format. Viewing and printing the
.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
Technical Library CD
The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, VisualDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.
To order the technical library CD, go to http://www.analog.com/procesnavigate to the manuals page for your
processor, click the request CD check mark, and fill out the order form.
sors/technical_library,
ADSP-21469 EZ-Board Evaluation System Manual
xix
Product Information
Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.
Related Documents
For information on product related development software, see the following publications.
Table 1. Related Processor Publications
Title
Description
ADSP-21462/ADSP-21465/ADSP-21467/ADSP21469 SHARC Processor Preliminary Data Sheet
General functional description, pinout, and
timing of the processor.
ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors
Description of internal processor architecture and all register functions.
SHARC Processor Programming Reference
Description of all allowed processor assembly instructions.
Table 2. Related VisualDSP++ Publications
xx
Title
Description
ADSP-21469 EZ-Board Evaluation System Manual
Description of the hardware capabilities of
the evaluation system; description of how to
access these capabilities in the VisualDSP++
environment.
VisualDSP++ User’s Guide
Description of VisualDSP++ features and
usage.
VisualDSP++ Assembler and Preprocessor Manuals
Description of the assembler function and
commands.
VisualDSP++ C/C++ Complier and Library Manual for SHARC Processors
Description of the complier function and
commands for SHARC processors.
ADSP-21469 EZ-Board Evaluation System Manual
Preface
Table 2. Related VisualDSP++ Publications (Cont’d)
Title
Description
VisualDSP++ Linker and Utilities Manual
Description of the linker function and commands.
VisualDSP++ Loader and Utilities Manual
Description of the loader/splitter function
and commands.
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
ADSP-21469 EZ-Board Evaluation System Manual
xxi
Notation Conventions
Example
L
a
[
xxii
Description
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-21469 EZ-Board Evaluation System Manual
1 USING ADSP-21469
EZ-BOARD
This chapter provides specific information to assist you with development
of programs for the ADSP-21469 EZ-Board evaluation system.
The following topics are covered.
• “Package Contents” on page 1-2
• “Default Configuration” on page 1-3
• “EZ-Board Installation” on page 1-5
• “EZ-Board Session Startup” on page 1-6
• “Evaluation License Restrictions” on page 1-8
• “Memory Map” on page 1-8
• “DDR2 Interface” on page 1-9
• “Parallel Flash Memory Interface” on page 1-10
• “SPI Interface” on page 1-11
• “Link Port Interface” on page 1-12
• “Temperature Sensor Interface” on page 1-13
• “S/PDIF Interface” on page 1-14
• “Audio Interface” on page 1-14
• “UART Interface” on page 1-16
ADSP-21469 EZ-Board Evaluation System Manual
1-1
Package Contents
• “LEDs and Push Buttons” on page 1-17
• “JTAG Interface” on page 1-18
• “Land Grid Array” on page 1-20
• “Expansion Interface II” on page 1-20
• “Power Measurements” on page 1-21
• “Power-On-Self Test” on page 1-21
• “Example Programs” on page 1-22
• “Background Telemetry Channel” on page 1-22
• “Reference Design Information” on page 1-23
For information about VisualDSP++, including the boot loading, target
options, and other facilities, refer to the online Help.
For more information about the ADSP-21469 SHARC processor, see documents referred to as “Related Documents”.
Package Contents
Your ADSP-21469 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21469 EZ-Board
• VisualDSP++ Installation Quick Reference Card
1-2
ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
• CD containing:
D
VisualDSP++ software
D
ADSP-21469 EZ-Board debug software
D
USB driver files
D
Example programs
D
ADSP-21469 EZ-Board Evaluation System Manual
• Universal 5.0V DC power supply
• 3.5 mm stereo headphones
• 6-foot RCA audio cable
• 6-foot 3.5 mm/RCA x 2 Y-cable
• 3.5 mm stereo female to RCA male Y-cable
If any item is missing, contact the vendor where you purchased your
EZ-Board or contact Analog Devices, Inc.
Default Configuration
The ADSP-21469 EZ-Board board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
The EZ-Board evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
Store unused EZ-Board in the protective shipping package.
ADSP-21469 EZ-Board Evaluation System Manual
1-3
Default Configuration
When removing the EZ-Board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some
components. Figure 1-1 shows the default jumper and switch settings,
connector locations, and LEDs used in installation. Confirm that your
board is in the default configuration before using the board.
Figure 1-1. Default EZ-Board Hardware Setup
1-4
ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
EZ-Board Installation
For correct operation, install the software in the order presented in the
VisualDSP++ Installation Quick Reference Card. Substitute instructions in
step 3 with instructions in this section.
There are two options to connect the EZ-Board hardware to a personal
computer (PC) running VisualDSP++ 5.0: via an Analog Devices emulator or via a standalone debug agent module. The standalone debug agent
allows a debug agent to interface to the ADSP-21469 EZ-Board. The
standalone debug agent is shipped with the kit.
To connect the EZ-Board to a PC via an emulator:
1. Plug the 5V adaptor into connector P16 (labeled 5.0V).
2. Attach the emulator header to connector P1 (labeled JTAG) on the
back side of the EZ-Board.
To connect the EZ-Board to a PC via a standalone debug agent:
The debug agent can be used only when power is supplied from the
a wall
adaptor.
1. Attach the standalone debug agent to connectors P1 (labeled JTAG)
and ZP1 on the backside of the EZ-Board, watching for the keying
pin of P1 to connect correctly.
2. Plug the 5V adaptor into connector P16 (labeled 5.0V).
3. Plug one side of the provided USB cable into a USB connector of
the standalone debug agent. Plug the other side of the cable into
a USB port of the PC running VisualDSP++ 5.0 update 7 or later.
4. Verify that the yellow USB monitor LED on the standalone debug
agent (LED4, located on the back side of the board) is lit. This signifies that the board is communicating properly with the host PC
and ready to run VisualDSP++.
ADSP-21469 EZ-Board Evaluation System Manual
1-5
EZ-Board Session Startup
EZ-Board Session Startup
1. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start–>Programs menu. The
main window appears. Note that VisualDSP++ is not connected to
any session. Skip the rest of this step to step 2.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 3.
2. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Session from the Session List dialog box.
• From the Session menu, Connect to Target.
3. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target
processor, select ADSP-21469. Click Next.
4. The Select Connection Type page of the wizard appears on the
screen. For standalone debug agent connections, select EZ-KIT
Lite and click Next. For emulator connections, select Emulator,
and click Next.
5. The Select Platform page of the wizard appears on the screen.
For standalone debug agent connections, ensure that the selected
platform is ADSP-21469 EZ-KIT Lite via Debug Agent. For emulator connections, choose the type of emulator that is connected.
1-6
ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
Specify your own Session name for the session or accept the default
name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.
Click Next.
6. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-Board. Once connected, the main window’s title is changed to include the session
name set in step 5.
disconnect from a session, click the disconnect button
L Toor select
Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK.
ADSP-21469 EZ-Board Evaluation System Manual
1-7
Evaluation License Restrictions
Evaluation License Restrictions
The ADSP-21469 EZ-Board installation is part of the VisualDSP++
installation. The EZ-Board is a licensed product that offers an unrestricted
evaluation license for the first 90 days. Once the initial unrestricted
90-day evaluation license expires:
• VisualDSP++ restricts a connection to the ADSP-21469 EZ-Board
via the USB port of the standalone debug agent interface only.
Connections to simulators and emulation products are no longer
allowed.
• The linker restricts a user program to 27306 words of memory for
code space with no restrictions for data space.
• The EZ-Board hardware must be connected and powered up to use
VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
Memory Map
The ADSP-21469 processor has internal static random access memory
(SRAM) for instructions and data storage; see Table 1-1. The internal
memory details can be found in the ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors.
The EZ-Board includes three types of external memory: double data rate
two synchronous dynamic random access memory (DDR2 SDRAM),
serial peripheral interconnect (SPI) flash, and parallel flash. See Table 1-2.
For more information about a specific memory type, go to the respective
section in this chapter.
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
Table 1-1. Processor Internal Memory Space
Start Address
End Address
Contents
0x0000 0000
0x0003 FFFF
IOP Registers
0x0009 2000
0x0009 DFFF
BLOCK 0 RAM
0x0009 E000
0x000B 1FFF
Reserved
0x000B 2000
0x000B DFFF
BLOCK 1 RAM
0x000B E000
0x000B FFFF
Reserved
0x000C 0000
0x000C 7FFF
BLOCK 2 RAM
0x000C 8000
0x000D FFFF
Reserved
0x000E 0000
0x000E 7FFF
BLOCK 3 RAM
Table 1-2. EZ-Board External Memory Map
Start Address
End Address
Content
0x0020 0000
0x021F FFFF
DDR2 (~DDR2CS0)
0x0400 0000
0x043F FFFF
Flash memory (~MS1)
0x0800 0000
0x0800 0000
0x08FF FFFF
0x0BFF FFFF
Unused chip select (~MS2) for non-DDR2 addresses
Unused chip select (~DDR2_CS2) for DDR2 addresses
0x0C00 0000
0x0C00 0000
0x0CFF FFFF
0x0FFF FFFF
Unused chip select (~MS3) for non-DDR2 addresses
Unused chip select (~DDR2_CS3) for DDR2 addresses
DDR2 Interface
The ADSP-21469 processor connects to a 128 MB Micron
MT47H64M16HR-3 chip through the DDR2 SDRAM controller. The
DDR2 memory controller on the processor and DDR2 memory chip are
powered by an on-board 1.8V regulator. Data is transferred between the
processor and DDR2 on both the rising and falling edges of the DDR2
ADSP-21469 EZ-Board Evaluation System Manual
1-9
Parallel Flash Memory Interface
clock. The DDR2 controller on the processor can operate at a maximum
clock frequency of half the processor’s core clock. This equates to a DDR2
clock rate of 225 MHz, which is the ADSP-21469 processor limitation.
With a VisualDSP++ session running and connected to the EZ-Board via
the USB standalone debug agent, the DDR2 registers are configured automatically each time the processor is reset. The values are used whenever
DDR2 is accessed through the debugger (for example, when viewing
memory windows or loading a program).
To disable the automatic setting of the DDR2 registers, select Target
Options from the Settings menu in VisualDSP++ and uncheck Use XML
reset values. For more information on changing the reset values, refer to
the online Help.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the DDR2 interface. For more information on how to initialize the registers after a reset, search the
VisualDSP++ online Help for “reset values”.
Parallel Flash Memory Interface
The parallel flash memory interface of the ADSP-21469 EZ-Board contains a 4 MB (4M x 8 bits) Numonyx M29W320EB chip. Flash memory
connects to the 8-bit data bus and address lines 0 through 21. Chip enable
is decoded by the MS1 select line (default) through switch SW13 position 2;
see “Asynchronous Control Enable Switch (SW13)” on page 2-13. To use
the MS0 line instead of MS1 to interface to flash memory, make the respective change to SW13. The address range for flash memory is 0x0400 0000 to
0x043F FFFF.
Flash memory is pre-loaded with boot code for the power-on-self test
(POST) program. For more information, refer to “Power-On-Self Test”
on page 1-21.
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
By default, the EZ-Board boots from the 8-bit parallel flash memory. The
processor boots from flash memory if the boot mode select switch (SW4) is
set to position 2; see “Boot Mode Select Switch (SW4)” on page 2-10.
Flash memory also is preloaded with configuration flash information, such
as board revision, BOM revision, and other data.
Flash memory code can be modified. For instructions, refer to the online
Help and example program included in the EZ-Board installation
directory.
For more information about the parallel flash device, refer to the Numonyx Web site: http://www.numonyx.com/.
SPI Interface
The ADSP-21469 processor has two SPI ports which can be accessed via
the digital peripheral interface (DPI) pins.
The SPI flash memory, a 16 Mb ST M25P16 device, connects to the SPI
port of the processor and designates:
• DPI pin 5 (DPI_P5) as a chip select
• DPI pin 3 (DPI_P3) as the SPI clock
• DPI pin 1 (DPI_P1) as the master out slave in (MOSI) pin
• DPI pin 2 (DPI_P2) as the master in slave out (MISO) pin
The same SPI port and DPI pins connect to the serial flash memory and
audio codec via switch SW3. See “DPI [1–8] Enable Switch (SW3)” on
page 2-9. The DPI pins also are available on the expansion interface II.
By default, the EZ-Board boots from the 8-bit flash parallel memory. SPI
flash can be selected as the boot source by setting the boot mode select
switch (SW4) to position 1. See “Boot Mode Select Switch (SW4)” on
page 2-10.
ADSP-21469 EZ-Board Evaluation System Manual
1-11
Link Port Interface
The audio codec is set up to use DPI pin 4 as the SPI chip select. For more
information, refer to “Audio Interface” on page 1-14.
Link Port Interface
The ADSP-21469 processor has two dedicated link ports. Each link port
has a clock pin, an acknowledge pin, and eight data pins. The ports can
operate at up to 166 MHz and act as either a receiver or a transmitter. The
ports can be used to interface gluelessly to other ADSP-21469 processors
that also have the link port pins brought out.
The EZ-Board enables access to link ports 0 and 1 via connectors P12 and
J3, respectively. Two ADSP-21469 EZ-Boards can mate gluelessly via the
link port connectors. The processors can communicate via the link ports,
all while performing independent tasks on each of the EZ-Boards. To
loopback the link port connectors on one EZ-Board or connect three or
more EZ-Boards, obtain a standard, off the shelf connector from Samtec.
For more information, see “Link Port 0 Connector (P12)” on page 2-30.
The EZ-Board design enables a multi-processor JTAG session using connectors J3 and P12. Two or more EZ-Boards can connect via the link ports
and JTAG interfaces and run in a single multi-processor debug session
using VisualDSP++. For more information, see “JTAG Interface” on
page 1-18.
By default, the EZ-Board boots from the 8-bit flash parallel memory. Link
port 0 can be selected as the boot source by setting the boot mode select
switch (SW4) to position 4. See “Boot Mode Select Switch (SW4)” on
page 2-10.
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
Temperature Sensor Interface
Two external pins (THD_P and THD_M) of the processor are connected to an
internal thermal diode. The EZ-Board uses ON Semiconductor’s
ADM1032 digital thermometer and under/over temperature alarm to
monitor the processor’s temperature as well as the thermal diode that
exists inside the ADM1032 device. The device uses the I2C bus, DPI pins,
and flag pins to communicate to the processor. The following DPI and
flag pins are used by the processor and temperature sensing monitor.
• DPI pin 8 (DPI_P8) as the serial clock signal (SCK)
• DPI pin 7 (DPI_P7) as the serial data signal (SDA)
• Flag 3 as the IRQ (not used by default)
• Flag 0 as the thermal limit (not used by default)
The two DPI pins are required; the pins are connected to the temperature
sensing monitor via a switch (SW3) and can be shut off if the pins are used
on the expansion II interface. The thermal limit flag is connected to a
LED (LED11) for a visual alarm if the limit is exceeded. The thermal limit
flag and ADM1032 IRQ connect to the flag pins of the processor, but are
nonessential for communications. Consequently, SW13 has both flag pins
defaulted in the OFF position.
See “DPI [1–8] Enable Switch (SW3)” on page 2-9 and “Asynchronous
Control Enable Switch (SW13)” on page 2-13 for more information.
Example programs are included in the EZ-Board installation directory to
demonstrate sensor operations.
ADSP-21469 EZ-Board Evaluation System Manual
1-13
S/PDIF Interface
S/PDIF Interface
The ADSP-21469 processor has a built-in S/PDIF transmitter and
receiver for digital audio applications. The EZ-Board supports the S/PDIF
interface and brings out both the transmitter and receiver via RCA connectors J4 and J5, respectively. The S/PDIF’s in and out pins are
connected by DAI pins via switches SW1 and SW7:
• DAI pin 1 (DAI_P1) as SPDIF_OUT
• DAI pin 18 (DPI_P18) as SPDIF_IN
and SW7 can be turned off to disconnect the DAI pins from the RCA
connectors if the pins are used on the expansion II interface. See “DAI [1–
8] Enable Switch (SW1)” on page 2-8 and “DAI [17–20] Enable Switch
(SW7)” on page 2-11 for more information.
SW1
Audio Interface
The AD1939 device is a high-performance, single-chip codec featuring
eight digital-to-analog converters (DACs) for audio output and four analog-to-digital converters (ADCs) for audio input. This translates to four
stereo channels of audio out and two stereo channels of audio in.
The codec can input and output data at a sample rate of up to 192 kHz on
all channels.
The analog audio channels are available via single-ended RCA connectors
(J4 and J5) or differential DB25 connectors (P8 and P9). By default, the
EZ-Board is shipped with the RCA connectors used by the AD1939 codec
for audio in and out. To use the differential connectors, change DIP
switches SW15–18. A standard, off the shelf DB25 connector to XLR cables
is required to operate in this mode.
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
For more information, see “Audio In1 Left Selection Switch (SW15)” on
page 2-14 through “Audio In2 Left Selection Switch (SW18)” on
page 2-16, and “ADSP-21469 EZ-Board Schematic” on page B-1.
The processor interfaces with the codec via the DAI and DPI pins. The
DAI pins can be configured to transfer serial data from the codec in
Time-Division Multiplexing (TDM) or Integrated Interchip Sound (I2S)
mode. See “DAI Interface” on page 2-3 for more information about the
AD1939 connection to the DAI. The DPI interface pins can be configured to use the SPI interface of the processor to set up the codec’s control
registers. See “DPI Interface” on page 2-4 for more information about the
AD1939 connection to the DPI.
The master input clock (MCLK) of the codec is generated by the on-board
12.288 MHz oscillator. The internal PLL of the codec is used to generate
varying sample rates. The codec can be set up for 48 KHz, 96 KHz, or
192 KHz frequencies. The codec can run at these frequencies in both
TDM and I2S modes with all ADCs inputs and DACs outputs. To run
192 KHz with all ADCs and DACs in TDM mode, the codec must run in
dual-line TDM mode.
For information on how to configure the multi-channel codec, refer to the
product datasheet at
http://www.analog.com/en/audiovideo-products/audio-codecs/ad1939/products/product.html.
The EZ-Board is connected to the AD1939 codec in master mode. The
internal PLL drives the ABCLK and ALRCLK clock signals out. Both clocks
are driven back to the codec’s DBCLK and DLRCLK pins via the R257 and R258
resistors. The ABCLK and ALRCLK clocks that are driven by the codec also
connect to the processor’s serial ports via the DAI pins. Resistors R262 and
R263 are used to feed the bit clock and frame sync signals of the processor’s
serial ports. Connecting the codec in this manner enables a flexible audio
sample rate and allows the processor to run at the maximum core
frequency.
ADSP-21469 EZ-Board Evaluation System Manual
1-15
UART Interface
The audio interface also has a 3.5 mm connector (J8) for headphones. The
headphones share the output with the external DAC5 and DAC6 circuits of
the analog audio interface. Switch SW23 must be enabled for the headphones. A volume control potentiometer (R493) is used to increase or
decrease the headphone’s volume. For more information, see “Headphone
Enable Switch (SW23)” on page 2-19.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
The DAI and DPI pins going to the AD1939 device can be disabled, then
used on the expansion II interface. Refer to “DAI Interface” on page 2-3
and “DPI Interface” on page 2-4 for more information about the DAI and
DPI switches.
UART Interface
The ADSP-21469 processor features a built-in universal asynchronous
receiver and transmitter (UART). The UART interface supports full
RS-232 functionality via the Analog Devices 3.3V ADM3202 line driver
and receiver (U42). The UART signals are available on the EZ-Board via
DIP switch SW14. The UART signals are routed through a DIP switch, can
be disconnected from the respective DPI interface, and used on the expansion II interface. The following DPI pins are used for the RS-232
interface.
• DPI pin 9 (DPI_P9) as UART_TX
• DPI pin 10 (DPI_P10) as UART_RX
• DPI pin 11 (DPI_P11) as UART_RTS
• DPI pin 12 (DPI_P12) as UART_CTS
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
Example programs are included in the EZ-Board installation directory to
demonstrate UART and RS-232 operations.
For more information about the UART interface, refer to the
ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9
Processors.
LEDs and Push Buttons
The EZ-Board has eight general-purpose user LEDs connected directly to
the processor, one LED connected to the temperature sensing monitor
(ADM1032), one EZ-Board power LED, and one board reset LED. The
EZ-board also has five push buttons: four general-purpose push buttons,
connected directly to the processor, and one push button for a board reset.
Table 1-3 summarizes the LED connections to the processor. To use the
LEDs connected to the DAI or DPI interface, configure the respective registers of the processor. For more information, refer to the ADSP-2146x
SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors.
Table 1-3. LED Connections
LED Reference Designator
Processor Pin
Connected via Switch
LED1
DPI_P6
SW3.6
LED2
DPI_P13
SW14.5
LED3
DPI_P14
SW14.6
LED4
DAI_P3
SW1.3
LED5
DAI_P4
SW1.4
LED6
DAI_P15
SW2.7
LED7
DAI_P16
SW2.8
LED8
DAI_P17
SW7.1
ADSP-21469 EZ-Board Evaluation System Manual
1-17
JTAG Interface
Two general-purpose push buttons are attached to the flag pins of the processor, while the other two are attached to the DAI pins. All of the push
buttons and LEDs connect to the processor through DIP switches. The
DIP switches can disconnect the processor pins, which, in turn, connect
to the push buttons and LEDs. See the respective switch section in
“ADSP-21469 EZ-Board Hardware Reference” on page 2-1.
The state of the push buttons, connected to the flag pins, can be determined by reading the FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-3 shows the push
button and processor connections.
Table 1-4. Push Button Connections
PB Reference Designator
Processor Pin
Connected via Switch
SW8 (PB1)
FLAG1/IRQ1
SW13.4
SW9 (PB2)
FLAG2/IRQ2/MS2
SW13.5
SW10 (PB3)
DAI_P19
SW7.3
SW11 (PB4)
DAI_P20
SW7.4
An example program is included in the ADSP-21469 installation directory
to demonstrate functionality of the LEDs and push buttons.
JTAG Interface
The JTAG connector (P1) allows the standalone debug agent module to
connect a VisualDSP++ debug session to the ADSP-21469 processor. The
debug agent operates only when the external 5V wall adaptor (P16) is
used.
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
The standalone debug agent can be replaced by an external emulator, such
as the Analog Devices high-performance USB-based emulator. Be careful
not to damage the connectors when removing the debug agent. The emulator connects to P1 on the back side of the board; see “EZ-Board
Installation” on page 1-5 for more information.
The ADSP-21469 EZ-Board can be set up as a single- or multi-processor
system. By default, the board is set up in single-processor mode. In single-processor mode, create a VisualDSP++ session based on a standalone
debug agent or an external emulator. To use the EZ-Board in multi-processor mode, install an external emulator. Only one external emulator is
required for the main EZ-Board; other EZ-Boards in the JTAG chain do
not require an emulator. In this mode, create a VisualDSP++ session based
on the number of JTAG devices that are in the JTAG chain.
For a dual ADSP-21469 EZ-Board session, connect two EZ-Boards via
connectors J3 and P12. Flip one of the two EZ-Boards by 180 degrees to
allow the boards to mate. To switch between single- and multi-processor
modes, use DIP switches SW19–22. For more information, see “JTAG
Switches (SW19–22)” on page 2-17.
For three or more ADSP-21469 EZ-Board sessions, connect each of the
EZ-Board with the link port cables. The cables connect the link ports and
JTAG pins of each EZ-Board. By using the link port cables, you put the
EZ-Board in a JTAG serial chain and the ADSP-21469 processors’ link
ports in a ring. For three EZ-Boards, three link port cables are required.
Similarly, for four EZ-Boards, four link port cables are required. Note
that each respective EZ-board also requires its own power supply.
Part numbers for Samtec standard, off the shelf link port cables can be
found in “Link Port 0 Connector (P12)” on page 2-30.
For more information about emulators, contact Analog Devices or go to:
http://www.analog.com/en/embedded-processing-dsp/sharc/content/sharc_development_tools/fca.html.
ADSP-21469 EZ-Board Evaluation System Manual
1-19
Land Grid Array
Land Grid Array
The ADSP-21469 EZ-Board has provisions for probing every DAI pin,
DPI pin, and the asynchronous memory interface pins of the processor on
connectors P5–7. The connector locations are designed to be used in conjunction with a Tektronix DMAX logic analyzer connector, but can be
probed with any oscilloscope or logic analyzer. For pinout information,
refer to “ADSP-21469 EZ-Board Schematic” on page B-1.
For more information on the Tektronix DMAX logic analyzer interface,
go to the Tektronix Web site.
Expansion Interface II
The expansion interface II allows an Analog Devices EZ-Extender or a
custom-design daughter board to be tested across various hardware platforms with identical expansion interfaces.
The expansion interface II implemented on the ADSP-21469 EZ-Board
consists of two connectors: a 0.1 in. shrouded header (P2) and a Samtec
QMS series header (J1). The connectors contain a majority of the
ADSP-21469 processor’s signals.
interface is not brought out to the expansion interface
L DDR2
because the interface layout and net length is critical.
For pinout information, go to “ADSP-21469 EZ-Board Schematic” on
page B-1. The mechanical dimensions of the expansion connectors can be
obtained by contacting Technical or Customer Support.
For more information about daughter boards, visit the Analog Devices
Web site at:
http://www.analog.com/en/embedded-processing-dsp/sharc/content/sharc_development_tools/fca.html.
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ADSP-21469 EZ-Board Evaluation System Manual
Using ADSP-21469 EZ-Board
Limits to current and interface speed must be taken into consideration
when using the expansion interface II. Current for the expansion
interface II is sourced from the EZ-Board; therefore, the current should be
limited to 1A for 5V and 500 mA for the 3.3V planes. If more current is
required, then a separate power connector and a regulator must be
designed on a daughter card. Additional circuitry can add extra loading to
signals, decreasing their maximum effective speed.
Devices does not support and is not responsible for the
L Analog
effects of additional circuitry.
Power Measurements
Several locations are provided for measuring the current draw from various power planes. Precision 0.05 ohm shunt resistors are available on the
VDDINT, VDDEXT, and VDD_DDR2 voltage domains. For current
draw measuments, the associated jumper on connector P13—15 must be
removed. Once the jumper is removed, voltage across the resistor can be
measured using an oscilloscope. Once voltage is measured, current can be
calculated by dividing the voltage by 0.05. For the highest accuracy, a differential probe should be used for measuring voltage across the resistor.
For more information, see “VDD_DDR2 Power Connector (P13)” on
page 2-30, “VDDINT Power Connector (P14)” on page 2-30, and
“VDDEXT Power Connector (P15)” on page 2-30.
Power-On-Self Test
The power-on-self-test program (POST) tests all EZ-Board peripherals
and validates functionality as well as connectivity to the processor. Once
assembled, each EZ-Board is fully tested for an extended period of time
with a POST. All EZ-Boards are shipped with the POST preloaded into
one of its on-board flash memories. The POST is executed by resetting the
ADSP-21469 EZ-Board Evaluation System Manual
1-21
Example Programs
board and pressing the proper push button(s). The POST also can be used
as a reference in custom software designs or hardware troubleshooting.
Note that the source code for the POST program is included in the VisualDSP++ installation directory along with the readme text file, which
describes how the EZ-Board is configured to run a POST.
Example Programs
Example programs are provided with the ADSP-21469 EZ-Board to demonstrate various capabilities of the product. The programs are installed
with the VisualDSP++ software and can be found in the
\214xx\Examples\ADSP-21469 EZ-Board directory. Refer
to the readme file provided with each example for more information.
Background Telemetry Channel
The USB debug agent supports the background telemetry channel (BTC),
which facilitates data exchange between VisualDSP++ and the processor
without interrupting processor execution.
The BTC allows you to read and write data in real time while the processor continues to execute. For increased performance of the BTC,
including faster reading and writing, please check our latest line of processor emulators at:
http://www.analog.com/en/embedded-processing-dsp/sharc/USB-EMULATOR/products/product.html.
For more information about BTC, see the
online help.
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Using ADSP-21469 EZ-Board
Reference Design Information
A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite and EZ-Board
products.
The information can be found at:
http://www.analog.com/en/embedded-processing-dsp/sharc/processors/ez-kit-lite-design-database/recourses/index.html.
ADSP-21469 EZ-Board Evaluation System Manual
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Reference Design Information
1-24
ADSP-21469 EZ-Board Evaluation System Manual
2 ADSP-21469 EZ-BOARD
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21469 EZ-Board
board.
The following topics are covered.
• “System Architecture” on page 2-2
Describes the ADSP-21469 EZ-Board configuration and explains
how the board components interface with the processor.
• “Flags and Memory Selects” on page 2-6
Shows the locations and describes the DAI pins, DPI pins, general
purpose flags, and asynchronous memory select lines.
• “Push Button and Switch Settings” on page 2-7
Shows the locations and describes the push buttons and switches.
• “Jumpers” on page 2-20
Shows the locations and describes the configuration jumpers.
• “LEDs” on page 2-22
Shows the locations and describes the LEDs.
• “Connectors” on page 2-25
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-21469 EZ-Board Evaluation System Manual
2-1
System Architecture
System Architecture
4 MB
Flash
AMI
CLK
Link
Port 0
ADSP-21469
DSP
450 MHz
324-lead PBGA
TEMP
Sensor
(64M x 16)
ADM1032
25 MHz
Oscillator
DDR2
128 MB
DDR2
(4M x 8 )
Link
Port 1
This section describes the processor’s configuration on the EZ-Board
(Figure 2-1).
LINK
PORT
CONN
LINK
PORT
CONN
SPDIF
CIRC
DAI
JTAG
Port
I2C
SPDIF
IN
DPI
SPDIF
OUT
PBs/
LEDs
AD1939
CODEC
HP
Out
DAI
DPI
AMI
Aud
In
(4)
Head
Out
Aud
Out
(8)
Sharc Expansion
Interface II.
DAI = 0.1" Header
DPI = 0.1" Header
AMI = High Speed Conn.
SPI
Flash
16Mb
ADM3202
Stand
Alone
Debug
Agent
RS232
CONN
JTAG
CONN
5V
PWR
IN
Power
Regulation
3.3V
1.8V
1.1V
Figure 2-1. System Architecture
2-2
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
The EZ-Board is designed to demonstrate the ADSP-21469 SHARC processor capabilities. The processor has an I/O voltage of 3.3V. The core
voltage of the processor is 1.1V, and the double data rate (DDR2) voltage
is 1.8V.
The input clock is 25 MHz. The default boot mode of the processor is
external parallel flash boot. See “Boot Mode Select Switch (SW4)” on
page 2-10 for information on how to change the default boot mode.
DAI Interface
The digital application interface (DAI) pins are connected to the signal
routing unit (SRU) of the processor. The SRU is a flexible routing system
providing a large system of signal flows within the processor. The SRU
allows you to route the DAI pins to different internal peripherals in various combinations.
The DAI connects various peripherals on the EZ-Board. Table 2-1 shows
the DAI pin names, associated peripheral and net names, switch designators through which the pins connect to the peripherals, and default switch
settings.
Table 2-1. DAI Connections
DAI Pin
Peripheral
Peripheral Net
Connected via
Switch
Switch Setting
(Default)
DAI_P1
S/PDIF
SPDIF_OUT
SW1.1
ON
DAI_P2
AD1939
SOFT_RESET
SW1.2
ON
DAI_P3
LEDs
LED4
SW1.3
ON
DAI_P4
LEDs
LED5
SW1.4
ON
DAI_P5
AD1939
ASDATA1
SW1.5
ON
DAI_P6
AD1939
ASDATA2
SW1.6
ON
DAI_P7
AD1939
ABCLK
SW1.7
ON
ADSP-21469 EZ-Board Evaluation System Manual
2-3
System Architecture
Table 2-1. DAI Connections (Cont’d)
DAI Pin
Peripheral
Peripheral Net
Connected via
Switch
Switch Setting
(Default)
DAI_P8
AD1939
ALRCLK
SW1.8
ON
DAI_P9
AD1939
DSDATA4
SW2.1
ON
DAI_P10
AD1939
DSDATA3
SW2.2
ON
DAI_P11
AD1939
DSDATA2
SW2.3
ON
DAI_P12
AD1939
DSDATA1
SW2.4
ON
DAI_P13
AD1939
DBCLK
SW2.5
ON
DAI_P14
AD1939
DLRCLK
SW2.6
ON
DAI_P15
LEDs
LED6
SW2.7
ON
DAI_P16
LEDs
LED7
SW2.8
ON
DAI_P17
LEDs
LED8
SW7.1
ON
DAI_P18
S/PDIF
SPDIF_IN
SW7.2
ON
DAI_P19
Push buttons
PB3
SW7.3
ON
DAI_P20
Push buttons
PB4
SW7.4
ON
To use the DAI on the expansion II interface, disable any signal driving a
DAI pin with the associated switch. The pinout of the expansion connectors can be found in “ADSP-21469 EZ-Board Schematic” on page B-1.
DPI Interface
The digital peripheral interface (DPI) pins are connected to a second signal routing unit of the processor (SRU2). The SRU2 unit, similar to the
SRU, is a flexible routing system providing a large system of signal flows
within the processor. The SRU2 allows you to route the DPI pins to different internal peripherals in various combinations.
2-4
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ADSP-21469 EZ-Board Hardware Reference
The DPI connects various peripherals on the EZ-Board. Table 2-2 shows
the DPI pin names, associated peripheral and net names, switch designators through which the pins connect to the peripherals, and default switch
settings.
Table 2-2. DPI Connections
DPI Pin
Peripheral
Peripheral Net
Connected via
Switch
Switch Setting
(Default)
DPI_P1
SPI memory
AD1939
SPI_MOSI
SW3.1
ON
DPI_P2
SPI memory
AD1939
SPI_MISO
SW3.2
ON
DPI_P3
SPI memory
AD1939
SPI_CLK
SW3.3
ON
DPI_P4
AD1939
AD1939_CS
SW3.4
ON
DPI_P5
SPI memory
SPI_CS
SW3.5
ON
DPI_P6
LEDs
LED1
SW3.6
ON
DPI_P7
Temp sensor
TEMP_SDA
SW3.7
ON
DPI_P8
Temp sensor
TEMP_SCK
SW3.8
ON
DPI_P9
UART
UART_TX
SW14.1
ON
DPI_P10
UART
UART_RX
SW14.2
ON
DPI_P11
UART
UART_RTS
SW14.3
OFF
DPI_P12
UART
UART_CTS
SW14.4
OFF
DPI_P13
LEDs
LED2
SW14.5
ON
DPI_P14
LEDs
LED3
SW14.6
ON
To use the DPI on the expansion II interface, disable any signal driving a
DPI pin with the associated switch. The pinout of the expansion connectors can be found in “ADSP-21469 EZ-Board Schematic” on page B-1.
ADSP-21469 EZ-Board Evaluation System Manual
2-5
Flags and Memory Selects
Flags and Memory Selects
The processor has four asynchronous memory selects, four flag pins, three
interrupt request pins, and one timer expired pin. All flag/memory pins
are multi-functional and depend on the ADSP-21469 processor setup.
Table 2-3 shows the pin names, corresponding peripheral and net names,
switch designators through which the pins connect to the peripherals, and
default switch settings.
To use the flags or memory selects on the expansion II interface, disable
any signal driving a flag or memory pin with the associated switch. The
pinout of the expansion connectors can be found in “ADSP-21469
EZ-Board Schematic” on page B-1.
Table 2-3. Flags and Memory Select Connections
2-6
Flag/Memory Pin
Peripheral
Peripheral Net
Connected via
Switch
Switch
Setting
(Default)
MS0
Parallel flash memory
FLASH_CS
SW13.1
OFF
MS1
Parallel flash memory
FLASH_CS
SW13.2
ON
FLAG0/IRQ0
Temp sensor
THERMAL_LIMIT
SW13.3
OFF
FLAG1/IRQ1
Push buttons
PB1
SW13.4
ON
FLAG2/IRQ2/MS2
Push buttons
PB2
SW13.5
ON
FLAG3/TIMEXP/MS
3
Temp sensor
TEMP_IRQ
SW13.6
OFF
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
Push Button and Switch Settings
This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-2.
Figure 2-2. Push Button and Switch Locations
ADSP-21469 EZ-Board Evaluation System Manual
2-7
Push Button and Switch Settings
DAI [1–8] Enable Switch (SW1)
The DAI [1–8] enable switch (SW1) disconnects the DAI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DAI signals to be used on the expansion II interface; see
Table 2-4.
Table 2-4. DAI [1–8] Enable Switch (SW1)
SW1 Position
DAI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW1.1
DAI_P1
S/PDIF
SPDIF_OUT
ON
SW1.2
DAI_P2
AD1939
SOFT_RESET
ON
SW1.3
DAI_P3
LEDs
LED4
ON
SW1.4
DAI_P4
LEDs
LED5
ON
SW1.5
DAI_P5
AD1939
ASDATA1
ON
SW1.6
DAI_P6
AD1939
ASDATA2
ON
SW1.7
DAI_P7
AD1939
ABCLK
ON
SW1.8
DAI_P8
AD1939
ALRCLK
ON
DAI [9–16] Enable Switch (SW2)
The DAI [9–16] enable switch (SW2) disconnects the DAI pins nine
through 16 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II interface; see Table 2-5.
2-8
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ADSP-21469 EZ-Board Hardware Reference
Table 2-5. DAI [9–16] Enable Switch (SW2)
SW2 Position
DAI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW2.1
DAI_P9
AD1939
DSDATA4
ON
SW2.2
DAI_P10
AD1939
DSDATA3
ON
SW2.3
DAI_P11
AD1939
DSDATA2
ON
SW2.4
DAI_P12
AD1939
DSDATA1
ON
SW2.5
DAI_P13
AD1939
DBCLK
OFF
SW2.6
DAI_P14
AD1939
DLRCLK
OFF
SW2.7
DAI_P15
LEDs
LED6
ON
SW2.8
DAI_P16
LEDs
LED7
ON
DPI [1–8] Enable Switch (SW3)
The DPI [1–8] enable switch (SW3) disconnects the DPI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DPI signals to be used on the expansion II interface; see
Table 2-6.
Table 2-6. DPI [1–8] Enable Switch (SW3)
SW3 Position
DPI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW3.1
DPI_P1
SPI memory
AD1939
SPI_MOSI
ON
SW3.2
DPI_P2
SPI memory
AD1939
SPI_MISO
ON
SW3.3
DPI_P3
SPI memory
AD1939
SPI_CLK
ON
SW3.4
DPI_P4
AD1939
AD1939_CS
ON
SW3.5
DPI_P5
SPI memory
SPI_CS
ON
ADSP-21469 EZ-Board Evaluation System Manual
2-9
Push Button and Switch Settings
Table 2-6. DPI [1–8] Enable Switch (SW3) (Cont’d)
SW3 Position
DPI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW3.6
DPI_P6
LEDs
LED1
ON
SW3.7
DPI_P7
Temp sensor
TEMP_SDA
ON
SW3.8
DPI_P8
Temp sensor
TEMP_SCK
ON
Boot Mode Select Switch (SW4)
The boot mode select switch (SW4) determines the boot mode of the processor. Table 2-7 shows the available boot mode settings. By default, the
processor boots from the on-board parallel flash memory.
The selected position of SW4 is marked by the notch down the entire rotating portion of the switch, not the small arrow.
Table 2-7. Boot Mode Select Switch (SW4)
SW4 Position
Processor Boot Mode
0
SPI slave boot
1
Boot from SPI flash memory (SPI master boot)
2
Boot from 8 external parallel flash memory (default)
3
Reserved
4
Link port 0 boot
5
Reserved
6
Reserved
7
Reserved
2-10
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
DSP Clock Configuration Switch (SW5)
The clock configuration switch (SW5) controls the core frequency of the
processor at power up. The core to clock-in ratio is multiplied by the
25 MHz oscillator (U41) to produce the power up core frequency.
Table 2-8 shows the switch settings.
The core clock frequency can be increased or decreased via software by
writing to the PMCTL register. For more information on changing the core
clock frequency and other settings, refer to the ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors.
Table 2-8. Processor Clock Configuration Switch (SW5)
Position 1
CLKCFG0
Position 2
CLKCFG0
Clock Ratio
Core: Clock
ON
ON
Reserved
ON
OFF
32:1
OFF
ON
16:1 (Default)
OFF
OFF
6:1
DAI [17–20] Enable Switch (SW7)
The DAI [17–20] enable switch (SW7) disconnects the DAI pins 17
through 20 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II interface; see Table 2-9.
Table 2-9. DAI [17–20] Enable Switch (SW7)
SW7 Position
DAI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW7.1
DAI_P17
LEDs
LED8
ON
SW7.2
DAI_P18
S/PDIF
SPDIF_IN
ON
ADSP-21469 EZ-Board Evaluation System Manual
2-11
Push Button and Switch Settings
Table 2-9. DAI [17–20] Enable Switch (SW7) (Cont’d)
SW7 Position
DAI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW7.3
DAI_P19
Push buttons
PB3
ON
SW7.4
DAI_P20
Push buttons
PB4
ON
Programmable Flag Push Buttons (SW8–11)
Four momentary push buttons (SW8–11) are provided for general-purpose
user input. The buttons are connected to the GPIO pins of the processor.
The push buttons are active high and, when pressed, send a high (1) to the
processor. Switches SW7 and SW13 disconnect the push buttons from the
responding signals. Refer to “DAI [17–20] Enable Switch (SW7)” on
page 2-11 and “Asynchronous Control Enable Switch (SW13)” on
page 2-13 for more information.
Reset Push Button (SW12)
The reset push button (SW12) resets the following ICs:
• ADSP-21469 processor (U1)
• AD1939 audio codec (U45)
• Parallel flash memory (U18)
The reset also is linked to the expansion II interface; any daughter card
connected to the expansion interface that requires a reset can use SW12.
The reset push button does not reset the standalone debug agent once the
debug agent is connected to a personal computer (PC). After communication between the debug agent and PC is initialized, pushing a reset button
does not reset the USB chip on the debug agent. The only way to reset the
USB chip on the debug agent is to power down the EZ-Board.
2-12
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ADSP-21469 EZ-Board Hardware Reference
Asynchronous Control Enable Switch (SW13)
The asynchronous control enable switch (SW13) disconnects the control
pins of the processor from the associated peripherals on the EZ-Board
and allows the respective control signals to be used on the expansion II
interface; see Table 2-10.
Table 2-10. Asynchronous Control Enable Switch (SW13)
SW13
Position
Processor Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW13.1
MS0
Parallel flash
memory
FLASH_CS
OFF
SW13.2
MS1
Parallel flash
memory
FLASH_CS
ON
SW13.3
FLAG0/IRQ0
Temp sensor
THERMAL
LIMIT
OFF
SW13.4
FLAG1/IRQ1
Push buttons
PB1
ON
SW13.5
FLAG2/IRQ2/MS2
Push buttons
PB2
ON
SW13.6
FLAG3/TIMEXP/MS3
Temp sensor
TEMP_IRQ
OFF
DPI [9–14] Enable Switch (SW14)
The DPI [9–14] enable switch (SW14) disconnects the DPI pins nine
through 14 on the processors from the associated peripherals on the
EZ-Board and allows the DPI signals to be used on the expansion II interface; see Table 2-11.
Table 2-11. DPI [9–14] Enable Switch (SW14)
SW14
Position
DPI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW14.1
DPI_P9
UART
UART_TX
ON
SW14.2
DPI_P10
UART
UART_RX
ON
ADSP-21469 EZ-Board Evaluation System Manual
2-13
Push Button and Switch Settings
Table 2-11. DPI [9–14] Enable Switch (SW14) (Cont’d)
SW14
Position
DPI Pin
Peripheral
Peripheral Net
Switch Setting
(Default)
SW14.3
DPI_P11
UART
UART_RTS
OFF
SW14.4
DPI_P12
UART
UART_CTS
OFF
SW14.5
DPI_P13
LEDs
LED2
ON
SW14.6
DPI_P14
LEDs
LED3
ON
Audio In1 Left Selection Switch (SW15)
The audio selection switch (SW15) connects the left channel of the In1 line,
connected to the AD1939’s ADC1 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, SW15 is set up
to use the RCA connectors. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to the differential setting; see
Table 2-12. For more information, see “Differential In/Out Connectors
(P8–9)” on page 2-29.
Table 2-12. Audio In1 Left Selection Switch (SW15)
SW15 Position
Single-Ended RCA IN (Default)
Differential DB25 IN (P8)
SW15.1
ON
OFF
SW15.2
OFF
ON
SW15.3
ON
OFF
SW15.4
OFF
ON
SW15.5
ON
OFF
SW15.6
OFF
ON
2-14
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ADSP-21469 EZ-Board Hardware Reference
Audio In1 Right Selection Switch (SW16)
The audio selection switch (SW16) connects the right channel of the In1
line, connected to the AD1939’s ADC2 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting; see Table 2-13. For more information, see “Differential In/Out Connectors (P8–9)” on page 2-29.
Table 2-13. Audio In1 Right Selection Switch (SW16)
SW16 Position
Single-Ended RCA IN (Default)
Differential DB25 IN (P8)
SW16.1
ON
OFF
SW16.2
OFF
ON
SW16.3
ON
OFF
SW16.4
OFF
ON
SW16.5
ON
OFF
SW16.6
OFF
ON
Audio In2 Right Selection Switch (SW17)
The audio selection switch (SW17) connects the right channel of the In2
line, connected to the AD1939’s ADC4 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting; see Table 2-14. For more information, see “Differential In/Out Connectors (P8–9)” on page 2-29.
ADSP-21469 EZ-Board Evaluation System Manual
2-15
Push Button and Switch Settings
Table 2-14. Audio In2 Right Selection Switch (SW17)
SW17 Position
Single Ended Use RCA IN (Default)
Differential DB25 IN (P8)
SW17.1
ON
OFF
SW17.2
OFF
ON
SW17.3
ON
OFF
SW17.4
OFF
ON
SW17.5
ON
OFF
SW17.6
OFF
ON
Audio In2 Left Selection Switch (SW18)
The audio selection switch (SW18) connects the left channel of the In2 line,
connected to the AD1939’s ADC3 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, the switch is
set up to use the RCA connectors for audio in. To use the standard, off
the shelf DB25 connector to XLR cables, change the switch to the differential setting; see Table 2-15. For more information, see “Differential
In/Out Connectors (P8–9)” on page 2-29.
Table 2-15. Audio In2 Left Selection Switch (SW18)
SW18 Position
Single Ended RCA IN (Default)
Differential DB25 IN (P8)
SW18.1
ON
OFF
SW18.2
OFF
ON
SW18.3
ON
OFF
SW18.4
OFF
ON
SW18.5
ON
OFF
SW18.6
OFF
ON
2-16
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
JTAG Switches (SW19–22)
The JTAG switches (SW19–22) select between a single-processor (one
EZ-Board) and multi-processor (more than one EZ-Board) configurations. By default, the four DIP switches are set up for a single EZ-Board
configuration; see Table 2-16.
The default configuration applies to either a debug agent or an external
emulator, such as the Analog Devices high-performance USB-based emulator (HP-USB ICE for short). To use an external emulator and multiple
EZ-Boards simultaneously in one VisualDSP++ multi-processor session,
set up the boards as shown in Table 2-17. Attach the boards to each other
via connectors J3 and P12. For two EZ-Boards, no external cables are
required. For three or more EZ-Boards, obtain Samtec link port cables
described in “Link Port 1 Connector (J3)” on page 2-26 and “Link Port 0
Connector (P12)” on page 2-30.
Table 2-16. Single-Processor Configuration
Switch Position
Single EZ-Board Use (Default)
SW19.1
ON
SW19.2
OFF
SW19.3
ON
SW19.4
OFF
SW19.5
ON
SW19.6
OFF
SW19.7
ON
SW19.8
OFF
SW20.1
ON
SW20.2
OFF
SW21.1
ON
SW21.2
OFF
ADSP-21469 EZ-Board Evaluation System Manual
2-17
Push Button and Switch Settings
Table 2-16. Single-Processor Configuration (Cont’d)
Switch Position
Single EZ-Board Use (Default)
SW22.1
OFF
SW22.2
OFF
Table 2-17. Multiple-Processor Configuration
Switch Position
Main EZ-Board
Attached to Emulator
EZ-Board(s)
Not Attached to Emulator
SW19.1
ON
OFF
SW19.2
ON
ON
SW19.3
ON
OFF
SW19.4
ON
ON
SW19.5
ON
OFF
SW19.6
ON
ON
SW19.7
ON
OFF
SW19.8
ON
ON
SW20.1
ON
OFF
SW20.2
OFF
OFF
SW21.1
OFF
OFF
SW21.2
ON
ON
SW22.1
OFF
ON
SW22.2
ON
OFF
2-18
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ADSP-21469 EZ-Board Hardware Reference
Headphone Enable Switch (SW23)
The headphone enable switch (SW23) connects the AD1939’s OUT3 circuit
to the 3.5 mm headphone connector (J8). By default, the headphone
enable switch is disabled. To use the headphones, set SW23 to all ON. For
more information, see “Headphone Out Connector (J8)” on page 2-28.
Audio Loopback Switches (SW24–25)
The audio loopback switches (SW24 and SW25) are used for testing only.
The switches loop back any analog signal generated from the AD1939’s
digital-to-analog converter (DAC) circuit to analog-to-digital converter
(ADC) circuit.
ADSP-21469 EZ-Board Evaluation System Manual
2-19
Jumpers
Jumpers
This section describes functionality of the configuration jumpers.
Figure 2-2 shows the jumper locations.
Figure 2-3. Configuration Jumper Locations
2-20
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ADSP-21469 EZ-Board Hardware Reference
Flash WP Jumper (JP1)
The flash WP jumper (JP1) write-protects block 0 of the parallel flash
chip. Block 0 is located at address range 0x0400 0000–0x0400 1FFF. The
POST begins at block 0 and continues on to other blocks in flash memory. When the jumper is installed on JP1, and the parallel flash driver
from Analog Devices is used, block 0 is read-only. By default, JP1 is not
installed.
S/PDIF Loopback Jumper (JP2)
The S/PDIF loop back jumper ( JP2) is used for internal testing only. The
jumper loops back any digital audio signal from the S/PDIF’s Data Out
pin to the S/PDIF’s Data In pin. By default, JP2 is not installed.
UART RTS/CTS Jumper (JP3)
The UART RTS/CTS jumper (JP3) connects the RTS and CTS pins of the
RS-232 interface. By default, JP3 is installed.
UART Loopback Jumper (JP4)
The UART loop back jumper (JP4) is used for internal testing only. The
jumper loops back the UART receive data from the UART transmit data.
By default, JP4 is not installed.
ADSP-21469 EZ-Board Evaluation System Manual
2-21
LEDs
LEDs
This section describes the on-board LEDs. Figure 2-4 shows the LED
locations.
Figure 2-4. LED Locations
2-22
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
GPIO LEDs (LED1–8)
Eight LEDs connect to the DAI and DPI pins of the processor; see
Table 2-18. The LEDs are active high and lit by writing a ‘1’ to the correct
DAI or DPI pin.
Table 2-18. GPIO LEDs
LED Reference Designator
Processor Pin
LED1
DPI_P6
LED2
DPI_P13
LED3
DPI_14
LED4
DAI_P3
LED5
DAI_P4
LED6
DAI_P15
LED7
DAI_P16
LED8
DAI_P17
Power LED (LED9)
When LED9 is lit solid, it indicates that the board is powered.
Reset LED (LED10)
When LED10 is lit, it indicates that a master reset of all major ICs is active.
The reset LED is controlled by the Analog Devices ADM708 supervisory
reset circuit. You can assert the reset push button (SW12) to assert a master
reset and activate LED10. For more information, see “Reset Push Button
(SW12)” on page 2-12.
ADSP-21469 EZ-Board Evaluation System Manual
2-23
LEDs
Thermal Limit LED (LED11)
The thermal limit LED (LED11) reports a status of the thermal sensor,
ADM1032 (U43). The thermal sensor monitors the processor’s temperature. When the high temperature limit set by the IC is violated, LED11 is
turned on as a visual indicator. The ADM1032 has built-in hysteresis,
which causes the LED to de-activate only when the temperature is significantly within the limit. For more information, see “Temperature Sensor
Interface” on page 1-13.
2-24
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in Figure 2-5.
Figure 2-5. Connector Locations
ADSP-21469 EZ-Board Evaluation System Manual
2-25
Connectors
Expansion Interface II Connector (J1)
is a board-to-board connector providing signals from the asynchronous
memory interface (AMI) of the processor. The connector is located on the
right edge of the board. For more information, see “Expansion Interface
II” on page 1-20. For availability and pricing of the connector, contact
Samtec.
J1
Part Description
Manufacturer
Part Number
104-position 0.025”, SMT header
SAMTEC
QMS-052-06.75-L-D-A
Mating Connector
104-position 0.025”, SMT socket
SAMTEC
QFS-052-04.25-L-D-A
Part Description
Manufacturer
Part Number
DB9, female, vertical mount
NORCOMP
191-009-213-L-571
RS-232 Connector (J2)
Mating Cable
2m female-to-female cable
DIGI-KEY
AE1020-ND
Link Port 1 Connector (J3)
Part Description
Manufacturer
Part Number
ERF8 10X2, RA female
SAMTEC
ERF8-010-01-S-D-RA-L
Mating Cable
6” cable ERF8 to ERM8 10X2
2-26
SAMTEC
ERCD-010-06.00-TBL-SBR-1
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
RCA Audio Connector (J4)
Part Description
Manufacturer
Part Number
RCA 2x3
KYOYAKU ENT
WSP-256V1-09
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable
CABLESTOGO
03171
RCA Audio Connector (J5)
Part Description
Manufacturer
Part Number
RCA 2x3
KYOYAKU ENT
WSP-256V1-09
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable
CABLESTOGO
03171
S/PDIF IN Connector (J6)
Part Description
Manufacturer
Part Number
RCA 1X1
SWITCHCRAFT
PJRAN1X1U01X
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable
CABLESTOGO
03171
S/PDIF OUT Connector (J7)
Part Description
Manufacturer
Part Number
RCA 1X1
SWITCHCRAFT
PJRAN1X1U01X
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable
CABLESTOGO
ADSP-21469 EZ-Board Evaluation System Manual
03171
2-27
Connectors
Headphone Out Connector (J8)
Part Description
Manufacturer
Part Number
3.5mm stereo_jack
CUI
SJ1-3525NG
Mating Headphones (shipped with the EZ-KIT)
Stereo headphones
KOSS
151225 UR5
JTAG Connector (P1)
The P1 connector provides access to the JTAG signals of the ADSP-21469
processor. The standalone debug agent requires two connectors, P1 and
ZP1. Pin 3 is missing to provide keying. Pin 3 in the mating connector
must have a plug. For more information, see “JTAG Interface” on
page 1-18.
Remove the standalone debug agent when an emulator is used with the
EZ-Board. Follow the installation instructions provided in “EZ-Board
Installation” on page 1-5, using P1 as the JTAG connection point.
Expansion Interface II Connector (P2)
is a board-to-board connector providing signals for the DAI and DPI
interfaces and GPIO signals of the processor. The connector is located on
the right edge of the board. For more information, see “Expansion Interface II” on page 1-20. For availability and pricing of the connectors,
contact Samtec.
P2
Part Description
Manufacturer
Part Number
60-position 0.1”, SMT header
SAMTEC
TSSH-130-01-L-DV-A
Mating Connector
60-position 0.1”, SMT socket
2-28
SAMTEC
SSW-130-22-F-D-VS
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
DMAX Land Grid Array Connectors (P5–7)
The land grid array areas (P5–7) are intended for probing of the processor
signals. The pads are exposed and designed to attach a Tektronix logic
analyzer to the connectors listed in the following table. For more information about the land grid array, consult the Tektronix Web site.
Part Description
Manufacturer
Part Number
Primary retention
TEKTRONIX
020290800
Alternate retention
TEKTRONIX
020291000
Differential In/Out Connectors (P8–9)
The differential in and out connectors (P8–9) are intended for an evaluation of the AD1939 codec via XLR connectors. A standard, off the shelf
DB25 connector to XLR cables is required; the cable details can be found
in the following table.
Part Description
Manufacturer
Part Number
25-position DB25 socket
TYCO
1734350-2
Mating cables
Snake (8)XLRF-25P 9.9’
HOSA
DTF-803
Snake (8)XLRM-25P 9.9’
HOSA
DTM-803
MLB Connector (P10)
The media local bus (MLB) connector (P10) is intended for an evaluation
of the ADSP-21462 processor’s MLB interface. P10 is not available on the
ADSP-21469 EZ-Board because the ADSP-21469 processor does not support MLB.
ADSP-21469 EZ-Board Evaluation System Manual
2-29
Connectors
Link Port 0 Connector (P12)
Part Description
Manufacturer
Part Number
ERM8 10X2, RA Male
SAMTEC
ERM8-010-01-S-D-RA
Mating Cable
6” cable ERF8 to ERM8 10X2
SAMTEC
ERCD-010-06.00-TBL-SBR-1
VDD_DDR2 Power Connector (P13)
The VDD_DDR2 power connector (P13) is used to measure voltage and current supplied to the DDR2 memory interface of the processor. By default,
P13 is ON, and the power flows through the two-pin IDC header. To measure power, remove the jumper on P13 and measure voltage across the
0.1 ohm resistor. Once voltage is measured, power can be calculated. For
more information, refer to “Power Measurements” on page 1-21.
VDDINT Power Connector (P14)
The VDDINT power connector (P14) is used to measure voltage and current
supplied to the processor core. By default, P14 is ON, and the power flows
through the two-pin IDC header. To measure power, remove the jumper
on P14 and measure voltage across the 0.1 ohm resistor. Once voltage is
measured, power can be calculated. For more information, refer to “Power
Measurements” on page 1-21.
VDDEXT Power Connector (P15)
The VDDEXT power connector (P15) is used to measure the processor’s I/O
voltage and current. By default, P15 is ON, and the power flows through the
two-pin IDC header. To measure power, remove the jumper on P15 and
measure voltage across the 0.1 ohm resistor. Once voltage is measured,
power can be calculated. For more information, refer to “Power Measurements” on page 1-21.
2-30
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Hardware Reference
Power Connector (P16)
The power connector (P16) provides all of the power necessary to operate
the EZ-Board.
Part Description
Manufacturer
Part Number
0.65 mm power jack
CUI
045-0883R
Mating Power Supply (shipped with the EZ-Board and EZ-KIT)
5.0VDC@3.6A power supply
GLOBTEK
GS-1750(R)
Standalone Debug Agent Connector (ZP1)
connects the standalone debug agent to the EZ-Board. The standalone
debug agent requires two connectors, ZP1 and P1. For more information,
see “JTAG Connector (P1)” on page 2-28.
ZP1
ADSP-21469 EZ-Board Evaluation System Manual
2-31
Connectors
2-32
ADSP-21469 EZ-Board Evaluation System Manual
A ADSP-21469 EZ-BOARD BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21469 EZ-Board Schematic” on
page B-1.
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
1
1
74LVC14A
SOIC14
U14
TI
74LVC14AD
2
1
IDT74FCT3244A U17
PY SSOP20
IDT
IDT74FCT3244APYG
3
1
12.288MHZ
OSC003
U12
EPSON
SG-8002CA MP
4
1
25MHZ OSC003
U41
EPSON
SG-8002CA MP
5
3
SN74LVC1G08
SOT23-5
U48-50
TI
SN74LVC1G08DBVR
6
1
SN65LVDS2D
SOIC8
U44
NATIONAL
SEMI
DS90LV018ATM
7
1
M25P16 SO8W
U40
ST MICRO
M25P16-VMW6G
8
1
MT47H64M16
FBGA84
U2
MICRON
MT47H64M16HR-3
9
1
ADM1032
SOIC_N8
U43
ON SEMI
ADM1032ARZ
10
2
SI7601DN
ICS010
U15-16
VISHAY
SI7601DN
11
1
21469
M29W320EB
"U18"
U18
ST MICRO
M29W320EB70ZE6E
ADSP-21469 EZ-Board Evaluation System Manual
A-1
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
12
1
ADM708SARZ
SOIC8
U46
ANALOG
DEVICES
ADM708SARZ
13
1
ADM3202ARNZ
SOIC16
U42
ANALOG
DEVICES
ADM3202ARNZ
14
1
ADSP-21469
PBGA324
U1
ANALOG
DEVICES
ADSP-21469KBZ-ENG
15
2
ADP1864AUJZ
SOT23-6
VR2-3
ANALOG
DEVICES
ADP1864AUJZ-R7
16
1
ADP1710 TSOT5
VR1
ANALOG
DEVICES
ADP1710AUJZ-R7
17
1
ADP1715
MSOP8
VR4
ANALOG
DEVICES
ADP1715ARMZ-1.8-R7
18
1
AD1939 LQFP64
U45
ANALOG
DEVICES
AD1939YSTZ
19
16
AD8652ARZ
SOIC_N8
U20-26,U28-30,U3234,U36-38
ANALOG
DEVICES
AD8652ARZ
20
1
AD8397
SOIC_N8_EP
U51
ANALOG
DEVICES
AD8397ARDZ
21
1
ADM1085
SC70_6
U52
ANALOG
DEVICES
ADM1085AKSZ-REEL7
22
2
RCA 1X1
CON012
J6-7
SWITCHCRAFT
PJRAN1X1U01X
23
5
MOMENTARY
SWT013
SW8-12
PANASONIC
EVQ-PAD04M
24
4
DIP8 SWT016
SW1-3,SW19
C&K
TDA08H0SB1
25
6
DIP6 SWT017
SW13-18
CTS
218-6LPST
26
3
DIP4 SWT018
SW7,SW24-25
ITT
TDA04HOSB1
27
1
DB9 9PIN
CON038
J2
NORCOMP
191-009-213-L-571
28
5
DIP2 SWT020
SW5,SW20-23
C&K
CKN9064-ND
A-2
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
29
3
IDC 2X1
IDC2X1
P13-15
FCI
90726-402HLF
30
4
IDC 2X1
IDC2X1
JP1-4
FCI
90726-402HLF
31
3
IDC
2PIN_JUMPER_
SHORT
SJ1-3
DIGI-KEY
S9001-ND
32
1
3.5MM
STEREO_JACK
CON001
J8
DIGI-KEY
CP1-3525NG-ND
33
1
PWR .65MM
CON045
P16
CUI
045-0883R
34
1
5A RESETABLE
FUS005
F1
MOUSER
650-RGEF500
35
1
QMS 52x2
QMS52x2_SMT
J1
SAMTEC
QMS-052-06.75-L-D-A
36
1
IDC 7x2
IDC7x2_SMTA
P1
SAMTEC
TSM-107-01-T-DV-A
37
1
ROTARY
SWT027
SW4
COPAL
S-8110
38
2
RCA 2x3
CON_RCA_6B
J4-5
KYOYAKU
ENT.
WSP-256V1-09
39
1
ERM8 10X2
ERM8_10X2_SM
T
P12
SAMTEC
ERM8-010-01-S-D-RA
40
1
ERF8 10X2
ERF8_10X2_SM
T
J3
SAMTEC
ERF8-010-01-S-D-RA-L
41
2
DB25 25PIN
DB25F
P8-9
TYCO
1734350-2
42
1
IDC 30x2
IDC30X2_SMTA
P2
SAMTEC
TSSH-130-01-L-DV-A
ADSP-21469 EZ-Board Evaluation System Manual
A-3
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
43
9
YELLOW
LED001
LED1-8,LED11
PANASONIC
LN1461C
44
2
22PF 50V 5%
0805
C262-263
AVX
08055A220JAT
45
2
0.22UF 25V 10%
0805
C126-127
AVX
08053C224KAT2A
46
1
0.1UF 50V 10%
0805
C123
AVX
08055C104KAT
47
1
600 100MHZ
200MA 0603
FER5
DIGI-KEY
490-1014-2-ND
48
2
600 100MHZ
500MA 1206
FER7-8
STEWARD
HZ1206B601R-10
49
2
10UF 16V 20%
CAP002
CT59-60
PANASONIC
EEE1CA100SR
50
1
190 100MHZ 5A
FER002
FER9
MURATA
DLW5BSN191SQ2
51
8
10UF 6.3V 10%
0805
C97-98,C100-101,
C103-104,C254,
C257
AVX
08056D106KAT2A
52
2
4.7UF 6.3V 10%
0805
C240,C246
AVX
08056D475KAT2A
53
35
0.1UF 10V 10%
0402
C26-27,C53,C117120,C148,C151-152,
C160,C162,C169170,C178,C188-189,
C191,C197,C199200,C211,C213-214,
C225,C227-228,
C237,C264,C267271,C273
AVX
0402ZD104KAT2A
A-4
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
54
94
0.01UF 16V 10%
0402
C28,C30-43,C45-50,
C52,C54-96,C99,
C102,C105-116,
C121-122,C125,
C128-131,C136-142,
C266
AVX
0402YC103KAT2A
55
33
10K 1/16W 5%
0402
R99,R190,R196-200, VISHAY
R202,R205-210,R217,
R224-225,R233-239,
R256,R259-260,
R463-466,R469,R494
CRCW040210K0FKED
56
2
4.7K 1/16W 5%
0402
R185,R501
VISHAY
CRCW04024K70JNED
57
4
0 1/16W 5% 0402 R462,R485,R492,
R498
PANASONIC
ERJ-2GE0R00X
58
1
22 1/16W 5%
0402
R230
PANASONIC
ERJ-2GEJ220X
59
13
33 1/16W 5%
0402
R191-192,R201,
R203-204,R211,
R257-258,R261-263,
R495-496
VISHAY
CRCW040233R0JNEA
60
1
100UF 10V 10%
C
CT61
AVX
TPSC107K010R0075
61
2
2.2UF 10V 10%
0805
C238-239
AVX
0805ZD225KAT2A
62
1
1000PF 50V 5%
0402
C51
AVX
04025C102JAT2A
63
2
1A SK12
DO-214AA
D4-5
DIODES INC
B120B-13-F
64
1
107.0 1/10W 1%
0805
R228
DIGI-KEY
311-107CRTR-ND
65
1
249.0 1/10W 1%
0805
R227
DIGI-KEY
311-249CRTR-ND
ADSP-21469 EZ-Board Evaluation System Manual
A-5
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
66
2
0.1UF 16V 10%
0603
C255-256
AVX
0603YC104KAT2A
67
2
1UF 16V 10%
0603
C260-261
PANASONIC
ECJ-1VB1C105K
68
2
68PF 50V 5%
0603
C243,C249
AVX
06035A680JAT2A
69
2
470PF 50V 5%
0603
C242,C248
AVX
06033A471JAT2A
70
1
220UF 6.3V 20%
D2E
CT45
SANYO
10TPE220ML
71
11
330 1/10W 5%
0603
R248-255,R467-468,
R497
VISHAY
CRCW0603330RJNEA
72
2
0 1/10W 5% 0603 R452,R458
PHYCOMP
232270296001L
73
4
10 1/10W 5%
0603
R244-247
VISHAY
CRCW060310R0JNEA
74
1
10.0K 1/16W 1%
0603
R231
DALE
CRCW060310K0FKEA
75
8
237.0 1/10W 1%
0603
R267,R272,R280,
DIGI-KEY
R285,R293,R298-299,
R304
311-237HRTR-ND
76
24
49.9K 1/10W 1%
0603
R265,R271,R282,
DIGI-KEY
R284,R295,R297,
R300,R302,R310,
R336-337,R343-344,
R363-364,R369,R378,
R397-398,R403,R412,
R431-432,R437
311-49.9KHRTR-ND
77
1
75.0 1/10W 1%
0603
R229
DALE
CRCW060375R0FKEA
78
4
1UF 6.3V 20%
0402
C132-135
PANASONIC
ECJ-0EB0J105M
79
4
100 1/16W 5%
0402
R240-243
DIGI-KEY
311-100JRTR-ND
A-6
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
80
1
562.0 1/10W 1%
0603
R461
VISHAY
CRCW0603562RFKEA
81
1
390PF 25V 5%
0603
C258
AVX
06033A391FAT2A
82
1
5600PF 16V 5%
0805
C259
AVX
0805YA562JAT2A
83
1
15.0K 1/16W 1%
0603
R232
DIGI-KEY
311-15.0KHRTR-ND
84
40
4.99K 1/16W 1%
0603
R264,R273,R278-279, VISHAY
R291-292,R305-306,
R311,R313-314,R324,
R326-328,R342,
R349-350,R352-354,
R357,R366,R371,
R383-384,R386-388,
R391,R400,R405,
R417-418,R420-422,
R425,R434,R439
CRCW06034K99FKEA
85
2
24.9K 1/10W 1%
0603
R448,R454
DIGI-KEY
311-24.9KHTR-ND
86
1
31.6K 1/16W 1%
0603
R473
PANASONIC
ERJ-3EKF3162V
87
3
10UF 10V 10%
0805
C29,C161,C265
PANASONIC
ECJ-2FB1A106K
88
8
5.76K 1/16W 1%
0603
R266,R269,R277,
R281,R290,R294,
R303,R307
PANASONIC
ERJ-3EKF5761V
89
3
0.05 1/2W 1%
1206
R446,R459-460
SEI
CSF 1/2 0.05 1%R
90
3
10UF 16V 10%
1210
C244-245,C250
AVX
1210YD106KAT2A
91
1
GREEN LED001
LED9
PANASONIC
LN1361CTR
92
1
RED LED001
LED10
PANASONIC
LN1261CTR
ADSP-21469 EZ-Board Evaluation System Manual
A-7
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
93
2
1000PF 50V 5%
1206
C236,C251
AVX
12065A102JAT2A
94
1
255.0K 1/10W
1% 0603
R447
VISHAY
CRCW06032553FK
95
2
80.6K 1/10W 1%
0603
R449,R455
DIGI-KEY
311-80.6KHRCT-ND
96
3
5A
MBRS540T3G
SMC
D1-3
ON SEMI
MBRS540T3G
97
2
2.5UH 30%
IND013
L1-2
COILCRAFT
MSS1038-252NLB
98
3
1.0K 1/16W 1%
0402
R194-195,R287
PANASONIC
ERJ-2RKF1001X
99
1
8.20K 1/10W 1%
0603
R502
DIGI-KEY
541-8.20KHCT-ND
100
6
10.0K 1/16W 1%
0402
R474,R486-488,R491, DIGI-KEY
R499
541-10.0KLCT-ND
101
10
100K 1/16W 5%
0402
R475-484
DIGI-KEY
541-100KJTR-ND
102
1
30.9K 1/16W 1%
0402
R453
DIGI-KEY
541-30.9KLCT-ND
103
25
33 1/32W 5%
RNS005
RN1-14,RN18,RN22,
RN26-34
PANASONIC
EXB-28V330JX
104
4
51.1 1/16W 1%
0402
R218-221
DIGI-KEY
541-51.1LCT-ND
105
16
2.67K 1/16W 1%
0402
PANASONIC
R316,R318,R322,
R338,R367-368,R373,
R377,R401-402,R407,
R411,R435-436,R441,
R445
A-8
ERJ-2RKF2671X
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
106
31
100.0 1/16W 1%
0402
R193,R274-275,R288, DIGI-KEY
R309,R331-335,R340,
R351,R358-362,R385,
R392-396,R419,
R426-430,R489-490
541-100LCT-ND
107
2
47UF 16V 20%
ELEC_6MM
CT57-58
PANASONIC
EEE-FC1C470P
108
4
37.4K 1/16W 1%
0402
R268,R276,R289,
R308
DIGI-KEY
541-37.4KLCT-ND
109
8
1000PF 50V 5%
0402
C144,C150,C154,
C159,C164,C168,
C171,C176
DIGI-KEY
490-3244-1-ND
110
4
100pF 50V 5%
0402
C147,C155,C165,
C175
MURATA
GCM1555C1H101JZ13
D
111
8
300PF 100V 5%
0603
C143,C145,C153,
C157,C163,C173,
C177,C179
DIGI-KEY
490-1362-1-ND
112
16
2.43K 1/16W 1%
0402
R315,R319,R323,
R325,R346-347,
R374-375,R380-381,
R408-409,R414-415,
R442-443
DIGI-KEY
541-2.43KLCT-ND
113
16
750.0 1/16W 1%
0402
R317,R320-321,R341, DIGI-KEY
R345,R348,R372,
R376,R379,R382,
R406,R410,R413,
R416,R440,R444
114
16
620PF 50V 5%
0402
C181,C186-187,
C192,C194-195,
C201,C204,C208209,C215,C218,
C222-223,C229,C232
DIGI-KEY
ADSP-21469 EZ-Board Evaluation System Manual
Part Number
541-750LCT-ND
490-3239-1-ND
A-9
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
115
16
680PF 50V 5%
0402
C182-183,C185,
C193,C202-203,
C206-207,C216-217,
C220-221,C230-231,
C234-235
DIGI-KEY
490-3240-1-ND
116
4
0.036 1/2W 1%
1206
R450-451,R456-457
SUSUMU
RL1632S-R036-F
117
1
470UF 2.5V 20%
D2E
CT47
SANYO
2R5TPE470MF
118
40
22UF 6.3V 20%
ELEC_4MM
CT1,CT3,CT5-6,
CT8-11,CT14,CT16,
CT18-19,CT23-24,
CT27-28,CT31-32,
CT35-36,CT39-40,
CT43-44,CT49-56,
CT62-69
PANASONIC
EEE-FC0J220R
119
8
22UF 6.3V 20%
ELEC_5MM
C180,C184,C196,
C205,C210,C219,
C224,C233
MOUSER
647-UWP0J220MCL
120
1
5K 1/20W 20%
RES_POT_DUA
L
R493
PANASONIC
EVJ-Y15F03A53
121
4
51 1/32W 5%
RNS005
RN35-38
DIGI-KEY
EXB-28V510JX
122
9
10 1/32W 5%
RNS005
RN15-17,RN19-21,
RN23-25
PANASONIC
EXB-28V100JX
123
9
82 1/32W 5%
RNS005
RN40-48
PANASONIC
EXB-28V820JX
124
9
47PF 50V 10%
CNS001
CN1-9
TDK CORP
CKCL44C0G1H470K
125
16
6.81K 1/10W 1%
0603
R312,R329-330,R339, DIGI-KEY
R355-356,R365,R370,
R389-390,R399,R404,
R423-424,R433,R438
A-10
311-6.81KHRTR-ND
ADSP-21469 EZ-Board Evaluation System Manual
ADSP-21469 EZ-Board Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
126
1
806 1/10W 1%
0402
R286
VISHAY
CRCW0402806RFKED
127
1
30A GSOT05
SOT23-3
D6
VISHAY
GSOT05-GS08
128
2
30A GSOT03
SOT23-3
D7,D10
VISHAY
GSOT03-GS08
129
1
40A ESD5Z2.5T1
SOD-523
D8
ON SEMI
ESD5Z2.5T1G
130
1
7A
VESD01-02V-GS
08 SOD-52
D9
VISHAY
VESD01-02V-GS08
131
1
16.9K 1/16W 1%
0402
R500
VISHAY
CRCW040216K9FKED
ADSP-21469 EZ-Board Evaluation System Manual
A-11
A-12
ADSP-21469 EZ-Board Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-21469 EZ-BOARD
SCHEMATIC
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
TITLE
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-13-2009_14:36
D
1
of
16
A
B
C
D
VDD_DDR2
U1
DDR2_ADDR2_Z
DDR2_ADDR3_Z
DDR2_ADDR4_Z
1
DDR2_ADDR5_Z
DDR2_ADDR6_Z
DDR2_ADDR7_Z
DDR2_ADDR8_Z
DDR2_ADDR9_Z
DDR2_ADDR10_Z
DDR2_ADDR11_Z
DDR2_ADDR12_Z
DDR2_ADDR13_Z
DDR2_ADDR14_Z
DDR2_ADDR15_Z
DDR2_DATA1
DDR2_DATA2
DDR2_DATA3
DDR2_DATA4
DDR2_DATA5
DDR2_DATA6
DDR2_DATA7
DDR2_DATA8
DDR2_DATA9
DDR2_DATA10
DDR2_DATA11
DDR2_DATA12
DDR2_DATA13
DDR2_DATA14
DDR2_DATA15
C1
DDR2_CS0
D1
DDR2_CS1
C2
DDR2_CS2
D2
DDR2_CS3
DDR2_CS0_Z
DDR2_DQS0
DDR2_DQS0
DDR2_DQS1
DDR2_DQS1
DDR2_DM0
C18
DDR2_BA0
C17
DDR2_BA1
B18
DDR2_BA2
DDR2_BA0_Z
DDR2_BA1_Z
DDR2_BA2_Z
DDR2_DM1
DDR2_CLK0
DDR2_CLK0
DDR2_CLK1
2
DDR2_CLK1
DDR2_CKE
DDR2_CAS
DDR2_RAS
DDR2_WE
DDR2_ODT
VREF1
VREF2
B2
A2
B3
A3
B5
A5
B6
A6
B8
A8
B9
A9
A11
B11
A12
B12
A4
B4
A10
B10
C3
C11
B7
A7
DDR2_DATA0_Z
DDR2_DATA1_Z
U2
DDR2_DATA2_Z
DDR2_DATA3_Z
DDR2_ADDR0
DDR2_DATA4_Z
DDR2_ADDR1
DDR2_ADDR2
DDR2_DATA5_Z
DDR2_DATA6_Z
DDR2_ADDR3
DDR2_DATA7_Z
DDR2_ADDR4
DDR2_DATA8_Z
DDR2_ADDR5
DDR2_DATA9_Z
DDR2_ADDR6
DDR2_ADDR7
DDR2_DATA10_Z
DDR2_DATA11_Z
DDR2_ADDR8
DDR2_DATA12_Z
DDR2_ADDR9
DDR2_DATA13_Z
DDR2_ADDR10
DDR2_DATA14_Z
DDR2_ADDR11
DDR2_DATA15_Z
DDR2_ADDR12
DDR2_ADDR13
DDR2_DQS0_Z
DDR2_ADDR14
DDR2_DQS0_Z
DDR2_ADDR15
DDR2_DQS1_Z
DDR2_BA0
DDR2_DM0_Z
DDR2_BA1
DDR2_DM1_Z
DDR2_BA2
DDR2_CLK0_Z
DDR2_DM0
DDR2_CLK0_Z
DDR2_DM1
DDR2_ODT
A13
C7
C9
C10
B1
D4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
G8
DDR2_DATA0
G2
DDR2_DATA1
H7
DDR2_DATA2
H3
1
DDR2_DATA3
H1
DDR2_DATA4
H9
DDR2_DATA5
F1
DDR2_DATA6
F9
DDR2_DATA7
C8
DDR2 end of line terminators and VTT tracking circuit have been
omitted since overall trace length is less than 2.5" for each net.
DDR2_DATA8
C2
DDR2_DATA9
D7
DDR2_DATA10
D3
For a custom design, please adhere to any EE-note from ADI
and any recommendations by the memory manufacturer.
DDR2_DATA11
D1
DDR2_DATA12
D9
DDR2_DATA13
B1
DDR2_DATA14
B9
DDR2_DATA15
DDR2_DQS1_Z
B13
E1
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10/AP
P7
A11
R2
A12
R8
RFU/A13
R3
RFU/A14
R7
RFU/A15
DDR2_CKE
DDR2_CKE_Z
DDR2_CS0
DDR2_CAS_Z
DDR2_RAS
DDR2_RAS_Z
DDR2_CAS
DDR2_WE_Z
DDR2_WE
DDR2_ODT_Z
L2
BA0
L3
BA1
L1
BA2
F3
LDM
B3
UDM
K9
ODT
K2
CKE
L8
CS
K7
RAS
L7
CAS
K3
WE
MT47H64M16
FBGA84
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
DDR2_DQS0
DDR2_DQS1
DDR2_DQS1
R194
1.0K
0402
E2
NC2
VREF
C26
0.1UF
0402
J2
2
DDR2_VREF
J8
CK
VDD_DDR2
DDR2_DQS0
A2
NC1
DDR2_CLK0
K8
A7
B2GNDQ1
B8GNDQ2
D2GNDQ3
D8GNDQ4
E7GNDQ5
F2GNDQ6
F8GNDQ7
H2GNDQ8
H8GNDQ9
GNDQ10
A3
E3GND1
J3GND2
N1GND3
P9GND4
GND5
J7
GNDL
DDR2_ADDR1_Z
DDR2_DATA0
A9
VDDQ1C1
VDDQ2C3
VDDQ3C7
VDDQ4C9
VDDQ5E9
VDDQ6G1
VDDQ7G3
VDDQ8G7
VDDQ9G9
VDDQ10
A1
VDD1E1
VDD2J9
VDD3M9
VDD4R1
VDD5
J1
VDDL
D13
DDR2_ADDR0
C13
DDR2_ADDR1
D14
DDR2_ADDR2
C14
DDR2_ADDR3
B14
DDR2_ADDR4
A14
DDR2_ADDR5
D15
DDR2_ADDR6
C15
DDR2_ADDR7
B15
DDR2_ADDR8
A15
DDR2_ADDR9
D16
DDR2_ADDR10
C16
DDR2_ADDR11
B16
DDR2_ADDR12
A16
DDR2_ADDR13
B17
DDR2_ADDR14
A17
DDR2_ADDR15
DDR2_ADDR0_Z
CK
R195
1.0K
0402
C27
0.1UF
0402
R193
100.0
0402
DDR2_VREF
DDR2_CLK0
D11
ADSP-21469
PBGA324
RN3
DDR2_ADDR2_Z
DDR2_ADDR3_Z
DDR2_ADDR0_Z
DDR2_ADDR1_Z
3
DDR2_ADDR5_Z
DDR2_ADDR4_Z
DDR2_ADDR7_Z
DDR2_ADDR6_Z
DDR2_ADDR10_Z
DDR2_ADDR11_Z
DDR2_ADDR8_Z
DDR2_ADDR9_Z
DDR2_ADDR13_Z
DDR2_ADDR12_Z
DDR2_ADDR15_Z
DDR2_ADDR14_Z
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR2_ADDR2
DDR2_ADDR3
DDR2_ADDR0
DDR2_ADDR1
DDR2_DATA3_Z
DDR2_DATA2_Z
DDR2_DATA1_Z
DDR2_DATA0_Z
DDR2_BA0_Z
DDR2_BA1_Z
R1B
R2B
R3B
R4B
8
DDR2_DATA3
7
DDR2_DATA2
6
DDR2_DQS0_Z
DDR2_DATA1
5
DDR2_DATA0
DDR2_DQS0_Z
1
R1A
2
R2A
3
R3A
4
R4A
33
RNS005
33
RNS005
RN4
RN8
RN13
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR2_ADDR5
DDR2_DATA6_Z
DDR2_ADDR4
DDR2_DATA7_Z
DDR2_ADDR7
DDR2_DATA4_Z
DDR2_ADDR6
DDR2_DATA5_Z
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
DDR2_DATA6
7
DDR2_DQS1_Z
DDR2_DATA7
6
DDR2_DATA4
5
DDR2_DQS1_Z
DDR2_DATA5
1
R1A
2
R2A
3
R3A
4
R4A
33
RNS005
33
RNS005
33
RNS005
RN5
RN9
RN12
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR2_ADDR10
DDR2_DATA10_Z
DDR2_ADDR11
DDR2_DATA11_Z
DDR2_ADDR8
DDR2_DATA8_Z
DDR2_ADDR9
DDR2_DATA9_Z
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
DDR2_DATA10
7
DDR2_CLK0_Z
DDR2_DATA11
6
DDR2_DATA8
5
DDR2_CLK0_Z
DDR2_DATA9
1
R1A
2
R2A
3
R3A
4
R4A
33
RNS005
33
RNS005
33
RNS005
RN6
RN10
RN11
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR2_ADDR13
DDR2_DATA12_Z
DDR2_ADDR12
DDR2_DATA13_Z
DDR2_ADDR15
DDR2_DATA14_Z
DDR2_ADDR14
DDR2_DATA15_Z
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
DDR2_DATA12
7
6
5
DDR2_CAS_Z
DDR2_DATA13
DDR2_RAS_Z
DDR2_DATA14
DDR2_WE_Z
DDR2_DATA15
R191
33
0402
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
DDR2_BA2
DDR2_DM0_Z
DDR2_DM0
5
DDR2_BA1
DDR2_DM1_Z
DDR2_CKE_Z
DDR2_CS0_Z
R192
33
0402
DDR2_BA0
R2B
R3B
R4B
8
7
DDR2_DQS0
6
5
VDD_DDR2
DDR2_DQS0
C28
0.01UF
0402
R1B
R2B
R3B
R4B
8
DDR2_ODT_Z
DDR2_DM1
33
RNS005
1
R1A
2
R2A
3
R3A
4
R4A
B
C31
0.01UF
0402
C32
0.01UF
0402
C33
0.01UF
0402
C34
0.01UF
0402
C35
0.01UF
0402
C36
0.01UF
0402
C42
0.01UF
0402
C41
0.01UF
0402
C40
0.01UF
0402
C39
0.01UF
0402
3
7
6
DDR2_DQS1
5
VDD_DDR2
R1B
R2B
R3B
R4B
R1B
R2B
R3B
R4B
8
DDR2_CLK0
7
6
C29
10UF
0805
DDR2_CLK0
R1B
R2B
R3B
R4B
C43
0.01UF
0402
C37
0.01UF
0402
C38
0.01UF
0402
5
8
7
6
DDR2_CAS
DDR2_RAS
DDR2_WE
5
ANALOG
DEVICES
8
7
6
DDR2_CKE
DDR2_ODT
Size
5
Board No.
C
Date
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
DSP - DDR2 INTERFACE
Title
DDR2_CS0
33
RNS005
A
C30
0.01UF
0402
DDR2_DQS1
RN2
7
6
1
R1A
2
R2A
3
R3A
4
R4A
R1B
33
RNS005
33
RNS005
RN1
DDR2_BA2_Z
1
R1A
2
R2A
3
R3A
4
R4A
33
RNS005
33
RNS005
4
RN14
RN7
Rev
A0221-2008
0.2
Sheet
3-31-2009_10:10
D
2
of
16
A
B
C
RN24
U1
U16
ADDR1_Z
T16
ADDR2_Z
V15
ADDR4_Z
U15
ADDR5_Z
ADDR14_Z
R13
ADDR15_Z
V12
ADDR16_Z
U12
ADDR17_Z
T12
ADDR18_Z
V11
ADDR20_Z
U11
ADDR21_Z
J2
BOOT_CFG0
J3
BOOT_CFG1
H3
BOOT_CFG2
AMI_ADDR14
FLAG0/IRQ0
AMI_ADDR15
FLAG1/IRQ1
AMI_ADDR16
FLAG2/IRQ2/AMI_MS2
AMI_ADDR17
FLAG3/TIMEXP/AMI_MS3
MLBCLK
AMI_ADDR19
MLBDAT
AMI_ADDR20
MLBSIG
AMI_ADDR21
MLBD0
G1
G2
CLK_CFG1
2
M1
RESET
L1
DSP_CLKIN
DATA5_Z
R4B
ADDR7_Z
MS0_Z
ADDR5_Z
MS1_Z
ADDR4_Z
J4
EMU
BOOT_CFG0
R10
R8
V7
U7
TRST
BOOT_CFG1
TCK
BOOT_CFG2
TDI
CLK_CFG0
TDO
CLK_CFG1
THD_P
THD_M
CLKOUT
R4B
RN21
R1B
R2B
R3B
R4B
8
7
6
5
ADDR7
DATA7_Z
ADDR6
DATA6_Z
ADDR5
DATA5_Z
1
R1A
R2A
R2B
3
R3A
R3B
4
R4A
DATA4_Z
ADDR4
R1B
2
R4B
RN15
RN23
FLAG0/IRQ0_Z
ADDR8_Z
FLAG1/IRQ1_Z
ADDR9_Z
33
1
R1A
2
R2A
3
R3A
ADDR10_Z
4
R4A
ADDR11_Z
DATA2
5
MLBSIG_Z
R2A
ADDR14_Z
R462
0402
N15
0
EMU
3
R3A
4
R4A
ADDR12_Z
TRST
K15
TDI
R203
0402
33
TDO
2
R2A
3
R3A
ADDR18_Z
N11
TEMP_PLUS
4
R4A
ADDR19_Z
N12
R1A
8
7
6
5
DATA7
MS1
DATA6
FLAG0/IRQ0
DATA5
FLAG1/IRQ1
FLAG2/IRQ2/MS2
DATA4
R2A
R3A
R3B
4
RD_Z
ADDR11
R1B
R2B
R3B
R4B
8
R4A
7
6
5
ADDR15
1
FLAG3/TIMEXP/MS3_Z
R4B
WR
ADDR14
FLAG2/IRQ2/MS2_Z
ADDR13
FLAG1/IRQ1_Z
ADDR12
FLAG0/IRQ0_Z
3
4
R1B
R2B
R3B
R4B
8
7
6
5
1
MLBDO_Z
ADDR16
ADDR17
MLBSO_Z
ADDR18
MLBSIG_Z
3
4
MLBDAT_Z
ADDR19
3
10
33
10
RNS005
DSP_CLKOUT
1
ADDR23_Z
XTAL PIN TEST POINT
DO NOT POPULATE C44
R1A
2
R2A
ADDR22_Z
3
R3A
ADDR21_Z
3.3V
4
R4A
ADDR20_Z
R1B
R2B
R3B
R4B
8
8
7
3
4
5
6
7
MLBSIG
MLBDAT
8
9
4
9
5
8
3
5
4
C1B
C2A
C2B
C3A
C3B
C4A
C4B
8
7
6
5
6
7
1
PB1
PB2
TEMP_IRQ
U18
6
ADDR2
MS1
ADDR3
MS0
5
7
6
5
ADDR22
ADDR21
RD
ADDR5
ADDR7
R2A
R2B
R3A
R3B
R4A
R4B
8
FLAG3/TIMEXP/MS3
7
C46
0.01UF
0402
FLAG2/IRQ2/MS2
6
5
ADDR10
FLAG1/IRQ1
ADDR11
FLAG0/IRQ0
ADDR12
ADDR13
ADDR14
ADDR15
R1B
R2A
R2B
R3A
R3B
R4A
R4B
8
7
6
MLBDO
ADDR16
MLBSO
ADDR17
MLBSIG
5
3.3V
MLBDAT
ADDR20
ADDR21
R217
10K
0402
1
OE
RESET
R206
10K
0402
TP1
RDY/BSY
FLASH_CS
R201
33
0402
4
VDD
ADDR18
ADDR19
3.3V
DSP OSC
ADDR20
10
RNS005
MLB NOT SUPPORTED ON 21469 DSP
P10 UNPOPULATED BY DEFAULT
P10 CAN BE USED WITH A 21462 DSP
ADDR9
C47
0.01UF
0402
3.3V
R202
10K
0402
E1
A0
D1
A1
C1
A2
A1
A3
B1
A4
D2
A5
C2
A6
A2
A7
B5
A8
A5
A9
C5
A10
D5
A11
B6
A12
A6
A13
C6
A14
D6
A15
E6
A16
B2
A17
C3
A18
D4
A19
D3
A20
ADDR4
3.3V
3
OUT
C45
0.01UF
0402
DSP_CLKIN
RD
WR
WP
JP1
GND
25MHZ 2
OSC003
1
2
OSC
JP1 DEFAULT: OFF
C48
0.01UF
0402
MLBDO
MLB_DEVICE
5X2_2MM
DNP
CN2
RN41
E2
D0
DATA0
H2
D1
DATA1
E3
D2
DATA2
H3
D3
DATA3
H4
D4
DATA4
E4
D5
DATA5
H5
D6
DATA6
E5
D7
DATA7
F2
D8
G2
D9
F3
D10
G3
D11
F4
D12
G5
D13
F5
D14
G6
D15/A-1
ADDR0
2
C4
NC
B4
RESET
F6
BYTE
A3
RY/BY~
F1
CE
G1
OE
A4
WE
B3
VPP/WP~
IDC2X1
MLBSO
10
6
C1A
3.3V
WR
3.3V
U41
MLBCLK
R4B
2
TEMP_THERM
33
RNS005
ADDR23
P10
2
R3B
1
7
FLASH_CS
ADDR6
R1B
R1A
2
11
RN19
1
R2B
8
82
RNS005
12
2
ADDR8
R1A
2
1
TEMP_MINUS
R204
0402
MS1
R1B
DIP6
SWT017
R2B
3
MS0_Z
ADDR10
FLAG3/TIMEXP/MS3
R1B
2
RN22
R1A
ADDR17_Z
MS1_Z
RN17
1
ADDR16_Z
5
WR_Z
ADDR9
33
RNS005
TMS
L15
R4B
6
ADDR8
10
RNS005
TCK
K16
R3B
7
RN18
2
MLBDO_Z
R2B
1
RN16
R1A
ADDR15_Z
R1B
8
10
RNS005
1
MLBSO_Z
L4
RD
SW13: ASYNC CONTROL ENABLE
DEFAULT: OFF ON OFF ON ON OFF
DATA3
ADDR1
10
RNS005
MLBCLK
MLBDAT_Z
L3
1
R1A
2
R2A
3
R3A
4
R4A
MS0
6
MS0
ACK
ADSP-21469
PBGA324
C44
0.1UF
0402
DNP
R4A
10
RNS005
R211
0402
L2
M2
4
RN25
XTAL
CLKIN
R3B
10
RNS005
FLAG3/TIMEXP/MS3_Z
K4
M15
DATA3_Z
R3A
WR_Z
FLAG2/IRQ2/MS2_Z
T7
K2
ADDR3
3
CN1
RN46
DATA1
RD_Z
V10
K3
DATA2_Z
R2B
10
RNS005
1
R1A
2
R2A
3
R3A
4
R4A
ADDR6_Z
U10
5
ADDR2
R2A
DATA0
7
SW13
DATA7_Z
T10
6
DATA1_Z
10
RNS005
DATA6_Z
ADDR13_Z
RESET
K1
R4A
4
DATA4_Z
AMI_ADDR23
TMS
CLK_CFG0
ADDR3_Z
R3B
AMI_ADDR13
AMI_ADDR22
R11
ADDR23_Z
AMI_ACK
MLBSO
T11
ADDR22_Z
AMI_ADDR12
AMI_ADDR18
R12
ADDR19_Z
AMI_WR
DATA3_Z
R3A
3
ADDR1
2
8
ON
T13
AMI_ADDR11
ADDR2_Z
R2B
R1B
6
U13
ADDR13_Z
AM_RD
DATA2_Z
R2A
7
R1A
DATA0_Z
ADDR0
5
V13
ADDR12_Z
AMI_ADDR9
AMI_ADDR10
R14
ADDR11_Z
AMI_MS0
AMI_MS1
T14
ADDR10_Z
AMI_ADDR8
ADDR1_Z
2
R1B
4
U14
ADDR9_Z
AMI_ADDR7
DATA1_Z
R1A
3
1
AMI_ADDR5
ADDR0_Z
1
2
V14
ADDR8_Z
AMI_ADDR4
AMI_ADDR6
R15
ADDR7_Z
AMI_ADDR3
DATA0_Z
RN20
8
1
T15
ADDR6_Z
AMI_ADDR1
AMI_ADDR2
R16
ADDR3_Z
AMI_ADDR0
1
H1
H6GND1
GND2
ADDR0_Z
U18
AMI_DATA0
T18
AMI_DATA1
R18
AMI_DATA2
P18
AMI_DATA3
V17
AMI_DATA4
U17
AMI_DATA5
T17
AMI_DATA6
R17
AMI_DATA7
G4
VDD
V16
D
M29W320EB
TFBGA48
R205
10K
0402
CN6
RN45
3.3V
ADDR1
ADDR3
3
C
SW4
1
2
0
6
BOOT_CFG0
ADDR0
2
4
7
ADDR2
1
3
1
2
3
R1A
R1B
R2A
R2B
R3A
4
R4A
R3B
R4B
8
7
6
5
1
C1A
2
C2A
3
C3A
4
C4A
C1B
C2B
C3B
C4B
8
7
6
5
ADDR18
ADDR19
ADDR16
ADDR17
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
1
C1A
2
C2A
3
C3A
4
C4A
8
7
6
5
C1B
C2B
C3B
C4B
8
7
3.3V
6
3
5
3.3V
BOOT_CFG1
4
82
RNS005
82
RNS005
BOOT_CFG2
5
3.3V
R210
10K
0402
SWT027
ROTARY
CN3
RN42
R198
10K
0402
R197
10K
0402
R196
10K
0402
ADDR7
ADDR6
SW4: BOOT MODE SELECT
POSITION
BOOT MODE
0
1
2
4
3,5,6 or 7
SPI Slave Boot
SPI Master Boot
AMI Boot (Parallel Flash)
Link Port 0 Boot
Reserved
3.3V
ADDR5
ADDR4
1
2
3
4
2
DIP2
SWT020
4
R200
10K
0402
R199
10K
0402
ON
1
2
CLK_CFG1
R2A
R2B
R3A
R3B
R4A
DEFAULT
R4B
8
7
6
5
1
C1A
2
C2A
3
C3A
4
C4A
C1B
C2B
C3B
C4B
8
7
6
5
ADDR22
ADDR20
ADDR23
ADDR21
1
2
3
4
ADDR11
ADDR9
ADDR10
1
R1A
2
3
4
R1B
R2A
R2B
R3A
R3B
R4A
CN4
R4B
1
C1A
2
C2A
3
C3A
4
C4A
8
7
6
5
C1B
C2B
C3B
C4B
R1B
R2A
R2B
R3A
R3B
R4A
R4B
8
7
6
5
1
C1A
2
C2A
3
C3A
4
C4A
C1B
C2B
C3B
C4B
8
7
6
5
DATA3
DATA1
DATA2
DATA0
1
R1A
2
U43
7
6
5
3
4
TEMP_SDA
R2A
R2B
R3A
R3B
R4A
R4B
1
C1A
2
C2A
3
C3A
4
C4A
7
6
5
C1B
C2B
C3B
C4B
SW5: DSP CLOCK CONFIG
1
2
CLOCK RATIO
CLKCFG0 CLKCFG1
CORE:CLKIN
ON
ON
Reserved
ON
OFF
32:1
OFF
ON
16:1
OFF
OFF
6:1
ADDR12
ADDR14
ADDR13
ADDR15
DEFAULT
1
R1A
2
3
4
R1B
R2A
R2B
R3A
R3B
R4A
82
RNS005
R4B
8
7
6
5
1
C1A
2
C2A
3
C3A
4
C4A
C1B
C2B
C3B
C4B
7
6
5
DATA4
DATA6
DATA7
DATA5
1
R1A
2
3
4
R1B
R2A
R2B
R3A
R3B
R4A
4
THERM
D_PLUS
R4B
1
C1A
2
C2A
3
C3A
4
C4A
8
7
6
5
82
RNS005
C1B
C2B
C3B
C4B
D_MINUS
ANALOG
DEVICES
8
7
6
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
DSP - ASYNC INTERFACE
Title
5
Size
C
C49
0.01UF
0402
5
Board No.
C
B
TEMP_THERM
3
6
Date
A
2
TEMP_IRQ
7
CN9
RN47
8
6
ALERT
SI
8
3
CN5
3.3V
7
GND
ADM1032 5
SOIC_N8
82
RNS005
RN44
SCK
TEMP_SCK
CN8
8
1
VCC
R208
10K
0402
8
TEMP_MINUS
R1B
R207
10K
0402
8
TEMP_PLUS
RN48
82
RNS005
4
R1A
82
RNS005
RN43
SW5
1
R1B
CN7
RN40
82
RNS005
ADDR8
CLK_CFG0
R1A
R209
10K
0402
Rev
A0221-2008
0.2
Sheet
4-14-2009_10:36
D
3
of
16
A
B
C
D
RN26
U1
R6
DAI_P1
V5
DAI_P2
R7
DAI_P3
R3
DAI_P4
U5
DAI_P5
T5
DAI_P6
V6
DAI_P7
V2
DAI_P8
R5
DAI_P9
V4
DAI_P10
U4
DAI_P11
T4
DAI_P12
U6
DAI_P13
U2
DAI_P14
R4
DAI_P15
V3
DAI_P16
U3
DAI_P17
T3
DAI_P18
T6
DAI_P19
T2
DAI_P20
DAI_P1_Z
DAI_P2_Z
DAI_P3_Z
DAI_P4_Z
DAI_P5_Z
DAI_P6_Z
1
DAI_P7_Z
DAI_P8_Z
DAI_P9_Z
DAI_P10_Z
DAI_P11_Z
DAI_P12_Z
DAI_P13_Z
DAI_P14_Z
DAI_P15_Z
DAI_P16_Z
DAI_P17_Z
DAI_P18_Z
DAI_P19_Z
DAI_P20_Z
LCLK_0
LACK_0
R219
0402
R220
0402
51.1
J18
51.1
K17
DPI_P1
DPI_P2
DPI_P3
DPI_P4
DPI_P5
DPI_P6
DPI_P7
DPI_P8
DPI_P9
DPI_P10
DPI_P11
DPI_P12
DPI_P13
DPI_P14
LCLK_1
LACK_1
LDAT1_0
LDAT0_0
F17
LDAT1_1
LDAT0_1
F18
LDAT1_2
LDAT0_2
G17
LDAT0_3_Z
LDAT1_3
LDAT0_3
G18
LDAT0_4_Z
LDAT1_4
LDAT0_4
H16
LDAT0_5_Z
LDAT1_5
LDAT0_5
H17
LDAT0_6_Z
LDAT1_6
LDAT0_6
J16
LDAT0_7_Z
U1
T1
R1
DPI_P3_Z
DPI_P2_Z
DPI_P4_Z
DPI_P3_Z
DPI_P1_Z
DPI_P5_Z
DPI_P7_Z
P4
DPI_P6_Z
DPI_P8_Z
N1
DPI_P7_Z
DPI_P9_Z
N2
DPI_P8_Z
DPI_P10_Z
N3
DPI_P9_Z
DPI_P14_Z
LDAT1_7
LDAT0_7
L16
L17
L18
M16
M17
N16
P16
R218
0402
R221
0402
51.1
51.1
DPI_P13_Z
LCLK_1
DPI_P14_Z
LACK_1
R3B
R4A
R4B
5
DPI_P3
DAI_P2_Z
DPI_P4
DAI_P3_Z
DPI_P1
DAI_P4_Z
R2B
R3B
R4B
7
6
5
DAI_P1
LDAT0_3_Z
DAI_P2
LDAT0_2_Z
DAI_P3
LDAT0_1_Z
DAI_P4
LDAT0_0_Z
R1B
R2A
R2B
3
R3A
R3B
4
R4A
R4B
8
DPI_P5
7
DPI_P6
6
DPI_P7
5
DPI_P8
1
R1A
2
R2A
3
R3A
4
R4A
DAI_P8_Z
DAI_P7_Z
DAI_P6_Z
DAI_P5_Z
R1B
R2B
R3B
R4B
8
7
6
5
DAI_P8
DAI_P7
LDAT0_6_Z
DAI_P6
LDAT0_5_Z
DAI_P5
LDAT0_4_Z
RN32
RN36
1
R1A
R1B
2
R2A
R2B
3
R3A
R3B
4
R4A
R4B
8
DPI_P9
7
6
5
DPI_P10
DAI_P10_Z
DPI_P11
DAI_P11_Z
DPI_P12
1
R1A
2
R2A
3
R3A
4
R4A
DAI_P9_Z
DAI_P12_Z
R1B
R2B
R3B
R4B
8
7
6
5
DAI_P9
DAI_P10
LDAT1_2_Z
DAI_P11
LDAT1_1_Z
DAI_P12
LDAT1_0_Z
RN33
RN35
1
R1A
R1B
2
R2A
R2B
R3B
4
R4A
R4B
8
DPI_P13
7
DPI_P14
6
1
R1A
2
R2A
3
R3A
4
R4A
DAI_P16_Z
DAI_P15_Z
DAI_P14_Z
5
DAI_P13_Z
R1B
R2B
R3B
R4B
8
7
6
5
DAI_P16
DAI_P15
LDAT1_6_Z
DAI_P14
LDAT1_5_Z
DAI_P13
LDAT1_4_Z
33
RNS005
33
RNS005
LDAT1_5_Z
DAI_P17_Z
LDAT1_6_Z
DAI_P20_Z
LDAT1_7_Z
DAI_P19_Z
R1B
R2B
R3B
R4B
8
7
6
5
DAI_P19
DPI_P8
DAI_P5
TEMP_SDA
TEMP_SCK
R466
10K
0402
DAI_P13
UART_TX
DAI_P15
UART_RX
DAI_P16
ABCLK
ALRCLK
4
13
5
12
6
11
7
10
8
9
DSDATA4
DSDATA3
3
DSDATA2
DSDATA1
DBCLK
DLRCLK
LED6
LED7
DIP8
SWT016
UART_CTS
LED2
SW7: DPI [17-20] ENABLE
DEFAULT: ALL ON
LED3
SW7
NOTE: SHUTTING OFF DIP SWITCHES SW1, SW2, SW3
DAI_P17
SW7, OR SW14 ALLOWS A USER TO USE THESE DAI OR
DAI_P18
DPI PINS VIA THE EXPANSION II INTERFACE.
GND
4
DAI_P19
DAI_P20
3.3V
1
8
2
7
3
6
4
5
LED8
SPDIF_IN
PB3
PB4
DIP4
SWT018
ANALOG
DEVICES
C50
0.01UF
0402
R465
10K
0402
Size
Date
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
DSP - DAI, DPI, LINK PORT INTERFACES
Board No.
C
B
14
UART_RTS
Title
A
3
ON
LCLK_0
ON
LACK_0
19
DAI_P12
DAI_P14
R223
10K
0402
DNP
LDAT0_0
17
DAI_P11
4
M25P16
SO8W
LDAT0_1
15
15
3
LDAT0_2
13
ASDATA2
16
2
2
SCK
1
CS
3
WP
7
HOLD
LDAT0_3
11
ASDATA1
6
LDAT0_4
9
LED5
SW2
1
1
SPI_CS
LED4
SW2: DPI [9-16] ENABLE
DEFAULT: ALL ON EXCEPT POS. 5 & 6 OFF
LED1
DIP6
SWT017
SPI_MISO
AD1939_SOFT_RESET
SPI_CS
8
LDAT0_5
LINKPORT_EDGE_M
ERM8_10X2_SMT
4
AD1939_CS
7
CLK
SPI_CLK
7
9
6
ACK
7
LDAT0_6
6
8
5
D0
5
SI
8
10
4
D1
3
2
SO
5
SPI_MOSI
ON
DA_SOFT_RESET
D2
LDAT0_7
DPI_P14
10
9
6
TRST_LINKPORT
D3
1
8
VCC
11
5
5
TMS_LINKPORT
EMU_LINKPORT
U40
12
7
SPDIF_OUT
DIP8
SWT016
DAI_P9
4
4
P12
DPI_P13
3
3
LINK PORT 0 / JTAG OUT
R222
10K
0402
DNP
R224
10K
0402
2
2
R225
10K
0402
1
DPI_P10
DPI_P12
D4
DAI_P8
SW14
1
11
3
3.3V
6
2
R464
10K
0402
12
SPI_CLK
SW14: DPI [9-14] ENABLE
DEFAULT: ALL ON EXCEPT POS 3 & 4 OFF
DPI_P11
D5
9
SPI_MISO
DAI_P10
3.3V
TDO_OUT
8
DAI_P7
LCLK_1
DPI_P9
D6
10
DAI_P6
SPI_MOSI
DIP8
SWT016
3.3V
D7
7
5
1
19
R463
10K
0402
2
MSC1
4
GND1
6
MSC2
8
GND2
10
MSC3
12
MSC4
14
MSC5
16
MSC6
18
GND3
20
GND4
11
LACK_1
LINKPORT_EDGE_F
ERF8_10X2_SMT
TCK_LINKPORT
6
13
8
LDAT1_0
12
4
7
DPI_P7
5
ON
DAI_P4
6
LDAT1_1
13
14
5
DPI_P6
4
3
4
DPI_P5
LDAT1_2
16
15
3
DAI_P3
16
2
2
LDAT1_3
1
DPI_P4
ON
17
LDAT1_4
SW1
1
DAI_P2
14
8
CLK
15
LDAT1_4
3
7
ACK
13
DPI_P3
6
D0
11
R4B
DAI_P1
15
5
D1
9
LDAT1_5
2
4
3
D2
7
DPI_P2
3
DA_SOFT_RESET_LINKPORT
D3
5
LDAT1_6
1
2
TRST_LINKPORT
D4
DPI_P1
LDAT1_7
1
TMS_LINKPORT
EMU_LINKPORT
D5
LDAT1_5
5
DAI_P18
SW3
TDO_IN
LDAT1_6
6
R3B
SW1: DAI [1-8] ENABLE
DEFAULT: ALL ON
DAI_P20
SW3: DPI [1-8] ENABLE
DEFAULT: ALL ON
3
R2B
DAI_P17
J3
D6
LDAT1_7
7
2
1
R1A
2
R2A
3
R3A
4
R4A
DAI_P18_Z
1
8
R1B
RN34
LDAT1_4_Z
LINK PORT 1 / JTAG IN
D7
LDAT1_0
51
RNS005
33
RNS005
2
MSC1
4
GND1
6
MSC2
8
GND2
10
MSC3
12
MSC4
14
MSC5
16
MSC6
18
GND3
20
GND4
1
R1A
2
R2A
3
R3A
4
R4A
LDAT1_7_Z
LDAT1_1
5
R4B
RN29
LDAT1_2
6
R3B
51
RNS005
LDAT1_3
7
R2B
33
RNS005
LDAT0_4
8
R1B
33
RNS005
ADSP-21469
PBGA324
TCK_LINKPORT
1
R1A
2
R2A
3
R3A
4
R4A
LDAT1_3_Z
LDAT0_5
5
R4B
RN28
LDAT0_6
6
R3B
1
LDAT0_7
7
R2B
51
RNS005
LDAT0_0
8
R1B
33
RNS005
LDAT0_1
5
R4B
33
RNS005
LDAT0_2
6
R3B
1
R1A
2
R2A
3
R3A
4
R4A
LDAT0_7_Z
LDAT0_3
7
R2B
RN37
R1A
8
R1B
RN31
2
LDAT1_3_Z
R1B
1
R1A
2
R2A
3
R3A
4
R4A
RN27
1
LDAT1_2_Z
6
DAI_P1_Z
8
51
RNS005
R3A
LDAT1_1_Z
7
DPI_P2
RN38
1
R1A
2
R2A
3
R3A
4
R4A
33
RNS005
3
LDAT1_0_Z
8
33
RNS005
DPI_P13_Z
M4
K18
R3A
4
DPI_P12_Z
M3
R2B
3
DPI_P11_Z
N4
P17
R2A
DPI_P6_Z
P3
RN30
R1B
2
DPI_P5_Z
P2
N18
R1A
DPI_P4_Z
P1
DPI_P12_Z
LACK_0
LDAT0_2_Z
DPI_P1_Z
DPI_P11_Z
E18
LDAT0_1_Z
R2
DPI_P10_Z
LCLK_0
LDAT0_0_Z
2
DPI_P2_Z
1
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:34
D
4
of
16
A
B
VDD_DDR2
C
VDDINT
U1
C12
D3
D6
D8
D18
E2
1
E4
E7
E10
E11
E17
F3
F5
F15
G14
VDDEXT
G16
D12
VDD_DDR2_1
VDD_INT1
VDD_DDR2_2
VDD_INT2
E6
E8
VDD_DDR2_3
VDD_INT3
VDD_DDR2_4
VDD_INT4
VDD_DDR2_5
VDD_INT5
E9
E14
E15
VDD_DDR2_6
VDD_INT6
VDD_DDR2_7
VDD_INT7
F6
F7
VDD_DDR2_8
VDD_INT8
VDD_DDR2_9
VDD_INT9
VDD_DDR2_10
VDD_INT10
F8
F9
F10
VDD_DDR2_11
VDD_INT11
VDD_DDR2_12
VDD_INT12
F11
F12
VDD_DDR2_13
VDD_INT13
VDD_DDR2_14
VDD_INT14
VDD_DDR2_15
VDD_INT15
F13
G6
G13
VDD_DDR2_16
VDD_INT16
VDD_DDR2_17
VDD_INT17
H5
H6
H15
H18
J5
J15
K14
L5
M14
M18
N5
P6
2
P8
P10
P12
P14
P15
V8
U8
T8
V9
VDDINT
U9
T9
FER5
600
0603
H1
H2
C53
0.1UF
0402
C52
0.01UF
0402
C51
1000PF
0402
VDD_INT18
VDD_EXT1
H13
VDD_INT19
VDD_EXT2
H14
VDD_INT20
VDD_EXT3
J6
VDD_INT21
VDD_EXT4
J13
VDD_INT22
VDD_EXT5
K6
VDD_INT23
VDD_EXT6
K13
VDD_INT24
VDD_EXT7
L6
VDD_INT25
VDD_EXT8
L13
VDD_INT26
VDD_EXT9
M6
VDD_INT27
VDD_EXT10
M13
VDD_INT28
VDD_EXT11
N6
VDD_INT29
VDD_EXT12
N7
VDD_INT30
VDD_EXT13
N8
VDD_INT31
VDD_EXT14
N9
VDD_INT32
VDDEXT
VDD_EXT15
N13
VDD_INT33
VDD_EXT16
VDD_THD
VDD_EXT17
N10
VDD_EXT18
C116
0.01UF
0402
VDD_EXT19
VDD_EXT20
VDDINT
J11
A1
VSS1
A18
VSS2
C4
VSS3
C6
VSS4
C8
VSS5
D5
VSS6
D7
VSS7
D9
VSS8
D10
VSS9
D17
VSS10
E3
VSS11
E5
VSS12
E12
VSS13
E13
VSS14
E16
VSS15
F2
VSS16
F4
VSS17
F14
VSS18
F16
VSS19
G7
VSS20
G8
VSS21
G9
VSS22
G10
VSS23
G11
VSS24
G12
VSS25
G15
VSS26
H4
VSS27
H7
VSS28
H8
VSS29
H9
VSS30
H10
VSS31
H11
VSS32
H12
VSS33
J1
VSS34
J7
VSS35
J8
VSS36
J9
VSS37
J10
VSS38
U1
C5
D
VSS39
J12
VSS40
J14
VSS41
J17
VSS42
C87
0.01UF
0402
K5
VSS43
C86
0.01UF
0402
C71
0.01UF
0402
C70
0.01UF
0402
C69
0.01UF
0402
C68
0.01UF
0402
C67
0.01UF
0402
C66
0.01UF
0402
C65
0.01UF
0402
C72
0.01UF
0402
C102
0.01UF
0402
K7
VSS44
K8
VSS45
K9
VSS46
1
K10
VSS47
K11
VSS48
K12
VSS49
L7
VSS50
L8
VSS51
L9
VSS52
VDDINT
L10
VSS53
L11
VSS54
L12
VSS55
L14
VSS56
C64
0.01UF
0402
M5
VSS57
C63
0.01UF
0402
C62
0.01UF
0402
C61
0.01UF
0402
C60
0.01UF
0402
C59
0.01UF
0402
C58
0.01UF
0402
C91
0.01UF
0402
C57
0.01UF
0402
C73
0.01UF
0402
C56
0.01UF
0402
M7
VSS58
M8
VSS59
M9
VSS60
M10
VSS61
M11
VSS62
M12
VSS63
N14
VSS64
N17
VSS65
P5
VDDINT
VSS66
P7
VDDINT
VSS67
2
P9
VSS68
P11
VSS69
P13
VSS70
V1
C88
0.01UF
0402
VSS71
V18
VSS72
C55
0.01UF
0402
C54
0.01UF
0402
C96
0.01UF
0402
C90
0.01UF
0402
C89
0.01UF
0402
C94
0.01UF
0402
C95
0.01UF
0402
C93
0.01UF
0402
C97
10UF
0805
C92
0.01UF
0402
C98
10UF
0805
F1
VSS73
G3
VSS74
G4
VSS75
G5
VSS76
R9
VSS77
VDD_EXT21
ADSP-21469
PBGA324
VDD_A
VSS_A
ADSP-21469
PBGA324
VDDEXT
3
VDDEXT
C79
0.01UF
0402
C78
0.01UF
0402
C77
0.01UF
0402
C76
0.01UF
0402
C75
0.01UF
0402
C85
0.01UF
0402
C74
0.01UF
0402
C84
0.01UF
0402
C99
0.01UF
0402
C83
0.01UF
0402
3
VDDEXT
C82
0.01UF
0402
C81
0.01UF
0402
C80
0.01UF
0402
C100
10UF
0805
C101
10UF
0805
VDD_DDR2
VDD_DDR2
C113
0.01UF
0402
C114
0.01UF
0402
C115
0.01UF
0402
C105
0.01UF
0402
C111
0.01UF
0402
C112
0.01UF
0402
C107
0.01UF
0402
C106
0.01UF
0402
C108
0.01UF
0402
C109
0.01UF
0402
C110
0.01UF
0402
C104
10UF
0805
C103
10UF
0805
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
DSP - POWER
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-19-2009_12:57
D
5
of
16
A
B
C
D
3.3V
3.3V
1
SPDIF
COAX
INPUT
SERIAL PORT
R232
15.0K
0603
J7
C126
0.22UF
0805
CON012
2
3.3V
C121
0.01UF
0402
SPDIF_COAX_IN
R229
75.0
0603
1
C127
0.22UF
0805
1
U44
1
RIN-
7
2
RIN+
U42
6
NC1
C118
0.1UF
0402
1
C1+
3
C1-
SPDIF_IN
ROUT
3
R231
10.0K
0603
8
VCC
C119
0.1UF
0402
R230
22
0402
2
ADM3202
5
NC2
1
V+
NC3
4
J2
GND
C117
0.1UF
0402
LOOPBACK HEADER
FOR TESTING PURPOSES ONLY
JP2 DEFAULT: OFF
SN65LVDS2D
SOIC8
SPDIF_COAX_OUT
2
11
14
T1IN
T1OUT
10
7
T2IN
T2OUT
12
13
R1OUT
R1IN
9
8
R2OUT
R2IN
ADM3202ARNZ
SOIC16
UART_TX
UART_CTS
1
UART_RX
2
IDC2X1
6
V-
7
JP2
SPDIF_COAX_IN
6
4
C2+
5
C2-
3.3V
3.3V
UART_RTS
3.3V
TX_OUT
3
8
RX_IN
4
9
5
C120
0.1UF
0402
CON038
JP3
1
J6
1
SPDIF_OUT
C123
0.1UF
0805
U48
R227
249.0
0805
CON012
4
SPDIF
COAX
OUT
SPDIF_COAX_OUT 2
2
SN74LVC1G08
SOT23-5
2
1
C125
0.01UF
0402
C122
0.01UF
0402
C124
0.01UF
0402
DNP
2
IDC2X1
JP4
JP3 DEFAULT: ON
4
2
TX_OUT
1
R228
107.0
0805
U47
1
RX_IN
IDC2X1
65LVDS2D
SN74LVC1G08
2
LOOPBACK HEADER
FOR TESTING PURPOSES ONLY
JP4 DEFAULT: OFF
SN74LVC1G08
2
SN74LVC1G08
SOT23-5
DNP
ON
15
3
14
4
13
5
12
5
TMS
11
6
6
ON
OFF
7
10
8
9
7
TCK
8
SW22.1
SW22.2
16
2
4
SW21.1
SW21.2
SW19
1
TRST
EMU
ON
OFF
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
3.3V
JTAG SWITCHES
3
3
3.3V
2
SW20.1
SW20.2
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
1
SINGLE PROCESSOR JTAG SETTINGS
VIA HP-USB EMUALTOR OR DEBUG AGENT (DEFAULT)
BOARD ATTACHED
SWITCH
TO EMULATOR
SW19.1
ON
SW19.2
OFF
SW19.3
ON
SW19.4
OFF
SW19.5
ON
SW19.6
OFF
SW19.7
ON
SW19.8
OFF
OFF
OFF
TRST_LOCAL
TRST_LINKPORT
R99
10K
0402
R190
10K
0402
"JTAG"
EMU_LOCAL
EMU_LINKPORT
P1
1
2
TMS_LOCAL
3
4
TMS_LINKPORT
5
6
TCK_LOCAL
7
8
TCK_LINKPORT
9
10
11
12
13
14
DIP8
SWT016
EMU_LOCAL
3
TMS_LOCAL
TCK_LOCAL
5V
3.3V
DA_PWR
VDD_EXT_DSP
TRST_LOCAL
TDI_LOCAL
TDO_LOCAL
IDC7X2_SMTA
4
3
TDI_LOCAL
DA_SOFT_RESET_LINKPORT
RESET
DIP2
SWT020
R185
4.7K
0402
DA_SOFT_RESET
RESET
DA_SOFT_RESET
DA_STANDALONE
SW21
1
ON
1
TDO
3
2
2
4
TDO_LOCAL
TDO_OUT
DIP2
SWT020
SW22
ON
2
2
TDO_LOCAL
1
1
TDI
4
TDO_IN
3
TDO_IN
ANALOG
DEVICES
DIP2
SWT020
SW20.1
SW20.2
ON
OFF
OFF
OFF
SW21.1
SW21.2
OFF
ON
OFF
ON
Title
SW22.1
SW22.2
OFF
ON
ON
OFF
Size
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
SPDIF, RS-232, JTAG INTERFACES
Board No.
C
Date
A
GND
ON
2
DA_SOFT_RESET
2
4
SW20
1
TDI
1
MULTI PROCESSOR JTAG SETTINGS VIA HP-USB EMUALTOR
USING TWO OR MORE EZ-BOARDS (LINK PORT CABLES
REQUIRED FOR MORE THAN TWO BOARDS)
BOARD ATTACHED BOARD(S) NOT ATTACHED
SWITCH
TO EMULATOR
TO EMULATOR
SW19.1
ON
OFF
SW19.2
ON
ON
SW19.3
ON
OFF
SW19.4
ON
ON
SW19.5
ON
OFF
SW19.6
ON
ON
SW19.7
ON
OFF
SW19.8
ON
ON
Rev
A0221-2008
0.2
Sheet
4-1-2009_17:04
D
6
of
16
A
B
C
D
3.3V
DSP PIN
COMPONENT CONNECTED TO
PB1
FLAG1/IRQ1
FLAG2/IRQ2/MS2
PB2
DAI_P19
PB3
DAI_P20
PB4
R233
10K
0402
LABEL "PB1"
R240
100
0402
R244
10
0603
U14
1
1
SW8
MOMENTARY
SWT013
2
PB1
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
74LVC14A
SOIC14
C132
1UF
0402
CONNECTED
VIA SWITCH
SW13.4
SW13.5
SW7.3
SW7.4
DPI_P6
DPI_P13
DPI_P14
DAI_P3
DAI_P4
DAI_P15
DAI_P16
DAI_P17
SW3.6
SW14.5
SW14.6
SW1.3
SW1.4
SW2.7
SW2.8
SW7.1
1
R234
10K
0402
LABEL "PB2"
R241
100
0402
R245
10
0603
U14
3
SW9
MOMENTARY
SWT013
4
3.3V
PB2
3.3V
74LVC14A
SOIC14
C133
1UF
0402
RESET
LED10
RED
LED001
R469
10K
0402
R235
10K
0402
2
LABEL "PB3"
R497
330
0603
2
U46
6
SW10
MOMENTARY
SWT013
1
SW12
MOMENTARY
SWT013
PB3
74LVC14A
SOIC14
1
U49
4
4
R236
10K
0402
MR
PFI
2
DA_SOFT_RESET
C134
1UF
0402
SN74LVC1G08
SOT23-5
8
RESET
7
RESET
5
PFO
RESET
TEMP_THERM
ADM708SARZ
SOIC8
U17
R243
100
0402
R247
10
0603
U14
9
SW11
MOMENTARY
SWT013
R255
330
0603
R246
10
0603
U14
5
LABEL "PB4"
R239
10K
0402
R256
10K
0402
RESET
R242
100
0402
LED11
YELLOW
LED001
LED1
8
PB4
LED2
74LVC14A
SOIC14
LED3
LED4
C135
1UF
0402
LED5
LED6
3
LED7
LED8
2
4
6
8
11
13
15
17
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
18
1Y1
16
1Y2
14
1Y3
12
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
3.3V
3
3.3V
1
19
OE1
OE2
IDT74FCT3244APY
SSOP20
R237
10K
0402
LED8
YELLOW
LED001
LED7
YELLOW
LED001
LED6
YELLOW
LED001
LED5
YELLOW
LED001
LED4
YELLOW
LED001
LED3
YELLOW
LED001
LED2
YELLOW
LED001
POWER
LED9
GREEN
LED001
LED1
YELLOW
LED001
R238
10K
0402
U14
R467
330
0603
U14
11
10
13
74LVC14A
SOIC14
R468
330
0603
R248
330
0603
R250
330
0603
R249
330
0603
R251
330
0603
R252
330
0603
R253
330
0603
R254
330
0603
12
74LVC14A
SOIC14
3.3V
C131
0.01UF
0402
C129
0.01UF
0402
C130
0.01UF
0402
ANALOG
DEVICES
C128
0.01UF
0402
4
Title
74LVC14A
ADM708
IDT74FCT3244
Size
SN74LVC1G08
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
RESET CIRCUIT, PUSHBUTTONS, LEDS
Board No.
C
Date
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:34
D
7
of
16
A
B
C
J4
WHITE (LEFT)
3.3V
A3V
D
J5
RED (RIGHT)
WHITE (LEFT)
DB25 Female Connectors for Conversion to XLR Connectors
RED (RIGHT)
OUT3 (L)
OUT3 (R)
OUT4 (L)
OUT4 (R)
9
10
9
10
P8
P9
1
28
ABCLK_Z
1
29
ALRCLK_Z
27
ASDATA1_Z
26
ASDATA2_Z
21
22
DLRCLK
20
DSDATA1
19
DSDATA2
18
DSDATA3
15
DSDATA4
ADC1LN
ALRCLK
ADC1LP
ASDATA1
ADC1RN
ASDATA2
ADC1RP
54
53
DLRCLK
ADC2RN
DSDATA1
ADC2RP
55
30
SPI_MOSI
31
SPI_MISO
35
AD1939_CS
39
TP9
1
RESET
2
3
14
OR3P
RESET
OR4N
13
OR4P
NC4
CM
VSUPPLY
47
FILTR
AD1939
LQFP64
1
AGND1
4
AGND2
44
AGND3
46
AGND4
48
AGND5
VDRIVE
DGND2
VSENSE
33
25
AD1939_CM
52
DGND1
24
2
AD1939_LF
61
16
23
DB25F
DAC8P
LF
C266
0.01UF
0402
13
DAC8N
12
NC3
DB25F
27
64
NC2
25
13
C259
5600PF
0805
DAC7P
12
OUT1N
25
26
63
OL4P
24
OUT1P
12
IN1N
26
50
NC1
23
OUT2N
24
IN1P
C258
390PF
0603
DAC7N
10
OUT2P
23
11
DAC6P
11
10
27
49
10
11
R461
562.0
0603
DAC6N
OL4N
SN74LVC1G08
SOT23-5
3.3V
9
9
OUT3N
22
DAC5P
8
2
AD1939_SOFT_RESET
OL3P
21
OUT3P
9
22
DAC5N
6
OR3N
4
8
21
IN3P
A3V
DAC4P
OL3N
20
OUT4N
8
IN2N
42
7
OUT4P
20
DAC4N
OR2N
U50
19
7
IN2P
43
6
OUT5N
19
DAC3P
OL2P
18
OUT5P
6
DAC3N
40
17
OUT6N
18
IN3N
41
4
OUT6P
5
NOTE: THE NUMBER INSIDE EACH OF THE CIRCLES IS THE ACTUAL
PIN NUMBER FOR THE RESPECTIVE CONNECTOR.
DAC2P
OL2N
MCLKO_XO
5
DAC2N
OR1P
MCLKI_XI
3
DAC1P
OL1P
7
2
4
IN4N
OR2P
AD1939_CLKIN
IN2 (R)
DAC1N
36
CLATCH
5
1
3
OUT7N
16
IN4P
OL1N
COUT
IN2 (L)
15
OUT7P
3
5
ADC4LP
37
CIN
IN1 (R)
3
ADC4LN
59
CCLK
6
ADC3LP
60
DSDATA4
4
17
ADC3LN
57
DSDATA3
IN1 (L)
ADC2LP
58
DSDATA2
6
16
ADC2LN
38
34
14
OUT8N
2
ADC1LP
56
ADC2LP
4
ADC1LN
OR1N
SPI_CLK
OUT2 (R)
2
ABCLK
DBCLK
OUT2 (L)
15
ADC2LN
DBCLK
OUT1 (R)
OUT1 (L)
5
AVDD1
45
AVDD2
51
AVDD3
62
AVDD4
17
DVDD1
32
DVDD2
U45
1
OUT8P
14
C256
0.1UF
0603
C257
10UF
0805
C254
10UF
0805
C255
0.1UF
0603
C262
22PF
0805
HEADPHONE OUT (SHARED WITH OUT3/DAC5&6)
R486
10.0K
0402
3.3V
R262
33
0402
3.3V
R496
33
0402
ABCLK_Z
ABCLK
3
R493
5K
RES_POT_DUAL
R495
33
0402
R494
10K
0402
R259
10K
0402
ASDATA1
ASDATA1_Z
R257
33
0402
DBCLK
1
ASDATA2
ASDATA2_Z
J8
R489
100.0
0402
1
R258
33
0402
2
2
OUT3_SE_R
ON
1
3.3V
C263
22PF
0805
3
CT60
10UF
CAP002
LOOPBACK CONNECTOR
FOR TESTING PURPOSES ONLY
DEFAULT: ALL OFF
R261
33
0402
A3V
3.3V
SW24
ON
3.3V
1
1
IN1_SE_L
7
3
6
4
5
3
C137
0.01UF
0402
C138
0.01UF
0402
C139
0.01UF
0402
C140
0.01UF
0402
4
C142
0.01UF
0402
C136
0.01UF
0402
C141
0.01UF
0402
8
2
2
IN1_SE_R
4
R491
10.0K
0402
4
2
CON001
R484
100K
0402
U51
R490
100.0
0402
3
AD8397
SOIC_N8_EP
AD1939_VREF
5V
AD1939_VREF
5V
OUT1_SE_R
OUT3_SE_L
OUT3_SE_R
C271
0.1UF
0402
C264
0.1UF
0402
ANALOG
DEVICES
C265
10UF
0805
SW25
8
2
7
3
6
4
5
2
3
4
AD1939 OSC
ON
1
IN2_SE_L
1
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
OUT2_SE_L
ADSP-21469 EZ-BOARD
AUDIO PAGE 1
Title
OUT2_SE_R
OUT4_SE_L
OUT4_SE_R
Size
DIP4
SWT018
Board No.
C
Date
B
R483
100K
0402
OUT1_SE_L
DIP4
SWT018
IN2_SE_R
A
2
1
3
AD1939 OSC
GND
2
12.288MHZ
OSC003
CT57
47UF
ELEC_6MM
R492
0
0402
R487
10.0K
0402
R493
5K
RES_POT_DUAL
3.3V
AD1939_CLKIN
3
4
4
5
3
OUT
5
AD1939_VREF
NOTE: A USER NEEDS TO TURN SWITCH SW23
ON IN ORDER TO USE THE HEAD PHONE CONNECTOR.
OE
AD8397
SOIC_N8_EP
DIP2
SWT020
DLRCLK
1
1
5
SW23
ALRCLK
OUT3_SE_L
4
VDD
CT58
47UF
ELEC_6MM
R485
0
0402
U51
7
SW23: HEAD PHONE ENABLE
DEFAULT: ALL OFF
AD1939_CS
U12
6
3
ALRCLK_Z
R260
10K
0402
R488
10.0K
0402
2
R263
33
0402
AD1939_SOFT_RESET
CT59
10UF
CAP002
6
C
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:45
D
8
of
16
A
B
C
D
IN1
C143
300PF
0603
Bottom Left (White)
CT1
22UF
ELEC_4MM
J4
CON_RCA_6B
1
3
R264
4.99K
0603
R266
5.76K
0603
1
IN1_SE_L
R265
49.9K
0603
1
U20
2
1
SW15
1
ON
1
11
3
10
4
9
5
8
6
7
4
AD8652ARZ
SOIC_N8
CT62
22UF
ELEC_4MM
R267
237.0
0603
ADC1LN
5V
5
ADC1_DIFF-
IN1P
3
IN1_C
12
2
2
IN1_R
ADC1_DIFF-
3
6
C144
1000PF
0402
DIP6
SWT017
IN1_R
IN1_C
R268
37.4K
0402
C147
100PF
0402
C145
300PF
0603
R273
4.99K
0603
R269
5.76K
0603
R286
806
0402
CT63
22UF
ELEC_4MM
R272
237.0
0603
AD1939_VREF
R287
1.0K
0402
ADC1LP
2
CT3
22UF
ELEC_4MM
5V
R274
100.0
0402
2
7
5
AD1939_VREF
R271
49.9K
0603
AD8652ARZ
SOIC_N8
C148
0.1UF
0402
C151
0.1UF
0402
IN1 (LEFT) SETTINGS
SINGLE ENDED USE DIFFERENTIAL USE
SWITCH
RCA IN (DEFAULT)
DB25 IN (P8)
ON
OFF
SW15.1
OFF
ON
SW15.2
ON
OFF
SW15.3
OFF
ON
SW15.4
OFF
SW15.5
ON
ON
SW15.6
OFF
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
C157
300PF
0603
Bottom Right (Red)
CT5
22UF
ELEC_4MM
J4
CON_RCA_6B
5
R279
4.99K
0603
R281
5.76K
0603
IN1_SE_R
R282
49.9K
0603
2
U21
2
1
SW16
1
11
3
10
4
9
5
8
6
7
5
ADC2_DIFF-
IN2P
4
IN2_C
3
IN2_R
12
2
2
3
ADC2_DIFF-
3
ON
1
CT61
100UF
C
C150
1000PF
0402
U20
6
IN1N
C161
10UF
0805
AD8652ARZ
SOIC_N8
CT65
22UF
ELEC_4MM
R280
237.0
0603
6
IN1 (RIGHT) SETTINGS
SINGLE ENDED USE DIFFERENTIAL USE
SWITCH
RCA IN (DEFAULT)
DB25 IN (P8)
ON
OFF
SW16.1
SW16.2
OFF
ON
OFF
SW16.3
ON
SW16.4
ON
OFF
OFF
SW16.5
ON
SW16.6
ON
OFF
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
ADC2LN
C154
1000PF
0402
DIP6
SWT017
IN2_R
IN2_C
R276
37.4K
0402
C153
300PF
0603
R277
5.76K
0603
C155
100PF
0402
CT64
22UF
ELEC_4MM
R285
237.0
0603
R278
4.99K
0603
3
ADC2LP
CT6
22UF
ELEC_4MM
6
IN2N
R275
100.0
0402
R284
49.9K
0603
C159
1000PF
0402
U21
5V
7
5
AD1939_VREF
AD8652ARZ
SOIC_N8
C152
0.1UF
0402
ANALOG
DEVICES
C160
0.1UF
0402
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
AUDIO PAGE 2
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:34
D
9
of
16
A
B
C
D
IN2
C173
300PF
0603
Bottom Left (White)
CT11
22UF
ELEC_4MM
J5
CON_RCA_6B
3
R305
4.99K
0603
R303
5.76K
0603
IN2_SE_L
1
1
R302
49.9K
0603
1
U22
2
1
SW18
1
ON
1
11
3
10
4
9
5
8
6
7
4
5
ADC3_DIFF-
IN3P
3
IN3_C
12
2
2
IN3_R
ADC3_DIFF-
3
AD8652ARZ
SOIC_N8
CT66
22UF
ELEC_4MM
R304
237.0
0603
ADC3LN
6
C176
1000PF
0402
DIP6
SWT017
IN3_R
IN3_C
R308
37.4K
0402
C175
100PF
0402
C177
300PF
0603
CT67
22UF
ELEC_4MM
R299
237.0
0603
R306
4.99K
0603
R307
5.76K
0603
ADC3LP
CT10
22UF
ELEC_4MM
R309
100.0
0402
2
5V
7
5
AD1939_VREF
R300
49.9K
0603
IN2 (LEFT) SETTINGS
SINGLE ENDED USE DIFFERENTIAL USE
SWITCH
DB25 IN (P8)
RCA IN (DEFAULT)
SW18.1
ON
OFF
SW18.2
OFF
ON
SW18.3
ON
OFF
SW18.4
OFF
ON
SW18.5
ON
OFF
SW18.6
OFF
ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
C171
1000PF
0402
U22
6
IN3N
AD8652ARZ
SOIC_N8
C178
0.1UF
0402
C170
0.1UF
0402
C179
300PF
0603
IN2 (RIGHT) SETTINGS
SINGLE ENDED USE DIFFERENTIAL USE
DB25 IN (P8)
RCA IN (DEFAULT)
SWITCH
SW17.1
ON
OFF
SW17.2
OFF
ON
SW17.3
ON
OFF
SW17.4
OFF
ON
SW17.5
ON
OFF
SW17.6
OFF
ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
Bottom Right (Red)
CT8
22UF
ELEC_4MM
J5
CON_RCA_6B
5
R292
4.99K
0603
R294
5.76K
0603
IN2_SE_R
R295
49.9K
0603
2
U23
2
1
1
ON
1
11
3
10
4
9
5
8
6
7
5
ADC4_DIFF-
IN4P
4
IN4_C
3
3
12
2
2
IN4_R
ADC4_DIFF-
3
SW17
AD8652ARZ
SOIC_N8
CT68
22UF
ELEC_4MM
R293
237.0
0603
2
3
ADC4LN
6
C164
1000PF
0402
DIP6
SWT017
IN4_R
IN4_C
R289
37.4K
0402
C163
300PF
0603
R290
5.76K
0603
C165
100PF
0402
CT69
22UF
ELEC_4MM
R298
237.0
0603
R291
4.99K
0603
ADC4LP
CT9
22UF
ELEC_4MM
6
IN4N
R288
100.0
0402
R297
49.9K
0603
AD1939_VREF
C168
1000PF
0402
U23
5V
7
5
AD8652ARZ
SOIC_N8
C162
0.1UF
0402
C169
0.1UF
0402
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
AUDIO PAGE 3
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:34
D
10
of
16
A
B
C
D
C193
680PF
0402
R325
2.43K
0402
R338
2.67K
0402
5
DAC1P
R340
100.0
0402
U24
OUT1
CT19
22UF
ELEC_4MM
7
OUT1P
6
AD8652ARZ
SOIC_N8
R341
750.0
0402
R343
49.9K
0603
1
R312
6.81K
0603
5V
R313
4.99K
0603
C192
620PF
0402
5V
C188
0.1UF
0402
1
5V
C189
0.1UF
0402
C191
0.1UF
0402
AD1939_VREF
MIddle Left (White)
R311
4.99K
0603
C184
22UF
ELEC_5MM
J4
CT49
22UF
ELEC_4MM
R335
100.0
0402
U25
3
CON_RCA_6B
1
OUT1_SE_L
4
2
AD8652ARZ
SOIC_N8
R314
4.99K
0603
C181
620PF
0402
R475
100K
0402
1
R342
4.99K
0603
R339
6.81K
0603
R317
750.0
0402
2
2
R315
2.43K
0402
CT18
22UF
ELEC_4MM
R331
100.0
0402
U24
R316
2.67K
0402
2
AD1939_VREF
1
OUT1N
3
DAC1N
AD8652ARZ
SOIC_N8
C267
0.1UF
0402
R310
49.9K
0603
C182
680PF
0402
C183
680PF
0402
R319
2.43K
0402
R318
2.67K
0402
5
DAC2P
CT14
22UF
ELEC_4MM
R332
100.0
0402
U26
7
OUT2P
6
AD8652ARZ
SOIC_N8
R320
750.0
0402
R336
49.9K
0603
R329
6.81K
0603
R324
4.99K
0603
C186
620PF
0402
3
3
AD1939_VREF
Middle Right (Red)
R328
4.99K
0603
C180
22UF
ELEC_5MM
J4
CT50
22UF
ELEC_4MM
R334
100.0
0402
U25
5
CON_RCA_6B
OUT1_SE_R
7
6
6
AD8652ARZ
SOIC_N8
R326
4.99K
0603
C187
620PF
0402
R476
100K
0402
2
R327
4.99K
0603
R330
6.81K
0603
R321
750.0
0402
2
R323
2.43K
0402
R333
100.0
0402
U26
R322
2.67K
0402
CT16
22UF
ELEC_4MM
1
ANALOG
DEVICES
OUT2N
3
DAC2N
AD8652ARZ
SOIC_N8
4
R337
49.9K
0603
C185
680PF
0402
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
AUDIO PAGE 4
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-19-2009_12:57
D
11
of
16
A
B
C
D
C206
680PF
0402
R374
2.43K
0402
R373
2.67K
0402
5
DAC3P
OUT2
CT24
22UF
ELEC_4MM
R361
100.0
0402
U28
7
OUT3P
6
AD8652ARZ
SOIC_N8
R372
750.0
0402
R369
49.9K
0603
R370
6.81K
0603
1
5V
5V
1
R371
4.99K
0603
C204
620PF
0402
5V
C200
0.1UF
0402
C199
0.1UF
0402
C197
0.1UF
0402
AD1939_VREF
MIddle Left (White)
R352
4.99K
0603
C205
22UF
ELEC_5MM
3
J5
CT51
22UF
ELEC_4MM
R351
100.0
0402
U29
CON_RCA_6B
OUT2_SE_L
1
4
2
AD8652ARZ
SOIC_N8
R349
4.99K
0603
C194
620PF
0402
1
R477
100K
0402
R357
4.99K
0603
R355
6.81K
0603
R345
750.0
0402
2
R375
2.43K
0402
2
CT23
22UF
ELEC_4MM
R358
100.0
0402
U28
R377
2.67K
0402
AD1939_VREF
1
2
OUT3N
3
DAC3N
AD8652ARZ
SOIC_N8
C268
0.1UF
0402
R363
49.9K
0603
C207
680PF
0402
C203
680PF
0402
R346
2.43K
0402
R368
2.67K
0402
5
DAC4P
CT27
22UF
ELEC_4MM
R360
100.0
0402
U30
7
OUT4P
6
AD8652ARZ
SOIC_N8
R376
750.0
0402
R364
49.9K
0603
R356
6.81K
0603
R350
4.99K
0603
C195
620PF
0402
3
3
AD1939_VREF
Middle Right (Red)
R353
4.99K
0603
C196
22UF
ELEC_5MM
5
J5
CT52
22UF
ELEC_4MM
R362
100.0
0402
U29
CON_RCA_6B
OUT2_SE_R
7
6
6
AD8652ARZ
SOIC_N8
R366
4.99K
0603
C201
620PF
0402
2
R478
100K
0402
R354
4.99K
0603
R365
6.81K
0603
R348
750.0
0402
2
R347
2.43K
0402
R359
100.0
0402
U30
R367
2.67K
0402
CT28
22UF
ELEC_4MM
1
OUT4N
3
DAC4N
AD8652ARZ
SOIC_N8
4
ANALOG
DEVICES
R344
49.9K
0603
C202
680PF
0402
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
AUDIO PAGE 5
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-19-2009_12:57
D
12
of
16
A
B
C
D
C220
680PF
0402
R408
2.43K
0402
R407
2.67K
0402
5
DAC5P
OUT3
CT32
22UF
ELEC_4MM
R395
100.0
0402
U32
7
OUT5P
6
AD8652ARZ
SOIC_N8
R406
750.0
0402
R403
49.9K
0603
1
R404
6.81K
0603
5V
R405
4.99K
0603
C218
620PF
0402
5V
C214
0.1UF
0402
1
5V
C213
0.1UF
0402
C211
0.1UF
0402
AD1939_VREF
Top Left (White)
R386
4.99K
0603
C219
22UF
ELEC_5MM
J4
CT53
22UF
ELEC_4MM
R385
100.0
0402
U33
3
CON_RCA_6B
OUT3_SE_L
1
9
2
AD8652ARZ
SOIC_N8
R383
4.99K
0603
C208
620PF
0402
7
R479
100K
0402
R391
4.99K
0603
R389
6.81K
0603
R379
750.0
0402
2
2
R409
2.43K
0402
CT31
22UF
ELEC_4MM
R392
100.0
0402
U32
R411
2.67K
0402
AD1939_VREF
1
2
OUT5N
3
DAC5N
C269
0.1UF
0402
AD8652ARZ
SOIC_N8
R397
49.9K
0603
C221
680PF
0402
C217
680PF
0402
R380
2.43K
0402
R402
2.67K
0402
5
DAC6P
CT35
22UF
ELEC_4MM
R394
100.0
0402
U34
7
OUT6P
6
AD8652ARZ
SOIC_N8
R410
750.0
0402
R398
49.9K
0603
R390
6.81K
0603
R384
4.99K
0603
C209
620PF
0402
3
3
AD1939_VREF
Top Right (Red)
R387
4.99K
0603
C210
22UF
ELEC_5MM
J4
CT54
22UF
ELEC_4MM
R396
100.0
0402
U33
5
CON_RCA_6B
7
OUT3_SE_R
10
6
AD8652ARZ
SOIC_N8
R400
4.99K
0603
C215
620PF
0402
R480
100K
0402
8
R388
4.99K
0603
R399
6.81K
0603
R382
750.0
0402
2
R381
2.43K
0402
R393
100.0
0402
U34
R401
2.67K
0402
CT36
22UF
ELEC_4MM
1
ANALOG
DEVICES
OUT6N
3
DAC6N
AD8652ARZ
SOIC_N8
4
R378
49.9K
0603
C216
680PF
0402
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
AUDIO PAGE 6
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-19-2009_12:57
D
13
of
16
A
B
C
D
C234
680PF
0402
R442
2.43K
0402
R441
2.67K
0402
5
DAC7P
OUT4
CT40
22UF
ELEC_4MM
R429
100.0
0402
U36
7
OUT7P
6
AD8652ARZ
SOIC_N8
R440
750.0
0402
R437
49.9K
0603
R438
6.81K
0603
1
5V
5V
1
R439
4.99K
0603
C232
620PF
0402
5V
C228
0.1UF
0402
C227
0.1UF
0402
C225
0.1UF
0402
AD1939_VREF
Top Left (White)
R420
4.99K
0603
C233
22UF
ELEC_5MM
3
J5
CT55
22UF
ELEC_4MM
R419
100.0
0402
U37
CON_RCA_6B
1
9
OUT4_SE_L
2
AD8652ARZ
SOIC_N8
R417
4.99K
0603
C222
620PF
0402
R481
100K
0402
7
R425
4.99K
0603
R423
6.81K
0603
R413
750.0
0402
2
R443
2.43K
0402
2
CT39
22UF
ELEC_4MM
R426
100.0
0402
U36
R445
2.67K
0402
2
AD1939_VREF
1
OUT7N
3
DAC7N
AD8652ARZ
SOIC_N8
R431
49.9K
0603
C235
680PF
0402
C270
0.1UF
0402
C231
680PF
0402
R414
2.43K
0402
R436
2.67K
0402
5
DAC8P
CT43
22UF
ELEC_4MM
R428
100.0
0402
U38
7
OUT8P
6
AD8652ARZ
SOIC_N8
R444
750.0
0402
R432
49.9K
0603
R424
6.81K
0603
R418
4.99K
0603
C223
620PF
0402
3
3
AD1939_VREF
Top Right (Red)
C224
22UF
ELEC_5MM
R421
4.99K
0603
5
J5
CT56
22UF
ELEC_4MM
R430
100.0
0402
U37
CON_RCA_6B
7
OUT4_SE_R
10
6
AD8652ARZ
SOIC_N8
R434
4.99K
0603
C229
620PF
0402
R482
100K
0402
8
R422
4.99K
0603
R433
6.81K
0603
R416
750.0
0402
2
R415
2.43K
0402
R427
100.0
0402
U38
R435
2.67K
0402
CT44
22UF
ELEC_4MM
1
OUT8N
3
DAC8N
ANALOG
DEVICES
AD8652ARZ
SOIC_N8
R412
49.9K
0603
C230
680PF
0402
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
AUDIO PAGE 7
Title
Size
20 Cotton Road
Rev
A0221-2008
0.2
Sheet
3-19-2009_12:57
D
14
of
16
A
B
5V
C
D
3.3V
P2
1
GND1
3
5
GND2
GND3
7
9
11
13
DAI_P1
1
15
DAI_P2
17
DAI_P3
19
DAI_P4
21
DPI_P14
23
DPI_P4
25
DPI_P1
27
DPI_P2
29
DPI_P8
31
DPI_P9
33
DPI_P12
35
RESET
37
FLAG0/IRQ0
39
FLAG2/IRQ2/MS2
41
DAI_P9
43
DAI_P10
45
DAI_P11
47
DAI_P12
49
DAI_P13
51
DAI_P14
53
55
57
2
59
PWR_IN1
PWR_IN2
VDDIO1
GND4
VDDIO2
GND5
3.3V1
GND6
3.3V2
DAI1
DAI5
DAI2
DAI6
DAI3
DAI7
DAI4
DAI8
DPI14
DPI13
DPI4
DPI3
DPI1
DPI5
DPI2
DPI6
DPI8
DPI7
DPI9
DPI10
DPI12
DPI11
NC
RESET
FLAG0
FLAG1
FLAG2
FLAG3
DAI9
DAI10
DAI11
DAI15
DAI16
DAI17
DAI12
DAI18
DAI13
DAI19
DAI14
DAI20
RSVD1
RSVD2
RSVD3
RSVD5
RSVD4
RSVD6
RSVD7
RSVD8
IDC30X2_SMTA
2
P5
4
6
ADDR1
8
ADDR3
10
ADDR5
12
ADDR7
14
16
18
20
22
24
26
28
30
32
34
ADDR9
DAI_P5
ADDR11
DAI_P6
ADDR13
DAI_P7
ADDR15
DAI_P8
ADDR17
DPI_P13
ADDR19
DPI_P3
ADDR21
DPI_P5
ADDR23
DPI_P6
DPI_P7
DPI_P10
DPI_P11
36
38
40
42
44
46
48
50
52
WR
FLAG1/IRQ1
ACK
FLAG3/TIMEXP/MS3
MS1
DAI_P15
FLAG3/TIMEXP/MS3
DAI_P16
DAI_P17
DAI_P18
DAI_P19
DAI_P20
54
DSP_CLKOUT
56
FLAG0/IRQ0
58
FLAG1/IRQ1
60
DATA1
DATA3
DATA5
3
DSP PIN
NAME
DAI_P1
DAI_P2
DAI_P3
DAI_P4
DAI_P5
DAI_P6
DAI_P7
DAI_P8
DAI_P9
DAI_P10
DAI_P11
DAI_P12
DAI_P13
DAI_P14
DAI_P15
DAI_P16
DAI_P17
DAI_P18
DAI_P19
DAI_P20
PERIPHERAL NET
CONNECTED
CONNECTED TO
VIA SWITCH
SPDIF_OUT
SW1.1
SW1.2
AD1939_SOFT_RESET
SW1.3
LED4
SW1.4
LED5
SW1.5
ASDATA1
SW1.6
ASDATA2
SW1.7
ABCLK
SW1.8
ALRCLK
SW2.1
DSDATA4
SW2.2
DSDATA3
SW2.3
DSDATA2
SW2.4
DSDATA1
SW2.5
DBCLK
SW2.6
DLRCLK
SW2.7
LED6
SW2.8
LED7
SW7.1
LED8
SW7.2
SPDIF_IN
SW7.3
PB3
SW7.4
PB4
SWITCH
DEFAULT
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
ON
ON
ON
ON
ON
ON
DATA7
3.3V
5V
NOTE: SHUTTING OFF ANY OF THE SWITCHES FOR EXPANSION USE
WILL CAUSE LOSS OF FUNCTIONALITY TO THE RESPECTIVE
PERIPHERAL ON THE EZ-BOARD.
J1
2
ADDR1
4
ADDR3
6
ADDR5
8
ADDR7
10
ADDR9
12
ADDR11
14
ADDR13
16
ADDR15
18
ADDR17
20
ADDR19
22
ADDR21
24
ADDR23
26
ADDR25
28
ADDR27
30
ADDR29
32
ADDR31
34
WR
36
ACK
38
MS1
40
MS3
42
RSVD2
44
RSVD4
46
RSVD6
48
RSVD8
50
CLKOUT
52
FLAG0
54
FLAG1
56
DATA1
58
DATA3
60
DATA5
62
DATA7
64
DATA9
66
DATA11
68
DATA13
70
DATA15
72
DATA17
74
DATA19
76
DATA21
78
DATA23
80
DATA25
82
DATA27
84
DATA29
86
DATA31
88
RSVD10
90
RSVD12
92
RSVD14
94
RSVD16
96
PWR_IN1
98
PWR_IN2
100
VDDIO1
102
VDDIO2
104
3.3V1
QMS52X2_SMT
P6
ADDR0
ADDR2
ADDR4
ADDR6
ADDR8
ADDR10
ADDR12
ADDR14
ADDR16
ADDR18
ADDR20
ADDR22
ADDR24
ADDR26
ADDR28
ADDR30
RD
RSVD1
MS0
MS2
RSVD3
RSVD5
RSVD7
RSVD9
RESET
FLAG2
FLAG3
DATA0
DATA2
DATA4
DATA6
DATA8
DATA10
DATA12
DATA14
DATA16
DATA18
DATA20
DATA22
DATA24
DATA26
DATA28
DATA30
RSVD11
RSVD13
RSVD15
RSVD17
GND1
GND2
GND3
GND4
3.3V2
1
3
5
7
9
11
13
15
17
19
21
23
ADDR0
ADDR3
ADDR2
ADDR7
ADDR4
ADDR6
ADDR4
ADDR8
ADDR17
ADDR10
ADDR12
DSP_CLKOUT
ADDR14
ADDR16
ADDR18
ADDR2
ADDR20
ADDR6
ADDR22
25
ADDR1
27
ADDR5
29
31
33
ADDR0
RD
ADDR18
35
37
39
MS0
ADDR20
FLAG2/IRQ2/MS2
WR
41
43
45
ACK
47
ADDR15
49
51
53
55
57
59
61
RESET
ADDR11
FLAG2/IRQ2/MS2
ADDR16
FLAG3/TIMEXP/MS3
DATA0
DATA2
DATA3
A1
D0
A2
D1
A3
GND0
A4
D4
A5
D5
A6
GND1
A7
CLK1+
A8
CLK1A9
GND2
A10
D10
A11
D11
A12
GND3
A13
D14
A14
D15
A15
GND4
A16
D18
A17
D19
A18
GND5
A19
D22
A20
D23
A21
GND6
A22
D24
A23
D25
A24
GND7
A25
D28
A26
D29
A27
GND8
DMAX_ALT
DNP
B1
DATA1
GND9
B2
D2
B3
D3
ADDR13
ADDR9
4
PERIPHERAL NET
CONNECTED TO
SPI_MOSI
SPI_MISO
SPI_CLK
AD1939_CS
SPI_CS
LED1
TEMP_SDA
TEMP_SCK
UART_TX
UART_RX
UART_RTS
UART_CTS
LED2
LED3
CONNECTED
VIA SWITCH
SW3.1
SW3.2
SW3.3
SW3.4
SW3.5
SW3.6
SW3.7
SW3.8
SW14.1
SW14.2
SW14.3
SW14.4
SW14.5
SW14.6
SWITCH
DEFAULT
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
ON
ON
B4
B5
D6
B6
D7
DATA7
ADDR12
ADDR8
PERIPHERAL NET
CONNECTED TO
FLASH_CS
FLASH_CS
TEMP_THERM
PB1
PB2
TEMP_IRQ
RD
B7
GND11
B8
D8
B9
D9
ADDR14
FLAG3/TIMEXP/MS3
DATA2
B10
GND12
B11
D12
B12
D13
DATA0
MS1
DATA6
ADDR21
B13
DATA4
GND13
B14
D16
B15
D17
ADDR22
RD
ADDR23
B16
GND14
B17
D20
B18
D21
FLAG2/IRQ2/MS2
MS0
B19
GND15
B20
CLK2-
B21
CLK2+
WR
B22
GND16
B23
D26
B24
D27
ADDR10
RD
B25
GND17
D30
D31
B26
B27
WR
RESET
ADDR19
DPI_P10
DPI_P9
1
DPI_P13
DPI_P14
DPI_P5
DPI_P6
DPI_P7
DPI_P8
DPI_P1
DPI_P4
DPI_P3
DPI_P2
DPI_P11
DPI_P12
2
DATA6
63
65
P7
67
DAI_P5
69
DAI_P1
71
73
DAI_P6
75
DAI_P3
77
79
81
83
85
DAI_P2
87
DAI_P8
89
91
DAI_P4
93
DAI_P7
95
97
DAI_P9
99
DAI_P14
101
103
DAI_P10
DAI_P12
CONNECTED
VIA SWITCH
SW13.1
SW13.2
SW13.3
SW13.4
SW13.5
SW13.6
SWITCH
DEFAULT
OFF
ON
OFF
ON
ON
OFF
DAI_P11
DAI_P13
A1
D0
A2
D1
A3
GND0
A4
D4
A5
D5
A6
GND1
A7
CLK1+
A8
CLK1A9
GND2
A10
D10
A11
D11
A12
GND3
A13
D14
A14
D15
A15
GND4
A16
D18
A17
D19
A18
GND5
A19
D22
A20
D23
A21
GND6
A22
D24
A23
D25
A24
GND7
A25
D28
A26
D29
A27
GND8
DMAX_ALT
DNP
NOTE: SHUTTING OFF ANY OF THE SWITCHES FOR EXPANSION USE
WILL CAUSE LOSS OF FUNCTIONALITY TO THE RESPECTIVE
PERIPHERAL ON THE EZ-BOARD.
B1
GND9
B2
D2
B3
D3
B4
GND10
B5
D6
B6
D7
B7
GND11
B8
D8
B9
D9
B10
GND12
B11
D12
B12
D13
B13
GND13
B14
D16
B15
D17
B16
GND14
B17
D20
B18
D21
B19
GND15
B20
CLK2B21
CLK2+
B22
GND16
B23
D26
B24
D27
B25
GND17
B26
D30
B27
D31
DAI_P18
DAI_P20
DAI_P19
DAI_P17
ANALOG
DEVICES
3
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
EXPANSION II INTERFACE / L.A. CONNECTORS
Title
NOTE: SHUTTING OFF ANY OF THE SWITCHES FOR EXPANSION USE
WILL CAUSE LOSS OF FUNCTIONALITY TO THE RESPECTIVE
PERIPHERAL ON THE EZ-BOARD.
Size
Board No.
C
Date
A
B1
GND9
B2
D2
B3
D3
B4
GND10
B5
D6
B6
D7
B7
GND11
B8
D8
B9
D9
B10
GND12
B11
D12
B12
D13
B13
GND13
B14
D16
B15
D17
B16
GND14
B17
D20
B18
D21
B19
GND15
B20
CLK2B21
CLK2+
B22
GND16
B23
D26
B24
D27
B25
GND17
B26
D30
B27
D31
DATA4
DAI_P15
DSP PIN
NAME
MS0
MS1
FLAG0/IRQ0
FLAG1/IRQ1
FLAG2/IRQ2/MS2
FLAG3/TIMEXP/MS3
DATA5
GND10
DAI_P16
DSP PIN
NAME
DPI_P1
DPI_P2
DPI_P3
DPI_P4
DPI_P5
DPI_P6
DPI_P7
DPI_P8
DPI_P9
DPI_P10
DPI_P11
DPI_P12
DPI_P13
DPI_P14
A1
D0
A2
D1
A3
GND0
A4
D4
A5
D5
A6
GND1
A7
CLK1+
A8
CLK1A9
GND2
A10
D10
A11
D11
A12
GND3
A13
D14
A14
D15
A15
GND4
A16
D18
A17
D19
A18
GND5
A19
D22
A20
D23
A21
GND6
A22
D24
A23
D25
A24
GND7
A25
D28
A26
D29
A27
GND8
DMAX_ALT
DNP
B
C
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:34
D
15
of
16
A
B
C
D
5V
ANALOG AUDIO (AD1939) POWER
F1
5A
FUS005
FER9
190
FER002
4
3
1
2
5V
A3V
VR1
P16
1
1
C236
1000PF
1206
3
D2
MBRS540T3G
5A
SMC
2
1
C245
10UF
1210
D6
GSOT05
30A
SOT23-3
3
2
C260
1UF
0603
POWER
CON045
5
OUT
IN
R473
31.6K
0603
EN
4
ADJ
GND
ADP1710
TSOT5
1
R474
10.0K
0402
"5V"
D4
SK12
1A
DO-214AA
C261
1UF
0603
D7
GSOT03
30A
SOT23-3
5V
FER7
600
1206
C251
1000PF
1206
R501
4.7K
0402
R502
8.20K
0603
VDD_DDR2
FER8
600
1206
5V
R498
0
0402
U52
SHGND
R500
16.9K
0402
SHGND
1
3
6
VDD
EN_IN
VIN
EN_OUT
4
5
CEXT
GND
2
ADM1085
SC70_6
R499
10.0K
0402
C247
10UF
0805
DNP
C250
10UF
1210
C272
10000PF
0402
DNP
Remove P14 when measuring VDDINT
SJ2
SHORTING
JUMPER
DEFAULT=INSTALLLED
1.1V @ 2A
PGND2
2
R456
0.036
1206
VR3
R454
24.9K
0603
IN
1
COMP
5V
CS
LABEL "GND" ON ALL TPs
C249
68PF
0603
TP19 TP11 TP12 TP13 TP18 TP17 TP14 TP15 TP10 TP16
3
FB
PGATE
GND
2
R455
80.6K
0603
C273
0.1UF
0402
5
TP6
4
6
R458
0
0603
ADP1864AUJZ
SOT23-6
1
5
2
6
2
2
VDDINT
3
7
4
8
TP7
R459
0.05
1206
L2
2.5UH
IND013
D3
MBRS540T3G
5A
SMC
SI7601DN
ICS010
R453
30.9K
0402
P14
1
U16
IDC2X1
GND Test Points are scattered on PCB for Test Measurement Purposes.
C248
470PF
0603
R457
0.036
1206
CT47
470UF
D2E
CT48
2.2UF
B
DNP
C246
4.7UF
0805
D9
VESD01-02V-GS08
7A
SOD-523
PGND2
W2
COPPER
PGND2
4A
PGND2
PGND2
5V
"VDD_DDR2"
3
3.3V
3
P13
1.8V @ 500mA
1
2
TP4
TP3
IDC2X1
Remove P15 when measuring VDDEXT
C241
10UF
0805
DNP
1
PGND
SHORTING
JUMPER
DEFAULT=INSTALLLED
VR2
IN
1
COMP
C243
68PF
0603
3
FB
PGATE
GND
2
R449
80.6K
0603
4
IN
4
SS
C238
2.2UF
0805
4
6
ADP1864AUJZ
SOT23-6
R452
0
0603
1
5
2
6
3
7
4
8
C237
0.1UF
0402
ADP1715
MSOP8
C239
2.2UF
0805
D8
ESD5Z2.5T1
40A
SOD-523
2
Remove P13 when measuring VDD_DDR2
VDDEXT
TP8
L1
2.5UH
IND013
D1
MBRS540T3G
5A
SMC
R460
0.05
1206
CT45
220UF
D2E
CT46
2.2UF
B
DNP
C240
4.7UF
0805
SJ1
SHORTING
JUMPER
DEFAULT=INSTALLLED
D10
GSOT03
30A
SOT23-3
ANALOG
DEVICES
PGND
PGND
W1
COPPER
4A
Size
Date
B
Board No.
C
PGND
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21469 EZ-BOARD
POWER
Title
PGND
A
D5
SK12
1A
DO-214AA
P15
1
SI7601DN
ICS010
R447
255.0K
0603
3.3V
TP5
U15
IDC2X1
CS
C242
470PF
0603
5
R451
0.036
1206
OUT
2
"VDDEXT"
R450
0.036
1206
3
EN
SJ3
3.3V @ 2A
R448
24.9K
0603
R446
0.05
1206
VR4
5
6GND1
7GND2
8GND3
GND4
C244
10UF
1210
VDD_DDR2
Rev
A0221-2008
0.2
Sheet
3-31-2009_14:34
D
16
of
16
I
INDEX
A
C
ABCLK signal, 1-15, 2-3, 2-8
AD1939 codec, 1-14
DAI connections, 2-3, 2-8, 2-9, 2-14
DPI connections, 2-5, 2-9
AD1939_CS signal, 2-9
ALRCLK signal, 1-15, 2-8
analog audio interface, See audio
analog-to-digital converters (ADCs), See
AD1939 codec
architecture, of this EZ-Board, 2-2
ASDATA1-2 signals, 2-3, 2-8
async control enable switch (SW13), 1-10, 1-13,
1-18, 2-6, 2-12, 2-13
audio
codec, See also AD1939 codec
interface, 1-14
left select switch (SW15), 2-14
left select switch (SW18), 2-16
loopback switches (SW24-25), 2-19
RCA connectors (J4-5), 1-14, 2-27
right select switch (SW16), 2-15
right select switch (SW17), 2-15
configuration, of this EZ-Board, 1-3
connectors
diagram of locations, 2-25
J1 (expansion interface II), 1-20, 2-26
J2 (RS-232), 2-26
J3 (link port 1), 1-12, 1-19, 2-17, 2-26
J4 (RCA), 1-14, 2-27
J5 (RCA), 1-14, 2-27
J6 (S/PDIF in), 2-27
J7 (S/PDIF out), 2-27
J8 (headphones), 1-16, 2-28
P10 (MLB), 2-29
P12 (link port 0), 1-12, 2-17, 2-30
P13 (VDD_DDR2 power), 2-30
P14 (VDDINT power), 2-30
P15 (VDDEXT power), 2-30
P16 (5.0V wall adaptor), 1-3, 1-5, 1-18, 2-31
P1 (JTAG), 1-5, 1-18, 1-19, 2-28
P2 (expansion interface II), 1-20, 2-28
P5-7 (DMAX land grid array), 1-20, 2-29
P8-9 (diff in/out), 2-29
ZP1 (debug agent), 2-31
contents, of this EZ-Board package, 1-2
core voltage, 2-3
customer support, xvii
B
background telemetry channel (BTC), 1-22
bill of materials, A-1
board schematic (ADSP-21469), B-1
boot
modes, 2-10
mode select switch (SW4), 1-11, 1-12, 2-10
D
DAI_P1-2 pins, 2-3
DAI_P15-17 pins, 2-3, 2-23
DAI_P19-20 pins, 1-18, 2-3
ADSP-21469 EZ-Board Evaluation System Manual
I-1
INDEX
DAI_P3-4 pins, 2-3, 2-23
DAI_P5-14 pins, 2-3
DB25 connector, 2-14, 2-15, 2-16
DBCLK signal, 1-15, 2-4, 2-9
debug agent connector (ZP1), 2-31
default configuration, of this EZ-Board, 1-3
differential on/out connectors (P8-9), 2-29
digital audio interface (DAI)
connections, 2-3
data transfer from codec, 1-15
LED connections, 2-23
SW1 switch, 2-8
SW2 switch, 2-8
SW7 switch, 1-14, 1-18, 2-11, 2-12
digital peripheral interface (DPI)
connections, 2-5
LED connections, 2-23
SPI memory connections, 1-11
SW14 switch, 1-16, 2-5, 2-13
SW3 switch, 1-11, 2-9
digital-to-analog converters (DACs), See
AD1939 codec
DLRCLK signal, 1-15, 2-4, 2-9
double data rate (DDR2) memory, xii, 1-9, 2-3
DPI_13-14 pins, 2-23
DPI_P6 pin, 2-23
DSDATA1-4 signals, 2-4, 2-9
DSP clock config switch (SW5), 2-11
E
example programs, 1-22
expansion interface II
J1 connector, 1-20, 2-26
P2 connector, 1-20, 2-28
external memory, 1-8, 1-9
I-2
F
features, of this EZ-Board, -xii
FLAG0 pin, 1-18, 2-6, 2-13
FLAG1 pin, 1-18, 2-6, 2-13
FLAG2 pin, 1-18, 2-6, 2-13
FLAG3 pin, 2-6, 2-13
FLAG4 pin, 2-13
FLASH_CS singal, 2-6, 2-13
flash WP jumper (JP1), 2-21
G
general-purpose IO pins (GPIO), 1-17, 2-12
H
headphones
enable switch (SW23), 1-16, 2-19
out connector (J8), 2-28
I
installation, of this EZ-Board, 1-4, 1-5
Integrated Interchip Sound (I2C) mode, 1-15
internal memory space, 1-9
IO voltage, 2-3
IRQ0-2 pins, 1-18, 2-6, 2-13
J
J3 (link port 0) connector, 1-12, 1-19, 2-17,
2-26
J8 (headphones) connector, 1-16
JTAG, 2-17
interface, 1-18
J3 connector, 1-12
P1 connector, 1-5, 1-18, 1-19, 2-28
SW19-22 switches, 1-19, 2-17
ADSP-21469 EZ-Board Evaluation System Manual
INDEX
jumpers
diagram of locations, 2-20
JP1 (flash WP), 2-21
JP2 (S/PDIF loopback), 2-21
JP3 (UART RTS/CTS), 2-21
JP4 (UART loopback), 2-21
P10 (VDDMEM power), 2-30
P13 (VDDINT power), 1-21
P14 (VDDEXT power), 1-21
P15 (VDD_DDR2 power), 1-21
L
land grid array connectors (P5-7), 1-20, 2-29
LEDs
diagram of locations, 2-22
connections, 1-17
LED10 (reset), 2-23
LED11 (thermal limit), 1-13, 2-24
LED1-8 (DAI, DPI), 2-23
LED1 (DPI_P6, SW3), 2-5, 2-10
LED2 (DPI_P13, SW14), 2-5, 2-14
LED3 (DPI_14, SW14), 2-5, 2-14
LED4 (DAI_P3, SW1), 1-5, 2-3, 2-8
LED5 (DAI_P4, SW1), 2-3, 2-8
LED6 (DAIP15, SW2), 2-4, 2-9
LED7 (DAI_16, SW2), 2-4, 2-9
LED8 (DAI_P17, SW7), 2-4, 2-11
LED9 (power), 2-23
license restrictions, xii, 1-8
link port
cables, 1-19, 2-17, 2-26, 2-27, 2-30
interface, -xiii, 1-12
M
master input clock (MCLK), 1-15
media local bus (MLB) connector (P10), 2-29
memory map, of this EZ-Board, 1-8
MS0-1 select lines, 1-10, 2-6, 2-13
MS2-3 select lines, 1-18, 2-6, 2-13
multi-processor configuration, 2-17
N
notation conventions, xxi
O
oscilloscope, 1-21
P
P12 (link port 0) connector, 1-12, 1-19, 2-17,
2-30
package contents, 1-2
parallel flash memory, -xii, 1-10, 2-6, 2-12
PB1-2, 2-6, 2-13
PB3-4, 2-12
POST (power-on-self test) program, 1-10, 1-21
power
5V wall adaptor (P16), 1-3, 1-5, 1-18, 2-31
LED (LED9), 2-23
measurements, 1-21
product overview, xii
push buttons
connections, 1-18, 2-6
SW8-11 (IO) switches, 1-18, 2-12
R
RCA audio connector
J4, 1-14, 2-27
J5, 1-14, 2-27
reference design info, 1-23
reset
LED (LED10), 2-23
push button (SW12), 2-12
restrictions, of evaluation license, 1-8
RS-232 connector (J2), 2-26
ADSP-21469 EZ-Board Evaluation System Manual
I-3
INDEX
S
schematic, of ADSP-21469 EZ-Board, B-1
SDRAM interface, 1-9
serial clock signal (SCK), 1-13
serial data signal (SDA), 1-13
serial peripheral interconnect (SPI) ports, See
SPI interface
session startup procedure, 1-6
signal routing units
SRU2 (DPI interface), 2-4
SRU (DAI interface), 2-3
single-processor configuration, 2-17
SOFT_RESET signal, 2-8
SPDIF_IN signal, 1-14, 2-11
S/PDIF interface
connections, 1-14, 2-3
in connector (J6), 2-27
loopback jumper (JP2), 2-21
out connector (J7), 2-27
SPDIF_OUT signal, 1-14, 2-8
SPI_CLK signal, 2-5, 2-9
SPI_CS signal, 2-5, 2-9
SPI interface, -xiii, 1-11
SPI_MISO signal, 2-5, 2-9
SPI_MOSI signal, 2-5, 2-9
SRAM memory, 1-8
standalone debug agent, xi, 1-5, 1-8, 1-10, 1-18
SW12 (reset) push button, 2-12
SW13 (async control enable), 1-10, 1-13, 1-18,
2-6, 2-12, 2-13
SW14 (DPI 9-14 enable) switch, 1-16, 2-5,
2-13
SW15 (audio left select) switch, 2-14
SW16 (audio right select) switch, 2-15
SW17 (audio right select) switch, 2-15
SW18 (audio left select) switch, 2-16
SW19-22 (JTAG) switches, 1-19, 2-17
SW1 (DAI 1-8 enable) switch, 1-14, 2-3, 2-8
SW23 (headphone enable) switch, 1-16, 2-19
SW24-25 (audio loopback) switches, 2-19
I-4
SW2 (DAI 9-16 enable) switch, 2-8
SW3 (DPI 1-8 enable) switch, 1-11, 2-5, 2-9
SW4 (boot mode select) switch, 1-11, 1-12,
2-10
SW5 (DSP clock config), 2-11
SW7 (DAI 17-20 enable) switch, 1-14, 1-18,
2-11, 2-12
SW8-11 (IO) push buttons, 1-18, 2-12
switches, diagram of locations, 2-7
system architecture, of this EZ-Board, 2-2
T
TEMP_SCK signal, 2-5, 2-10
TEMP_SDA signal, 2-5, 2-10
temp sensor interface, xiii, 1-13, 2-6, 2-10,
2-24
thermal limit LED (LED11), 2-24
time-division multiplexed (TDM) mode, 1-15
TIMEXP pin, 2-13
U
UART
interface connections, 1-16
loopback jumper (JP4), 2-21
RTS/CTS jumper (JP3), 2-21
UART_CTS signal, 1-16, 2-5, 2-14, 2-21
UART_RTS signal, 1-16, 2-5, 2-14, 2-21
UART_RX signal, 1-16, 2-5, 2-13
UART_TX signal, 1-16, 2-5, 2-13
universal asynchronous receiver transmitter, See
UART
USB monitor LED (LED4), 1-5
V
VDD_DDR2
power connectors (P13), 2-30
voltage domain, 1-21
ADSP-21469 EZ-Board Evaluation System Manual
INDEX
VDDEXT
power connector (P15), 2-30
voltage domain, 1-21
VDDINT
power connector (P14), 2-30
voltage domain, 1-21
VisualDSP++ environment, 1-6
voltage planes, 1-21, 2-30
ADSP-21469 EZ-Board Evaluation System Manual
I-5
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