DAC08CQ

8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) DAC08 scale trimming in most applications. Direct interface to all popular logic families with full noise immunity is provided by the high swing, adjustable threshold logic input. FEATURES Fast settling output current: 85 ns Full-scale current prematched to ±1 LSB Direct interface to TTL, CMOS, ECL, HTL, PMOS Nonlinearity to 0.1% maximum over temperature range High output impedance and compliance: −10 V to +18 V Complementary current outputs Wide range multiplying capability: 1 MHz bandwidth Low FS current drift: ±10 ppm/°C Wide power supply range: ±4.5 V to ±18 V Low power consumption: 33 mW @ ±5 V Low cost High voltage compliance complementary current outputs are provided, increasing versatility and enabling differential operation to effectively double the peak-to-peak output swing. In many applications, the outputs can be directly converted to voltage without the need for an external op amp. All DAC08 series models guarantee full 8-bit monotonicity, and nonlinearities as tight as ±0.1% over the entire operating temperature range are available. Device performance is essentially unchanged over the ±4.5 V to ±18 V power supply range, with 33 mW power consumption attainable at ±5 V supplies. GENERAL DESCRIPTION The compact size and low power consumption make the DAC08 attractive for portable and military/aerospace applications; devices processed to MIL-STD-883, Level B are available. The DAC08 series of 8-bit monolithic digital-to-analog converters provide very high speed performance coupled with low cost and outstanding applications flexibility. DAC08 applications include 8-bit, 1 µs A/D converters, servo motor and pen drivers, waveform generators, audio encoders and attenuators, analog meter drivers, programmable power supplies, LCD display drivers, high speed modems, and other applications where low cost, high speed, and complete input/output versatility are required. Advanced circuit design achieves 85 ns settling times with very low “glitch” energy and at low power consumption. Monotonic multiplying performance is attained over a wide 20-to-1 reference current range. Matching to within 1 LSB between reference and full-scale currents eliminates the need for full- FUNCTIONAL BLOCK DIAGRAM V+ 13 VLC (MSB) B1 1 5 B2 6 B3 B4 7 8 B5 9 B6 10 B7 11 (LSB) B8 12 DAC08 BIAS NETWORK VREF (+) VREF (–) 4 2 CURRENT SWITCHES 14 IOUT IOUT 15 16 3 COMP V– 00268-C-001 REFERENCE AMPLIFIER Figure 1. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. DAC08 TABLE OF CONTENTS Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Typical Electrical Characteristics ............................................... 4 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Connections ............................................................................... 6 Test and Burn-In Circuits................................................................ 7 Typical Performance Characteristics ............................................. 8 Basic Connections .......................................................................... 11 Application Information................................................................ 13 Reference Amplifier Setup ........................................................ 13 Reference Amplifier Compensation for Multiplying Applications ................................................................................ 13 Logic Inputs................................................................................. 13 Analog Output Currents ........................................................... 14 Power Supplies............................................................................ 14 Temperature Performance......................................................... 14 Multiplying Operation............................................................... 14 Settling Time............................................................................... 14 ADI Current Output DACs........................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18 REVISION HISTORY 11/04—Rev. B to Rev. C Changed SO to SOIC .........................................................Universal Removed DIE ......................................................................Universal Changes to Figure 30, Figure 31, Figure 32................................. 12 Change to Figure 33 ....................................................................... 15 Added Table 4.................................................................................. 16 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 2/02—Rev. A to Rev. B Edits to SPECIFICATIONS............................................................. 2 Edits to ABSOLUTE MAXIMUM RATING ................................ 3 Edits to ORDERING GUIDE.......................................................... 3 Edits to WAFER TEST LIMITS ...................................................... 5 Edit to Figure 13 ............................................................................... 8 Edits to Figures 14 and 15 ............................................................... 9 Rev. C | Page 2 of 20 DAC08 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VS = ±15 V, IREF = 2.0 mA, –55°C ≤ TA ≤ +125°C for DAC08/DAC08A, 0°C ≤ TA ≤ +70°C for DAC08E and DAC08H, −40°C to +85°C for DAC08C, unless otherwise noted. Output characteristics refer to both IOUT and IOUT. Table 1. Symbol Parameter Resolution Monotonicity Nonlinearity Settling Time NL tS Propagation Delay Each Bit All Bits Switched Full-Scale Tempco tPLH tPHL TCIFS 1 Conditions DAC08A/DAC08H Min Typ Max Min 8 8 8 8 DAC08E Typ Max 85 ±0.1 135 85 TA = 25°C 35 35 ±10 60 60 ±50 35 35 ±10 DAC08E Output Voltage Compliance (True Compliance) VOC Full Range Current IFR4 Full Range Symmetry Zero-Scale Current Output Current Range IFRS IZS IOR1 IOR2 Output Current Noise Logic Input Levels Logic 0 Logic 1 Logic Input Current Logic 0 Logic 1 Logic Input Swing Logic Threshold Range Reference Bias Current Reference Input Slew Rate Power Supply Sensitivity VIL VIL IIL IIH VIS VTHR Full-scale current Change 20 MΩ typ VREF = 10.000 V R14, R15 = 5.000 kΩ TA = 25°C IFR4 − IFR2 −10 1.984 PSSIFS+ PSSIFS– −10 1.992 2.000 1.94 ±0.5 0.1 ±4 1 ±0.19 150 60 60 ±80 ±50 +18 –10 1.99 2.04 1.94 ±1 0.2 ±8 2 Unit 85 ±0.39 150 Bits Bits %FS ns 35 35 ±10 60 60 ±80 ns ns ppm/°C +18 V 1.99 2.04 mA ±2 0.2 ±16 4 R14, R15 = 5.000 kΩ 2.1 2.1 2.1 µA µA mA VREF = +15.0 V, V− = −10 V VREF = +25.0 V, V− = −12 V IREF = 2 mA 4.2 4.2 4.2 mA 25 VLC = 0 V 25 0.8 2 VLC = 0 V VIN = −10 V to +0.8 V VIN = 2.0 V to 18 V V− = −15 V VS = ±15 V 1 −10 −10 −1 REQ = 200 Ω RL = 100 Ω CC = 0 pF. See Figure 7.1 V+ = 4.5 V to 18 V V− = −4.5 V to −18 V IREF = 1.0 mA 4 25 0.8 2 −2 0.002 I15 dI/dt +18 DAC08C Typ Max 8 8 To ±1/2 LSB, all bits switched on or off, TA = 25°C1 1 Min −10 10 +18 +13.5 8 −10 −10 −1 4 0.8 V V −2 0.002 −10 10 +18 +13.5 µA µA V V −1 −3 µA 2 −2 0.002 −3 nA −10 10 +18 +13.5 −10 −10 −3 8 4 8 mA/µs ±0.0003 ±0.01 ±0.0003 ±0.01 ±0.0003 ±0.01 %∆IO/%∆V+ ±0.002 ±0.01 ±0.002 ±0.01 ±0.002 ±0.01 %∆IO/%∆V− Rev. C | Page 3 of 20 DAC08 Parameter Power Supply Current Power Dissipation 1 Symbol I+ I− I+ I− I+ I− PD Conditions VS = ±5 V, IREF = 1.0 mA VS = +5 V, −15 V, IREF = 2.0 mA VS = ±15 V, IREF = 2.0 mA ±5 V, IREF = 1.0 mA +5 V, −15 V, IREF = 2.0 mA ±15 V, IREF = 2.0 mA DAC08A/DAC08H Min Typ Max Min DAC08E Typ Max Min DAC08C Typ Max Unit 2.3 −4.3 2.4 −6.4 2.5 −6.5 33 3.8 −5.8 3.8 −7.8 3.8 −7.8 48 2.3 −4.3 2.4 −6.4 2.5 −6.5 33 3.8 −5.8 3.8 −7.8 3.8 −7.8 48 2.3 −4.3 2.4 −6.4 2.5 −6.5 33 3.8 −5.8 3.8 −7.8 3.8 −7.8 48 mA mA mA mA mA mA mW 108 136 103 136 108 136 mW 135 174 135 174 135 174 mW Guaranteed by design. TYPICAL ELECTRICAL CHARACTERISTICS VS = ±15 V, and IREF = 2.0 mA, unless otherwise noted. Output characteristics apply to both IOUT and IOUT. Table 2. Parameter Reference Input Slew Rate Propagation Delay Settling Time Symbol dI/dt tPLH, tPHL tS Conditions TA = 25°C, any bit To ±1/2 LSB, all bits switched on or off, TA = 25°C Rev. C | Page 4 of 20 All Grades Typical 8 35 85 Unit mA/µs ns ns DAC08 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Operating Temperature DAC08AQ, DAC08Q DAC08HQ, DAC08EQ, DAC08CQ, DAC08HP, DAC08EP DAC08CP, DAC08CS Junction Temperature (TJ) Storage Temperature Q Package Storage Temperature P Package Lead Temperature (Soldering, 60 sec) V+ Supply to V− Supply Logic Inputs VLC Analog Current Outputs (at VS− = 15 V) Reference Input (V14 to V15) Reference Input Differential Voltage (V14 to V15) Reference Input Current (I14) Rating −55°C to +125°C 0°C to +70°C −40°C to +85°C −65°C to +150°C −65°C to +150°C −65°C to +125°C 300°C 36 V V− to V− + 36 V V− to V+ 4.25 mA V− to V+ ±18 V 5.0 mA Package Type 16-Lead CERDIP (Q) 16-Lead PDIP (P) 20-Terminal LCC (RC) 16-Lead SOIC (S) 1 θJA1 100 82 76 111 θJC 16 39 36 35 Unit °C/W °C/W °C/W °C/W θJA is specified for worst-case mounting conditions, that is, θJA is specified for device in socket for CERDIP, PDIP, and LCC packages; θJA is specified for device soldered to printed circuit board for SOIC package. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. C | Page 5 of 20 DAC08 DAC08 13 B5 TOP VIEW VLC 5 (Not To Scale) 12 B4 IOUT 6 11 B3 10 B6 V– 7 10 B2 B4 8 9 B5 00268-C-002 11 B7 B3 7 Figure 2. 16-Lead Dual In-Line Package (Q and P Suffixes) IOUT 8 9 B1 (MSB) Figure 3. 16-Lead SOIC (S Suffix) Rev. C | Page 6 of 20 VREF (–) COMP 1 20 19 18 VREF (+) V+ TOP VIEW 16 NC (Not To Scale) (MSB) B1 7 15 B8 (LSB) B2 8 14 B7 IOUT 5 COMP 4 B2 6 2 17 DAC08 NC 6 9 10 11 12 13 NC = NO CONNECT 00268-C-004 DAC08 13 V+ TOP VIEW (MSB) B1 5 (Not To Scale) 12 B8 (LSB) IOUT 4 3 V– 4 B6 14 B6 B5 VREF (–) 3 VLC 14 VREF (+) NC 15 B7 V– 3 B3 VREF (+) 2 NC 16 B8 (LSB) 15 VREF (–) B4 V+ 1 16 COMP 00268-C-003 VLC 1 IOUT 2 IOUT PIN CONNECTIONS Figure 4. DAC08RC/883 20-Lead LCC (RC Suffix) DAC08 TEST AND BURN-IN CIRCUITS +VREF C2 R1 = 9kΩ C1 = 0.001µF C2, C3 = 0.01µF +18V RREF OPTIONAL RESISTOR FOR OFFSET INPUTS RL REQ ≈ 200Ω TYPICAL VALUES: RIN = 5kΩ +VIN = 10V RP 15 4 16 2 NO CAP C1 RL R1 16 15 14 13 12 11 10 9 DAC08 1 2 3 4 5 6 7 8 Figure 5. Pulsed Reference Operation C3 –18V MIN Figure 6. Burn-In Circuit Rev. C | Page 7 of 20 00268-C-007 0V 14 00268-C-006 RIN DAC08 TYPICAL PERFORMANCE CHARACTERISTICS ALL BITS SWITCHED ON 1V 2.4V 1V 2.5V 0.4V 0.5V –1/2LSB OUTPUT 0V SETTLING +1/2LSB –0.5mA –2.5mA 100mV 200ns REQ ≈ 200Ω RL = 100Ω CC = 0 50ns 10mV 200ns/DIVISION 00268-C-011 00268-C-008 IOUT 50ns/DIVISION SETTLING TIME FIXTURE IFS = 2mA, RL = 1kΩ 1/2LSB = 4µA Figure 10. Full-Scale Settling Time Figure 7. Fast Pulsed Reference Operation 5 TA = TMIN TO TMAX IOUT 1.0mA IOUT 00268-C-009 2.0mA (0000|0000) 4 3 2 LIMIT FOR V– = –5V 1 0 (1111|1111) IREF = 2mA LIMIT FOR V– = –15V Figure 8. True and Complementary Output Operation 0 1 2 3 4 IREF, REFERENCE CURRENT (mA) 5 00268-C-012 0mA IFS, OUTPUT CURRENT (mA) ALL BITS HIGH Figure 11. Full-Scale Current vs. Reference Current 500 5mV 2V 400 PROPAGATION DELAY (ns) 2.4V 0.4V 0V 8µA 200 1LSB = 7.8µA 100 1LSB = 61nA 0 0.005 0.01 0.02 50ns/DIVISION 0.05 0.10 0.20 0.50 1.00 2.00 IFS, OUTPUT FULL-SCALE CURRENT (mA) Figure 9. LSB Switching Figure 12. LSB Propagation Delay vs. IFS Rev. C | Page 8 of 20 5.00 10.00 00268-C-013 50ns 100mV 00268-C-010 0 300 DAC08 10 2.0 R14 = R15 = 1kΩ RL ≤ 500V ALL BITS ON VR15 = 0V 8 4 1.6 2 –2 1 –8 –10 –12 0.8 CC = 15pF, VIN = 2.0V p-p CENTERED AT +1.0V LARGE SIGNAL 0.4 CC = 15pF, VIN = 50mV p-p CENTERED AT +200mV SMALL SIGNAL –14 0.1 0.5 2.0 1.0 FREQUENCY (MHz) 0.2 5.0 10.0 0 –50 50 100 TEMPERATURE (°C) 150 Figure 16. VTH − VLC vs. Temperature Figure 13. Reference Input Frequency Response 4.0 4.0 TA = TMIN TO TMAX ALL BITS ON TA = TMIN TO TMAX 3.2 OUTPUT CURRENT (mA) 3.2 NOTE: POSITIVE COMMON-MODE RANGE IS ALWAYS (V+) –1.5V 2.8 2.4 V– = –15V V– = –5V V+ = +15V 2.0 IREF = 2mA 1.6 IREF = 1mA 1.2 0.8 2.8 2.4 V– = –15V V– = –5V IREF = 2mA 2.0 1.6 IREF = 1mA 1.2 0.8 –6 18 –2 2 6 10 14 V15, REFERENCE COMMON-MODE VOLTAGE (V) 00268-C-015 –10 IREF = 0.2mA 0.4 IREF = 0.2mA 0.4 0 –14 ALL BITS ON 3.6 3.6 OUTPUT CURRENT (mA) 0 0 –14 –10 –2 2 6 OUTPUT VOLTAGE (V) –6 10 14 18 00268-C-018 –6 00268-C-017 –4 1.2 VTH–VLC (V) 2 0 00268-C-014 RELATIVE OUTPUT (dB) 6 Figure 17. Output Current vs. Output Voltage (Output Voltage Compliance) Figure 14. Reference Amp Common-Mode Range 28 10 24 20 OUTPUT VOLTAGE (V) 6 4 16 12 SHADED AREA INDICATES PERMISSIBLE OUTPUT VOLTAGE RANGE FOR V– = –15V. IREF ≤ 2.0mA. 8 4 FOR OTHER V– OR IREF, SEE OUTPUT CURRENT VS. OUTPUT VOLTAGE CURVE. 0 –4 2 0 –12 –8 –4 0 4 8 LOGIC INPUT VOLTAGE (V) 12 16 –12 –50 0 50 100 TEMPERATURE (°C) 150 Figure 18. Output Voltage Compliance vs. Temperature Figure 15. Logic Input Current vs. Input Voltage Rev. C | Page 9 of 20 00268-C-019 –8 00268-C-016 LOGIC INPUT (µA) 8 DAC08 1.8 10 1.6 9 POWER SUPPLY CURRENT (mA) BITS MAY BE HIGH OR LOW 1.2 B1 1.0 IREF = 2.0mA 0.8 0.6 B2 0.4 B4 V– = –5V = V– 0 –12 B5 B3 7 I– WITH IREF = 2mA 6 5 I– WITH IREF = 1mA 4 I– WITH IREF = 0.2mA 3 2 I+ 1 –15V –8 8 –4 0 4 8 LOGIC INPUT VOLTAGE (V) 12 16 0 0 –2 NOTE: B1 THROUGH B8 HAVE IDENTICAL TRANSFER CHARACTERISTICS. BITS ARE FULLY SWITCHED WITH LESS THAN 1/2 LSB ERROR, AT LESS THAN ±100mV FROM ACTUAL THRESHOLD. THESE SWITCHING POINTS ARE GUARANTEED TO LIE BETWEEN 0.8V AND 2.0V OVER THE OPERATING TEMPERATURE RANGE (VLC = 0.0V). –4 –6 –8 –10 –12 –14 –16 V–, NEGATIVE POWER SUPPLY (V dc) –18 –20 00268-C-022 0.2 00268-C-020 OUTPUT CURRENT (mA) 1.4 Figure 21. Power Supply Current vs. V− Figure 19. Bit Transfer Characteristics 10 10 ALL BITS HIGH OR LOW ALL BITS HIGH OR LOW 9 POWER SUPPLY CURRENT (mA) 8 7 I– 6 5 4 3 I+ 2 1 8 7 V– = –15V 6 IREF = 2.0mA I– 5 4 3 V+ = +15V I+ 2 0 2 4 6 8 12 14 16 10 V+, POSITIVE POWER SUPPLY (V dc) 18 20 0 Figure 20. Power Supply vs. V+ –50 0 50 100 TEMPERATURE (°C) 150 Figure 22. Power Supply Current vs. Temperature Rev. C | Page 10 of 20 00268-C-023 1 0 00268-C-021 POWER SUPPLY CURRENT (mA) 9 DAC08 BASIC CONNECTIONS +VREF MSB LSB B1 B2 B3 B4 B5 B6 B7 B8 IREF 14 RIN +VREF VREF (+) 14 5 6 7 8 9 10 11 12 RREF (R14) 15 VREF (–) IREF ≥ PEAK NEGATIVE SWING OF IIN 2 15 3 16 V– 1 V+ CC 14 R15 (OPTIONAL) COMP VIN HIGH INPUT IMPEDANCE +VREF MUST BE ABOVE PEAK POSITIVE SWING OF VIN 00268-C-024 15 MSB LSB B1 B2 B3 B4 B5 B6 B7 B8 IO 5.000kΩ 2 V+ V– B1 B2 B3 B4 B5 B6 B7 B8 5.000kΩ 14 IO VLC FOR FIXED REFERENCE, TTL OPERATION, TYPICAL VALUES ARE: VREF = 10.000V RREF = 5.000kΩ R15 = RREF CC = 0.01µF VLC = 0V (GROUND) Figure 24. Basic Positive Reference Operation EO 4 0.1µF +VREF 255 0.1µF IFR = × RREF 256 IO + IO = IFR FOR ALL LOGIC STATES Figure 23. Accommodating Bipolar References IREF = 2.000mA 13 R15 RREF RREF ≈ R15 +V REF IO 4 IO FULL RANGE HALF SCALE +LSB HALF SCALE HALF SCALE –LSB ZERO SCALE +LSB ZERO SCALE 1 1 1 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 1 1 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 1 0 1 1 0 IO IO EO EO 1.992 1.008 1.000 0.992 0.008 0.000 0.000 0.984 0.992 1.000 1.984 1.992 –9.960 –5.040 –5.000 –4.960 –0.040 0.000 –0.000 –4.920 –4.960 –5.000 –9.920 –9.960 EO Figure 25. Basic Unipolar Negative Operation 10V 10kΩ IO IREF = 2.000mA 4 14 POS. FULL RANGE POS. FULL RANGE –LSB ZERO SCALE +LSB ZERO SCALE ZERO SCALE –LSB NEG. FULL SCALE +LSB NEG. FULL SCALE EO 2 IO 10kΩ EO B1 B2 B3 B4 B5 B6 B7 B8 EO 1 1 1 1 1 1 1 1 –9.920 1 1 1 1 1 1 1 0 –9.840 1 0 0 0 0 0 0 1 –0.080 1 0 0 0 0 0 0 0 0.000 0 1 1 1 1 1 1 1 +0.080 0 0 0 0 0 0 0 1 +9.920 0 0 0 0 0 0 0 0 +10.000 EO +10.000 +9.920 +0.160 +0.080 0.000 –9.840 –9.920 00268-C-027 MSB LSB B1 B2 B3 B4 B5 B6 B7 B8 Figure 26. Basic Bipolar Output Operation 10kΩ POT RREF 14 14 IO 4 IREF (+) ≈ 2mA ≈1V APPROX 5kΩ –VREF 15 15 IFS ≈ IO R15 –VREF RREF 2 NOTE RREF SETS IFS; R15 IS FOR BIAS CURRENT CANCELLATION. Figure 28. Basic Negative Reference Operation Figure 27. Recommended Full-Scale Adjustment Circuit Rev. C | Page 11 of 20 00268-C-029 39kΩ LOW T.C. 4.5kΩ 00268-C-028 VREF 10V 00268-C-025 VIN IREF 00268-C-026 RREF IIN DAC08 10kΩ 5.0kΩ 15V VO REF01* 5.000kΩ 6 IO +15V B1 B2 B3 B4 B5 B6 B7 B8 4 5 POS. FULL RANGE EO ZERO SCALE NEG. FULL SCALE +1LSB NEG. FULL SCALE AD8671 5.0kΩ V+ VLC CC –V IO 2 1 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 0 0 0 1 0 0 0 EO 1 +4.960 0 0.000 1 –4.960 0 –5.000 00268-C-030 2 10V MSB LSB B1 B2 B3 B4 B5 B6 B7 B8 4 *OR ADR01 +15V –15V –15V Figure 29. Offset Binary Operation RL 4 0 TO –IFR × RL FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC). CONNECT INVERTING INPUT OF OP AMP TO IO (PIN 2): CONNECT IO (PIN 4) TO GROUND. IFR = CMOS, HTL, NMOS V+ ECL TTL, DTL, VTH = 1.4V 20kΩ 13kΩ 9.1kΩ VLC 2N3904 2N3904 2N3904 "A" 6.2kΩ 255 I 256 REF Figure 31. Negative Low Impedance Output Operation VTH = VLC 1.4V 15V CMOS 15V VTH = 7.6V 1 0 TO –IFR × RL RL FOR COMPLEMENTARY OUTPUT (OPERATION AS A NEGATIVE LOGIC DAC). CONNECT NONINVERTING INPUT OF OP AMP TO IO (PIN 2): CONNECT IO (PIN 4) TO GROUND. Figure 30. Positive Low Impedance Output Operation VLC IO 255 I 256 REF 00268-C-031 IFR = 2 EO AD8671 IO 0.1µF 3kΩ 39kΩ TO PIN 1 VLC 6.2kΩ –5.2V 2N3904 3kΩ 20kΩ TO PIN 1 VLC R3 400µA TEMPERATURE COMPENSATING VLC CIRCUITS Figure 32. Interfacing with Various Logic Families Rev. C | Page 12 of 20 "A" 00268-C-033 IO 2 EO AD8671 00268-C-032 IO 4 DAC08 APPLICATION INFORMATION REFERENCE AMPLIFIER SETUP The DAC08 is a multiplying D/A converter in which the output current is the product of a digital number and the input reference current. The reference current may be fixed or may vary from nearly zero to 4.0 mA. The full-scale output current is a linear function of the reference current and is given by I FR = 255 × I REF 256 where IREF = I14 In positive reference applications, an external positive reference voltage forces current through R14 into the VREF(+) terminal (Pin 14) of the reference amplifier. Alternatively, a negative reference may be applied to VREF(–) at Pin 15; reference current flows from ground through R14 into VREF(+) as in the positive reference case. This negative reference connection has the advantage of a very high impedance presented at Pin 15. The voltage at Pin 14 is equal to and tracks the voltage at Pin 15 due to the high gain of the internal reference amplifier. R15 (nominally equal to R14) is used to cancel bias current errors; R15 may be eliminated with only a minor increase in error. Bipolar references may be accommodated by offsetting VREF or Pin 15. The negative common-mode range of the reference amplifier is given by VCM – = V− plus (IREF × 1 kΩ) plus 2.5 V. The positive common-mode range is V+ less 1.5 V. When a dc reference is used, a reference bypass capacitor is recommended. A 5.0 V TTL logic supply is not recommended as a reference. If a regulated power supply is used as a reference, R14 should be split into two resistors with the junction bypassed to ground with a 0.1 µF capacitor. For most applications, the tight relationship between IREF and IFS eliminates the need for trimming IREF. If required, full-scale trimming can be accomplished by adjusting the value of R14, or by using a potentiometer for R14. An improved method of fullscale trimming that eliminates potentiometer T.C. effects is shown in the recommended full-scale adjustment circuit (Figure 27). Using lower values of reference current reduces negative power supply current and increases reference amplifier negative common-mode range. The recommended range for operation with a dc reference current is 0.2 mA to 4.0 mA. REFERENCE AMPLIFIER COMPENSATION FOR MULTIPLYING APPLICATIONS AC reference applications require the reference amplifier to be compensated using a capacitor from Pin 16 to V−. The value of this capacitor depends on the impedance presented to Pin 14; for R14 values of 1.0 kΩ, 2.5 kΩ, and 5.0 kΩ, minimum values of CC are 15 pF, 37 pF, and 75 pF. Larger values of R14 require proportionately increased values of CC for proper phase margin, so the ratio of CC (pF) to R14 (kΩ) = 15. For fastest response to a pulse, low values of R14 enabling small CC values should be used. If Pin 14 is driven by a high impedance such as a transistor current source, none of the preceding values suffice, and the amplifier must be heavily compensated, which decreases overall bandwidth and slew rate. For R14 = 1 kΩ and CC = 15 pF, the reference amplifier slews at 4 mA/µs, enabling a transition from IREF = 0 to IREF = 2 mA in 500 ns. Operation with pulse inputs to the reference amplifier can be accommodated by an alternate compensation scheme. This technique provides lowest full-scale transition times. An internal clamp allows quick recovery of the reference amplifier from a cutoff (IREF = 0) condition. Full-scale transition (0 mA to 2 mA) occurs in 120 ns when the equivalent impedance at Pin 14 is 200 Ω and CC = 0. This yields a reference slew rate of 16 mA/µs, which is relatively independent of the RIN and VIN values. LOGIC INPUTS The DAC08 design incorporates a unique logic input circuit that enables direct interface to all popular logic families and provides maximum noise immunity. This feature is made possible by the large input swing capability, 2 µA logic input current, and completely adjustable logic threshold voltage. For V− = −15 V, the logic inputs may swing between −10 V and +18 V. This enables direct interface with 15 V CMOS logic, even when the DAC08 is powered from a 5 V supply. Minimum input logic swing and minimum logic threshold voltage are given by V− + (IREF × 1 kΩ) + 2.5 V The logic threshold may be adjusted over a wide range by placing an appropriate voltage at the logic threshold control pin (Pin 1, VLC). Figure 16 shows the relationship between VLC and VTH over the temperature range, with VTH nominally 1.4 above VLC. For TTL and DTL interface, simply ground Pin 1. When interfacing ECL, an IREF = 1 mA is recommended. For interfacing other logic families, see Figure 32. For general set-up of the logic control circuit, note that Pin 1 sources 100 µA typical; external circuitry should be designed to accommodate this current. Rev. C | Page 13 of 20 DAC08 Fastest settling times are obtained when Pin 1 sees a low impedance. If Pin 1 is connected to a 1 kΩ divider, for example, it should be bypassed to ground by a 0.01 µF capacitor. cryptographic applications and further reduces the size of the power supply bypass capacitors. ANALOG OUTPUT CURRENTS The nonlinearity and monotonicity specifications of the DAC08 are guaranteed to apply over the entire rated operating temperature range. Full-scale output current drift is low, typically ±10 ppm/°C, with zero-scale output current and drift essentially negligible compared to 1/2 LSB. Both true and complemented output sink currents are provided where IO + IO = IFS. Current appears at the true (IO) output when a 1 (logic high) is applied to each logic input. As the binary count increases, the sink current at Pin 4 increases proportionally, in the fashion of a positive logic DAC. When a 0 is applied to any input bit, that current is turned off at Pin 4 and turned on at Pin 2. A decreasing logic count increases IO as in a negative or inverted logic DAC. Both outputs may be used simultaneously. If one of the outputs is not required, it must be connected to ground or to a point capable of sourcing IFS; do not leave an unused output pin open. Both outputs have an extremely wide voltage compliance enabling fast direct current-to-voltage conversion through a resistor tied to ground or other voltage source. Positive compliance is 36 V above V− and is independent of the positive supply. Negative compliance is given by V− + (IREF × 1 kΩ) + 2.5 V The dual outputs enable double the usual peak-to-peak load swing when driving loads in quasi-differential fashion. This feature is especially useful in cable driving, CRT deflection and in other balanced applications such as driving center-tapped coils and transformers. POWER SUPPLIES The DAC08 operates over a wide range of power supply voltages from a total supply of 9 V to 36 V. When operating at supplies of ±5 V or lower, IREF ≤ 1 mA is recommended. Low reference current operation decreases power consumption and increases negative compliance (Figure 11), reference amplifier negative common-mode range (Figure 14), negative logic input range (Figure 15), and negative logic threshold range (Figure 16). For example, operation at −4.5 V with IREF = 2 mA is not recommended because negative output compliance would be reduced to near zero. Operation from lower supplies is possible; however, at least 8 V total must be applied to ensure turn-on of the internal bias network. Symmetrical supplies are not required, as the DAC08 is quite insensitive to variations in supply voltage. Battery operation is feasible because no ground connection is required: however, an artificial ground may be used to ensure logic swings, etc., remain between acceptable limits. Power consumption is calculated as follows: PD = ( I + ) (V + ) + ( I − ) (V − ) A useful feature of the DAC08 design is that supply current is constant and independent of input logic states. This is useful in TEMPERATURE PERFORMANCE The temperature coefficient of the reference resistor R14 should match and track that of the output resistor for minimum overall full-scale drift. Settling times of the DAC08 decrease approximately 10% at –55°C. At +125°C, an increase of about 15% is typical. The reference amplifier must be compensated by using a capacitor from Pin 16 to V−. For fixed reference operation, a 0.01 µF capacitor is recommended. For variable reference applications, refer to the Reference Amplifier Compensation for Multiplying Applications section. MULTIPLYING OPERATION The DAC08 provides excellent multiplying performance with an extremely linear relationship between IFS and IREF over a range of 4 µA to 4 mA. Monotonic operation is maintained over a typical range of IREF from 100 µA to 4.0 mA. SETTLING TIME The DAC08 is capable of extremely fast settling times, typically 85 ns at IREF = 2.0 mA. Judicious circuit design and careful board layout must be used to obtain full performance potential during testing and application. The logic switch design enables propagation delays of only 35 ns for each of the 8 bits. Settling time to within 1/2 LSB of the LSB is therefore 35 ns, with each progressively larger bit taking successively longer. The MSB settles in 85 ns, thus determining the overall settling time of 85 ns. Settling to 6-bit accuracy requires about 65 ns to 70 ns. The output capacitance of the DAC08, including the package, is approximately 15 pF; therefore the output RC time constant dominates settling time if RL > 500 Ω. Settling time and propagation delay are relatively insensitive to logic input amplitude and rise and fall times, due to the high gain of the logic switches. Settling time also remains essentially constant for IREF values. The principal advantage of higher IREF values lies in the ability to attain a given output level with lower load resistors, thus reducing the output RC time constant. Measuring the settling time requires the ability to accurately resolve ±4 µA; therefore a 1 kΩ load is needed to provide adequate drive for most oscilloscopes. The settling time fixture shown in Figure 33 uses a cascade design to permit driving a 1 kΩ load with less than 5 pF of parasitic capacitance at the measurement node. At IREF values of less than 1.0 mA, excessive Rev. C | Page 14 of 20 DAC08 minor sacrifice in settling time. Fastest operation can be obtained by using short leads, minimizing output capacitance and load resistor values, and by adequate bypassing at the supply, reference, and VLC terminals. Supplies do not require large electrolytic bypass capacitors because the supply current drain is independent of input logic states; 0.1 µF capacitors at the supply pins provide full transient protection. RC damping of the output is difficult to prevent while maintaining adequate sensitivity. However, the major carry from 01111111 to 10000000 provides an accurate indicator of settling time. This code change does not require the normal 6.2 time constants to settle to within ±0.2% of the final value, and thus settling time is observed at lower values of IREF. DAC08 switching transients or “glitches” are very low and can be further reduced by small capacitive loads at the output at a VL FOR TURN-ON, VL = 2.7V FOR TURN-OFF, VL = 0.7V 1kΩ +5V 1µF 50µF MINIMUM CAPACITANCE VOUT 1× PROBE 1kΩ VCL 0.7V Q1 VIN 0.1µF RREF 1µF 14 5 6 7 8 9 10 11 12 100kΩ 4 15 15kΩ –0.4V 0.1µF IOUT DAC08 R15 2kΩ +0.4V 0V 0V 2 13 3 –15V 16 0.01µF 00268-C-034 +VREF Q2 0.1µF 0.1µF +15V –15V Figure 33. Settling Time Measurement Rev. C | Page 15 of 20 DAC08 ADI CURRENT OUTPUT DACS Table 4 lists the latest DACS available from Analog Devices. Table 4. Model AD5425 AD5426 AD5450 AD5424 AD5429 AD5428 AD5432 AD5451 AD5433 AD5439 AD5440 AD5443 AD5452 AD5445 AD5444 AD5449 AD5415 AD5447 AD5405 AD5453 AD5553 AD5556 AD5446 AD5555 AD5557 AD5543 AD5546 AD5545 AD5547 Bits 8 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 12 12 12 14 14 14 14 14 14 16 16 16 16 Outputs 1 1 1 1 2 2 1 1 1 2 2 1 1 1 1 2 2 2 2 1 1 1 1 2 2 1 1 2 2 Interface SPI, 8-bit load SPI SPI Parallel SPI Parallel SPI SPI Parallel SPI Parallel SPI SPI Parallel SPI SPI SPI Parallel Parallel SPI SPI Parallel SPI SPI Parallel SPI Parallel SPI Parallel Package MSOP-10 MSOP-10 SOT23-8 TSSOP-16 TSSOP-16 TSSOP-20 MSOP-10 SOT23-8 TSSOP-20 TSSOP-16 TSSOP-24 MSOP-10 SOT23-8 TSSOP-20 MSOP-10 TSSOP-16 TSSOP-24 TSSOP-24 LFCSP-40 SOT23-8 MSOP-8 TSSOP-28 MSOP-10 TSSOP-16 TSSOP-38 MSOP-8 TSSOP-28 TSSOP-16 TSSOP-38 Comments Fast 8-bit load; see also AD5426 See also AD5425 fast load See also AD5425 fast load See also AD5452 and AD5444 Higher accuracy version of AD5443; see also AD5444 Higher accuracy version of AD5443; see also AD5452 Uncommitted resistors Uncommitted resistors MSOP version of AD5453; compatible with AD5443, AD5432, AD5426 Rev. C | Page 16 of 20 DAC08 OUTLINE DIMENSIONS 0.785 (19.94) 0.765 (19.43) 0.745 (18.92) 16 9 1 8 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.015 (0.38) MIN 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.005 (0.13) MIN 0.098 (2.49) MAX 16 0.310 (7.87) 0.220 (5.59) 9 PIN 1 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 1 0.200 (5.08) MAX 8 0.840 (21.34) MAX 0.060 (1.52) 0.015 (0.38) 0.320 (8.13) 0.290 (7.37) 0.150 (3.81) MIN 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) SEATING PLANE 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.200 (5.08) 0.125 (3.18) 0.100 (2.54) BSC 0.023 (0.58) 0.014 (0.36) COMPLIANT TO JEDEC STANDARDS MO-095AC CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.015 (0.38) 0.008 (0.20) 15° 0° 0.070 (1.78) SEATING PLANE 0.030 (0.76) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 35. 16-Lead CERDIP (Q-16) Dimensions shown in inches and (mm) Figure 34. 16-Lead PDIP (N-16) Dimensions shown in inches and (mm) 10.00 (0.3937) 9.80 (0.3858) 4.00 (0.1575) 3.80 (0.1496) 16 9 1 8 1.27 (0.0500) BSC 1.75 (0.0689) 1.35 (0.0531) 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.100 (2.54) 0.064 (1.63) 6.20 (0.2441) 5.80 (0.2283) 0.095 (2.41) 0.075 (1.90) 19 18 0.50 (0.0197) × 45° 0.25 (0.0098) 8° 0.51 (0.0201) SEATING 0.25 (0.0098) 0° 1.27 (0.0500) 0.31 (0.0122) PLANE 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 36. 16-Lead SOIC (R-16A) Dimensions shown in inches and (mm) 0.200 (5.08) REF 0.100 (2.54) REF 0.015 (0.38) MIN 0.075 (1.91) REF 0.358 (9.09) 0.342 (8.69) SQ 0.358 (9.09) MAX SQ 0.088 (2.24) 0.054 (1.37) 0.011 (0.28) 0.007 (0.18) R TYP 0.075 (1.91) REF 0.055 (1.40) 0.045 (1.14) 3 20 4 0.028 (0.71) 0.022 (0.56) 1 BOTTOM VIEW 14 13 0.050 (1.27) BSC 8 9 45° TYP 0.150 (3.81) BSC CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 37. 20-Terminal Leadless Chip Carrier (E-20) Dimensions shown in inches and (mm) Rev. C | Page 17 of 20 DAC08 ORDERING GUIDE Model1 DAC08AQ DAC08AQ/883C2 DAC08HP DAC08HQ DAC08Q DAC08RC/883C2 DAC08EP DAC08EQ DAC08ES DAC08ES-REEL DAC08ESZ3 DAC08ESZ-REEL3 DAC08CP DAC08CPZ3 DAC08CS DAC08CS-REEL DAC08CSZ3 DAC08CSZ-REEL3 NL ±0.10% ±0.10% ±0.10% ±0.10% ±0.19% ±0.19% ±0.19% ±0.19% ±0.19% ±0.19% ±0.19% ±0.19% ±0.39% ±0.39% ±0.39% ±0.39% ±0.39% ±0.39% Temperature Range −55°C to +125°C −55°C to +125°C 0°C to 70°C 0°C to 70°C −55°C to +125°C −55°C to +125°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description CERDIP-16 CERDIP-16 PDIP-16 CERDIP-16 CERDIP-16 LCC-20 PDIP-16 CERDIP-16 SOIC-16 SOIC-16 SOIC-16 SOIC-16 PDIP-16 PDIP-16 SOIC-16 SOIC-16 SOIC-16 SOIC-16 1 Devices processed in total compliance to MIL-STD-883. Consult the factory for the 883 data sheet. For availability and burn-in information on the SOIC and PLCC packages, contact your local sales office. 3 Z = Pb-free part. 2 Rev. C | Page 18 of 20 Package Option Q-16 Q-16 N-16 Q-16 Q-16 E-20 N-16 Q-16 R-16A (Narrow Body) R-16A (Narrow Body) R-16A (Narrow Body) R-16A (Narrow Body) N-16 N-16 R-16A (Narrow Body) R-16A (Narrow Body) R-16A (Narrow Body) R-16A (Narrow Body) No. Parts Per Container 25 25 25 25 25 55 25 25 47 2500 47 2500 25 25 47 2500 47 2500 DAC08 NOTES Rev. C | Page 19 of 20 DAC08 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00268–0–11/04(C) Rev. C | Page 20 of 20 Analog Devices DAC08 - 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) Search: Parametric Search | Page 1 of 6 Replacement Parts Search View Cart | Home > Digital to Analog Converters > D/A Converters Contact Us Digital to Analog Converters D/A Converters Audio D/A Converters Interface) Data Sheets Rev C, 11/2004 (pdf, 592K) More Data Sheets... Video Encoders Lead(Pb) - Free Data Design Center Print this Page DAC08 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Digital Potentiometers All Product Categories | Email PDF Application Notes Evaluation Boards Price, Packaging, and Availability (Data Sheet Help) Product Description The DAC-08 series of 8-bit monolithic digital-to-analog converters provide very high-speed performance coupled with low cost and outstanding applications flexibility. Advanced...More All Solutions/ Applications Specifications Resolution (Bits) 8bit Buy Online DAC Update Rate 11.8MSPS DAC Settling Time 85ns # DAC Outputs 1 DAC Type Current Out DAC Input Format Par Pwr Diss (Max) 33mW Functional Block Diagram Enlarge Find Similar Products http://www.analog.com/en/prod/0%2C2877%2CDAC08%2C00.html 17-Aug-2007 Analog Devices DAC08 - 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) Symbols and Footprints Other Diagrams: Page 2 of 6 Pin Out Diagram Features „ Fast Settling Output Current: 85 ns „ Full-Scale Current Prematched to ±1 LSB „ Direct Interface to TTL, CMOS, ECL, HTL, PMOS „ Nonlinearity to 0.1% Maximum over Temperature Range „ Complementary Current Outputs http://www.analog.com/en/prod/0%2C2877%2CDAC08%2C00.html „ Wide Range Multiplying Capability: 1 MHz Bandwidth „ Low FS Current Drift: ±10 ppm/°C „ Wide Power Supply Range: ±4.5 V to ±18 V „ Low Power Consumption: 33 mW @ ±5 V „ Low Cost „ Available in Die Form 17-Aug-2007 Analog Devices DAC08 - 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) Page 3 of 6 Design Tools AD9772A Interpolating DAC This tool displays harmonic images and spurs in a DAC output. The user can define a post-DAC analog filter to suppress these images. The effect of this filter is plotted on the graph and shown in the accompanying chart. AD9777A Interpolating DAC This tool displays harmonic images and spurs in a DAC output. The user can define a post-DAC analog filter to suppress these images. The effect of this filter is plotted on the graph and shown in the accompanying chart. Price, Packaging, and Availability Print Table DAC08 Model Options Status Package Pins Temp Range Price* (100499) Available RoHS Compliant Samples Cart Purchase Cart 5962-89932012A Prodn 20 ld LCC 20 TBD $31.68 11/2/2007 N Material Declaration Contact ADI Add to Cart DAC08AQ Prodn 16 ld CerDIP 16 Ind $6.23 - N Material Declaration Contact ADI Add to Cart DAC08AQ/883C Prodn 16 ld CerDIP 16 Ind $8.50 - N Material Declaration Contact ADI Add to Cart DAC08CP Prodn 16 ld PDIP 16 TBD $1.20 8/17/2007 N Material Declaration Contact ADI Add to Cart DAC08CPZ Prodn 16 ld PDIP 16 TBD $1.20 8/17/2007 Y Material Declaration Contact ADI Add to Cart DAC08CQ Obs 16 ld CerDIP 16 Ind - - N Material Declaration Contact ADI Contact ADI DAC08CS Prodn 16 ld SOIC 16 TBD $1.20 8/17/2007 N Material Model http://www.analog.com/en/prod/0%2C2877%2CDAC08%2C00.html Contact Add to Cart 17-Aug-2007 Analog Devices DAC08 - 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) Page 4 of 6 Declaration ADI DAC08CSZ Prodn 16 ld SOIC 16 TBD $1.20 8/17/2007 Y Material Declaration Contact ADI Add to Cart DAC08CSZ-REEL Prodn 16 ld SOIC 16 TBD - 8/17/2007 Y Material Declaration Contact ADI Add to Cart DAC08EP Prodn 16 ld PDIP 16 Comm $1.50 8/17/2007 N Material Declaration Contact ADI Add to Cart DAC08EPZ Contact ADI 16 ld PDIP 16 Comm $1.50 8/17/2007 Y Material Declaration Contact ADI Contact ADI DAC08EQ Prodn 16 ld CerDIP 16 TBD $1.93 8/17/2007 N Material Declaration Contact ADI Add to Cart DAC08ES Prodn 16 ld SOIC 16 Comm $1.50 8/17/2007 N Material Declaration Contact ADI Add to Cart DAC08ESZ Prodn 16 ld SOIC 16 Comm $1.50 8/17/2007 Y Material Declaration Contact ADI Add to Cart DAC08ESZ-REEL Prodn 16 ld SOIC 16 Comm - 8/17/2007 Y Material Declaration Contact ADI Add to Cart DAC08HP Prodn 16 ld PDIP 16 TBD $2.25 9/28/2007 N Material Declaration Contact ADI Add to Cart DAC08HPZ LAST TIME BUY 16 ld PDIP 16 TBD $2.25 - Y Material Declaration Contact ADI Contact ADI DAC08HQ Prodn 16 ld CerDIP 16 Ind $2.83 9/14/2007 N Material Declaration Contact ADI Add to Cart DAC08Q Prodn 16 TBD $4.53 8/17/2007 N Material 16 ld http://www.analog.com/en/prod/0%2C2877%2CDAC08%2C00.html Contact Add to Cart 17-Aug-2007 Analog Devices DAC08 - 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) CerDIP Page 5 of 6 Declaration ADI Obs 16 ld CerDIP 16 TBD - - N Material Declaration Contact ADI Contact ADI DAC08RC/883C Prodn 20 ld LCC 20 TBD $23.80 8/31/2007 N Material Declaration Contact ADI Add to Cart JM38510/11301BEA Prodn 16 ld CerDIP 16 Ind $16.50 8/17/2007 N Material Declaration Contact ADI Add to Cart DAC08Q/883C The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing. View Sales and Distribution Offices Find Similar Products Parametric Selection Table Expand Table Part# Res (bits) Update Rate Settling Time # Outputs AD9748 8 210MSPS 11ns 1 AD5424 8 20.4MSPS 30ns 1 AD9708 8 125MSPS 35ns 1 AD5428 8 21.3MSPS 30ns 2 http://www.analog.com/en/prod/0%2C2877%2CDAC08%2C00.html 17-Aug-2007 Analog Devices DAC08 - 8-Bit, High Speed, Multiplying D/A Converter (Universal Digital Logic Interface) Page 6 of 6 AD9709 8 125MSPS 35ns 2 AD9750 10 125MSPS 35ns 1 AD5433 10 20.4MSPS 35ns 1 ADV7120 8 80MSPS 12ns 3 AD9740 10 210MSPS 11ns 1 ADV7128 10 80MSPS 12ns 1 ADV7129 8 360MSPS 25ns 3 Privacy/Security myAnalog Contact ADI Site Map Registration Technical Support Terms of U © 1995-2007 Analog Devices, Inc. All Rights Reserved This site is optimized for IE 6.0+, NN 7.1, and Mozilla. http://www.analog.com/en/prod/0%2C2877%2CDAC08%2C00.html 17-Aug-2007