DC1319B-B

LT3756/LT3756-1/LT3756-2 100VIN, 100VOUT LED Controller FEATURES DESCRIPTION 3000:1 True Color PWM™ Dimming Wide Input Voltage Range: 6V to 100V Output Voltage Up to 100V Constant-Current and Constant-Voltage Regulation 100mV High Side Current Sense Drives LEDs in Boost, Buck Mode, Buck-Boost Mode, SEPIC or Flyback Topology n Adjustable Frequency: 100kHz to 1MHz n Open LED Protection n Programmable Undervoltage Lockout with Hysteresis n Improved Open LED Status Pin (LT3756-2) n Frequency Synchronization (LT3756-1) n PWM Disconnect Switch Driver n CTRL Pin Provides Analog Dimming n Low Shutdown Current: 1.2V or ILED = (VCTRL –100mV)/ (10 • RLED) when VCTRL ≤ 1V. Input bias current is typically 25µA. Below 3V, ISN is an input to the short-circuit protection feature that forces GATE to 0V if ISP exceeds ISN by more than 150mV (typ). ISP (Pin 4/Pin 14): Connection Point for the Positive Terminal of the Current Feedback Resistor. Input bias current is dependent upon CTRL pin voltage as shown in the TPC. ISP is an input to the short-circuit protection feature when ISN is less than 3V. VC (Pin 5/Pin 15): Transconductance Error Amplifier Output Pin Used to Stabilize the Voltage Loop with an RC Network. This pin is high impedance when PWM is low, a feature that stores the demand current state variable for the next PWM high transition. Connect a capacitor between this pin and GND; a resistor in series with the capacitor is recommended for fast transient response. Rev. C 8 For more information www.analog.com LT3756/LT3756-1/LT3756-2 PIN FUNCTIONS CTRL (Pin 6/Pin 16): Current Sense Threshold Adjustment Pin. Regulating threshold V(ISP – ISN) is 1/10th VCTRL plus an offset for 0V < VCTRL < 1V. For VCTRL > 1.2V the current sense threshold is constant at the full-scale value of 100mV. For 1V < VCTRL < 1.2V, the dependence of current sense threshold upon VCTRL transitions from a linear function to a constant value, reaching 98% of full-scale value by VCTRL = 1.1V. Do not leave this pin open. VREF (Pin 7/Pin 1): Voltage Reference Output Pin, Typically 2V. This pin drives a resistor divider for the CTRL pin, either for analog dimming or for temperature limit/compensation of LED load. Can supply up to 100μA. PWM (Pin 8/Pin 2): A signal low turns off switcher, idles oscillator and disconnects VC pin from all internal loads. PWMOUT pin follows PWM pin. PWM has an internal pull-down resistor. If not used, connect to INTVCC. OPENLED (Pin 9/Pin 3, LT3756 and LT3756-2): An opencollector pull-down on OPENLED asserts if the FB input is greater than the FB regulation threshold minus 50mV (typical). To function, the pin requires an external pull-up current less than 1mA. When the PWM input is low and the DC/DC converter is idle, the OPENLED condition is latched to the last valid state when the PWM input was high. When PWM input goes high again, the OPENLED pin will be updated. This pin may be used to report an open LED fault. SYNC (Pin 9/Pin 3, LT3756-1 Only): The SYNC pin is used to synchronize the internal oscillator to an external logic level signal. The RT resistor should be chosen to program an internal switching frequency 20% slower than the SYNC pulse frequency. Gate turn-on occurs a fixed delay after the rising edge of SYNC. For best PWM performance, the PWM rising edge should occur at least 200ns before the SYNC rising edge. Use a 50% duty cycle waveform to drive this pin. This pin replaces OPENLED on LT3756-1 option parts. If not used, tie this pin to GND. SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates oscillator frequency and compensation pin voltage (VC) clamp. The soft-start interval is set with an external capacitor. The pin has a 10µA (typical) pull-up current source to an internal 2.5V rail. The soft-start pin is reset to GND by an undervoltage condition (detected by SHDN/UVLO pin) or thermal limit. RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin. Set the frequency using a resistor to GND (for resistor values, see the Typical Performance curve or Table 1). Do not leave the RT pin open. SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage Detect Pin. An accurate 1.22V falling threshold with externally programmable hysteresis detects when power is OK to enable switching. Rising hysteresis is generated by the external resistor divider and an accurate internal 2.1µA pull-down current. Above the threshold (but below 6V), SHDN/UVLO input bias current is sub-µA. Below the falling threshold, a 2.1µA pull-down current is enabled so the user can define the hysteresis with the external resistor selection. An undervoltage condition resets soft-start. Tie to 0.4V, or less, to disable the device and reduce VIN quiescent current below 1µA. INTVCC (Pin 13/Pin 7): Regulated Supply for Internal Loads, GATE Driver and PWMOUT Driver. Supplied from VIN and regulates to 7.15V (typical). INTVCC must be bypassed with a 4.7µF capacitor placed close to the pin. Connect INTVCC directly to VIN if VIN is always less than or equal to 8V. VIN (Pin 14/Pin 8): Input Supply Pin. Must be locally bypassed with a 0.22µF (or larger) capacitor placed close to the IC. SENSE (Pin 15/Pin 9): The current sense input for the control loop. Kelvin connect this pin to the positive terminal of the switch current sense resistor, RSENSE, in the source of the NFET. The negative terminal of the current sense resistor should be connected to the GND plane close to the IC. GATE (Pin 16/Pin 10): N-channel FET Gate Driver Output. Switches between INTVCC and GND. Driven to GND during shutdown, fault or idle states. GND (Pin 17/Pin 17): Ground. This pin also serves as current sense input for control loop, sensing negative terminal of current sense resistor. Solder the exposed pad directly to ground plane. Rev. C For more information www.analog.com 9 LT3756/LT3756-1/LT3756-2 BLOCK DIAGRAM SHDN/UVLO 1.22V – + A6 VC FB 1.3V 2.1µA A5 + gm – 1.25V SHORT-CIRCUIT DETECT + – + A10 – 150mV gm EAMP ISN + A1 – 5k ISP CTRL BUFFER CTRL 1.1V + + A3 – OVFB COMPARATOR 2V 170k R 7.15V INTVCC GATE Q DRIVER S PWM COMPARATOR 10µA AT A1+ = A1– ISENSE + – SENSE A4 FAULT LOGIC GND RAMP GENERATOR VC SSCLAMP – +A7 – LDO +A8 1.25V + A2 – Q2 140µA VIN SCILMB 50k VREF PWM 10µA AT FB = 1.25V 10µA SCILMB PWMOUT – + SHDN 100kHz TO 1MHz OSCILLATOR 10µA 1.25V TLIM 165°C + + – 1.2V FB FREQ PROG SS RT – + OPENLED (LT3756 AND LT3756-2) SYNC (LT3756-1 ONLY) 375612 BD Rev. C 10 For more information www.analog.com LT3756/LT3756-1/LT3756-2 OPERATION The LT3756 is a constant-frequency, current mode controller with a low side NMOS gate driver. The GATE pin and PWMOUT pin drivers, and other chip loads, are powered from INTVCC, which is an internally regulated supply. In the discussion that follows, it will be helpful to refer to the Block Diagram of the IC. In normal operation, with the PWM pin low, the GATE and PWMOUT pins are driven to GND, the VC pin is high impedance to store the previous switching state on the external compensation capacitor, and the ISP and ISN pin bias currents are reduced to leakage levels. When the PWM pin transitions high, the PWMOUT pin transitions high after a short delay. At the same time, the internal oscillator wakes up and generates a pulse to set the PWM latch, turning on the external power MOSFET switch (GATE goes high). A voltage input proportional to the switch current, sensed by an external current sense resistor between the SENSE and GND input pins, is added to a stabilizing slope compensation ramp and the resulting “switch current sense” signal is fed into the positive terminal of the PWM comparator. The current in the external inductor increases steadily during the time the switch is on. When the switch current sense voltage exceeds the output of the error amplifier, labeled “VC”, the latch is reset and the switch is turned off. During the switch off phase, the inductor current decreases. At the completion of each oscillator cycle, internal signals such as slope compensation return to their starting points and a new cycle begins with the set pulse from the oscillator. Through this repetitive action, the PWM control algorithm establishes a switch duty cycle to regulate a current or voltage in the load. The VC signal is integrated over many switching cycles and is an amplified version of the difference between the LED current sense voltage, measured between ISP and ISN, and the target difference voltage set by the CTRL pin. In this manner, the error amplifier sets the correct peak switch current level to keep the LED current in regulation. If the error amplifier output increases, more current is demanded in the switch; if it decreases, less current is demanded. The switch current is monitored during the on-phase and the voltage across the SENSE pin is not allowed to exceed the current limit threshold of 108mV (typical). If the SENSE pin exceeds the current limit threshold, the SR latch is reset regardless of the output state of the PWM comparator. Likewise, at an ISP/ISN common mode voltage less than 3V, the difference between ISP and ISN is monitored to determine if the output is in a short-circuit condition. If the difference between ISP and ISN is greater than 150mV (typical), the SR latch will be reset regardless of the PWM comparator. These functions are intended to protect the power switch, as well as various external components in the power path of the DC/DC converter. In voltage feedback mode, the operation is similar to that described above, except the voltage at the VC pin is set by the amplified difference of the internal reference of 1.25V (nominal) and the FB pin. If FB is lower than the reference voltage, the switch current will increase; if FB is higher than the reference voltage, the switch demand current will decrease. The LED current sense feedback interacts with the FB voltage feedback so that FB will not exceed the internal reference and the voltage between ISP and ISN will not exceed the threshold set by the CTRL pin. For accurate current or voltage regulation, it is necessary to be sure that under normal operating conditions, the appropriate loop is dominant. To deactivate the voltage loop entirely, FB can be connected to GND. To deactivate the LED current loop entirely, the ISP and ISN should be tied together and the CTRL input tied to VREF . Two LED specific functions featured on the LT3756 are controlled by the voltage feedback pin. First, when the FB pin exceeds a voltage 50mV lower (–4%) than the FB regulation voltage, the pull-down driver on the OPENLED pin is activated (LT3756 and LT3756-2 only). This function provides a status indicator that the load may be disconnected and the constant-voltage feedback loop is taking control of the switching regulator. When the FB pin exceeds the FB regulation voltage by 60mV (5% typical), the PWMOUT pin is driven low, ignoring the state of the PWM input. In the case where the PWMOUT pin drives a disconnect NFET, this action isolates the LED load from GND, preventing excessive current from damaging the LEDs. If the FB input exceeds both the open LED and the overvoltage thresholds, then an externally driven overvoltage event has caused the FB pin to be too high and the OPENLED pull-down will be de-asserted. The LT3756-2 will re-assert the OPENLED signal when FB falls below the overvoltage threshold and remains above the open LED threshold. The LT3756 is prevented from re-asserting OPENLED until FB drops below both thresholds. Rev. C For more information www.analog.com 11 LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION INTVCC Regulator Bypassing and Operation The INTVCC pin requires a capacitor for stable operation and to store the charge for the large GATE switching currents. Choose a 10V rated low ESR, X7R or X5R ceramic capacitor for best performance. A 4.7µF capacitor will be adequate for many applications. Place the capacitor close to the IC to minimize the trace length to the INTVCC pin and also to the IC ground. An internal current limit on the INTVCC output protects the LT3756 from excessive on-chip power dissipation. The minimum value of this current should be considered when choosing the switching NMOS and the operating frequency. IINTVCC can be calculated from the following equation: The following equations should be used to determine the values of the resistors: VIN,FALLING = 1.22 • R1+ R2 R2 VIN,RISING = 2.1µA • R1+ VIN,FALLING VIN LT3756 R1 SHDN/UVLO R2 375612 F01 Figure 1. Resistor Connection to Set VIN Undervoltage Shutdown Threshold IINTVCC = QG • fOSC LED Current Programming Careful choice of a lower QG FET will allow higher switching frequencies, leading to smaller magnetics. The INTVCC pin has its own undervoltage disable (UVLO) set to 4.1V (typical) to protect the external FETs from excessive power dissipation caused by not being fully enhanced. If the INTVCC pin drops below the UVLO threshold, the GATE and PWMOUT pins will be forced to 0V and the soft-start pin will be reset. The LED current is programmed by placing an appropriate value current sense resistor, RLED, in series with the LED string. The voltage drop across RLED is (Kelvin) sensed by the ISP and ISN pins. Typically, sensing of the current should be done at the top of the LED string. If this option is not available, then the current may be sensed at the bottom of the string, but take caution that the minimum ISN value does not fall below 3V, which is the lower limit of the LED current regulation function. The CTRL pin should be tied to a voltage higher than 1.1V to get the full-scale 100mV (typical) threshold across the sense resistor. The CTRL pin can also be used to dim the LED current to zero, although relative accuracy decreases with the decreasing voltage sense threshold. When the CTRL pin voltage is less than 1.0V, the LED current is: If the input voltage, VIN, will not exceed 8V, then the INTVCC pin could be connected to the input supply. Be aware that a small current (less than 12μA) will load the INTVCC in shutdown. If VIN is normally above, but occasionally drops below the INTVCC regulation voltage, then the minimum operating VIN will be close to 7V . This value is determined by the dropout voltage of the linear regulator and the 4.5V (4.1V typical) INTVCC undervoltage lockout threshold mentioned above. Programming the Turn-On and Turn-Off Thresholds with the SHDN/UVLO Pin The falling UVLO value can be accurately set by the resistor divider. A small 2.1µA pull-down current is active when SHDN/UVLO is below the threshold. The purpose of this current is to allow the user to program the rising hysteresis. VCTRL − 100mV I LED = RLED • 10 When the CTRL pin voltage is between 1V and 1.2V the LED current varies with CTRL, but departs from the equation above by an increasing amount as CTRL voltage increases. Ultimately, above CTRL = 1.2V the LED current no longer varies with CTRL. At CTRL = 1.1V, the actual value of ILED is ~98% of the equation’s estimate. Rev. C 12 For more information www.analog.com LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION When VCTRL is higher than 1.2V, the LED current is regulated to: ILED = 100mV RLED The LED current programming feature can increase total dimming range by a factor of 10. The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a thermistor to provide overtemperature protection for the LED load, or with a resistor divider to VIN to reduce output power and switching current when VIN is low. The presence of a time varying differential voltage signal (ripple) across ISP and ISN at the switching frequency is expected. The amplitude of this signal is increased by high LED load current, low switching frequency and/or a smaller value output filter capacitor. Some level of ripple signal is acceptable: the compensation capacitor on the VC pin filters the signal so the average difference between ISP and ISN is regulated to the user-programmed value. Ripple voltage amplitude (peak-to-peak) in excess of 20mV should not cause misoperation, but may lead to noticeable offset between the average value and the user-programmed value. R4 R3 + RSEN(EXT) VOUT – LT3756 100k LED ARRAY COUT FB R4 375612 F03 Figure 3. Feedback Resistor Connection for Buck Mode or Buck-Boost Mode LED Driver ISP/ISN Short-Circuit Protection Feature (for SEPIC) R4 Dimming Control R3 + R4 R4 For a boost type LED driver, set the resistor from the output to the FB pin such that the expected VFB during VIN LT3756 R3 R3 For a boost or SEPIC application, the output voltage can be set by selecting the values of R3 and R4 (see Figure 2) according to the following equation: VOUT = VBE + 1.25 • The ISP and ISN pins have a protection feature independent of the LED current sense feature that operates at ISN below 3V. The purpose of this feature is to provide continuous current sensing when ISN is below the LED current sense common mode range (during start-up or an output short-circuit fault) to prevent the development of excessive switching currents that could damage the power components in a SEPIC converter. The action threshold (150mV, typ) is above the default LED current sense threshold, so that no interference will occur over the ISN voltage range where these two functions overlap. This feature acts in the same manner as SENSE current limit — it prevents GATE from going high (switch turn-on) until the ISP/ISN difference falls below the threshold. If the load has appreciable series inductance, use of a Schottky clamp from GND to ISN is recommended for the SEPIC to prevent excessive current flowing from the ISN pin in a fault. Programming Output Voltage (Constant-Voltage Regulation) or Open LED/Overvoltage Threshold VOUT = 1.25 • normal operation will not exceed 1.1V. For an LED driver of buck or a buck-boost configuration, the output voltage is typically level-shifted to a signal with respect to GND as illustrated in Figure 3. The output can be expressed as: FB 375612 F02 Figure 2. Feedback Resistor Connection for Boost or SEPIC LED Drivers There are two methods to control the current source for dimming using the LT3756. One method uses the CTRL pin to adjust the current regulated in the LEDs. A second Rev. C For more information www.analog.com 13 LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION Programming the Switching Frequency The RT frequency adjust pin allows the user to program the switching frequency from 100kHz to 1MHz to optimize efficiency/performance or external component size. Higher frequency operation yields smaller component size but increases switching losses and gate driving current, and may not allow sufficiently high or low duty cycle operation. Lower frequency operation gives better performance at the cost of larger external component size. For an appropriate RT resistor value see Table 1. An external resistor from the RT pin to GND is required—do not leave this pin open. Duty Cycle Considerations Switching duty cycle is a key variable defining converter operation, therefore, its limits must be considered when programming the switching frequency for a particular application. The fixed minimum on-time and minimum off-time (see Figure 4) and the switching frequency define the minimum and maximum duty cycle of the switch, respectively. The following equations express the minimum/ maximum duty cycle: Min Duty Cycle = (minimum on-time) • switching frequency Max Duty Cycle = 1 – (minimum off-time) • switching frequency When calculating the operating limits, the typical values for on/off-time in the data sheet should be increased by at least 60ns to allow margin for PWM control latitude, GATE rise/fall times and SW node rise/fall times. 300 CGATE = 3300pF 250 MINIMUM ON-TIME 200 TIME (ns) method uses the PWM pin to modulate the current source between zero and full current to achieve a precisely programmed average current. To make PWM dimming more accurate, the switch demand current is stored on the VC node during the quiescent phase when PWM is low. This feature minimizes recovery time when the PWM signal goes high. To further improve the recovery time, a disconnect switch may be used in the LED current path to prevent the ISP node from discharging during the PWM signal low phase. The minimum PWM on or off time will depend on the choice of operating frequency and external component selection. With operation in discontinuous conduction mode (DCM), regulated current pulses as short as 1µs are achievable. But, the best overall combination of PWM and analog dimming (with CTRL) is available if the minimum PWM pulse is at least six switching cycles. 150 MINIMUM OFF-TIME 100 50 0 –50 –25 Table 1. Switching Frequency vs RT Value 0 25 50 75 100 125 150 TEMPERATURE (°C) 375612 F04 fOSC (kHz) RT (kΩ) 1000 10.0 900 11.8 800 13.0 700 15.4 600 17.8 Thermal Considerations 500 21.0 400 26.7 300 35.7 200 53.6 100 100 The LT3756 series is rated to a maximum input voltage of 100V. Careful attention must be paid to the internal power dissipation of the IC at higher input voltages to ensure that a junction temperature of 125°C (150°C for H-grade and J-Grade) is not exceeded. This junction limit is especially Figure 4. Typical Minimum On and Off Pulse Width vs Temperature Rev. C 14 For more information www.analog.com LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION important when operating at high ambient temperatures. The majority of the power dissipation in the IC comes from the supply current needed to drive the gate capacitance of the external power MOSFET. This gate drive current can be calculated as: IGATE = fSW • QG A low QG power MOSFET should always be used when operating at high input voltages, and the switching frequency should also be chosen carefully to ensure that the IC does not exceed a safe junction temperature. The internal junction temperature of the IC can be estimated by: TJ = TA + [VIN (IQ + fSW • QG) • θJA] where TA is the ambient temperature, IQ is the quiescent current of the part (maximum 1.5mA) and θJA is the package thermal impedance (68°C/W for the 3mm × 3mm QFN package). For example, an application with TA(MAX) = 85°C, VIN(MAX) = 60V, fSW = 400kHz, and having a FET with QG = 20nC, the maximum IC junction temperature will be approximately: TJ = 85°C + [60V (1.5mA + 400kHz • 20nC) • 68°C/W] = 124°C The exposed pad on the bottom of the package must be soldered to a ground plane. This ground should then be connected to an internal copper ground plane with thermal vias placed directly under the package to spread out the heat dissipated by the IC. If LT3756 junction temperature reaches 165°C, the GATE and PWMOUT pins will be driven to GND and the softstart (SS) pin will be discharged to GND. Switching will be enabled after device temperature is reduced 10°C. This function is intended to protect the device during momentary thermal overload conditions. Frequency Synchronization (LT3756-1 Only) The LT3756-1 switching frequency can be synchronized to an external clock using the SYNC pin. For proper operation, the RT resistor should be chosen for a switching frequency 20% lower than the external clock frequency. The SYNC pin is disabled during the soft-start period. Observation of the following guidelines about the SYNC waveform will ensure proper operation of this feature. Driving SYNC with a 50% duty cycle waveform is always a good choice, otherwise, maintain the duty cycle between 20% and 60%. When using both PWM and SYNC features, the PWM signal rising edge should occur at least 200ns before the SYNC rising edge (VIH) for optimal PWM performance. If the SYNC pin is not used, it should be connected to GND. Open LED Detection (LT3756 and LT3756-2) The LT3756 and LT3756-2 provide an open-collector status pin, OPENLED, that pulls low when the FB pin is within ~50mV of its 1.25V regulated voltage. If the open LED clamp voltage is programmed correctly using the FB pin, then the FB pin should never exceed 1.1V when LEDs are connected, therefore, the only way for the FB pin to be within 50mV of the regulation voltage is for an open LED event to have occurred. The key difference between the LT3756 and LT3756-2 is the behavior of the OPENLED pin when the FB pin crosses and re-crosses the FB overvoltage threshold at 1.31V (typ). The LT3756‑2 asserts/de-asserts OPENLED freely when crossing the 1.31V threshold. The LT3756, by comparison, de-asserts OPENLED when FB exceeds 1.31V and is prevented from re-asserting OPENLED until the FB pin falls below the 1.2V (typ) open LED threshold and clears the fault. The LT3756-2 has the more general purpose behavior and is recommended for applications using OPENLED. Input Capacitor Selection The input capacitor supplies the transient input current for the power inductor of the converter and must be placed and sized according to the transient current requirements. The switching frequency, output current and tolerable input voltage ripple are key inputs to estimating the capacitor value. An X7R type ceramic capacitor is usually the best choice since it has the least variation with temperature and DC bias. Typically, boost and SEPIC converters require a lower value capacitor than a buck mode converter. Assuming that a 100mV input voltage ripple is acceptable, the required capacitor value for a boost converter can be estimated as follows: V 1µF CIN (µF) = ILED (A) • OUT • t SW (µs) • A • µs VIN Rev. C For more information www.analog.com 15 LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION Therefore, a 4.7µF capacitor is an appropriate selection for a 400kHz boost regulator with 12V input, 48V output and 1A load. With the same VIN voltage ripple of 100mV, the input capacitor for a buck converter can be estimated as follows: CIN (µF) = ILED (A) • t SW (µs) • 4.7 µF A • µs A 10µF input capacitor is an appropriate selection for a 400kHz buck mode converter with a 1A load. In the buck mode configuration, the input capacitor has large pulsed currents due to the current returned through the Schottky diode when the switch is off. In this buck converter case it is important to place the capacitor as close as possible to the Schottky diode and to the GND return of the switch (i.e., the sense resistor). It is also important to consider the ripple current rating of the capacitor. For best reliability, this capacitor should have low ESR and ESL and have an adequate ripple current rating. The RMS input current for a buck mode LED driver is: IIN(RMS) = ILED • where D is the switch duty cycle. Table 2. Recommended Ceramic Capacitor Manufacturers WEB TDK www.tdk.com Kemet www.kemet.com Murata www.murata.com Taiyo Yuden www.t-yuden.com Soft-Start Capacitor Selection For many applications, it is important to minimize the inrush current at start-up. The built-in soft-start circuit significantly reduces the start-up current spike and output voltage overshoot. The soft-start interval is set by the softstart capacitor selection according to the equation: TSS = C SS • 2V 10µA A typical value for the soft-start capacitor is 0.01µF. The soft-start pin reduces the oscillator frequency and the maximum current in the switch. The soft-start capacitor is discharged when SHDN/UVLO falls below its threshold, during an overtemperature event or during an INTVCC undervoltage event. During start-up with SHDN/UVLO, charging of the soft-start capacitor is enabled after the first PWM high period. Power MOSFET Selection (1 – D ) • D MANUFACTURER operating frequencies will require proportionately higher capacitor values. Output Capacitor Selection The selection of the output capacitor depends on the load and converter configuration, i.e., step-up or step-down and the operating frequency. For LED applications, the equivalent resistance of the LED is typically low and the output filter capacitor should be sized to attenuate the current ripple. Use of an X7R type ceramic capacitor is recommended. To achieve the same LED ripple current, the required filter capacitor is larger in the boost and buck-boost mode applications than that in the buck mode applications. Lower For applications operating at high input or output voltages, the power NMOS FET switch is typically chosen for drain voltage VDS rating and low gate charge QG. Consideration of switch on-resistance, RDS(ON), is usually secondary because switching losses dominate power loss. The INTVCC regulator on the LT3756 has a fixed current limit to protect the IC from excessive power dissipation at high VIN, so the FET should be chosen so that the product of QG at 7V and switching frequency does not exceed the INTVCC current limit. For driving LEDs be careful to choose a switch with a VDS rating that exceeds the threshold set by the FB pin in case of an open-load fault. Several MOSFET vendors are listed in Table 3. The MOSFETs used in the application circuits in this data sheet have been found to work well with the LT3756. Consult factory applications for other recommended MOSFETs. Table 3. MOSFET Manufacturers VENDOR WEB Vishay Siliconix www.vishay.com Fairchild www.fairchildsemi.com International Rectifier www.irf.com Rev. C 16 For more information www.analog.com LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION Schottky Rectifier Selection The power Schottky diode conducts current during the interval when the switch is turned off. Select a diode rated for the maximum SW voltage. If using the PWM feature for dimming, it is important to consider diode leakage, which increases with the temperature, from the output during the PWM low interval. Therefore, choose the Schottky diode with sufficiently low leakage current. Table 4 has some recommended component vendors. Table 4. Schottky Rectifier Manufacturers VENDOR WEB On Semiconductor www.onsemi.com Diodes, Inc. www.diodes.com Central Semiconductor www.centralsemi.com Inductor Selection Sense Resistor Selection The resistor, RSENSE, between the source of the external NMOS FET and GND should be selected to provide adequate switch current to drive the application without exceeding the 108mV (typical) current limit threshold on the SENSE pin of LT3756. For buck mode applications, select a resistor that gives a switch current at least 30% greater than the required LED current. For buck mode, select a resistor according to: R SENSE,BUCK ≤ 0.07V For buck-boost, select a resistor according to: The inductor used with the LT3756 should have a saturation current rating appropriate to the maximum switch current selected with the RSENSE resistor. Choose an inductor value based on operating frequency, input and output voltage to provide a current mode ramp on SENSE during the switch on-time of approximately 20mV magnitude. The following equations are useful to estimate the inductor value for continuous conduction mode operation: ILED R SENSE,BUCK-BOOST ≤ These equations provide an estimate of the sense resistor value based on reasonable assumptions about inductor current ripple during steady state switching. Lower values of sense resistor may be required in applications where inductor ripple current is higher. Examples include applications with current limited operation at high duty cycle, and those with discontinuous conduction mode (DCM) switching. It is always prudent to verify the peak inductor current in the application to ensure the sense resistor selection provides margin to the SENSE current limit threshold. VIN • 0.07V L BUCK = R SENSE • VLED ( VIN – VLED ) VIN • 0.02V • fOSC L BUCK-BOOST = L BOOST = R SENSE • VLED • VIN ( VLED + VIN ) • 0.02V • fOSC R SENSE • VIN ( VLED – VIN ) VLED • 0.02V • fOSC Table 5 provides some recommended inductor vendors. ( VIN + VLED )ILED Table 5. Inductor Manufacturers For boost, select a resistor according to: VENDOR WEB V • 0.07V R SENSE,BOOST ≤ IN VLED • ILED Sumida www.sumida.com Würth Elektronik www.we-online.com Coiltronics www.cooperet.com The placement of RSENSE should be close to the source of the NMOS FET and GND of the LT3756. The SENSE input to LT3756 should be a Kelvin connection to the positive terminal of RSENSE. Vishay www.vishay.com Coilcraft www.coilcraft.com Rev. C For more information www.analog.com 17 LT3756/LT3756-1/LT3756-2 APPLICATIONS INFORMATION Loop Compensation The LT3756 uses an internal transconductance error amplifier whose VC output compensates the control loop. The external inductor, output capacitor and the compensation resistor and capacitor determine the loop stability. The inductor and output capacitor are chosen based on performance, size and cost. The compensation resistor and capacitor at VC are selected to optimize control loop response and stability. For typical LED applications, a 2.2nF compensation capacitor at VC is adequate, and a series resistor should always be used to increase the slew rate on the VC pin to maintain tighter regulation of LED current during fast transients on the input supply to the converter. Board Layout The high speed operation of the LT3756 demands careful attention to board layout and component placement. The exposed pad of the package is the only GND terminal of the IC and is also important for thermal management of the IC. It is crucial to achieve a good electrical and thermal contact between the exposed pad and the ground plane of the board. To reduce electromagnetic interference (EMI), it is important to minimize the area of the high dV/dt switching node between the inductor, switch drain and anode of the Schottky rectifier. Use a ground plane under the switching node to eliminate interplane coupling to sensitive signals. The lengths of the high dI/dt traces: 1) from the switch node through the switch and sense resistor to GND, and 2) from the switch node through the Schottky rectifier and filter capacitor to GND should be minimized. The ground points of these two switching current traces should come to a common point then connect to the ground plane under the LT3756. Likewise, the ground terminal of the bypass capacitor for the INTVCC regulator should be placed near the GND of the switching path. Typically, this requirement will result in the external switch being closest to the IC, along with the INTVCC bypass capacitor. The ground for the compensation network and other DC control signals should be star connected to the underside of the IC. Do not extensively route high impedance signals such as FB and VC, as they may pick up switching noise. In particular, avoid routing FB and PWMOUT in parallel for more than a few millimeters on the board. Likewise, minimize resistance in series with the SENSE input to avoid changes (most likely reduction) to the switch current limit threshold. Rev. C 18 For more information www.analog.com LT3756/LT3756-1/LT3756-2 CTRL VREF OPENLED PWM APPLICATIONS INFORMATION VIAS TO GROUND PLANE CSS RT R2 4 3 2 1 5 16 CC RC R1 6 15 CVCC 7 14 8 13 x VOUT VIA 9 10 11 12 L1 R3 x R4 5 4 1 6 3 M2 M1 7 2 8 1 3 LED– 2 RSENSE COUT COUT D1 CIN RLED VIN GND COMPONENT DESIGNATIONS REFER TO “30W WHITE LED HEADLAMP DRIVER WITH THERMAL DERATING” SCHEMATIC LED+ 375612 F05 Figure 5. Boost Converter Suggested Layout Rev. C For more information www.analog.com 19 LT3756/LT3756-1/LT3756-2 TYPICAL APPLICATIONS 30W White LED Headlamp Driver with Thermal Derating VIN 8V TO 60V (100V TRANSIENT) D1 L1, 22µH CIN 4.7µF R1 1M R3 1M VIN SHDN/UVLO R2 185k VREF 16.9k 100k CTRL RLED 0.27Ω ISN RT VC RT 28.7k 375kHz M1 GATE OPENLED PWM SS CSS 0.01µF R4 14k ISP LT3756-2 100k NTC RT1 INTVCC FB SENSE COUT 4.7µF 370mA 30W LED STRING RSENSE 0.018Ω PWMOUT GND INTVCC RC 10k CC 0.001µF CVCC 4.7µF M2 375612 TA02a M1: VISHAY SILICONIX Si7454DP D1: DIODES INC PDS5100 L1: COILTRONICS DR127-220 RT1: MURATA NCP18WM104J M2: VISHAY SILICONIX Si2328DS SEE SUGGESTED LAYOUT, FIGURE 5 V(ISP – ISN) Threshold vs Temperature for NTC Resistor Divider V(ISP – ISN) THRESHOLD (mV) 120 100 80 60 40 20 0 25 45 65 85 TEMPERATURE (°C) 105 125 375512 TA02b Rev. C 20 For more information www.analog.com LT3756/LT3756-1/LT3756-2 TYPICAL APPLICATIONS Buck-Boost Mode LED Driver L1 68µH C1 4.7µF D1 1µF 100V VIN 1M SHDN/UVLO VREF 185k 0.1µF 35.7k 300kHz 1M 13k 1Ω ISN M1 GATE 100k C3 4.7µF VIN ISP CTRL INTVCC VOUT FB LT3756-2 SENSE OPENLED PWM SS RT PWMOUT VC GND INTVCC 24V TO 32V LED STRING 100mA 0.068Ω 1.5k C2 2.2µF 10V 39k 4700pF M2 VIN L1: COILCRAFT MSS1038-683 D1: ON SEMICONDUCTOR MBRS3100T3 M1: VISHAY SILICONIX Si2328DS M2: ZETEX ZXM6IP03F Q1: ZETEX FMMT493 Q1 1k 375612 TA03a Efficiency vs VIN 100 90 EFFICIENCY (%) VIN 9V TO 65V 80 70 60 50 0 20 40 VIN (V) 60 80 375612 TA03b Rev. C For more information www.analog.com 21 LT3756/LT3756-1/LT3756-2 TYPICAL APPLICATIONS 90% Efficient, 20W SEPIC LED Driver VIN 8V TO 80V C4 1µF L1A 33µH C1 4.7µF 100V D1 C3 10µF ×2 35V 1:1 1M VIN SHDN/UVLO 511k FB L1B VREF 185k CTRL INTVCC 25k LT3756-2 100k ISP 0.1Ω 1A ISN M1 OPENLED GATE PWM SENSE SS RT PWMOUT VC GND INTVCC 0.01µF 28.7k 400kHz 0.033Ω C2 4.7µF 10V 30k 0.001µF 20W LED STRING M2 375612 TA04a L1: COILCRAFT MSD1278T-333 M1: VISHAY SILICONIX Si7430DP D1: ON SEMICONDUCTOR MBRS3200T M2: ZETEX ZXM61N03F Efficiency vs VIN 100 EFFICIENCY (%) 96 92 88 84 80 0 20 40 VIN (V) 60 80 375612 TA04b Rev. C 22 For more information www.analog.com LT3756/LT3756-1/LT3756-2 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 5.10 (.201) MIN 2.845 ±0.102 (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 8 1 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) (.126 – .136) 0.305 ±0.038 (.0120 ±.0015) TYP 16 0.50 (.0197) BSC 4.039 ±0.102 (.159 ±.004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 ±0.076 (.011 ±.003) REF 16151413121110 9 DETAIL “A” 0° – 6° TYP 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE16) 0213 REV F Rev. C For more information www.analog.com 23 LT3756/LT3756-1/LT3756-2 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 ±0.05 3.50 ± 0.05 1.45 ± 0.05 2.10 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 ± 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.20 TYP OR 0.25 × 45° CHAMFER R = 0.115 TYP 0.75 ± 0.05 15 PIN 1 TOP MARK (NOTE 6) 16 0.40 ± 0.10 1 1.45 ± 0.10 (4-SIDES) 2 (UD16) QFN 0904 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 ± 0.05 0.50 BSC Rev. C 24 For more information www.analog.com LT3756/LT3756-1/LT3756-2 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION B 03/10 Revised Entire Data Sheet to Include H-Grade C 02/20 Added Automotive and J-Grade Models PAGE NUMBER 1-24 1, 3, 4 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. more by information www.analog.com 25 LT3756/LT3756-1/LT3756-2 TYPICAL APPLICATION Buck Mode 1A LED Driver with High Dimming Ratio and Open LED Reporting C1 1µF ×2 1M VIN 200k ISP SHDN/UVLO 61.9k 1.5k 0.1Ω VREF Q1 PWMOUT LT3756-2 5 WHITE LEDs 20W 1k 100k L1 33µH OPENLED 0.1µF 28.7k 375kHz GATE RT VC SENSE GND INTVCC 47k 96 92 88 84 80 D1 M1 SS C3 4.7µF ×5 25V 20k M2 PWM 200k Q2 ISN FB CTRL INTVCC 1A 200k EFFICIENCY (%) VIN 24V TO 80V Efficiency vs VIN 100 VIN C4 4.7µF 20 30 40 50 VIN (V) 60 70 80 375612 TA05b PWM Dimming Waveforms 0.033Ω C2 4.7µF M1: VISHAY SILICONIX Si3430DV D1: DIODES INC B1100/B L1: WÜRTH 74456133 M2: VISHAY SILICONIX Si5435BDC Q1: ZETEX FMMT493 Q2: ZETEX FMMT593 0.001µF 375612 TA05a VPWM VSW 50V/DIV 1A ILED 0A 10µs/DIV 375612 TA05c RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT3474 36V, 1A (ILED), 2MHz, Step-Down LED Driver VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 400:1, ISD < 1µA, TSSOP16E Package LT3475 Dual 1.5A (ILED), 36V, 2MHz Step-Down LED Driver VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 3000:1, ISD < 1µA, TSSOP20E Package LT3476 Quad Output 1.5A, 36V, 2MHz High Current LED Driver VIN: 2.8V to 16V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1, ISD < 10µA, 5mm × 7mm QFN Package with 1000:1 Dimming LT3477 3A, 42V, 3MHz Boost, Buck-Boost, Buck LED Driver VIN: 2.5V to 25V, VOUT(MAX) = 40V, Dimming = Analog/PWM, ISD < 1µA, QFN and TSSOP20E Packages LT3478/LT3478-1 4.5A, 42V, 2.5MHz High Current LED Driver with 3000:1 Dimming VIN: 2.8V to 36V, VOUT(MAX) = 42V, True Color PWM Dimming = 3000:1, ISD < 3µA, TSSOP16E Package LT3486 Dual 1.3A, 2MHz High Current LED Driver VIN: 2.5V to 24V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1, ISD < 1µA, 5mm × 3mm DFN and TSSOP16E Packages LT3496 Triple 0.75A, 2.1MHz, 45V LED Driver VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1µA, 4mm × 5mm QFN and TSSOP16E Packages LT3517 1.5A, 2.5MHz, 45V LED Driver VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1µA, 4mm × 4mm QFN and TSSOP16E Packages LT3518 2.3A, 2.5MHz, 45V LED Driver VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1µA, 4mm × 4mm QFN and TSSOP16E Packages LT3755/LT3755-1/ LT3755-2 40VIN , 75VOUT, Full Featured LED Controller VIN: 4.5V to 40V, VOUT(MAX) = 75V, True Color PWM Dimming = 3000:1, ISD < 1µA, 3mm × 3mm QFN-16 and MS16E Packages LTC®3783 High Current LED Controller VIN: 3V to 36V, VOUT(MAX) = Ext FET, True Color PWM Dimming = 3000:1, ISD < 20µA, 5mm × 4mm QFN10 and TSSOP16E Packages Rev. C 26 02/20 www.analog.com For more information www.analog.com  ANALOG DEVICES, INC. 2008–2020