DS4077L-FC0

Rev 3; 9/06 50MHz to 122.88MHz VCXO The DS4077 is an integrated voltage-controlled crystal oscillator (VCXO) module designed to provide reference clock generation in base stations, telecom/datacom, and wireless applications. The DS4077 is developed using a fundamental quartz crystal plus a unique integrated circuit design. The internal fundamental quartz crystal determines the frequency of operation. Custom frequencies are available. Contact the factory for availability. The DS4077 is designed for use with applications requiring low phase noise and jitter. Jitter performance of better than 0.8ps RMS is achieved over the 12kHz to 20MHz range. Phase noise performance of better than -125dBc/Hz at 1kHz is achieved with this design. Applications Features ♦ 50MHz to 122.88MHz Frequency ♦ 3.135V to 3.465V Operation ♦ Low Jitter: < 0.8ps RMS ♦ ±69ppm Absolute Pull Range (APR) ♦ Output Options: LVCMOS Output Buffer LVDS Complementary Output Buffer ♦ Minimum ±110ppm Tuning Range (+25°C) ♦ 14mm x 9mm x 3.06mm Plastic LGA Package Clock-Data Recovery in Telecom/Datacom Applications Data Retiming Reference Clock Generation in Base Stations and Wireless Applications Ordering Information PART TEMP RANGE OUTPUT TYPE FREQUENCY (fNOM) (MHz) PIN-PACKAGE TOP MARK DS4077L-DCN -40°C to +85°C LVCMOS 54 9 LGA DS4077L-DCN DS4077L-DDN -40°C to +85°C LVDS 54 9 LGA DS4077L-DDN DS4077L-CCN -40°C to +85°C LVCMOS 61.44 9 LGA DS4077L-CCN DS4077L-CDN -40°C to +85°C LVDS 61.44 9 LGA DS4077L-CDN Ordering Information continued at end of data sheet. Block Diagram Pin Configuration VDD TOP VIEW N.C. N.C. N.C. 9 8 7 X1 VC 1 6 VDD N.C. 2 5 N.C. (LVDSO-) 4 LVCMOS (LVDSO+) DS4077 VSS 3 CRYSTAL OSC X2 VC VARACTOR CONTROL DS4077 LGA ( ) LVDS OPTION TRANSFER-MOLDED PLASTIC PACKAGE LVCMOS OUTPUT LVCMOS OPTION SHOWN HERE. ______________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 DS4077 General Description DS4077 50MHz to 122.88MHz VCXO ABSOLUTE MAXIMUM RATINGS VC, VDD, LVCMOS, LVDSO+, LVDSO- Output ........-0.3V, +3.6V Operating Temperature Range (noncondensing) ..............................................-40°C to +85°C Junction Temperature ......................................................+150°C Thermal Resistance Junction to Ambient .................................................91.06°C/W Junction to Case ......................................................44.51°C/W Storage Temperature Range .............................-55°C to +125°C Soldering Temperature (reflow, 2 passes max)....See IPC/JEDEC STD-020 Specification Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = 3.135V to 3.465V, TA = -40°C to +85°C, unless otherwise noted.) (Typical values at +25°C, VDD = 3.3V, unless otherwise noted.) (Note 1) PARAMETER VDD Operating Supply Range SYMBOL CONDITIONS VDD MIN TYP MAX UNITS 3.135 V 3.3 3.465 fOUT ≤ 106.25MHz 20 30 fOUT > 106.25MHz 25 35 fNOM fNOM +8ppm VDD Supply Current IDD Output open Frequency fOUT VC = 1.6V, VDD = 3.3V, TA = +25°C (Note 2) Frequency vs. VDD Sensitivity VDDppm Frequency vs. Load Sensitivity LOADpmm VDD = 3.3V ±5% 10pF to 20pF (Note 3) Frequency vs. Temperature TEMPppm From +25°C VC Voltage Range mA fNOM –8ppm -3.5 +11.5 -1 -20 ppm ppm/pF +20 ppm VCRANGE 0.3 Frequency Tuning Sensitivity VCSEN 41 Tuning Voltage Bandwidth VCBW (Note 3) Absolute Pull Range fTUNE VC = 0.3V to 2.8V (Note 2) -69 +69 VC = 0V to VDD -500 +500 nA -5 +5 ppm -10 +10 ppm 1.475 V 400 mV 150 mV VC Input Leakage Aging, First Year Aging, Years 0–10 ILCV AGEppm tAGE Total aging 1.60 MHz 2.8 V 164 ppm/V 10 kHz ppm LVDS OUTPUT Output High Voltage VOHLVDSO (Note 4) Output Low Voltage VOLLVDSO (Note 4) 0.925 Differential Output Voltage VODLVDSO (Note 4) 250 Output Common-Mode Variation VLVDSOCOM (Note 4) Offset Output Voltage V VOFFLVDSO (Note 4) 1.125 1.275 V Differential Output Impedeance ROLVDSO (Note 3) 80 140 Ω Output Current IVSSLVDSO Short ground 40 mA 12 mA Output Current ILVDSO Short together (Note 3) Output Rise Time (Differential) tRLVDSO 20% to 80% (Note 3) 150 ps Output Fall Time (Differential) tFLVDSO 80% to 20% (Note 3) 150 ps 2 _____________________________________________________________________ 50MHz to 122.88MHz VCXO (VDD = 3.135V to 3.465V, TA = -40°C to +85°C, unless otherwise noted.) (Typical values at +25°C, VDD = 3.3V, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LVCMOS OUTPUT Output Logic 0 VOL Output Current -450µA 0 0.4 V Output Logic 1 VOH Output Current +450µA VDD 0.8V VDD V Output Rise Time tR Load condition: 10pF to ground; 10% to 90% VDD (Note 3) 2 ns Output Fall Time tF Load condition: 10pF to ground; 90% to 10% VDD (Note 3) 2 ns Duty Cycle DCYC Harmonics H Load condition: 10pF, VDD / 2 (Note 3) VDD = 3.3V, TA = +25°C (Note 3) 40 -18 60 % -8 dBc/Hz SSB PHASE NOISE AND JITTER, VDD = 3.3, TA = +25°C (Note 3) 10Hz Offset -70 100Hz Offset -100 LVCMOS 1kHz Offset -125 10kHz Offset -145 100kHz Offset -150 Jitter (12kHz to 20MHz) Note 1: Note 2: Note 3: Note 4: 0.8 dBc/Hz psRMS Limits at -40°C are guaranteed by design and not production tested. 10pF, LVCMOS. Guaranteed by design and not production tested. 100Ω differential load. Pin Description PIN LVCMOS LVDS NAME FUNCTION 1 1 VC 2, 5, 7, 8, 9 2, 7, 8, 9 N.C. No Connection 3 3 VSS Ground 4 — LVCMOS 6 6 VDD — 4, 5 LVDSO+/LVDSO- VCXO Control Voltage LVCMOS Output DC Power LVDS Positive and Negative Outputs _____________________________________________________________________ 3 DS4077 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = +3.3V, TA = +25°C, unless otherwise noted.) LVCMOS OUTPUT FREQUENCY vs. LOAD CAPACITANCE vs. VC FREQUENCY vs. TEMPERATURE fOUT = 77.76MHz 125 100 fOUT DEVIATION (ppm) 6 150 4 2 0 -2 -4 CL = 0pF 75 50 CL = 20pF 25 0 -25 -50 -6 -75 -8 -100 -125 -10 -40 -20 0 20 40 TEMPERATURE (°C) 60 0.3 80 0.8 1.3 1.8 VC (V) fOUT DEVIATION FROM VDD = 3.3V (ppm) 20 15 fOUT = 77.76MHz TA = +25°C DS4077 toc03 OUTPUT FREQUENCY vs. SUPPLY VOLTAGE vs. VC 10 VC = 0.3V 5 0 -5 VC = 1.6V -10 VC = 2.8V -15 -20 3.135 3.190 4 DS4077 toc02 fOUT = 77.76MHz VC = 1.55V 8 DS4077 toc01 10 fOUT DEVIATION (ppm) DS4077 50MHz to 122.88MHz VCXO 3.245 3.300 3.355 VDD (V) 3.410 3.465 _____________________________________________________________________ 2.3 2.8 50MHz to 122.88MHz VCXO PART TEMP RANGE OUTPUT TYPE FREQUENCY (fNOM) (MHz) PIN-PACKAGE TOP MARK DS4077L-ECN -40°C to +85°C LVCMOS 74.17582 9 LGA DS4077L-ECN DS4077L-EDN -40°C to +85°C LVDS 74.17582 9 LGA DS4077L-EDN DS4077L-FCN -40°C to +85°C LVCMOS 74.25 9 LGA DS4077L-FCN DS4077L-FDN -40°C to +85°C LVDS 74.25 9 LGA DS4077L-FDN DS4077L-ACN -40°C to +85°C LVCMOS 76.8 9 LGA DS4077L-ACN DS4077L-ADN -40°C to +85°C LVDS 76.8 9 LGA DS4077L-ADN DS4077L-0CN -40°C to +85°C LVCMOS 77.76 9 LGA DS4077L-0CN DS4077L-0DN -40°C to +85°C LVDS 77.76 9 LGA DS4077L-0DN DS4077L-GCN -40°C to +85°C LVCMOS 106.25 9 LGA DS4077L-GCN DS4077L-GDN -40°C to +85°C LVDS 106.25 9 LGA DS4077L-GDN DS4077L-BDN -40°C to +85°C LVDS 122.88 9 LGA DS4077L-BDN Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 9 LGA L949A-1 21-0265 Revision History Rev 0; 8/05: Initial release. Rev 1; 12/05: Added LVDS option. Rev 2; 6/06: Changed device description/frequency range; changed jitter typical value from 1 to 0.8psRMS; added new parts numbers to Ordering Information table; changed jitter range upper limits from 80MHz to 20MHz. Rev 3; 9/06: Changed VDDppm units from ppm/PF to ppm; added separate IDD parameter for parts with fOUT greater than 106.25MHz. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 5 © 2006 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. is a registered trademark of Dallas Semiconductor Corporation. DS4077 Ordering Information (continued)