17.0 GHz to 20.0 GHz,
GaAs, MMIC, I/Q Upconverter
HMC7911
Data Sheet
FEATURES
GENERAL DESCRIPTION
Conversion gain: 18 dB typical
Sideband rejection: 30 dBc typical
Input power for 1 dB compression (P1dB): 2 dBm typical
Output third-order intercept (OIP3): 33 dBm typical
2× local oscillator (LO) leakage at RFOUT: 10 dBm typical
2× LO leakage at the IF input: −25 dBm typical
RF return loss: 13 dB typical
LO return loss: 10 dB typical
32-lead, 5 mm × 5 mm LFCSP package
The HMC7911 is a compact gallium arsenide (GaAs), pseudomorphic (pHEMT), monolithic microwave integrated circuit
(MMIC) upconverter in a RoHS compliant, low stress, injection
molded plastic LFCSP package that operates from 17 GHz to
20 GHz. This device provides a small signal conversion gain of
18 dB with 30 dBc of sideband rejection. The HMC7911 uses a
variable gain amplifier preceded by an in-phase/quadrature (I/Q)
mixer that is driven by an active 2× local oscillator (LO) multiplier.
IF1 and IF2 mixer inputs are provided, and an external 90° hybrid
is needed to select the required sideband. The I/Q mixer topology
reduces the need for filtering of the unwanted sideband. The
HMC7911 is a much smaller alternative to hybrid style single
sideband (SSB) upconverter assemblies, and it eliminates the
need for wire bonding by allowing the use of surface-mount
manufacturing techniques.
APPLICATIONS
Point to point and point to multipoint radios
Military radars, electronic warfare (EW), and electronic
intelligence (ELINT)
Satellite communications
Sensors
NIC
IF1
30
29
28
27
26
VDRF1
IF2
31
VGRF
NIC
32
VESD
NIC
FUNCTIONAL BLOCK DIAGRAM
25
VGMIX 1
24 NIC
NIC 2
23 NIC
NIC 3
22 VDRF2
NIC 4
21 VCTL1
HMC7911
GND 6
20 VCTL2
19 VDRF3
2×
13
14
15
16
NIC
12
GND
11
RFOUT
10
GND
9
VDET
17 NIC
VREF
GND 8
VDLO2
18 VDRF4
VDLO1
LOIN 7
EPAD
13730-001
NIC 5
Figure 1.
Rev. B
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HMC7911
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Leakage Performance ................................................................. 16
Applications ....................................................................................... 1
Return Loss Performance .......................................................... 17
General Description ......................................................................... 1
Power Detector Performance.................................................... 18
Functional Block Diagram .............................................................. 1
Spurious Performance ............................................................... 19
Revision History ............................................................................... 2
Theory of Operation ...................................................................... 20
Specifications..................................................................................... 3
Applications Information .............................................................. 21
Absolute Maximum Ratings............................................................ 4
Biasing Sequence ........................................................................ 21
Thermal Resistance ...................................................................... 4
Local Oscillator Nulling ............................................................ 21
ESD Caution .................................................................................. 4
Evaluation Printed Circuit Board ............................................ 23
Pin Configuration and Function Descriptions ............................. 5
Outline Dimensions ....................................................................... 24
Interface Schematics..................................................................... 6
Ordering Guide .......................................................................... 24
Typical Performance Characteristics ............................................. 7
REVISION HISTORY
4/2018—Rev. A to Rev. B
Change to Biasing Sequence Section ........................................... 21
Updated Outline Dimensions ....................................................... 24
Changes to Ordering Guide .......................................................... 24
6/2016—Rev. 0 to Rev. A
Change to Local Oscillator (LO) Parameter, Table 1 ................... 3
Changes to Figure 76 to Figure 81................................................ 18
4/2016—Revision 0: Initial Version
Rev. B | Page 2 of 24
Data Sheet
HMC7911
SPECIFICATIONS
TA = 25°C, IF = 1 GHz, VDLOx = 5 V, VDRFx = 5 V, VCTLx = −5 V, VESD = −5 V, VGMIX = −0.5 V, LO = 4 dBm. Measurements performed with lower
sideband selected and external 90° hybrid at the IF ports, unless otherwise noted.
Table 1.
Parameter
OPERATING CONDITIONS
Frequency Range
Radio Frequency (RF)
Local Oscillator (LO)
Intermediate Frequency (IF)
LO Drive Range
PERFORMANCE
Conversion Gain
Conversion Gain Dynamic Range
Sideband Rejection
Input Power for 1 dB Compression (P1dB)
Output Third-Order Intercept (OIP3) at Maximum Gain
2× LO Leakage at RFOUT1
2× LO Leakage at IFx2
Noise Figure
Return Loss
RF
LO
IFx2
POWER SUPPLY
Total Supply Current
LO Amplifier
RF Amplifier3
Min
Typ
17
8.5
DC
4
13.5
30
25
28
1
Rev. B | Page 3 of 24
Unit
20
11.75
3.5
8
GHz
GHz
GHz
dBm
18
34
30
2
33
10
−25
14
dB
dB
dBc
dBm
dBm
dBm
dBm
dB
13
10
18
dB
dB
dB
100
220
mA
mA
The LO signal level at the RF output port is not calibrated.
Measurements taken without 90° hybrid at the IF ports.
3
Adjust VGRF between −2 V and 0 V to achieve a total variable gain amplifier quiescent drain current = 220 mA.
2
Max
HMC7911
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Parameter
Drain Bias Voltage
VDRFx, VDLOx, VREF, VDET
Gate Bias Voltage
VGRF
VCTLx, VESD
VGMIX
LO Input Power
IF Input Power
Maximum Junction Temperature
Storage Temperature Range
Operating Temperature Range
Reflow Temperature
ESD Sensitivity (HBM)
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. The θJA
values in Table 3 assume a 4-layer JEDEC standard board with
zero airflow.
Rating
5.5 V
−3 V to 0 V
−7 V to 0 V
−2 V to 0 V
10 dBm
10 dBm
175°C
−65°C to +150°C
−40°C to +85°C
260°C
250 V (Class 1A)
Table 3. Thermal Resistance
Package Type
32-Lead LFCSP
ESD CAUTION
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. B | Page 4 of 24
θJA
31.66
θJC
24.3
Unit
°C/W
Data Sheet
HMC7911
NIC
IF1
30
29
28
27
VDRF1
IF2
31
VGRF
NIC
32
VESD
NIC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
26
25
VGMIX 1
24 NIC
NIC 2
23 NIC
NIC 3
22 VDRF2
NIC 4
HMC7911
21 VCTL1
NIC 5
TOP VIEW
(Not to Scale)
20 VCTL2
GND 6
19 VDRF3
14
15
16
EPAD
NOTES
1. NIC = NOT INTERNALLY CONNECTED. NO CONNECTION IS REQUIRED.
THESE PINS ARE NOT CONNECTED INTERNALLY. HOWEVER, ALL DATA
SHOWN HEREIN WERE MEASURED WITH THESE PINS CONNECTED
EXTERNALLY TO RF/DC GROUND.
2. EXPOSED PAD. CONNECT TO A LOW IMPEDANCE THERMAL AND
ELECTRICAL GROUND PLANE.
13730-002
13
NIC
12
VDET
11
VREF
10
VDLO2
VDLO1
9
GND
17 NIC
RFOUT
18 VDRF4
GND 8
GND
LOIN 7
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
Mnemonic
VGMIX
2, 3, 4, 5, 16, 17,
23, 24, 29,
31, 32
6, 8, 13, 15
7
9, 10
NIC
GND
LOIN
VDLO1, VDLO2
Ground Connect. See Figure 4. These pins and package bottom must be connected to RF/dc ground.
Local Oscillator Input. See Figure 5. This pin is dc-coupled and matched to 50 Ω.
Power Supply Voltage for LO Amplifier. See Figure 6. Refer to the typical application circuit for the required
external components (see Figure 83).
11
VREF
12
VDET
14
18, 19, 22, 25
RFOUT
VDRF4, VDRF3,
VDRF2, VDRF1
Reference Voltage for the Power Detector. See Figure 7. VREF is the dc bias of the diode biased through the
external resistor used for temperature compensation of VDET. Refer to the typical application circuit for the
required external components (see Figure 83).
Detector Voltage for the Power Detector. See Figure 8. VDET is the dc voltage representing the RF output
power rectified by diode, which is biased through an external resistor. Refer to the typical application
circuit for the required external components (see Figure 83).
Radio Frequency Output. See Figure 9. This pin is dc-coupled and matched to 50 Ω.
Power Supply Voltage for the Variable Gain Amplifier. See Figure 10. Refer to the typical application circuit
for the required external components (see Figure 83).
20, 21
VCTL2, VCTL1
26
VGRF
27
VESD
DC Voltage for ESD Protection. See Figure 13. Refer to the typical application circuit for the required
external components (see Figure 83).
28, 30
IF1, IF2
Quadrature IF Inputs. See Figure 14. For applications not requiring operation to dc, use an off chip dc
blocking capacitor. For operation to dc, these pins must not source/sink more than ±3 mA of current or
device malfunction and failure may result.
Exposed Pad. Connect to a low impedance thermal and electrical ground plane.
EPAD
Description
Gate Voltage for FET Mixer. See Figure 3. Refer to the typical application circuit for the required external
components (see Figure 83).
Not Internally Connected. No connection is required. These pins are not connected internally. However, all
data shown herein were measured with these pins connected externally to RF/dc ground.
Gain Control Voltage for the Variable Gain Amplifier. See Figure 11. Refer to the typical application circuit
for the required external components (see Figure 83).
Gate Voltage for the Variable Gain Amplifier. See Figure 12. Refer to the typical application circuit for the
required external components (see Figure 83).
Rev. B | Page 5 of 24
HMC7911
Data Sheet
INTERFACE SCHEMATICS
13730-003
VGMIX
13730-009
RFOUT
Figure 3. VGMIX Interface
Figure 9. RFOUT Interface
VDRF1, VDRF2, VDRF3, VDRF4
13730-010
13730-004
GND
13730-005
LOIN
Figure 10. VDRF1, VDRF2, VDRF3, VDRF4 Interface
13730-011
Figure 4. GND Interface
VCTL1, VCTL2,
Figure 5. LOIN Interface
Figure 11. VCTL1, VCTL2 Interface
VGRF
13730-008
VESD
IF1, IF2
Figure 8. VDET Interface
13730-014
VDET
Figure 13. VESD Interface
13730-007
Figure 7. VREF Interface
13730-013
Figure 12. VGRF Interface
Figure 6. VDLO1, VDLO2 Interface
VREF
13730-012
13730-006
VDLO1, VDLO2
Figure 14. IF1, IF2 Interface
Rev. B | Page 6 of 24
Data Sheet
HMC7911
TYPICAL PERFORMANCE CHARACTERISTICS
24
24
22
22
CONVERSION GAIN (dB)
20
18
16
TA = +85°C
TA = +25°C
TA = –40°C
14
18.0
18.5
19.0
19.5
20.0
24
20
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
= –3.5V
= –3.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
18.5
19.0
19.5
20.0
25
= –3V
= –2.8V
= –2.5V
= –2.3V
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
20
15
CONVERSION GAIN (dB)
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
18.0
Figure 18. Conversion Gain vs. RF Frequency at Various LO Powers
10
5
0
RF = 18GHz
RF = 19GHz
RF = 20GHz
–5
–10
18.2
18.4
18.6
18.8
19.0
19.2
19.4
19.6
19.8
20.0
RF FREQUENCY (GHz)
–20
–5.0
Figure 16. Conversion Gain vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
45
40
40
SIDEBAND REJECTION (dBc)
45
25
20
TA = +85°C
TA = +25°C
TA = –40°C
15
10
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
Figure 19. Conversion Gain vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
50
30
–4.0
CONTROL VOLTAGE (V)
50
35
–4.5
13730-019
–15
13730-016
CONVERSION GAIN (dB)
44
40
36
32
28
17.5
RF FREQUENCY (GHz)
Figure 15. Conversion Gain vs. RF Frequency at Various Temperatures,
LO = 4 dBm
35
30
25
20
LO = 2dBm
LO = 4dBm
LO = 6dBm
15
10
5
17.5
18.0
18.5
19.0
RF FREQUENCY (GHz)
19.5
20.0
13730-017
5
0
17.0
LO = 2dBm
LO = 4dBm
LO = 6dBm
14
10
17.0
13730-015
17.5
RF FREQUENCY (GHz)
SIDEBAND REJECTION (dBc)
16
12
10
17.0
16
12
8
4
0
–4
–8
–12
–16
–20
18.0
18
13730-018
12
20
Figure 17. Sideband Rejection vs. RF Frequency at Various Temperatures,
LO = 4 dBm
Rev. B | Page 7 of 24
0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 20. Sideband Rejection vs. RF Frequency at Various LO Powers
13730-020
CONVERSION GAIN (dB)
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 1 GHz.
HMC7911
Data Sheet
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 1 GHz.
25
40
23
38
TA = +85°C
TA = +25°C
TA = –40°C
36
34
17
32
15
13
26
9
24
7
22
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
38
21
36
19
34
17
32
IP3 (dBm)
40
15
13
LO = 2dBm
LO = 4dBm
LO = 6dBm
18.5
19.0
19.5
20.0
30
LO = 2dBm
LO = 4dBm
LO = 6dBm
28
20
17.0
VCTLx = –5V
VCTLx = –4.8V
VCTLx = –4.5V
VCTLx = –4.3V
VCTLx = –4V
VCTLx = –3.8V
VCTLx = –3.5V
VCTLx = –3.3V
VCTLx = –3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 25. Output IP3 vs. RF Frequency at Various LO Powers
48
= –2.8V
= –2.5V
= –2.3V
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
44
40
36
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
32
IP3 (dBm)
22
20.0
13730-025
18.0
13730-022
17.5
Figure 22. Input IP3 vs. RF Frequency at Various LO Powers
24
19.5
24
RF FREQUENCY (GHz)
26
19.0
22
5
17.0
28
18.5
26
7
30
18.0
Figure 24. Output IP3 vs. RF Frequency at Various Temperatures,
LO = 4 dBm
23
9
17.5
RF FREQUENCY (GHz)
25
11
TA = +85°C
TA = +25°C
TA = –40°C
20
17.0
Figure 21. Input IP3 vs. RF Frequency at Various Temperatures,
LO = 4 dBm
IP3 (dBm)
28
11
5
17.0
IP3 (dBm)
30
13730-024
IP3 (dBm)
19
13730-021
IP3 (dBm)
21
20
18
28
24
20
16
16
12
14
8
12
18.2
18.4
18.6
18.8
19.0
19.2
19.4
19.6
19.8
20.0
RF FREQUENCY (GHz)
Figure 23. Input IP3 vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
0
18.0
18.2
18.4
18.6
18.8
19.0
19.2
19.4
RF FREQUENCY (GHz)
19.6
19.8
20.0
13730-026
4
13730-023
10
18.0
Figure 26. Output IP3 vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
Rev. B | Page 8 of 24
Data Sheet
HMC7911
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 1 GHz.
24
40
22
35
30
20
IP3 (dBm)
IP3 (dBm)
25
18
16
20
15
RF = 18GHz
RF = 19GHz
RF = 20GHz
14
12
–4.5
–4.0
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
CONTROL VOLTAGE (V)
0
–5.0
Figure 27. Input IP3 vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
–2.5
–2.0
–1.5
–1.0
24
22
4
20
P1dB (dBm)
6
0
18
16
–2
14
–4
12
17.5
18.0
18.5
19.0
19.5
20.0
10
17.0
Figure 28. Input P1dB vs. RF Frequency at Various Temperatures,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
17.5
18.0
18.5
19.0
19.5
13730-031
2
13730-028
20.0
RF FREQUENCY (GHz)
Figure 31. Output P1dB vs. RF Frequency at Various Temperatures,
LO = 4 dBm
25
25
TA = +85°C
TA = +25°C
TA = –40°C
23
21
23
21
NOISE FIGURE (dB)
19
17
15
13
11
19
17
15
13
11
9
9
7
7
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 29. Noise Figure vs. RF Frequency at Various Temperatures,
LO = 6 dBm
5
1.0
13730-029
17.5
TA = +85°C
TA = +25°C
TA = –40°C
1.5
2.0
2.5
3.0
3.5
IF FREQUENCY (GHz)
Figure 32. Noise Figure vs. IF Frequency at Various Temperatures,
LO = 6 dBm, LO Frequency = 21 GHz
Rev. B | Page 9 of 24
13730-032
P1dB (dBm)
–3.0
26
RF FREQUENCY (GHz)
NOISE FIGURE (dB)
–3.5
Figure 30. Output IP3 vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
8
5
17.0
–4.0
CONTROL VOLTAGE (V)
10
–6
17.0
–4.5
13730-030
5
13730-027
10
–5.0
RF = 18GHz
RF = 19GHz
RF = 20GHz
10
HMC7911
Data Sheet
24
24
22
22
CONVERSION GAIN (dB)
20
18
16
TA = +85°C
TA = +25°C
TA = –40°C
14
12
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 33. Conversion Gain vs. RF Frequency at Various Temperatures,
LO = 4 dBm
32
28
CONVERSION GAIN (dB)
24
20
16
LO = 2dBm
LO = 4dBm
LO = 6dBm
14
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
10
17.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 36. Conversion Gain vs. RF Frequency at Various LO Powers
25
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
20
15
CONVERSION GAIN (dB)
36
18
12
13730-033
10
17.0
20
13730-036
CONVERSION GAIN (dB)
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 2 GHz.
16
12
8
4
0
–4
10
5
0
RF = 17GHz
RF = 18GHz
RF = 19GHz
–5
–10
–8
–12
–15
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 34. Conversion Gain vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
50
45
45
40
40
30
25
20
15
TA = +85°C
TA = +25°C
TA = –40°C
10
18.0
18.5
19.0
RF FREQUENCY (GHz)
19.5
20.0
–3.0
–2.5
–2.0
–1.5
–1.0
35
30
25
20
LO = 2dBm
LO = 4dBm
LO = 6dBm
15
10
0
17.0
13730-035
17.5
–3.5
5
5
0
17.0
–4.0
Figure 37. Conversion Gain vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm,
50
35
–4.5
CONTROL VOLTAGE (V)
SIDEBAND REJECTION (dBc)
SIDEBAND REJECTION (dBc)
–20
–5.0
Figure 35. Sideband Rejection vs. RF Frequency at Various Temperatures,
LO = 4 dBm
17.5
18.0
18.5
19.0
RF FREQUENCY (GHz)
19.5
20.0
13730-038
17.5
13730-034
–20
17.0
13730-037
–16
Figure 38. Sideband Rejection vs. RF Frequency at Various LO Powers
Rev. B | Page 10 of 24
Data Sheet
HMC7911
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 2 GHz.
25
40
23
38
TA = +85°C
TA = +25°C
TA = –40°C
36
34
17
32
15
13
26
9
24
7
22
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
20
17.0
38
21
36
19
34
17
32
IP3 (dBm)
40
23
15
13
28
26
19.5
20.0
LO = 2dBm
LO = 4dBm
LO = 6dBm
18.5
19.0
19.5
20.0
20
17.0
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
13730-043
18.0
13730-040
17.5
Figure 40. Input IP3 vs. RF Frequency at Various LO Powers
30
19.0
22
RF FREQUENCY (GHz)
32
18.5
28
24
7
5
17.0
18.0
30
26
LO = 2dBm
LO = 4dBm
LO = 6dBm
9
17.5
Figure 42. Output IP3 vs. RF Frequency at Various Temperatures,
LO = 4 dBm
25
11
TA = +85°C
TA = +25°C
TA = –40°C
RF FREQUENCY (GHz)
Figure 39. Input IP3 vs. RF Frequency at Various Temperatures,
LO = 4 dBm
IP3 (dBm)
28
11
5
17.0
Figure 43. Output IP3 vs. RF Frequency at Various LO Powers
52
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
48
44
40
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
36
IP3 (dBm)
24
IP3 (dBm)
30
13730-042
IP3 (dBm)
19
13730-039
IP3 (dBm)
21
22
20
18
32
28
24
20
16
16
12
14
8
12
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 41. Input IP3 vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
0
17.0
17.5
18.0
18.5
19.0
RF FREQUENCY (GHz)
19.5
20.0
13730-044
17.5
13730-041
10
17.0
4
Figure 44. Output IP3 vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
Rev. B | Page 11 of 24
HMC7911
Data Sheet
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 2 GHz.
30
40
28
35
RF = 17GHz
RF = 18GHz
RF = 19GHz
26
30
25
22
IP3 (dBm)
20
18
20
15
RF = 17GHz
RF = 18GHz
RF = 19GHz
16
10
14
–4.5
–4.0
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
CONTROL VOLTAGE (V)
0
–5.0
13730-045
10
–5.0
Figure 45. Input IP3 vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
–2.5
–2.0
–1.5
–1.0
24
22
4
20
P1dB (dBm)
6
2
0
18
16
–2
14
–4
12
17.5
18.0
18.5
19.0
19.5
20.0
10
17.0
13730-046
P1dB (dBm)
–3.0
26
RF FREQUENCY (GHz)
Figure 46. Input P1dB vs. RF Frequency at Various Temperatures,
LO = 4 dBm
21
19
17
15
13
11
9
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
13730-047
7
17.5
17.5
18.0
18.5
19.0
19.5
20.0
Figure 49. Output P1dB vs. RF Frequency at Various Temperatures,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
23
TA = +85°C
TA = +25°C
TA = –40°C
RF FREQUENCY (GHz)
25
NOISE FIGURE (dB)
–3.5
Figure 48. Output IP3 vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
8
5
17.0
–4.0
CONTROL VOLTAGE (V)
10
–6
17.0
–4.5
13730-048
5
12
Figure 47. Noise Figure vs. RF Frequency at Various Temperatures,
LO = 6 dBm
Rev. B | Page 12 of 24
13730-049
IP3 (dBm)
24
Data Sheet
HMC7911
24
22
22
CONVERSION GAIN (dB)
24
20
18
16
14
TA = +85°C
TA = +25°C
TA = –40°C
10
17.0
17.5
18.0
18.5
19.0
19.5
20.0
Figure 50. Conversion Gain vs. RF Frequency at Various Temperatures,
LO = 4 dBm
24
CONVERSION GAIN (dB)
20
18
16
14
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
10
17.0
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 53. Conversion Gain vs. RF Frequency at Various LO Powers
20
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
15
CONVERSION GAIN (dB)
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
28
20
12
RF FREQUENCY (GHz)
32
LO = 2dBm
LO = 4dBm
LO = 6dBm
13730-053
12
13730-050
CONVERSION GAIN (dB)
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 3 GHz.
16
12
8
4
0
–4
–8
–12
10
5
0
–5
RF = 17GHz
RF = 18GHz
RF = 19GHz
–10
–15
17.4
17.6
17.8
18.0
18.2
18.4
18.6
18.8
19.0
RF FREQUENCY (GHz)
Figure 51. Conversion Gain vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
50
45
45
40
40
30
25
20
TA = +85°C
TA = +25°C
TA = –40°C
15
10
5
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
35
30
25
20
LO = 2dBm
LO = 4dBm
LO = 6dBm
15
10
5
17.5
18.0
18.5
19.0
RF FREQUENCY (GHz)
19.5
20.0
0
17.0
13730-052
0
17.0
–4.0
Figure 54. Conversion Gain vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
50
35
–4.5
CONTROL VOLTAGE (V)
SIDEBAND REJECTION (dBc)
SIDEBAND REJECTION (dBc)
–20
–5.0
Figure 52. Sideband Rejection vs. RF Frequency at Various Temperatures,
LO = 4 dBm
17.5
18.0
18.5
19.0
RF FREQUENCY (GHz)
19.5
20.0
13730-055
17.2
13730-051
–20
17.0
13730-054
–16
Figure 55. Sideband Rejection vs. RF Frequency at Various LO Powers
Rev. B | Page 13 of 24
HMC7911
Data Sheet
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 3 GHz.
25
40
23
38
TA = +85°C
TA = +25°C
TA = –40°C
36
34
17
32
15
13
26
9
24
7
22
18.0
18.5
19.0
19.5
20.0
20
17.0
40
23
38
IP3 (dBm)
15
13
28
26
24
7
22
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
28
26
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 57. Input IP3 vs. RF Frequency at Various LO Powers
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
LO = 2dBm
LO = 4dBm
LO = 6dBm
20
17.0
13730-057
18.0
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
20.0
30
9
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
19.5
32
11
30
19.0
34
17
17.5
18.5
36
LO = 2dBm
LO = 4dBm
LO = 6dBm
5
17.0
18.0
Figure 59. Output IP3 vs. RF Frequency at Various Temperatures,
LO = 4 dBm
25
19
17.5
RF FREQUENCY (GHz)
Figure 56. Input IP3 vs. RF Frequency at Various Temperatures,
LO = 4 dBm
21
TA = +85°C
TA = +25°C
TA = –40°C
13730-060
17.5
RF FREQUENCY (GHz)
IP3 (dBm)
28
11
5
17.0
Figure 60. Output IP3 vs. RF Frequency at Various LO Powers
52
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
48
44
40
24
36
22
32
IP3 (dBm)
IP3 (dBm)
30
13730-059
IP3 (dBm)
19
13730-056
IP3 (dBm)
21
20
18
= –5V
= –4.8V
= –4.5V
= –4.3V
= –4V
= –3.8V
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –3.5V
= –3.3V
= –3V
= –2.8V
= –2.5V
= –2.3V
18.0
18.2
VCTLx
VCTLx
VCTLx
VCTLx
VCTLx
= –2V
= –1.8V
= –1.5V
= –1.3V
= –1V
18.6
18.8
28
24
20
16
16
12
14
8
12
17.2
17.4
17.6
17.8
18.0
18.2
18.4
18.6
18.8
19.0
RF FREQUENCY (GHz)
Figure 58. Input IP3 vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
0
17.0
17.2
17.4
17.6
17.8
18.4
RF FREQUENCY (GHz)
19.0
13730-061
4
13730-058
10
17.0
Figure 61. Output IP3 vs. RF Frequency at Various Control Voltages,
LO = 4 dBm
Rev. B | Page 14 of 24
Data Sheet
HMC7911
Data taken as SSB upconverter with external IF 90° hybrid at the IF ports, IF = 3 GHz.
30
40
28
35
RF = 17GHz
RF = 18GHz
RF = 19GHz
26
30
25
22
IP3 (dBm)
20
18
20
15
RF = 17GHz
RF = 18GHz
RF = 19GHz
16
10
14
–4.5
–4.0
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
CONTROL VOLTAGE (V)
Figure 62. Input IP3 vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
26
8
24
6
22
4
20
0
TA = +85°C
TA = +25°C
TA = –40°C
–2
18.0
18.5
19.0
19.5
20.0
–2.5
–2.0
–1.5
–1.0
16
10
17.0
13730-063
17.5
Figure 63. Input P1dB vs. RF Frequency at Various Temperatures,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
21
19
17
15
13
11
9
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
13730-064
7
17.5
18.0
18.5
19.0
19.5
20.0
Figure 66. Output P1dB vs. RF Frequency at Various Temperatures,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
23
17.5
RF FREQUENCY (GHz)
25
NOISE FIGURE (dB)
–3.0
12
RF FREQUENCY (GHz)
5
17.0
–3.5
18
14
–4
–6
17.0
–4.0
Figure 65. Output IP3 vs. Control Voltage at Various RF Frequencies,
LO = 4 dBm
10
2
–4.5
CONTROL VOLTAGE (V)
P1dB (dBm)
P1dB (dBm)
0
–5.0
13730-062
10
–5.0
13730-065
5
12
Figure 64. Noise Figure vs. RF Frequency at Various Temperatures,
LO = 6 dBm
Rev. B | Page 15 of 24
13730-066
IP3 (dBm)
24
HMC7911
Data Sheet
20
–10
15
–15
10
–20
LEAKAGE (dBm)
5
0
–5
TA = +85°C
TA = +25°C
TA = –40°C
–10
–25
–30
–35
TA = +85°C
TA = +25°C
TA = –40°C
–40
18
19
20
21
22
23
24
LO FREQUENCY (GHz)
–50
17
13730-067
–20
17
18
21
22
23
24
Figure 70. 2× LO Leakage at IF1 vs. LO Frequency at
Various Temperatures, LO = 4 dBm
–10
–10
–15
–15
TA = +85°C
TA = +25°C
TA = –40°C
–20
–20
LEAKAGE (dBm)
–25
LEAKAGE (dBm)
20
LO FREQUENCY (GHz)
Figure 67. 2× LO Leakage at RFOUT vs. LO Frequency at
Various Temperatures, LO = 4 dBm
–25
–30
–35
TA = +85°C
TA = +25°C
TA = –40°C
–40
–30
–35
–40
–45
–50
–45
18
19
20
21
22
23
24
LO FREQUENCY (GHz)
13730-068
–55
–50
17
Figure 68. 2× LO Leakage at IF2 vs. LO Frequency at
Various Temperatures, LO = 4 dBm
–15
–20
–25
–30
–35
–40
TA = +85°C
TA = +25°C
TA = –40°C
–45
–50
–60
0.5
1.0
1.5
2.0
2.5
3.0
IF FREQUENCY (GHz)
3.5
13730-069
–55
0
–60
0
0.5
1.0
1.5
2.0
2.5
3.0
IF FREQUENCY (GHz)
Figure 71. IF1 Leakage at RFOUT vs. IF Frequency at
Various Temperatures
–10
LEAKAGE (dBm)
19
13730-070
–45
–15
Figure 69. IF2 Leakage at RFOUT vs. IF Frequency at
Various Temperatures
Rev. B | Page 16 of 24
3.5
13730-071
LEAKAGE (dBm)
LEAKAGE PERFORMANCE
Data Sheet
HMC7911
RETURN LOSS PERFORMANCE
0
0
–15
–20
17.5
18.0
18.5
19.0
19.5
20.0
RF FREQUENCY (GHz)
Figure 72. RF Return Loss vs. RF Frequency at Various Temperatures,
LO = 4 dBm at LO Frequency = 21 GHz
–30
8.0
9.5
10.0
10.5
11.0
11.5
12.0
Figure 74. LO Return Loss vs. LO Frequency at Various Temperatures,
LO = 4 dBm
TA = +85°C
TA = +25°C
TA = –40°C
–5
RETURN LOSS (dB)
–15
–20
–15
–20
–25
–30
–30
1.0
1.5
2.0
2.5
IF FREQUENCY (GHz)
3.0
3.5
Figure 73. IF1 Return Loss vs. IF Frequency at Various Temperatures,
LO = 4 dBm at LO Frequency = 21 GHz
TA = +85°C
TA = +25°C
TA = –40°C
–10
–25
–35
0.5
13730-073
RETURN LOSS (dB)
9.0
0
–10
–35
0.5
8.5
LO FREQUENCY (GHz)
0
–5
TA = +85°C
TA = +25°C
TA = –40°C
–20
–25
13730-072
–30
17.0
–15
13730-074
–25
–10
1.0
1.5
2.0
2.5
IF FREQUENCY (GHz)
3.0
3.5
13730-075
–10
–5
TA = +85°C
TA = +25°C
TA = –40°C
RETURN LOSS (dB)
RETURN LOSS (dB)
–5
Figure 75. IF2 Return Loss vs. IF Frequency at Various Temperatures,
LO = 4 dBm at LO Frequency = 21 GHz
Rev. B | Page 17 of 24
HMC7911
Data Sheet
POWER DETECTOR PERFORMANCE
0.1
TA = +85°C
TA = +25°C
TA = –40°C
SENSITIVITY (V/dB)
0.01
–16 –14 –12 –10 –8
–6
–2
–4
0
2
4
8
6
10
OUTPPUT POWER (dBm)
Figure 76. Detector Output Voltage (VREF – VDET) vs. Output Power at Various
Temperatures, LO = 20.5 GHz
0
2
4
6
8
10
–6
–4
–2
0
2
4
6
8
10
OUTPUT POWER (dBm)
–16 –14 –12 –10 –8
Figure 77. Detector Output Voltage (VREF – VDET) vs. Output Power at Various
Temperatures, LO = 22 GHz
0.1
SENSITIVITY (V/dB)
1
0
2
4
OUTPPUT POWER (dBm)
6
8
10
–2
0
2
4
6
8
10
Figure 78. Detector Output Voltage (VREF – VDET) vs. Output Power at Various
Temperatures, LO = 23.5 GHz
TA = +85°C
TA = +25°C
TA = –40°C
0.01
0.001
–16 –14 –12 –10 –8
13730-078
0.1
–2
–4
Figure 80. Detector Sensitivity vs. Output Power at Various Temperatures,
LO = 22 GHz
TA = +85°C
TA = +25°C
TA = –40°C
–4
–6
OUTPUT POWER (dBm)
13730-080
SENSITIVITY (V/dB)
0.01
–16 –14 –12 –10 –8
OUTPUT VOLTAGE (V)
–2
TA = +85°C
TA = +25°C
TA = –40°C
0.1
0.01
–6
–4
Figure 79. Detector Sensitivity vs. Output Power at Various Temperatures,
LO = 20.5 GHz
TA = +85°C
TA = +25°C
TA = –40°C
1
10
–6
OUTPUT POWER (dBm)
13730-077
OUTPUT VOLTAGE (V)
10
0.001
–16 –14 –12 –10 –8
13730-076
0.1
0.01
13730-079
1
TA = +85°C
TA = +25°C
TA = –40°C
–6
–4
–2
0
2
OUTPUT POWER (dBm)
4
6
8
10
13730-081
OUTPUT VOLTAGE (V)
10
Figure 81. Detector Sensitivity vs. Output Power at Various Temperatures,
LO = 23.5 GHz
Rev. B | Page 18 of 24
Data Sheet
HMC7911
SPURIOUS PERFORMANCE
M × N Spurious Output, RF = 19 GHz
TA = 25°C, IF = 1 GHz, VDLOx = 5 V, VDRFx = 5 V, VCTLx = −5 V,
VESD = −5 V, VGMIX = −0.5 V.
IF = 1 GHz at IF input power = −6 dBm, LO frequency =
20 GHz at LO input = 4 dBm.
Mixer spurious products are measured in dBc from the RF
output power level. Spur values are (M × IF) − (N × LO). N/A
means not applicable.
M × N Spurious Outputs, RF = 17 GHz
IF = 1 GHz at IF input power = −6 dBm, LO frequency =
18 GHz at LO input power = 4 dBm.
M × IF
0
1
2
3
4
5
0
N/A
52
72
91
98
108
1
6
0
50
69
80
93
N × LO
2
3
58
N/A
45
N/A
42
N/A
71
N/A
79
N/A
87
N/A
4
N/A
N/A
N/A
N/A
N/A
N/A
5
N/A
N/A
N/A
N/A
N/A
N/A
IF = 2 GHz at IF input power = −6 dBm, LO frequency =
19 GHz at LO input power = 4 dBm.
M × IF
0
1
2
3
4
5
0
N/A
53
66
74
99
117
1
7
0
48
78
88
102
N × LO
2
3
66
N/A
48
N/A
41
N/A
69
N/A
82
N/A
91
N/A
4
N/A
N/A
N/A
N/A
N/A
N/A
5
N/A
N/A
N/A
N/A
N/A
N/A
IF = 3 GHz at IF input power = −6 dBm, LO frequency =
20 GHz at LO input = 4 dBm.
M × IF
0
1
2
3
4
5
0
N/A
50
59
82
101
98
1
4.8
0
45
77
95
103
N × LO
2
3
54
N/A
48
N/A
44
N/A
66
N/A
77
N/A
94
N/A
4
N/A
N/A
N/A
N/A
N/A
N/A
M × IF
0
1
2
3
4
5
0
N/A
52
79
90
98
115
1
6
0
43
64
77
93
N × LO
2
56
50
52
69
79
85
3
N/A
N/A
N/A
N/A
N/A
N/A
4
N/A
N/A
N/A
N/A
N/A
N/A
5
N/A
N/A
N/A
N/A
N/A
N/A
IF = 2 GHz at IF input power = −6 dBm, LO frequency =
21 GHz at LO input power = 4 dBm.
M × IF
0
1
2
3
4
5
0
N/A
50
69
78
99
106
1
4
0
45
68
79
90
N × LO
2
60
46
52
71
77
83
3
N/A
N/A
N/A
N/A
N/A
N/A
4
N/A
N/A
N/A
N/A
N/A
N/A
5
N/A
N/A
N/A
N/A
N/A
N/A
IF = 3 GHz at IF input power = −6 dBm, LO frequency =
22 GHz at LO input power = 4 dBm.
M × IF
5
N/A
N/A
N/A
N/A
N/A
N/A
Rev. B | Page 19 of 24
0
1
2
3
4
5
0
N/A
51
66.3
92
104
95
1
3
0
39
73
86
103
N × LO
2
3
71
N/A
47
N/A
53
N/A
71
N/A
81
N/A
88
N/A
4
N/A
N/A
N/A
N/A
N/A
N/A
5
N/A
N/A
N/A
N/A
N/A
N/A
HMC7911
Data Sheet
THEORY OF OPERATION
an on-chip Wilkinson power combiner and relatively matched
to provide a single-ended 50 Ω output signal that is amplified
by the RF amplifiers to produce a dc-coupled and 50 Ω matched
RF output signal at the RFOUT port. A voltage attenuator precedes
the RF amplifiers for desired gain control.
The HMC7911 is a GaAs, pHEMT, MMIC I/Q upconverter
with an integrated LO buffer that upconverts intermediate
frequencies between dc to 3.5 GHz to RF between 17 GHz and
20 GHz. LO buffer amplifiers are included on chip to allow a
minimum LO drive level of 4 dBm for full performance. The
LO path feeds a quadrature splitter followed by on-chip baluns
that drive the I and Q singly balanced cores of the passive mixers.
The RF output of the I and Q mixers are then summed through
ESD
ESD
ESD
VDLO2
VDLO1
I
ESD
VDRF1
ESD
VDRF2
ESD
VDRF3
ESD
VDRF4
2×
VGMIX
RFOUT
VREF
Q
VCTL1
ESD
ESD
VDET
VGRF VCTL2
ESD
ESD
Figure 82. Upconverter Circuit Architecture
Rev. B | Page 20 of 24
ESD
ESD
13730-082
LOIN
The power detector feature provides a LO cancellation capability
to the level of −10 dBm. See Figure 82 for a functional block
diagram of the upconverter circuit architecture.
Data Sheet
HMC7911
APPLICATIONS INFORMATION
A typical lower sideband upconversion circuit is shown in
Figure 83. The lower sideband input signal is connected to the
input port of the 90° hybrid coupler. The isolated port is loaded
to 50 Ω. The external 90° hybrid splits the IF signal into I and Q
phase terms. The I and Q input signals enter the HMC7911 on
the IF1 and IF2 inputs. IF1 of the device is connected to the 90°
port of the hybrid coupler. IF2 is connected to the 0° port of the
hybrid coupler. The LO to RF leakage can be improved by
applying small dc offsets to the I/Q mixer cores via the VDC_IF1
and VDC_IF2 inputs. However, it is important to limit the applied
dc bias to avoid sourcing or sinking more than ±3 mA of bias
current. Depending on the bias sources used, it may be prudent to
add series resistance to ensure that the applied bias current does
not exceed ±3 mA.
BIASING SEQUENCE
LOCAL OSCILLATOR NULLING
Broad LO nulling may be required to achieve optimum IP3 and
LO to RF isolation performance. This nulling is achieved by
applying dc voltages between −0.2 V and +0.2 V to the I and Q
ports to suppress the LO signal across the RF frequency band by
approximately 5 dBc to 10 dBc. To suppress the LO signal at the
RF port, use the following nulling sequence:
1.
2.
3.
The HMC7911 uses buffer amplifiers in the LO and RF paths.
These active stages all use depletion mode pHEMTs. To ensure
transistor damage does not occur, use the following power-up
bias sequence:
1.
2.
3.
4.
5.
6.
7.
Apply a −5 V bias to Pin 27 (VESD).
Apply a −2 V bias to Pin 26 (VGRF), which is a pinched off
state.
Apply a −0.5 V bias to Pin 1 (VGMIX ). This bias can be
adjusted from −0.5 V to −1 V depending on the LO power
used to provide the optimum IP3 response of the mixer.
Apply 5 V to Pin 9 (VDLO1) and Pin 10 (VDLO2).
Apply −5 V to Pin 20 (VCTL2) and Pin 21 (VCTL1). Adjust
VCTL1 and VCTL2 between −5 V and 0 V depending on the
amount of attenuation desired.
Apply 5 V to Pin 18, Pin 19, Pin 22, and Pin 25 (VDRF4,
VDRF3, VDRF2, and VDRF1).
Adjust Pin 26 (VGRF) between −2 V and 0 V to achieve a
total amplifier quiescent drain current of 220 mA.
Rev. B | Page 21 of 24
Adjust VDC_IF1 between −0.2 V and +0.2 V and monitor the
LO leakage on the RF port. When the desired or maximum
level of suppression is achieved, proceed to Step 2.
Adjust VDC_IF2 between −0.2 V and +0.2 V and monitor the
LO leakage on the RF port until either the desired or the
maximum level of suppression is achieved.
If the desired level of the LO signal on the RF port has still
not been achieved, further tune each VDC_IF1 and VDC_IF2
independently to achieve the desired LO leakage. The
resolution of the voltage changed on the voltage of the
VDC_IF1 and VDC_IF2 inputs must be in the millivolt range.
HMC7911
Data Sheet
IF1
50Ω
IF2
IFIN
HYBRID
COUPLER
VDC_IF2
100nF
100pF
100pF
33nH
100pF
VDC_IF1
33nH
100pF
100nF
VESD
100pF
100nF
4.7µF
+
VGRF
100pF
100nF
4.7µF
+
100pF
100nF
4.7µF
100pF
100nF
4.7µF
100pF
100nF
4.7µF
100pF
100nF
4.7µF
100pF
100nF
4.7µF
100pF
100nF
4.7µF
+
VDRF1
32 31 30 29 28 27 26 25
VGMIX
4.7µF
100nF
100pF
+
1
24
2
23
3
22
4
LOIN
20
6
19
7
18
8
17
VDRF2
VCTL1
21
HMC7911
5
+
+
VCTL2
+
9 10 11 12 13 14 15 16
GND
4.7µF
VDLO2
4.7µF
+
+
100nF
100pF
100nF
100pF
VREF
+
VDRF3
VDRF4
RFOUT
VDET
VDET
VREF
VREF
VDET
100nF
100pF
10kΩ
10kΩ
33kΩ
VD_5V
+5V
100kΩ 100kΩ
33kΩ
10kΩ
–5V
10kΩ
VOUT = VREF – VDET
+5V
ALTERNATE SUGGESTED CIRCUIT
Figure 83. Typical Application Circuit
Rev. B | Page 22 of 24
13730-083
VDLO1
+
Data Sheet
HMC7911
EVALUATION PRINTED CIRCUIT BOARD
Use a sufficient number of via holes to connect the top and
bottom ground planes. The evaluation circuit board shown in
Figure 84 is available from Analog Devices, Inc., upon request.
The circuit board used in this application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance and
the package ground leads and exposed pad must be connected
directly to the ground plane similar to that shown in Figure 84.
J3
I
L1
C62
C4 C
6 48
C29
C28
C1
+
C6
C77
+
C78
+
C9
C50
R1
C26
VDD3+
VDD4
C25
R2
C65
J7
C57
C27
RFOUT
J4
600-01346-00-2
13730-084
GND
VDOUT+
C51
+
VD_5V
C5
6
+
VDREF
C3
1
VDLO2 C32
+
+
C5
J8
C4
C2
VDLO1
GND
LOIN
+
GND
J1
C61
C49 VDLNA
VDD2
C47
C45
C18
C44
C17
C15
C16
C13
C10 C11
VCTL1
C7
C8VCTL2
C12
GND
VGRF
C30
U1
C3
-5ESD
+
GND
C64
J5
C75
J6
VI
+
VQ
VADJUST
+
C71
C72
Q
C70
C69
L2
C76
+
C74
C73
J2
Figure 84. Evaluation Board Top Layer
Rev. B | Page 23 of 24
HMC7911
Data Sheet
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
0.30
0.25
0.18
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
32
25
1
24
0.50
BSC
3.80
3.70 SQ
3.60
EXPOSED
PAD
17
0.45
0.40
0.35
TOP VIEW
0.90
0.85
0.80
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
SEATING
PLANE
PKG-004898
8
16
9
BOTTOM VIEW
3.50 REF
0.20 MIN
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-4.
03-09-2017-B
PIN 1
INDICATOR
5.10
5.00 SQ
4.90
Figure 85. 32-Lead Lead Frame Chip Scale Package [LFCSP]
5 mm × 5 mm Body and 0.85mm Package Height
(HCP-32-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
HMC7911LP5E
HMC7911LP5ETR
EV1HMC7911LP5
1
2
Temperature Range
−40°C to +85°C
−40°C to +85°C
MSL Rating2
MSL3
MSL3
Package Description
32-Lead Lead Frame Chip Scale Package [LFCSP]
32-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Assembly Board
The HMC7911LP5E and HMC7911LP5ETR are RoHS Compliant Parts.
The peak reflow temperature is 260°C. See the Absolute Maximum Ratings section, Table 2.
©2016–2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13730-0-4/18(B)
Rev. B | Page 24 of 24
Package Option
HCP-32-1
HCP-32-1