EVAL-3CH4CHSOICEBZ

EVAL-3CH4CHSOICEBZ User Guide UG-935 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Using the EVAL-3CH4CHSOICEBZ iCoupler Data Isolator Evaluation Board FEATURES EVALUATION BOARD PHOTOGRAPH Access to all 4 data channels Enable/disable controls Multiple connection options Support for active probes Provision for cable terminations Support for printed circuit board (PCB) edge mounted coaxial connectors Easy configuration Sample iCoupler digital isolator must be ordered separately SUPPORTED iCoupler GENERICS 14276-001 ADuM130D/ADuM130E/ADuM131D/ADuM131E ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ ADuM142E ADuM230D/ADuM230E/ADuM231D/ADuM231E ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ ADuM242E Figure 1. GENERAL DESCRIPTION The EVAL-3CH4CHSOICEBZ evaluation board supports tripleand quad-channel standard data isolators in 16-lead SOIC packages. The evaluation board provides a JEDEC standard 16-lead SOIC_N and SOIC_W pad layout and routing appropriate for the evaluation of supported devices. The evaluation board provides a connection to power supplies by screw terminals and includes optimal bypass capacitors. Signal channel routing supports signal distribution and loopback, and provides positions for loads referenced to the VDD1/VDD2 and GND1/GND2 planes. Signal sources can be conducted to the board through header pins or edge mounted SMA connectors; SMA connectors must be ordered separately. Positions for through hole 0.2 inch headers compatible with active probes are provided on the PCB; probe header pins must be ordered separately. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. The board follows PCB design practices for 4-layer boards, including a full power and ground plane on each side of the isolation barrier. No other electromagnetic interference (EMI) or noise mitigation design features are included on the board. In cases of very high speed operation or when ultralow emissions are required, refer to the AN-1109 application note for additional board layout techniques. Full specifications for the device under test (DUT) are available in the corresponding product data sheet, which should be consulted in conjunction with this user guide when using the evaluation board. Rev. A | Page 1 of 9 UG-935 EVAL-3CH4CHSOICEBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Power Input ....................................................................................3 Supported iCoupler Generics ......................................................... 1 Data Input/Output Structures .....................................................3 Evaluation Board Photograph ......................................................... 1 Bypass on the PCB ........................................................................4 General Description ......................................................................... 1 High Voltage Capability ...............................................................4 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................5 Evaluation Board Circuitry ............................................................. 3 Ordering Information .......................................................................9 PCB Evaluation Functions .......................................................... 3 Bill of Materials ..............................................................................9 Connectors .................................................................................... 3 REVISION HISTORY 12/2016—Rev. 0 to Rev. A Changes to Supported iCoupler Generics Section ....................... 1 Moved Figure 1 ................................................................................. 1 Changes to Figure 1 .......................................................................... 1 Changes to PCB Evaluation Functions Section, Connectors Section, and Data Input/Output Structures Section .................... 3 Deleted Figure 2; Renumbered Sequentially .................................4 Changes to Bypass on the PCB Section ..........................................4 Change to Figure 5 ............................................................................5 5/2016—Revision 0: Initial Version Rev. A | Page 2 of 9 EVAL-3CH4CHSOICEBZ User Guide UG-935 EVALUATION BOARD CIRCUITRY PCB EVALUATION FUNCTIONS The EVAL-3CH4CHSOICEBZ board evaluates the full range of iCoupler® data transfer functions, powers each side of the iCoupler isolator independently, and applies high differential voltages between the two sides of the isolator. The board is intended for evaluation of the components, but has not been safety certified for high voltage operation. If differential voltages greater than 60 V are applied, external safety measures appropriate for the voltage must be in place. The evaluation board comes with power terminals, bypass capacitors, and header pins installed. The compatible iCoupler digital isolator must be ordered and installed separately. The EVAL-3CH4CHSOICEBZ is compatible with triple- and quadchannel iCoupler standard data isolator devices with on-off keying architecture, such as the ADuM130D/ADuM130E/ADuM131D/ ADuM131E and ADuM140D/ADuM140E/ADuM141D/ ADuM141E/ADuM142D/ADuM142E in 16-lead SOIC_W and 16-lead SOIC_N packages. CONNECTORS POWER INPUT Each side of the iCoupler standard data isolator requires an offboard power source. The power source must be independent if common-mode voltages are applied across the isolation barrier, or damage may occur to the power supply. Divided power and ground planes are present on Layer 2 and Layer 3 of the PCB on each side of the isolation barrier shown in Figure 6 and Figure 7. Power connects to VDD1 for Side 1 and to VDD2 for Side 2. DATA INPUT/OUTPUT STRUCTURES The PCB provides support for three types of interconnections: • • • Power can be connected through the J1 and J2 (Terminal 1 is power, Terminal 2 is GND, as marked on the silkscreen in Figure 1) terminal blocks or the optional VDD1 and VDD2 SMA connectors. Signals can be routed in or out of the board with the provided header pins or optional SMA connectors. The pin spacing of each through hole connector is 0.1 inch between centers. There are additional signal test points with 0.2 inch spacing provided for active scope probes. These header pins must be added separately. Installed probe points are shown in Figure 2. SMA edge mounted connectors Through hole signal ground pairs Terminal blocks for power connections With these three options, it is possible to make temporary and permanent connections to the board. When coaxial connections are required, SMA connector positions are available for digital input and output signals and VDD1 and VDD2 power supplies. The SMA connector positions must be ordered from a distributor separately. Figure 2 shows examples of installed SMA connectors; these connectors are not only low profile and provide excellent mechanical connections to the PCB, but also support 50 Ω coaxial cabling. Each data channel has a variety of structures to configure, load, and monitor both the input and output. Figure 3 shows an example of the routing from an external connection to a DUT data channel. Each data channel has similar connections available. Starting at the external connection, the signal path is constructed as follows, corresponding with Label 1 through Label 7 in Figure 3: • • • • • SCOPE PROBE SMA CONNECTOR • SCOPE PROBE HEADER TERMINAL BLOCK • SHORTING JUMPER Figure 2. Optional Components 14276-003 PADS TO CONNECT SMA A pad layout for a PCB board, edge-mounted SMA connector. Two 0805 pads are provided where 100 Ω resistors to ground can be installed. The combined resistance is 50 Ω to provide a termination for a standard coaxial cable. A standard 0805 pad layout where the coaxial and termination structures can connect to the rest of the signal path. A 0603 pad layout between the signal path and the VDD1/VDD2 plane for a pull-up resistor. A populated 2-pin header provides a signal ground pair that can be used for clip leads or shorting a channel to ground temporarily. There are groupings of three open through holes, consisting of a signal and two ground connections. Use these holes for hardwiring signal wires into the PCB, installing a header to accept an active probe, or installing a 2-pin header to allow adjacent channels to temporarily be shorted together. A 0805 pad layout between the signal and ground where a load capacitor or resistor can be installed. Figure 2 shows many of the optional components installed as well as how jumpers can temporarily connect channels. Figure 2 shows a signal connecting to the first-channel SMA and fanning out to the top three channels, monitored by an active scope probe. Rev. A | Page 3 of 9 UG-935 EVAL-3CH4CHSOICEBZ User Guide BYPASS ON THE PCB HIGH VOLTAGE CAPABILITY Optional surface-mount bulk capacitors, C1 and C14, are installed near the power connectors to compensate for long cables to the power supply. Bypass capacitors, C7 and C8, are installed near the iCoupler isolator and consist of a 0.1 µF capacitor for both DUT power supply pins. The PCB is designed in adherence with 2500 V basic insulation practices. High voltage testing beyond 2500 V is not recommended. Do not rely on the evaluation board for safety functions. 1 SMA CONNECTOR PADS 2 TERMINATION 3 CONNECT TO SMA 4 PULL-UP 7 LOAD 6 OPEN THROUGH HOLES FOR ACTIVE PROBES GND/GND/SIGNAL 14276-004 5 2-PIN HEADER GND/SIGNAL Figure 3. Configuration and Monitoring Structures (Showing a Datapath from an External Connection to the DUT Pin) Rev. A | Page 4 of 9 VE1 VOD VOC VIB VDD1 AGND1 1 2 1 2 3 VDD1 AGND1 1 2 1 2 3 VDD1 AGND1 1 2 1 2 3 VDD1 AGND1 1 2 1 2 3 P15 P13 DNI P11 P9 DNI P7 P5 DNI P3 P1 DNI 0Ω DNI R5 0Ω DNI R4 0Ω DNI R3 0Ω DNI R2 AGND1 R10 0Ω DNI AGND1 R9 0Ω DNI AGND1 R8 0Ω DNI AGND1 R7 0Ω DNI AGND1 R6 0Ω DNI AGND1 C6 15pF DNI 0Ω DNI R15 AGND1 C5 15pF DNI 0Ω DNI R14 AGND1 C4 15pF DNI 0Ω DNI R13 AGND1 C3 15pF DNI 0Ω DNI R12 AGND1 C2 15pF DNI 0Ω DNI R11 R20 100Ω DNI R19 100Ω DNI R18 100Ω DNI R17 100Ω DNI R16 100Ω DNI AGND1 R25 100Ω DNI AGND1 R24 100Ω DNI AGND1 R23 100Ω DNI AGND1 R22 100Ω DNI AGND1 R21 100Ω DNI AGND1 VIA DNI AGND1 VIB DNI VOC DNI AGND1 AGND1 VOD DNI AGND1 VE1 DNI JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 C7 VDD1 AGND1 AGND1 VIA VIB VOC VOD VE1 VDD1 0.1µF R1 0Ω DNI VDD2 VDD1 J1 DNI VDD1 VDD2 GND1 GND2 VIA VOA VIB VOB VOC VIC VOD VID VE1 VE2 GND1 GND2 U1 DNI GEN_SO16 U2 DNI 16 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 P17 DNI P18 DNI AGND2 22-03-2031 1 2 3 AGND1 22-03-2031 1 2 3 DNI AGND1 ESD2 1 AGND1 AGND2 JOHNSON142-0701-851 AGND2 5 4 3 2 VDD2 DNI 1 JOHNSON142-0701-851 AGND1 VDD1 DNI AGND2 AGND2 5 4 3 2 1 2 J2 AGND2 VOA VOB VIC VID VE2 0.1µF MC000044 DNI ESD4 VDD2 AGND2 AGND2 VDD2 DNI ESD3 ADUM142E0BRWZ AGND1 ESD1 MC000044 1 2 AGND1 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 C14 VDD1 10µF Rev. A | Page 5 of 9 C1 Figure 4. EVAL-3CH4CHSOICEBZ Evaluation Board Schematic 10µF C8 VIA VE2 VID VIC VOB VOA AGND2 AGND2 AGND2 AGND2 VDD2 1 2 1 2 3 VDD2 1 2 1 2 3 VDD2 1 2 1 2 3 VDD2 1 2 1 2 3 VDD2 P16 P14 DNI P12 P10 DNI P8 P6 DNI P4 P2 DNI 0Ω DNI R30 0Ω DNI R29 0Ω DNI R28 0Ω DNI R27 0Ω DNI R26 AGND2 R35 0Ω DNI AGND2 R34 0Ω DNI AGND2 R33 0Ω DNI AGND2 R32 0Ω DNI AGND2 R31 0Ω DNI AGND2 0Ω DNI C13 15pF DNI R40 AGND2 C12 15pF DNI 0Ω DNI R39 AGND2 0Ω DNI C11 15pF DNI R38 AGND2 C10 15pF DNI 0Ω DNI R37 AGND2 0 DNI C9 15pF DNI R36 R45 100Ω DNI R44 100Ω DNI R43 100Ω DNI R42 100Ω DNI R41 100Ω DNI AGND2 R50 100Ω DNI AGND2 R49 100Ω DNI AGND2 R48 100Ω DNI AGND2 R47 100Ω DNI AGND2 R46 100Ω DNI 1 AGND2 VOA DNI AGND2 VOB DNI VIC DNI AGND2 AGND2 VID DNI AGND2 VE2 DNI JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 1 JOHNSON142-0701-851 5 4 3 2 EVAL-3CH4CHSOICEBZ User Guide UG-935 EVALUATION BOARD SCHEMATICS AND ARTWORK 14276-005 EVAL-3CH4CHSOICEBZ User Guide 14276-006 UG-935 Figure 5. Top Level Signal Routing and Assembly Rev. A | Page 6 of 9 UG-935 14276-007 EVAL-3CH4CHSOICEBZ User Guide Figure 6. GND1 and GND2 Planes Rev. A | Page 7 of 9 EVAL-3CH4CHSOICEBZ User Guide 14276-008 UG-935 Figure 7. VDD1 and VDD2 Planes Rev. A | Page 8 of 9 EVAL-3CH4CHSOICEBZ User Guide UG-935 ORDERING INFORMATION BILL OF MATERIALS Table 1. Qty 0 2 2 2 8 12 10 10 30 20 Reference Designator U1 C1, C14 C7, C8 J1, J2 P3, P4, P7, P8, P11, P12, P15 ,P16 VE1, VE2, VIA to VID, VOA to VOD, VDD1, VDD2 C2 to C6, C9 to C13 P1, P2, P5, P6, P9, P10, P13, P14, P17, P18 R1 to R15, R26 to R40 R16 to R25, R41 to R50 Description Triple-/quad-channel digital isolator (not installed) 0805, 10 μF, ceramic capacitors 0805, 0.1 μF, bypass capacitors Screw terminal blocks 2-pin headers, 0.1 inch spacing SMA edge connectors (not installed) Data channel load (not installed) 2-pin header, 0.2 inch spacing (not installed) 0603, 0 Ω, SMA connection resistors (not installed) 0805, 100 Ω, input signal termination resistors (not installed) Part Number/Manufacturer Analog Devices, Inc. Not applicable Not applicable Multicomp/MC000044 Not applicable Johnson/142-0701-851 Not applicable Samtec MTSW-202-12-G-S-730 Not applicable Not applicable ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG14276-0-12/16(A) Rev. A | Page 9 of 9