EVAL-5CH6CHSOICEBZ User Guide
UG-936
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Using the EVAL-5CH6CHSOICEBZ iCoupler Standard Data Isolator Evaluation Board
FEATURES
PHOTOGRAPH OF THE EVALUATION BOARD
Access to all data channels
Multiple connection options
Support for active probes
Provisions for cable terminations
Support for printed circuit board (PCB) edge mounted
coaxial connectors
Easy configuration
SUPPORTED iCoupler DEVICES
14277-001
Sample iCoupler digital isolators must be ordered separately;
supported iCoupler devices are as follows:
ADuM150N/ADuM151N/ADuM152N
ADuM160N/ADuM161N/ADuM162N/ADuM163N
ADuM250N/ADuM251N/ADuM252N
ADuM260N/ADuM261N/ADuM262N/ADuM263N
Figure 1.
GENERAL DESCRIPTION
The EVAL-5CH6CHSOICEBZ supports 5-channel and 6-channel
iCoupler® standard data isolators in a 16-lead SOIC package. The
evaluation board provides a JEDEC standard, 16-lead SOIC_N
and SOIC_W pad layout. This layout supports signal distribution,
loopback, and loads referenced to the VDDx or GNDx planes,
as well as optimal bypass capacitance. Signal sources can be
conducted to the evaluation board through header pins or through
edge mounted SMA connectors (SMA connectors must be ordered
separately). Screw terminal blocks on the evaluation board provide
power connections.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
The evaluation board includes 0.2 inch header positions for
compatibility with active probes (probe header pins must be
ordered separately).
The evaluation board follows best PCB design practices for 4-layer
boards, including a full power plane and ground plane on each
side of the isolation barrier. No other electromagnetic interference
(EMI) or noise mitigation design features are included on the
evaluation board. In cases of high speed operation, or when
ultralow emissions are required, refer to the AN-1109 Application
Note for additional evaluation board layout techniques.
Rev. B | Page 1 of 8
UG-936
EVAL-5CH6CHSOICEBZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Power ....................................................................................3
Supported iCoupler Devices ........................................................... 1
Data Input/Output (I/O) Structures ...........................................3
Photograph of the Evaluation Board .............................................. 1
Bypass Capacitance on the PCB ..................................................4
General Description ......................................................................... 1
High Voltage Capability ...............................................................4
Revision History ............................................................................... 2
Evaluation Board Schematics and Artwork ...................................5
Evaluation Board Circuitry ............................................................. 3
Ordering Information .......................................................................8
PCB Evaluation Goals .................................................................. 3
Bill of Materials ..............................................................................8
Connectors .................................................................................... 3
REVISION HISTORY
10/2016—Rev. 0 to Rev. A
Added ADuM250N/ADuM251N/ADuM252N and ADuM260N/
ADuM261N/ADuM262N/ADuM263N..................... Throughout
Change to General Description ...................................................... 1
9/2016—Rev. 0 to Rev. A
Changes to Features Section, Supported iCoupler Devices
Section, and General Description Section .................................... 1
Changes to PCB Evaluation Goals Section ................................... 3
5/2016—Revision 0: Initial Version
Rev. B | Page 2 of 8
EVAL-5CH6CHSOICEBZ User Guide
UG-936
EVALUATION BOARD CIRCUITRY
PCB EVALUATION GOALS
The EVAL-5CH6CHSOICEBZ achieves the following goals:
•
Evaluates the full range of iCoupler data transfer functions.
Independently powers each side of an iCoupler isolator.
Allows high differential voltage to be applied between the
two sides of an iCoupler isolator. The evaluation board is
intended for evaluation of the components, but is not safety
certified for high voltage operation. If applying differential
voltages above 60 V, external safety measures appropriate for
the voltage must be in place.
Allows easy connection to power supplies, data channels,
and instrumentation.
The evaluation board comes installed with power terminals,
bypass capacitors, and header pins. The EVAL-ADuM163N0EBZ
is available with the ADuM163N0 device, which is installed on
the EVAL-5CH6CHSOICEBZ evaluation board. All other
compatible iCoupler digital isolators must be ordered and installed
separately on the EVAL-5CH6CHSOICEBZ evaluation board.
The board is compatible with 5-channel and 6-channel
devices, such as the ADuM150N/ADuM151N/ADuM152N,
the ADuM160N/ADuM161N/ADuM162N/ADuM163N, the
ADuM250N/ADuM251N/ADuM252N, and the ADuM260N/
ADuM261N/ADuM262N/ADuM263N.
CONNECTORS
The PCB provides support for three types of interconnections.
•
•
•
SMA edge mounted connectors
Through-hole signal ground pairs
Terminal blocks for power connections
2) SMA CONNECTOR
5) SCOPE PROBE
HEADER
3) TERMINAL
BLOCK
6) PADS TO
CONNECT SMA
4) SHORTING
JUMPER
14277-002
•
•
•
1) SCOPE PROBE
Figure 2. Optional Components
Power can be connected through the J1 and J2 screw terminals or
through the optional VDD1 and VDD2 SMA connectors. Signals
can be routed in or out with the provided header pins or the
optional SMA connectors. The pin spacing of each through-hole
connector is 0.1 inch between the centers. There are additional
signal test points with 0.2 inch spacing provided for active scope
probes. These header pins must be added separately. The
installed probe points are shown in Figure 2.
INPUT POWER
Each side of an iCoupler standard data isolator requires an offboard power source. On the silkscreen, the J1 and J2 screw
terminals are marked 1 for VDDx and 2 for GNDx.
Divided power and ground planes are present on Layer 2 and
Layer 3 of the PCB on each side of the isolation barrier. This
configuration is shown in Figure 6 and Figure 7, respectively.
With these three options, temporary and permanent
connections to the evaluation board can be made.
DATA INPUT/OUTPUT (I/O) STRUCTURES
When coaxial connections are required, SMA connector positions
are available for digital input/output signals and the VDD1/VDD2
power supplies. The SMA connector positions are unpopulated as
shipped and must be ordered from a distributor separately. Figure 2
shows examples of installed SMA connectors; these connectors are
not only low profile and provide excellent mechanical connections
to the PCB, but also support 50 Ω coaxial cabling.
Each data channel has a variety of structures to help configure,
load, and monitor both the input and output. Figure 3 shows an
example of the routing from an external connection to the pin
of the device under test (DUT). Each data channel has similar
connections.
Starting at the external connection, the signal path is constructed in
the following order (see Figure 3 for the locations of these
components):
1.
2.
3.
4.
Rev. B | Page 3 of 8
A pad layout for a PCB board edge mounted SMA connector.
Two 0805 pads are provided where 100 Ω resistors to
ground can be installed. The combined resistance is 50 Ω
to provide a termination for a standard coaxial cable.
A standard 0805 pad layout that allows the coaxial and
termination structures to be connected to the rest of the
signal path.
A 0603 pad layout between the signal path and VDDx for a
pull-up resistor, if required.
UG-936
6.
7.
A populated 2-pin header to provide a signal ground pair
for use with clip leads or for temporarily shorting a channel
to ground.
Groupings of three open through holes consisting of a signal
and two ground connections. These holes can hardwire
signal wires into the PCB, install a header to accept an active
probe, or install a 2-pin header to allow adjacent channels to
temporarily be shorted together.
A 0805 pad layout between the signal and GNDx where a
load capacitor or pull-down resistor can be installed.
Figure 2 shows many of the optional components installed, as well
as how the jumpers can temporarily connect channels. Figure 2
also shows a signal connected to the first channel SMA, which is
then fanned out to the top three channels and monitored by an
active scope probe.
BYPASS CAPACITANCE ON THE PCB
Several positions and structures are provided to allow optimal
bypass capacitance for the DUT on the evaluation board.
Provisions are made for optional surface-mount bulk capacitors
to be installed near the power connectors to compensate for long
cables to the power supply. Bypass capacitors are installed near the
iCoupler data isolator and consist of a 0.1 µF capacitor for each
DUT VDDx pin on the top side of the evaluation board.
The PCB also implements a distributed capacitive bypass. This
bypass consists of power and ground planes closely spaced on
the inner layers of the PCB, which reduces noise and the
transmission of EMI without using complex design features.
HIGH VOLTAGE CAPABILITY
This PCB is designed in adherence with 2500 V basic insulation
practices. High voltage testing beyond 2500 V is not recommended.
Do not rely on the evaluation board for safety functions.
6 OPEN THROUGH HOLES
FOR ACTIVE PROBES
GND/GND/SIGNAL
7 LOAD
3 CONNECT TO SMA
2 TERMINATION
4 PULL-UP
5 2 PIN HEADER
GND/SIGNAL
1 SMA CONNECTOR PADS
NOTES
1. THE NUMBERED COMPONENTS IN THIS FIGURE CORRESPOND
TO THE DESCRIPTIONS IN THE DATA I/O STRUCTURES SECTION.
Figure 3. Configuration and Monitoring Structures
Rev. B | Page 4 of 8
14277-003
5.
EVAL-5CH6CHSOICEBZ User Guide
F1
E1
D1
C1
B1
A1
P3
1
2
P7
1
2
P11
1
2
AGND1
1
2
1
2
3
VDD1
AGND1
1
2
1
2
3
DNI
DNI
R45
100
DNI
AGND1
R24
100
DNI
AGND1
R23
100
DNI
AGND1
R22
100
DNI
AGND1
R21
100
DNI
AGND1
A1
B1
C1
D1
1
E1
JOHNSON142-0701-851
DNI
AGND1
5 4 3 2
1
JOHNSON142-0701-851
DNI
AGND1
5 4 3 2
1
JOHNSON142-0701-851
DNI
AGND1
5 4 3 2
1
JOHNSON142-0701-851
DNI
5 4 3 2
A1
B1
C1
D1
E1
F1
VDD1
AGND1
AGND1
VDD1
J1
VDD1
ESD1
MC000044
1
2
P22
P21
DNI
AGND1
R20
0
DNI
AGND1
R15
0
DNI
0 DNI
R10
P20
P19
DNI
AGND1
C16
15PF
DNI
0
R30 DNI
AGND1
0
C15
15PF
DNI
R40
100
DNI
AGND1
R50
100
DNI
AGND1
AGND1
F1
JOHNSON142-0701-851
DNI
AGND1
5 4 3 2
1
JOHNSON142-0701-851
DNI
5 4 3 2
VDD2
VDD
VIA
VIB
VIC
VID
VIE
VIF
GND
VDD
VOA
VOB
VOC
VOD
VOE
VOF
GND
U1
16
15
14
13
12
11
10
9
GEN_SO16
U2
DNI
16
15
14
13
12
11
10
9
P17
DNI
P18
DNI
AGND2
22-03-2031
1
2
3
AGND1
22-03-2031
1
2
3
VDD2
AGND2
J2
A2
B2
C2
D2
E2
F2
0.1UF
JOHNSON142-0701-851
DNI
AGND2
JOHNSON142-0701-851
DNI
AGND1
5 4 3 2
1
AGND1
5 4 3 2
VDD1
AGND2
AGND2
1
1
2
AGND2
MC000044
DNI
ESD4
VDD2
AGND2
VDD2
DNI
ESD3
AGND1
DNI
ESD2
GEN_SO16WB
DNI
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
AGND1
R35
100
DNI
R19
100
DNI
R18
100
DNI
R17
100
DNI
R16
100
DNI
0 DNI
R25 DNI
AGND1
C5
15PF
DNI
0 DNI
R14
AGND1
C4
15PF
DNI
0
R13
AGND1
C3
15PF
DNI
0
R12 DNI
AGND1
C6
15PF
DNI
C19
DNI
AGND1
R9
0
DNI
0 DNI
R4
AGND1
R8
0
DNI
0 DNI
R3
AGND1
R7
0
DNI
0 DNI
R2
AGND1
R6
0
DNI
1
0.1UF
C7
R5
P15
1
2
VDD1
AGND1
P13
DNI
1
2
3
VDD1
AGND1
P9
DNI
1
2
3
VDD1
AGND1
P5
DNI
1
2
3
VDD1
AGND1
P1
DNI
1
2
3
0
R11
0.1UF
0 DNI
C8
R1
10UF
0.1UF
C20
VDD1
C14
C13
Rev. B | Page 5 of 8
10UF
Figure 4. EVAL-5CH6CHSOICEBZ Schematic
F2
E2
D2
C2
B2
P4
1
2
AGND2
1
2
1
2
3
VDD2
AGND2
1
2
1
2
3
P26
0
R52
P25
DNI
P24
AGND2
R34
0
DNI
AGND2
R54
0
DNI
DNI
AGND2
R53
0
DNI
0 DNI
R51
P23
DNI
P16
1
2
VDD2
AGND2
P14
DNI
1
2
3
AGND2
R33
0
DNI
0 DNI
R29
P12
P10
DNI
VDD2
AGND2
1
2
1
2
3
0 DNI
AGND2
R32
0
DNI
0 DNI
R27
AGND2
R31
0
DNI
0 DNI
R26
R28
P8
1
2
VDD2
AGND2
P6
DNI
1
2
3
VDD2
AGND2
P2
DNI
1
2
3
VDD2
0 DNI
R36
AGND2
C18
15PF
DNI
AGND2
R47
100
DNI
AGND2
R46
100
DNI
R58
100
DNI
R57
100
DNI
R44
100
DNI
AGND2
R60
100
DNI
AGND2
R59
100
DNI
AGND2
R49
100
DNI
AGND2
R43 R48
100 100
DNI
DNI
R42
100
DNI
R41
100
DNI
0 DNI
R56
AGND2
C17
15PF
DNI
0 DNI
R55
AGND2
C12
15PF
DNI
0 DNI
R39
AGND2
C11
15PF
DNI
0 DNI
R38
AGND2
C10
15PF
DNI
0 DNI
R37
AGND2
C9
15PF
DNI
1
A2
B2
C2
AGND2
D2
AGND2
E2
AGND2
F2
JOHNSON142-0701-851
DNI
5 4 3 2
1
JOHNSON142-0701-851
DNI
AGND2
5 4 3 2
1
JOHNSON142-0701-851
DNI
5 4 3 2
1
JOHNSON142-0701-851
DNI
5 4 3 2
1
JOHNSON142-0701-851
DNI
AGND2
5 4 3 2
1
JOHNSON142-0701-851
DNI
AGND2
5 4 3 2
14277-004
A2
EVAL-5CH6CHSOICEBZ User Guide
UG-936
EVALUATION BOARD SCHEMATICS AND ARTWORK
EVAL-5CH6CHSOICEBZ User Guide
14277-005
UG-936
14277-006
Figure 5. Top Level Signal Routing and Assembly (Layer 1)
Figure 6. GND1 and GND2 Planes (Layer 2)
Rev. B | Page 6 of 8
UG-936
14277-007
EVAL-5CH6CHSOICEBZ User Guide
14277-008
Figure 7. VDD1 and VDD2 Power Plane (Layer 3)
Figure 8. Bottom Layer Assembly and Routing (Layer4)
Rev. B | Page 7 of 8
UG-936
EVAL-5CH6CHSOICEBZ User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Qty
1
Reference Designator
U1
Description
DUT
2
2
2
12
14
14
12
24
12
C13, C14
C7, C8
J1, J2
P3, P4, P7, P8, P11, P12, P15, P16, P20, P22, P24, P26
A1, A2, B1, B2, C1, C2, D1, D2, E1, E2, F1, F2, VDD1, VDD2
P1, P2, P5, P6, P9, P10, P13, P14, P17 to P19, P21, P23, P25
C3 to C6, C9 to C12, C15 to C18
R16 to R19, R21 to R24, R35, R40 to R50, R57 to R60
R1 to R15, R20, R25 to R34, R36 to R39, R51 to R56
0805, 10 µF capacitor, CER monolithic
0805, 0.1 µF capacitor, Chip X7R
PCB screw terminal
2-pin header, 100 mil spacing
SMA edge connector (not installed)
2-pin header, 200 mil spacing (not installed)
0603, signal load (not installed)
0805, 100 Ω resistors (not installed)
0805, 0 Ω resistors (not installed)
1
Manufacturer/Part Number
Analog Devices, Inc./
ADuM163N0BRZ 1
Not applicable
Not applicable
Multicomp/MC000044
FCI/69157-102HLF
Johnson/142-0701-851
Not applicable
Not applicable
Not applicable
Not applicable
This is the DUT installed on the EVAL-ADuM163N0EBZ; otherwise, this location is unpopulated.
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG14277-0-10/16(B)
Rev. B | Page 8 of 8
