EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
UG-757
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD5380/AD5382 40-/32-Channel, 14-Bit Voltage Output DACs
with On-Chip Reference
FEATURES
ONLINE RESOURCES
Full featured evaluation board for the AD5380/AD5382
On-board reference
Various link options
PC control in conjunction with the Analog Devices, Inc.,
EVAL-SDP-CB1Z system demonstration platform (SDP)
Documents Needed
AD5380/AD5382 data sheets
EVAL-AD5380SDZ/EVAL-AD5382SDZ user guide
Required Software
AD538x evaluation software (download from the
EVAL-AD5380SDZ/EVAL-AD5382SDZ product pages)
Design and Integration Files
Schematics, layout files, bill of materials
EVALUATION KIT CONTENTS
EVAL-AD5380SDZ/EVAL-AD5382SDZ evaluation board
CD includes
Self-installing evaluation software that allows users to
control the board and exercise all functions of the device
Electronic version of the EVAL-AD5380SDZ/
EVAL-AD5382SDZ user guide
ADDITIONAL EQUIPMENT AND SOFTWARE NEEDED
EVAL-SDP-CB1Z system demonstration platform,
includes a USB cable
PC running Windows XP SP2, Windows Vista, or Windows 7
with USB 2.0 port
TYPICAL EVALUATION SETUP
SDP BOARD
AD5380/AD5382 EVALUATION BOARD
DAC
OUTPUTS
6.000V
0.250A
6V
–
+
±25V
COM
POWER SUPPLY
CONNECTORS
–
12637-001
+
Figure 1.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 13
UG-757
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Signals...................................................................................5
Evaluation Kit Contents ................................................................... 1
Output Signals ...............................................................................5
Additional Equipment and Software Needed................................... 1
Link Configuration Options ............................................................6
Online Resources .............................................................................. 1
Setup Conditions ...........................................................................6
Typical Evaluation Setup ................................................................. 1
Evaluation Board Circuitry ..............................................................7
Revision History ............................................................................... 2
How to Use the Software ..................................................................8
General Description ......................................................................... 3
Starting the Software .....................................................................8
Getting Started .................................................................................. 4
Overview of the Main Window ...................................................8
Installing the Software ................................................................. 4
Evaluation Board Schematics........................................................ 10
Evaluation Board Setup Procedures........................................... 4
Ordering Information .................................................................... 12
Evaluation Board Hardware ............................................................ 5
Bill of Materials ........................................................................... 12
Power Supplies .............................................................................. 5
REVISION HISTORY
12/14—Rev. 0 to Rev. A
Changes to Table 2 ............................................................................ 6
9/14—Revision 0: Initial Version
Rev. A | Page 2 of 13
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
UG-757
GENERAL DESCRIPTION
This user guide details the operation of the evaluation boards
for the AD5380/AD5382 40-/32-channel, 14-bit voltage output
digital-to-analog converter (DAC) with on-chip reference.
The EVAL-AD5380SDZ/EVAL-AD5382SDZ evaluation boards
are designed to help users quickly prototype new AD5380/AD5382
circuits and reduce design time. Each evaluation board is
populated with an AD5380BSTZ-5 (EVAL-AD5380SDZ) or an
AD5382BSTZ-5 (EVAL-AD5382SDZ). Each AD5380/AD5382
operates from a 4.5 V to 5.5 V analog supply and from a 2.7 V
to 5.5 V digital supply. The AD5380/AD5382 incorporate an
internal 1.25 V/2.5 V reference to attain an output voltage span
of 2.5 V or 5 V. An external reference (a 2.5 V reference is provided
on the evaluation board) can also be used to attain an output
from 0 V to VREF.
Full data on the AD5380 and AD5382 can be found in the
respective product data sheets, which should be consulted in
conjunction with this user guide when using the evaluation
board.
The evaluation boards interface to the USB port of a PC via the
EVAL-SDP-CB1Z SDP-B controller board, which is available
for order on the Analog Devices website at www.analog.com.
Software is supplied with the evaluation board to allow the user
to program the AD5380/AD5382. Only the SPI interface is
supported by the software.
The evaluation boards can be used without the SDP-B controller
board. Digital control signals can be applied via Connector J1
or Connector J2, and power supplies can be connected to
Connector J7 and Connector J8.
Rev. A | Page 3 of 13
UG-757
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
GETTING STARTED
INSTALLING THE SOFTWARE
3.
The evaluation kit for the AD5380/AD5382 includes selfinstalling software on a CD. The software is compatible with
Windows® XP, Windows Vista (32-bit version), and Windows 7
(32-bit and 64-bit versions). The software must be installed
before connecting the SDP board to the USB port of the PC to
ensure that the SDP board is recognized when it is connected
to the PC.
4.
5.
After installation is completed, power up the evaluation
board as described in the Power Supplies section.
Connect the evaluation board to the SDP board and connect
the SDP board to the PC using the USB cable included in
the EVAL-SDP-CB1Z kit.
When the software detects the evaluation board, proceed
through any dialog boxes that appear to finalize the
installation.
To install the software, take the following steps:
EVALUATION BOARD SETUP PROCEDURES
1.
2.
To set up the evaluation board, take the following steps:
Start the Windows operating system and insert the CD.
The installation software should open automatically. If it
does not open automatically, run the setup.exe file from
the CD.
1.
2.
Rev. A | Page 4 of 13
Connect the evaluation board to the SDP board, and
connect the USB cable between the SDP board and the PC.
Power the SDP and evaluation boards by connecting 6 V to
Connector J9.
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
UG-757
EVALUATION BOARD HARDWARE
POWER SUPPLIES
INPUT SIGNALS
To use the evaluation board with the SDP board, a 6 V power
supply is required. The supply is connected to Connector J9.
Two voltage regulators on the evaluation board generate the 5 V
analog and digital supplies. These supplies are applied to the
AD5380/AD5382 when the LK1 and LK2 links are in Position A.
The digital supply is also used to power the SDP board.
When the SDP board is used to control the AD5380/AD5382
evaluation board, the digital input signals are applied to
Connector J10. When the SDP board is not used, apply the
digital signal to Header J1 or Header J2.
Table 1. Power Supply Connectors
Connector Number
J7
J8
J9
Voltage
Analog power supply, AVCC
Digital power supply, DVCC
6 V board positive power supply
EXT_REF
DGND
AVCC
DGND
DVCC
EEPROM
VREF
40-WAY
HEADER
SPI
INTERFACE
7-WAY
HEADER
AD5380/
AD5382
VOUT0
TO
VOUT39
PARALLEL
INTERFACE
28-WAY
HEADER
Figure 2. Evaluation Board Block Diagram
Rev. A | Page 5 of 13
12637-002
All supplies are decoupled to ground using 10 µF tantalum and
0.1 µF ceramic capacitors.
ADR421
2.5V REF
SDP CONNECTOR
AGND and DGND inputs are provided on the board. The
AGND and DGND planes are connected at one location close
to the AD5380/AD5382. It is recommended that AGND and
DGND not be connected elsewhere in the system to avoid
ground loop problems.
DGND
The DAC output voltages are available on the 40-way header, J3.
VOUT 0 is also available on J5. MON_OUT is available on J6.
+6V
The evaluation board can be used without the SDP board. In
this case, Connector J7 is the AVCC power supply input, and
Connector J8 is the DVCC power supply input. The LK1 and
LK2 links must be in Position B.
OUTPUT SIGNALS
UG-757
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
LINK CONFIGURATION OPTIONS
Multiple jumper (LKx) options must be set correctly to select
the appropriate operating setup before using the evaluation
board. The functions of these options are described in Table 2.
board. The evaluation board can be operated in SDP controlled
mode to be used with the SDP board, or the evaluation board
can be used in standalone mode.
SETUP CONDITIONS
The Default Position column of Table 2 shows the default
positions in which the links are set when the evaluation board is
packaged. When the board is shipped, the evaluation board is
set up to operate with the SDP board in SDP controlled mode.
Before applying power and signals to the evaluation board,
ensure that all link positions are as required by the operating
mode. There are two modes in which to operate the evaluation
Table 2. Link Functions
Link No.
LK1
LK2
LK3 to
LK5
LK6
LK7
LK8
LK9
LK10
LK11
LK12
Function
This link selects the source of the AVCC supply.
Position A selects a 5 V supply from the ADP3331 (U3).
Position B selects the external power supply connected to J7.
This link selects the source of the DVCC supply.
Position A selects a 5 V supply from the ADP3367 (U5).
Position B selects the external power supply connected to J8.
These links select the logic level for LDAC, CLR, and RESET, respectively. When a link is inserted, the relevant pin is
connected to DGND. When the link is removed, the relevant pin is pulled to DVCC.
Remove these links when using the SDP controller board.
This link sets the logic level of the PD pin.
Position A puts the AD5380/AD5382 into power-down mode.
Position B puts the AD5380/AD5382 into normal operating mode.
This link selects the source for the REFOUT/REFIN pin.
In Position A, an external reference source can be connected to Connector J4. Use this option if the AD5380/AD5382
internal reference is used.
In Position B, the reference source comes from the ADR421 2.5 V reference.
This link enables/disables the FIFO function
In Position A, the FIFO function is enabled.
In Position B, the FIFO function is disabled. The software supplied with the AD5380/AD5382 evaluation board does
not support FIFO operation.
This link selects serial or parallel interface operation of the AD5380/AD5382.
In Position A, a serial interface is selected. LK10 determines if an SPI or I2C interface is used. The software supplied
with the AD5380/AD5382 evaluation board only supports the SPI interface.
In Position B, the parallel interface is selected. Parallel interface signals are applied to the AD5380/AD5382 using
Connector J2
This link selects the SPI or I2C interface mode of the AD5380/AD5382.
Position A selects the I2C interface mode.
Position B selects the SPI interface mode. Select this option when the evaluation board is used with the SDP controller board.
This link position is determined by the function of the CS/SYNC/A0 pin.
When the AD5380/AD5382 are used in I2C mode, this pin determines the state of the A0 address bit.
In Position A the address bit is 1
In Position B, the address bit is 0
Remove this link when the AD5380/AD5382 are used in SPI or parallel mode.
This link position is determined by the function of the WR/DCEN/A1 pin.
When the AD5380/AD5382 are used in I2C mode, this pin determines the state of the A1 address bit.
In Position A, the address bit is 1.
In Position B, the address bit is 0.
When the AD5380/AD5382 are used in SPI mode, this pin enables/disables daisy-chain mode.
In Position A, daisy-chain mode is enabled. The AD5380/AD5382 evaluation software does not support daisy-chain mode.
In Position B, daisy-chain mode is disabled.
Remove this link when the AD5380/AD5382 are used in parallel mode.
Rev. A | Page 6 of 13
Default
Position
A
A
Removed
B
B
B
A
B
Removed
B
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
UG-757
EVALUATION BOARD CIRCUITRY
The EVAL-AD5380SDZ/EVAL-AD5382SDZ evaluation boards
allow the function and performance of the AD5380/AD5382 to
be easily tested. Each evaluation board contains two voltage
regulators that generate the analog and digital power supplies
and that also power the SDP board if it is connected. The two
regulators are powered via a 6 V supply attached to Connector J9.
Alternatively, separate analog and digital supplies can be
attached via Connector J7 and Connector J8, respectively.
Control of the AD5380/AD5382 is typically performed by the
SDP board, which is attached to Connector J10. The SDP board
allows the software provided with the kit to be used to load
register values, set the voltage of the DAC outputs, and write to
the control register of the AD5380/AD5382. When the SDP
board is not required, the control signals can be applied to the
AD5380/AD5382 by connecting them to the relevant pins on
Connector J1 or Connector J2.
In addition to the on-chip reference of the AD5380/AD5382, an
external 2.5 V reference is also provided and can be connected to
the REFOUT/REFIN pin of the AD5380/AD5382 using Link LK7.
The DAC output voltages are available on the 40-way header, J3.
Rev. A | Page 7 of 13
UG-757
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
HOW TO USE THE SOFTWARE
STARTING THE SOFTWARE
4.
To run the program, take the following steps:
1.
2.
3.
Connect the evaluation board to the SDP board, and connect
the USB cable between the SDP board and the PC.
Power the SDP board and the evaluation board by
connecting 6 V to Connector J3.
Click Start > All Programs > Analog Devices > AD538x >
AD538x Evaluation Software. When the software connects
to the evaluation board, the message shown in Figure 3
displays.
If the SDP board is not connected to the USB port when
the software is launched, a connectivity error displays (see
Figure 4), and the software continues to operate in simulation
mode. In simulation mode, the user can exercise all the
functionality of the AD5380/AD5382. Expected output
voltages are displayed based on the input data, and the 24 bits
of data that would have been sent to the AD5380/AD5382 are
displayed at the bottom right of the screen.
Figure 4. Connectivity Error
OVERVIEW OF THE MAIN WINDOW
The main window of the AD5380/AD5382 evaluation software is
shown in Figure 5. The DAC Registers tab allows the X, M, and
C registers of individual DACs to be programmed. LDAC is high
by default. Click Pulse LDAC to update the outputs. The software
displays the expected output voltages based on the register contents
and the voltage reference value.
Figure 3. Connection Message
Figure 6 shows the Control & Special Function Registers tab.
This tab allows the user to select the functions contained in the
control register of the AD5380/AD5382. This tab also allows
control of the LDAC and CLR pins.
The user can reset the AD5380/AD5382 by clicking Hardware
Reset or Software Reset from the File menu.
Rev. A | Page 8 of 13
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
Figure 5. Main Window, DAC Registers Tab
Figure 6. Main Window, Control & Special Function Registers Tab
Rev. A | Page 9 of 13
UG-757
AGND
J9-2
J9-1
+6V
10uF
C15
J8-2
J8-1
J7-2
+
8
IN
C16
0.1uF
DGND
±10%
±10%
±10%
R8
1r5
C13
0.1uF
C11
0.1uF
L1
External AVCC Supply
BEAD
+
1
6
2
C17
10uF
EXT_DVCC
U5
ADP3367
DD
SET
OUT
±10%
10uF
+ C14
10uF
+ C12
EXT_AVCC
6
2
ERR
SD
IN
+
GND
4
5
1
3
C18
±10%
10uF
FB
OUT
ADP3331
U3
300k
R9
INT_DVCC
1M
R10
R12
R11
INT_AVCC
DNI
DNI
VIN: Use this pin to power the SDP
requires 4-7V 200mA
SDIN
SCLK
LDAC
CLR
A0
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
J10
RESET_IN
BMODE1
UART_RX
UART_TX
GND
GND
NC
NC
SDP
NC
NC
120-PIN FEMALE
NC
NC
CONNECTOR
NC
NC
NC
NC
GND
GND
NC
NC
NC
NC
TMR_D
TMR_C *
TIMERS
TMR_B
TMR_A
GPIO7
GPIO6
GND
GND
GENERAL
GPIO5
GPIO4
INPUT/OUTPUT
GPIO3
GPIO2
GPIO1
GPIO0
SCL_0
SCL_1
I2C
SDA_0
SDA_1
GND
GND
SPI_CLK
SPI_SEL1/SPI_SS
SPI_MISO
SPI_SEL_C
SPI
SPI_MOSI
SPI_SEL_B
SPI_SEL_A
GND
GND
SPORT_INT
SPORT_TSCLK
SPORT_DT3 *
*
SPORT_DT0
SPORT_DT2
SPORT
SPORT_TFS
SPORT_DT1
SPORT_DR1
SPORT_RFS
SPORT_DR2 *
SPORT_DR0
SPORT_DR3 *
SPORT_RSCLK
GND
GND
PAR_FS1
PAR_CLK
PAR_FS2
PAR_FS3
PAR_A0
PAR_A1
PAR_A2
PAR_A3
GND
GND
PAR_INT
PAR_CS
PAR_WR
PAR_RD
PAR_D0
PAR_D1
PARALLEL
PAR_D2
PAR_D3
PORT
PAR_D4
PAR_D5
GND
GND
PAR_D6
PAR_D7
PAR_D8
PAR_D9
PAR_D10
PAR_D11
PAR_D12
PAR_D13
GND
PAR_D14
PAR_D15
GND
* PAR_D16
PAR_D17 *
* PAR_D18
PAR_D19 *
* PAR_D20
PAR_D21 *
* PAR_D22
PAR_D23 *
GND
GND
USB_VBUS
VIO(+3.3V)
GND
GND
GND
GND
NC
NC
*NC on BLACKFIN SDP
NC
VIN
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
V_IO
U4
1
A0
2
A1
3
A2
4
VSS
24LC32
8
VCC
7
WP
6
SCL
5
SDA
V_IO
R14
100k
R13
DNI
V_IO
VIO: USE to set IO voltage max draw 20mA
SYNC
SDOUT
SCLK
SDIN
RESET
V_IO
R15
100k
A0
12637-007
J7-1
3
LBI
7
LBO
GND
SHDN
Rev. A | Page 10 of 13
5
Figure 7. EVAL-AD5380SDZ/EVAL-AD5382SDZ Schematic, Page 1 of 2
4
UG-757
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
EVALUATION BOARD SCHEMATICS
Parallel Interface
A
B
LK8
DVCC
J2 -2 4
J2 -2 3
J2 -9
J2 -1 0
J2 -1 1
J2 -1 2
J2 -1 3
J2 -1 4
J2 -2
FIFO_ EN
LK9
A[0 :5]
R[0 :1]
R1
R0
A5
A4
A3
A2
A1
A0
WR
D[00 :1 0]
SDIN
SCL K
J2 -1
J2 -3
J2 -4
J2 -5
J2 -6
J2 -7
J2 -8
J2 -1 5
J2 -1 6
J2 -1 7
J2 -1 8
J2 -1 9
J2 -2 0
J2 -2 1
J2 -2 2
BUSY
LDAC
D00
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
J1 -1
J1 -2
J1 -3
J1 -4
J1 -5
J1 -6
J1 -7
0r
R2
SE R/PA R
0r
R1
BUSY
TP6 TP7 TP8 TP9 TP10
J2 -2 7
J2 -2 8
SDIN
SCL K
SYNC
SDOUT
LDAC
CL R
RESET
DGND
BUSY
LDAC
SDO UT
SYNC
SDA/SDIN
SCL /SCL K
TP1 TP2 TP3 TP4 TP5
SPI / I2C Interface
EXT_ DVCC
A
B
LK10
LK2
SPI/I2C
DVCC
A0
A1
A2
A3
A4
A5
LK11
LK12
A[0 :5]
R6
1 0k
LK4
WR
SE R/PA R
D[00 :1 0]
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
1 0k
1 0k
1 0k
LK3
R5
R4
DVCC
R3
DVCC
LK5
BUSY
FIFO_ EN
SDIN
SCL K
SPI/I2C
SDOUT
LK6
R[0 :1]
R0
R1
A
B
AVCC
A
B
A
B
A
B
EXT_AVCC
A
B
66
65
78
80
84
85
86
87
88
89
1
93
1 00
99
98
97
96
95
94
74
73
72
71
70
69
68
67
79
75
2
76
77
C2
C1
±10%
10 uF
J4
R EG 0
R EG 1
W R /D C EN/ A D 1
S ER _PA R
A0
A1
A2
A3
A4
A5
FIFO_ E N
C4
GROU ND LINK
G1
A
LK7
±10%
10 uF
0.1 uF
+C3
S D O/ A /B
CS /S YN C /A 0
D1 3/S D IN/ S D A
D1 2/S C L K/S C L
D 1 1/SP I/I2C
D1 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
PD
R ES ET
C LR
BUSY
L DA C
0.1 uF
DVCC
RE FOUT/RE FIN
+
INT_DVCC
A
B
82
83
92
DGND
DGND
DGND
81
90
91
U1
AVCC
REF
A D 538 0B S TZ -5
B
S IG N A L _G N D 1
S IG N A L _G N D 2
S IG N A L _G N D 3
S IG N A L _G N D 4
S IG N A L _G N D 5
DVCC
DVCC
DVCC
16
RE FO U T/RE FIN
C5
C6
19
52
60
10
29
AV CC 1
AV CC 2
AV CC 3
AV CC 4
AV CC 5
17
47
57
7
26
D A C _G N D 1
D A C _G N D 2
D A C _G N D 3
D A C _G N D 4
D A C _G N D 5
18
46
58
8
27
+
0.1 uF
10 uF
J5
6
20
21
22
23
24
30
31
32
41
42
43
44
45
48
49
50
53
54
55
56
61
62
63
64
3
4
5
6
11
12
13
14
33
34
35
36
37
38
39
40
VO UT0
C7
0.1 uF
V O U T0
V O U T1
V O U T2
V O U T3
V O U T4
V O U T5
V O U T6
V O U T7
V O U T8
V O U T9
V O U T1 0
V O U T1 1
V O U T1 2
V O U T1 3
V O U T1 4
V O U T1 5
V O U T1 6
V O U T1 7
V O U T1 8
V O U T1 9
V O U T2 0
V O U T2 1
V O U T2 2
V O U T2 3
V O U T2 4
V O U T2 5
V O U T2 6
V O U T2 7
V O U T2 8
V O U T2 9
V O U T3 0
V O U T3 1
V O U T3 2
V O U T3 3
V O U T3 4
V O U T3 5
V O U T3 6
V O U T3 7
V O U T3 8
V O U T3 9/M ON _O U T
± 1 0%
RE F_G N D
15
Rev. A | Page 11 of 13
AGND1
AGND2
AGND3
AGND4
AGND5
Figure 8. EVAL-AD5380SDZ/EVAL-AD5382SDZ Schematic, Page 2 of 2
25
51
59
9
28
LK1
R7
M ON _OUT
J6
C8
4
GND
U2
ADR4 21
VO UT
TRIM
+VIN
5
2
0.1 uF
C9
J3 -32
J3 -31
J3 -30
J3 -29
J3 -28
J3 -27
J3 -26
J3 -25
J3 -16
J3 -15
J3 -14
J3 -13
J3 -12
J3 -11
J3 -10
J3 -9
J3 -8
J3 -7
J3 -6
J3 -5
J3 -4
J3 -3
J3 -2
J3 -1
J3 -40
J3 -39
J3 -38
J3 -37
J3 -36
J3 -35
J3 -34
J3 -33
J3 -24
J3 -23
J3 -22
J3 -21
J3 -20
J3 -19
J3 -18
J3 -17
+
10 uF
± 1 0%
C10
AVCC
12637-008
INT_AVCC
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
UG-757
UG-757
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 3.
Qty
9
8
1
1
1
1
3
3
1
1
9
3
2
4
1
1
1
1
3
2
10
1
1
1
1
1
2
2
1
Reference Designator
C1, C3, C5, C10, C12,
C14, C15, C17, C18
C2, C4, C6, C7, C9, C11,
C13, C16
C8
J1
J2
J3
J4 to J6
J7 to J9
J10
L1
LK1, LK2, LK6 to 12
LK3, LK4
R1, R2
R3 to R6
R7
R8
R9
R10
R11 to R13
R14, R15
TP1 to TP10
U1
U2
U3
U4
U5
Screw1, Screw2
Nut1, Nut2
Description
Capacitor, Case A, 10 µF, 10 V
Supplier/Part Number 1
FEC 197-130
Capacitor, 100 nF, 50 V, 0603
FEC 8820023
Unpopulated capacitor location, keep holes free of solder
7-pin (1x7) header, 0.1" pitch
28-pin (2x14) SMT header, 0.1" pitch
40-pin (2x20), 0.1" pitch, SMT header
50 Ω, straight SMB jack
2-pin terminal block (5 mm pitch)
120-way female connector, 0.6 mm pitch
Ferrite bead
3-pin SIL header, 0.1" pitch, and red jumper
2-pin SIL header, 0.1" pitch, and red jumper
Resistor, 0603, 1%, 0 Ω
Resistor, 10 kΩ, 0.063 W, 1%, 0603
Unpopulated resistor location, keep holes free of solder
Resistor, 1.5 Ω, 0.063 W, 1%, 0603
Resistor, 300 kΩ, 0.063 W, 1%, 0603
Resistor, 1 MΩ, 0.063 W, 1%, 0603
SMD resistor, 0603
Resistor, 100 kΩ, 0.063 W, 1%, 0603
Black test point
40-/32-channel, 14-bit DAC
2.5 V reference
Adjustable LDO regulator
32k I2C serial EEPROM
5 V fixed, adjustable voltage regulator
Screw, cheese, nylon, M3X10, PK100
Nut/washer, nylon, M3, PK100
Do not insert
FEC 1022257
Digi-Key M20-8761446-ND
Digi-Key M20-8762046-ND
FEC 1111349
FEC 151789
FEC 1324660 or Digi-Key H1219-ND
Digi-Key 490-1024-1-ND
FEC 1022248 & 150411
FEC 1022247 & 150-411
FEC 9331662
FEC 9330399
Do not insert
FEC 9330640
FEC 9330992
FEC 9330410
Do Not insert
FEC 9330402
FEC 8731128
AD5380BSTZ-5/AD5382BSTZ-5
ADR421ARZ
ADP3331ARTZ
FEC 1331330
ADP3367ARZ
FEC 7070597
FEC 7061857
FEC is Farnell Electronics Components.
Rev. A | Page 12 of 13
EVAL-AD5380SDZ/EVAL-AD5382SDZ User Guide
UG-757
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG12637-0-12/14(A)
Rev. A | Page 13 of 13
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