EVAL-AD5696RSDZ User Guide
UG-726
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD5696R 16-Bit, Quad-Channel, Voltage Output DAC
time. The AD5696R operates from a single 2.7 V to 5.5 V supply.
The AD5696R incorporates an internal 2.5 V reference to give
an output voltage of 2.5 V or 5 V. The EVAL-AD5696RSDZ
evaluation board also incorporates additional voltage references.
FEATURES
Full featured evaluation board for the AD5696R
On-board references
Various link options
PC control in conjunction with the Analog Devices, Inc., SDP
The EVAL-AD5696RSDZ interfaces to the USB port of a PC via
a system demonstration platform (SDP) board. The analysis
control evaluation (ACE) software is available for download
from the EVAL-AD5696RSDZ product page to use with the
evaluation board to allow the user to program the AD5696R. A
PMOD connection is also available to allow the connection of
microcontrollers to the evaluation board without the SDP
board. Note that when a microcontroller is used through the
PMOD connection, the SDP board must be disconnected, and
the user is unable to operate the ACE software.
EVALUATION KIT CONTENTS
EVAL-AD5696RSDZ evaluation board
HARDWARE REQUIRED
EVAL-SDP-CB1Z (SDP-B) board or EVAL-SDP-CS1Z (SDP-S)
board, must be purchased separately
SOFTWARE REQUIRED
ACE evaluation software, available for download from the
EVAL-AD5696RSDZ product page
The EVAL-AD5696RSDZ evaluation board is compatible with
any Analog Devices SDP board, which can be purchased separately. A typical connection between the EVAL-AD5696RSDZ
and the EVAL-SDP-CS1Z board (SDP-S controller board) is
shown in Figure 1.
GENERAL DESCRIPTION
This user guide details the operation of the EVAL-AD5696RSDZ
evaluation board for the AD5696R quad-channel, voltage output,
digital-to-analog converter (DAC).
For full details, see the AD5696R data sheet, which must be
used in conjunction with this user guide when using the EVALAD5696RSDZ evaluation board.
The EVAL-AD5696RSDZ evaluation board is designed to help
users quickly prototype AD5696R circuits and reduce design
12475-001
EVAL-AD5696RSDZ EVALUATION BOARD CONNECTED TO THE SDP-S BOARD
Figure 1.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. C | Page 1 of 13
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EVAL-AD5696RSDZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Block Diagram and Description ......................................................4
Evaluation Kit Contents ................................................................... 1
Memory Map .................................................................................5
Hardware Required .......................................................................... 1
Evaluation Board Hardware .............................................................6
Software Required ............................................................................ 1
Power Supplies ...............................................................................6
General Description ......................................................................... 1
LDO Recommendation ................................................................6
EVAL-AD5696RSDZ Evaluation Board Connected to the
SDP-S Board ...................................................................................... 1
Test Points ......................................................................................6
Revision History ............................................................................... 2
Link Options ..................................................................................6
Evaluation Board Software Quick Start Procedures .................... 3
Evaluation Board Schematics and Artwork ...................................8
Installing the Software ................................................................. 3
Ordering Information .................................................................... 12
Initial Setup ................................................................................... 3
Bill of Materials ........................................................................... 12
Voltage References.........................................................................6
REVISION HISTORY
6/2017—Rev. B to Rev. C
Change to Features Section ............................................................. 1
4/2017—Rev. A to Rev. B
Reorganized Layout ............................................................ Universal
Changes to Evaluation Kit Contents Section and General
Description Section .......................................................................... 1
Added Hardware Required Section and Software Required
Section ................................................................................................ 1
Added Evaluation Board Software Quick Start Procedures
Section, Installing the Software Section, Initial Setup Section,
Figure 2, and Figure 3; Renumbered Sequentially ....................... 3
Added Block Diagram and Description Section, Figure 4,
and Table 1; Renumbered Sequentially.......................................... 4
Deleted Evaluation Board Software Section, Installing the
Software Section, Running the Software Section, Figure 2,
Figure 3, Figure 4, and Figure 5; Renumbered Sequentially ....... 5
Added Memory Map Section, Figure 5, and Figure 6 ................. 5
Deleted Figure 6, Software Operation Section, Write to Input
Register Section, Write to DAC Register Section, Update DAC
Register from Input Register Section, LDAC Control
Section, GAIN Control Section, Reference Control Section,
and Power-Down Control Section ..................................................6
Changes to Table 2.............................................................................6
Deleted LDAC Mask Register Section and 24-Bit Command
Section.................................................................................................7
Changes to Table 6.......................................................................... 12
2/2016—Rev. 0 to Rev. A
Changes to Table 4.............................................................................4
Changes to Running the Software Section .....................................5
Added Figure 5; Renumbered Sequentially ...................................5
Changes to Figure 6 ...........................................................................6
Added LDAC Mask Register Section ..............................................7
Changes to Figure 7 ...........................................................................8
Changes to Figure 8 ...........................................................................9
Changes to Figure 9 and Figure 10............................................... 10
Changes to Figure 11...................................................................... 11
Changes to Table 5.......................................................................... 12
5/2015—Revision 0: Initial Version
Rev. C | Page 2 of 13
EVAL-AD5696RSDZ User Guide
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EVALUATION BOARD SOFTWARE QUICK START PROCEDURES
INSTALLING THE SOFTWARE
INITIAL SETUP
The EVAL-AD5696RSDZ evaluation board uses the ACE
evaluation software, a desktop software application that allows
the evaluation and control of multiple evaluation systems.
To set up the evaluation board, take the following steps:
The ACE installer installs the necessary SDP drivers and the
Microsoft® .NET Framework 4 by default. The ACE software is
available for download from the EVAL-AD5696RSDZ product
page, and must be installed before connecting the SDP board to
the USB port of the PC, to ensure that the SDP board is
recognized when it connects to the PC. For full instructions on
how to install and use this software, see the ACE software page
on the Analog Devices website.
2.
1.
3.
4.
12475-102
After the installation is finished, the EVAL-AD5696RSDZ
evaluation board plug in appears when the ACE software is
opened.
Connect the evaluation board to the SDP board, and then
connect the USB cable between the SDP board and the PC.
Run the ACE application. The EVAL-AD5696RSDZ board
plug ins appear in the attached hardware pane of the Start
tab.
Double click the board plug in to open the board view
shown in Figure 2.
Double click the AD5696R chip to access the chip block
diagram. This view provides a basic representation of
functionality of the board. The main function blocks of the
board are labeled in Figure 3.
12475-103
Figure 2. Board View of the EVAL-AD5696RSDZ
Figure 3. Chip Block Diagram of the AD5696R
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EVAL-AD5696RSDZ User Guide
BLOCK DIAGRAM AND DESCRIPTION
For a full description of each block, register, and its settings, see
the AD5696R data sheet.
The EVAL-AD5696RSDZ software is organized to appear
similar to the functional block diagram shown in the AD5696R
data sheet. Therefore, correlating the functions on the EVALAD5696RSDZ evaluation board with the description in the
AD5696R data sheet is simplified.
Some of the blocks and their functions are described in this
section as they pertain to the evaluation board. The block
diagram is shown in Figure 4. Table 1 describes the
functionality of each block.
J
I
C
B
F
D
G
E
H
12475-104
A
Figure 4. AD5696R Block Diagram with Labels
Table 1. Block Diagram Functions (See Figure 4 for Labels)
Label
A
Button/Function Name
CONFIGURATION
wizard
B
LDAC and RESET
(GPIO buttons)
C
Select a Command
D
Input register
E
DAC register
F
Software RESET
G
Load DAC
H
DAC
I
Internal Reference
J
Apply Changes
Function
Used to set the initial configuration for the board. Select the reference gain case from the Output Gain
dropdown menu. A gain of 1 is the default. After setting up the initial configuration, click Apply to apply
the values. These settings can be modified at any stage while evaluating the board.
Act as external GPIO pulses to the LDAC and RESET pins. The LDAC button transfers data from the input
registers (D) to the DAC registers (E). The RESET button clears all data from input registers and DAC
registers. These buttons are live; therefore, there is no need to click Apply Changes (J).
Command option dropdown menu selects how the data being transferred to the device affects the input
and DAC registers. After a data value is entered in an input register (D), this menu determines the
internal DAC registers affected by updating the input register (D). After a new value is written in the
input register (D), the data can be transferred to the DAC input register, or to the DAC input register and
the DAC register simultaneously. If the data is transferred to both registers, the channel DAC register (E)
will reflect the new value.
16-bit data word to be transferred to the device. Click Apply Changes (J) to transfer this 16-bit data
word to the device.
Displays the value that is currently present in the DAC register on the device. Update the DAC registers
by selecting the appropriate command option or by toggling LDAC (B).
Returns the evaluation board and software to default values. This button is live; therefore, there is no
need to click Apply Changes (J).
Users can individually control which channel loads the values from the input registers to the DAC
registers.
DAC configuration options provide access to individual channel configuration options such as powerdown options and hardware LDAC mask enable/disable settings.
Select Enable from this setting to enable the on-chip reference for the evaluation board. If Disable is
selected, an external reference must be applied. This control is only available on the AD5696R.
Applies all modified values to the device. Note that if an evaluation board is not connected, values
entered into the input registers are not transferred to the DAC registers.
Rev. C | Page 4 of 13
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MEMORY MAP
Figure 5. AD5696R Memory Map Tab
12475-106
Clicking the Apply Changes button transfers data to the device.
All changes made in the memory map tab correspond to the
block diagram. For example, if the internal register bit is enabled,
it displays as enabled on the block diagram. Any bits or registers
that are shown in bold in the memory map tab are modified
values that have not been transferred to the evaluation board
(see Figure 6). Click Apply Changes to transfer the data to the
evaluation board.
12475-105
All registers are fully accessible from the AD5696R Memory
Map tab, shown in Figure 5. To navigate to this tab, click the
Proceed to Memory Map button, shown in Figure 4. This tab
allows registers to be edited at bit level. The bits shaded in dark
gray are read-only bits and cannot be accessed from the ACE
software. All other bits are toggled.
Figure 6. AD5696R Memory Map with Unapplied Changes in the
DAC0_Input Register
Rev. C | Page 5 of 13
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EVAL-AD5696RSDZ User Guide
EVALUATION BOARD HARDWARE
POWER SUPPLIES
TEST POINTS
The EVAL-AD5696RSDZ evaluation board provides an on-board,
3.3 V regulator powered through the USB supply. If a different
supply is required or if the evaluation board is controlled through
the PMOD connector, an external supply must be provided by
the EXTSUP connector. See Table 2 for more details.
The evaluation board has various test points for debugging and
monitoring purposes. These test points are described Table 5.
Both AGND and DGND inputs are provided on the board. The
AGND and DGND planes are connected at one location close to
the AD5696R. To avoid ground loop problems, it is recommended
that AGND and DGND not be connected elsewhere in the system.
All supplies are decoupled to ground with 10 µF tantalum and
0.1 µF ceramic capacitors.
LDO RECOMMENDATION
The ADP7118 low dropout (LDO) linear regulator (maximum
VIN = 20 V) is recommended to power the VDD rail for maximal
performance. A 4.7 Ω resistor in series with the input capacitor
of the ADP7118 adds additional rejection at higher frequencies
to reduce any power supply ripple artifacts below the noise floor.
The ADP162 is recommended for powering the VLOGIC rail.
VOLTAGE REFERENCES
The AD5696R provides an internal voltage reference. The
evaluation board provides external references with values of
2.5 V and 5 V. Note that the ADR3450 requires the use of an
external supply through the EXTSUP connector (see Table 4).
LINK OPTIONS
A number of link options are incorporated on the EVALAD5696RSDZ evaluation board and must be set for the required
operating conditions before using the board. The functions of
these link options are described in Table 4.
Table 3 lists the positions of the different links controlled by the
PC via the USB port. An SDP board operating in single-supply
mode is required.
Table 2. Power Supply Connectors
Connector No.
EXTSUP, Pin 1
EXTSUP, Pin 2
EXTREF, Pin 1
Label
EXTSUP
EXTREF
EXTREF, Pin 2
External Voltage Supplies Description
External analog power supply from 2.7 V to 5.5 V, VDD.
Analog ground.
External voltage reference, VLOGIC.
3.3 V when the evaluation board is controlled through the SDP.
1.8 V to 5.5 V when the evaluation board is controlled through an external connector.
Analog ground.
Table 3. Link Options Setup for SDP Control (Default)
Link
PWRSEL
REF
P1
Option
3.3 V
Not connected
Not connected
Table 4. Link Functions
Link
PWRSEL
REF
P1
Description
This link selects the DAC analog voltage source. There are three options as follows:
The 3.3 V option selects the on-board voltage source from the ADP121.
The USB_SUP option selects the USB supply from Pin 5 of the 120-pin connector of the SDP board.
The EXT_SUP option selects an external supply voltage (EXTSUP connector).
This link selects the reference source. There are four options as follows:
The not connected option uses the internal reference of 2.5 V.
The EXT_REF option selects an external reference source (EXTREF connector).
The 2.5 V option selects the on-board reference from the REF192.
The 5 V option selects the on-board reference from the ADR3450. This reference requires an external supply.
The P1 link selects the DAC digital voltage source. There are two options as follows:
The connected option shorts VDD and VLOGIC. Use this option only when the SDP is not connected.
The not connected option opens the connection of VDD and VLOGIC. Use this option when using the SDP.
Rev. C | Page 6 of 13
EVAL-AD5696RSDZ User Guide
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Table 5. Test Point Descriptions
Test Point
AGND
DGND
SCLK/A0
SDO/SDA
SYNCB/SCL
SDIN/A1
VOUTA to VOUTD
Description
Analog ground.
Digital ground.
Address input. Sets the first LSB of the 7-bit slave address. This signal is named SCLK_A0 in Figure 7.
Serial data line. This pin is used in conjunction with the SCL line to clock data into or out of the 24-bit input shift
register. SDA is a bidirectional, open-drain data line pulled to the supply with an external pull-up resistor. This signal is
named SDO_SDA in Figure 7. If using an external microcontroller, a 2.2 kΩ pull-up resistor connected to VLOGIC is
required.
Serial clock line. This pin is used in conjunction with the SDA line to clock data into or out of the 24-bit input register.
This signal is named SYNCB_SCL in Figure 7. If an external microcontroller is used, a 2.2 kΩ pull-up resistor connected
to VLOGIC is required.
Address input. This pin sets the second LSB of the 7-bit slave address. This signal is named SDIN_A1 in Figure 7.
Analog output voltage from DAC A to DAC D, respectively. The output amplifier has rail-to-rail operation.
Rev. C | Page 7 of 13
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EVAL-AD5696RSDZ User Guide
EVALUATION BOARD SCHEMATICS AND ARTWORK
EXTREF
ADP7118AUJZ-3.3
EN
SENSE/ADJ
1
2
5
4
1-2: 3.3V
U2
AGND
AGND
1
3
5
2
4
6
U3
2
VS
3
SLEEP
1
6
OUTPUT
5 TP
0.1UF
C9
10UF
C7
5-6: EXT_SUP
VDD
AGND
AGND
0.1UF
C13
4
AGND
TSW-103-08-G-D
2
4
6
VREF
TSW-103-08-G-D
C10
1UF
GND
REF192ESZ
1
3
5
AGND
LABEL LINKS:
N
USB_SUPPLY
REF
VDD
3-4: USB_SUP
PWRSEL
AGND
AGND
OSTTC022162
LABEL LINKS:
C19
2.2UF
P
C17
2.2UF
VOUT
P
1
VIN
2
GND
3
N
USB_SUPPLY
1-2: EXT_REF
AGND
3-4: 2.5V
P1
VDD
1
2
1
2
0.1UF
10UF
VDD
ENABLE
TSW-102-08-G-S
AGND
0.1UF
AGND
VOUTA
1 RED
1
DNI
C12
200PF
R7
2.0K
VOUTB
RSTSEL
VOUTC
GAIN
VOUTD
VOUTA
VOUTC
VOUTB
DNI
VOUTC
VOUTD
R6
2.0K
C11
200PF
A1
DNI
C16
200PF
5 4 3 2
DNI
R11
2.0K
DNI
SYNCB
AGND
AD5696RBRUZ
SCL_0
AGND
R8
SDIN/A1
1 WHT
SDIN_A1
0
R9
DNI
5 4 3 2
AGND
AGND
SDO_SDA
0
R5
0
1-1337482-0
1
VOUT_D
VOUTD
DNI
DNI
SDO/SDA
1 WHT
0
R14
SYNCB/SCL
1 WHT
SYNCB_SCL
0
R15
0
AGND
0.1UF
DGND
VREF
10UF
0.1UF
AGND
E2
1 BLK
1
1UF
DNI
2
1 BLK
330OHM
AGND
SCLK
AGND
DGND
AGND
A0
Figure 7. EVAL-AD5696RSDZ Schematic— Power Supply and Signal Routes
Rev. C | Page 8 of 13
R16
0
R17
0
SCLK/A0
1 WHT
SCLK_A0
12475-006
VDD
P
GND
SDA_0
R4
DNI
VOUTD
1 RED
1-1337482-0
1
VOUT_C
C6
GAIN
VOUTC
1 RED
A1
RESET
5 4 3 2
AGND
C8
RSTSEL
SDA
VOUTA
DNI
VREF
A0
LDAC
DNI
SDO
N
RESET
R10
2.0K
0.1UF
AGND
AGND
P
LDAC
VLOGIC
VREF
N
SCLK_A0
VDD
SCL
C15
200PF
ADR3450ARJZ
SDIN
C1
SDIN_A1
13
8
14
12
9
2
1-1337482-0
VOUT_B
DNI
AGND
C3
SDO_SDA
1
AGND
U4
SYNCB_SCL
DNI
5 4 3 2
VIO
1
VOUTB
DNI
DNI
VOUT_SENSE
GND_FORCE GND_SENSE
AGND
VOUTB
1 RED
1-1337482-0
VOUT_A
5-6: 5V
6
VOUT_FORCE
5
AGND
VOUTA
VDD
C4
1UF
C2
N
AGND
C20
OSTTC022162
C18
P
VIO
4
VIN
3
C5
EXTSUP
U5
EVAL-AD5696RSDZ User Guide
UG-726
THE SDP CONNECTOR IMPLEMENTS THE E13 CONNECTOR SPECIFICATIONS STANDARD. THIS IS A STANDARD FOR USE ACROSS ADI AND CANNOT BE MODIFIED
P
VIO
DNI
DGND
12C BUS 1 IS COMMON ACROSS BOTH
CONNECTORS ON SDP - PULL UP RESISTORS
REQUIRED (CONNECTED TO BLACKFIN
GPIO - USE 12C_0 FIRST)
A0
RESETB
GAIN
SPI_SEL1/SPI_SS MUST BE ONLY USED
WITH EXTERNAL SPI FLASH
E1
1
2
R12
USB_SUPPLY
1.8
C21
10UF
600OHM
C22
4.7UF
C23
0.1UF
DGND
AGND
AGND
DGND
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SDP
RESET_IN_N
BMODE1
UART_RX
UART_TX
GND
GND
RESET_OUT_N
SLEEP_N
EEPROM_A0
WAKE_N
NC
NC
NC
NC
NC
NC
GND
GND
NC
NC
NC
CLKOUT
TMR_C
TMR_D
TMR_A
TMR_B
GPIO6
GPIO7
GND
GND
GPIO4
GPIO5
GPIO2
GPIO3
GPIO0
GPIO1
SCL_1
SCL_0
SDA_1
SDA_0
GND
GND
SPI_SEL1/SPI_SS_N
SPI_CLK
SPI_SEL_C_N
SPI_MISO
SPI_SEL_B_N
SPI_MOSI
SPI_SEL_A
GND
SERIAL_INT
GND
SPI_D3
SPORT_TSCLK
SPI_D2
SPORT_DT0
SPORT_DT1
SPORT_TFS
SPORT_DR1
SPORT_RFS
SPORT_TDV1
SPORT_DR0
SPORT_TDV0
SPORT_RSCLK
GND
GND
PAR_FS1
PAR_CLK
PAR_FS3
PAR_FS2
PAR_A1
PAR_A0
PAR_A3
PAR_A2
GND
GND
PAR_CS_N
PAR_INT
PAR_RD_N
PAR_WR_N
PAR_D1
PAR_D0
PAR_D3
PAR_D2
PAR_D5
PAR_D4
GND
GND
PAR_D7
PAR_D6
PAR_D9
PAR_D8
PAR_D11
PAR_D10
PAR_D13
PAR_D12
PAR_D14
GND
GND
PAR_D15
PAR_D17
PAR_D16
PAR_D19
PAR_D18
PAR_D21
PAR_D20
PAR_D23
PAR_D22
GND
GND
USB_VBUS
VIO(+3.3V)
GND
GND
GND
GND
NC
NC
VIN
NC
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
VIN: USE THIS PIN TO POWER
THE SDP REQUIRES 5V 300MA
DGND
R3
100K
R0603
TOL=1
C24
10UF
1
2
3
6
7
C25
0.1UF
N
U1
8
VCC
A0
A1
A2
SDA
DGND
24LC32A-I/ST
5 TSSOP8
SCL
WP
VSS
EEPROM
4
BOARD ID EEPROM (24LC32) MUST BE ON I2C BUS 0
DGND
BMODE1: PULL UP WITH A 10K RESISTOR TO SET SDP
TO BOOT FROM A SPI FLASH ON THE DAUGHTER BOARD
A1
LDACB
RSTSEL
SCL_0
SDA_0
MAIN 12C BUS (CONNECTED TO BLACKFIN TWI - PULL UP RESISTORS NOT REQUIRED
SCLK
SDO
SDIN
SYNCB
DNI
R20
100K
R0603
TOL=1
VIO
WHEN USING SPI INTERFACE, BE AWARE OF ADDING A PULL UP
ON THE SPI_SEL_A/B/C LINES THAT ARE ACTIVE LOW ENABLED
SINCE SPI IS A SHARED BUS, ENSURE THAT ANY SPI DEVICE ON DAUGHTER BOARD
IS NOT ACTIVELY DRIVING THE MISO DATA LINE UNLESS PROPERLY ADDRESSED WITH
AN ACTIVE LOW CHIP SELECT. ENSURE ALSO THAT THE SPI CLK LINE IS NOT HELD
HIGH OR LOW BY YOUR BOARD AT POWER UP. FAILURE TO MEET THIS
RESULT TO A NON-FUNCTIONAL SYSTEM.
PMOD INTERFACE TYPE 2A (EXPANDED SPI)
DNI
PMOD
SCLK_A0
SDO_SDA
SDIN_A1
SYNCB_SCL
R13
VIO
DGND
0
1
2
3
4
5
6
P1
P7
P2
P8
P3
P9
P10
P4
GND
GND
VCC
VCC
7
8
9
10
11
12
LDACB
RESETB
RSTSEL
GAIN
DGND
TSW-106-08-G-D
VDD
VIO
VIO: USE TO SET IO VOLTAGE MAX DRAW 20MA
CONNECT P1-P4 AND P7-P10 TO SIGNAL BUSES FOR SPI
FX8-120S-SV(21)
: USE ONLY TO POWER THE EEPROM(3MA MAX DRAW)
CONNECT VCC TO 3.3V DIGITAL REFERENCE OR LEAVE FLOATING
DGND
IF VCC WILL BE USED TO POWER THE MODULE, PROVIDE PROTECTION CIRCUIT BLOCK IF POSSIBLE
Figure 8. EVAL-AD5696RSDZ Schematic—SDP Connector
Rev. C | Page 9 of 13
12475-007
SDP CONNECTOR
R1
100K
R0603
R2
100K
R0603
TOL=1
EVAL-AD5696RSDZ User Guide
12475-008
UG-726
12475-009
Figure 9. EVAL-AD5696RSDZ Component Placement
Figure 10. EVAL-AD5696RSDZ Top Side Routing
Rev. C | Page 10 of 13
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12475-010
EVAL-AD5696RSDZ User Guide
Figure 11. EVAL-AD5696RSDZ Bottom Side Routing
Rev. C | Page 11 of 13
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EVAL-AD5696RSDZ User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 6.
Qty
1
1
1
1
Reference Designator
U1
U2
U3
U4
1
6
3
3
1
1
1
1
1
1
2
1
2
1
1
4
2
1
2
4
U5
C1, C2, C5, C6, C18, C25
C4, C17, C19
C3, C20, C24
C8
C21
C22
C23
E1
E2
EXTREF, EXTSUP
P1
REF, PWRSEL
R12
R13
R5, R9, R15, R17
R2, R3
SDP
AGND, DGND
SCLK/A0, SDIN/A1,
SDO/SDA, SYNCB/SCL
VOUTA to VOUTD
PMOD, C11, C12, C15,
C16, R1, R4, R6 to R8,
R10, R11, R14, R16, R20,
VOUT_A to VOUT_D
4
19
1
2
Description
32 kΩ, I2C serial EEPROM (24LC32)
150 mA, low quiescent current, CMOS linear regulator
2.5 V precision micropower, low dropout, low voltage reference
Quad, 16-bit nanoDAC+ with 2 ppm/°C on-chip reference and I2C
interface
Micropower, high accuracy, 5.0 V voltage reference
Capacitor, 0.1 µF, 16 V, 0402
Capacitor, 1 µF, 25 V, X5R
Capacitor, 10 µF, 10 V, tantalum
Capacitor, 1 µF, 16 V, tantalum
Capacitor, 10 µF, 25 V, X5R
Capacitor, 4.7 µF, 25 V, X5R
Capacitor, 0.1 µF, 25 V, X8R
Ferrite bead, 600 Ω
Ferrite bead, 330 Ω
2-pin terminal block
2-pin link/jumper
6-pin link/jumper
Resistor, 1.8 Ω, 5%, 1/10 W, thick film chip
Resistor, 0 Ω, SMD
Resistor, 0 Ω, 5%, 1/16 W, 0603
Resistor, 100 kΩ, 1%, 1/10 W
120-pin female connector
Black test point
White test point
Supplier/Part Number 1, 2
FEC/1331330
Analog Devices/ADP121
Analog Devices/REF192
Analog Devices/AD5696R
Red test point
Do not insert/do not populate
Generic
Not inserted
FEC refers to Farnell Electronic Component Distributors.
Generic indicates that any device with the specified value, size, and rating can be used.
Rev. C | Page 12 of 13
Analog Devices/ADR3450
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
Generic
FEC/1324660 or Digi-Key/H1219-ND
Generic
Generic
EVAL-AD5696RSDZ User Guide
UG-726
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
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©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG12475-0-6/17(C)
Rev. C | Page 13 of 13
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